src/vm/jit/sparc64/codegen.c

   1 /* src/vm/jit/sparc64/codegen.c - machine code generator for Sparc
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29             Alexander Jordan
  30             Edwin Steiner
  31
  32    $Id: codegen.c 4644 2006-03-16 18:44:46Z edwin $
  33
  34 */
  35
  36
  37 #include "config.h"
  38
  39 #include <stdio.h>
  40 #include <assert.h>
  41
  42
  43 #include "vm/types.h"
  44
  45 #include "md-abi.h"
  46
  47 /* #include "vm/jit/sparc64/arch.h" */
  48 #include "vm/jit/sparc64/codegen.h"
  49
  50 #include "mm/memory.h"
  51
  52 #include "native/jni.h"
  53 #include "native/native.h"
  54 #include "vm/builtin.h"
  55 #include "vm/exceptions.h"
  56 #include "vm/global.h"
  57 #include "vm/loader.h"
  58 #include "vm/options.h"
  59 #include "vm/stringlocal.h"
  60 #include "vm/jit/asmpart.h"
  61 #include "vm/jit/codegen-common.h"
  62 #include "vm/jit/dseg.h"
  63 #include "vm/jit/emit-common.h"
  64 #include "vm/jit/jit.h"
  65 #include "vm/jit/parse.h"
  66 #include "vm/jit/patcher.h"
  67 #include "vm/jit/reg.h"
  68
  69 /* XXX use something like this for window control ?
  70  * #define REG_PV (own_window?REG_PV_CALLEE:REG_PV_CALLER)
  71  */
  72 #define REG_PV REG_PV_CALLEE
  73
  74 bool fits_13(s4 disp)
  75 {
  76         /*  printf("fits disp %d?\n", disp); */
  77
  78         return (disp >= -4096) && (disp <= 4095);
  79 }
  80
  81 /* codegen *********************************************************************
  82
  83    Generates machine code.
  84
  85 *******************************************************************************/
  86
  87 bool codegen(jitdata *jd)
  88 {
  89         methodinfo         *m;
  90         codeinfo           *code;
  91         codegendata        *cd;
  92         registerdata       *rd;
  93         s4                  len, s1, s2, s3, d, disp;
  94         varinfo            *var;
  95         basicblock         *bptr;
  96         instruction        *iptr;
  97         exception_entry    *ex;
  98         u2                  currentline;
  99         constant_classref  *cr;
 100         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
 101         unresolved_method  *um;
 102         builtintable_entry *bte;
 103         methoddesc         *md;
 104         fieldinfo          *fi;
 105         unresolved_field   *uf;
 106         s4                  fieldtype;
 107         s4                  varindex;
 108
 109         /* get required compiler data */
 110
 111         m  = jd->m;
 112         code = jd->code;
 113         cd = jd->cd;
 114         rd = jd->rd;
 115
 116         /* prevent compiler warnings */
 117
 118         d = 0;
 119         currentline = 0;
 120         lm = NULL;
 121         bte = NULL;
 122
 123         {
 124         s4 i, p, t, l;
 125         s4 savedregs_num, localbase;
 126
 127 #if 0 /* no leaf optimization yet */
 128         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the RA */
 129 #endif
 130         savedregs_num = WINSAVE_CNT + ABIPARAMS_CNT; /* register-window save area */
 131
 132
 133         /* space to save used callee saved registers */
 134
 135         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 136         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 137
 138         cd->stackframesize = rd->memuse + savedregs_num;
 139
 140 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
 141         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 142                 cd->stackframesize++;
 143 #endif
 144
 145         /* keep stack 16-byte aligned (ABI requirement) */
 146
 147         if (cd->stackframesize & 1)
 148                 cd->stackframesize++;
 149
 150         /* create method header */
 151
 152         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
 153         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
 154
 155 #if defined(ENABLE_THREADS)
 156         /* IsSync contains the offset relative to the stack pointer for the
 157            argument of monitor_exit used in the exception handler. Since the
 158            offset could be zero and give a wrong meaning of the flag it is
 159            offset by one.
 160         */
 161
 162         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 163                 (void) dseg_add_unique_s4(cd, (rd->memuse + 1) * 8); /* IsSync        */
 164         else
 165 #endif
 166                 (void) dseg_add_unique_s4(cd, 0);                  /* IsSync          */
 167
 168         (void) dseg_add_unique_s4(cd, jd->isleafmethod);       /* IsLeaf          */
 169         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
 170         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
 171         dseg_addlinenumbertablesize(cd);
 172         (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize   */
 173
 174         /* create exception table */
 175
 176         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
 177                 dseg_add_target(cd, ex->start);
 178                 dseg_add_target(cd, ex->end);
 179                 dseg_add_target(cd, ex->handler);
 180                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
 181         }
 182
 183         /* save register window and create stack frame (if necessary) */
 184
 185         if (cd->stackframesize)
 186                 M_SAVE(REG_SP, -cd->stackframesize * 8, REG_SP);
 187
 188
 189         /* save callee saved float registers (none right now) */
 190 #if 0
 191         p = cd->stackframesize;
 192         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 193                 p--; M_DST(rd->savfltregs[i], REG_SP, USESTACK + (p * 8));
 194         }
 195 #endif
 196
 197 #if !defined(NDEBUG)
 198         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 199                 emit_verbosecall_enter(jd);
 200 #endif
 201
 202
 203
 204         /* take arguments out of register or stack frame */
 205
 206         md = m->parseddesc;
 207
 208         /* when storing locals, use this as base */
 209         localbase = JITSTACK;
 210
 211         /* since the register allocator does not know about the shifting window
 212          * arg regs need to be copied via the stack
 213          */
 214         if (md->argintreguse > 0) {
 215                 /* allocate scratch space for copying in to save(i&l) regs */
 216                 M_SUB_IMM(REG_SP, INT_ARG_CNT * 8, REG_SP);
 217
 218                 localbase += INT_ARG_CNT * 8;
 219
 220                 /* XXX could use the param slots on the stack for this! */
 221                 for (p = 0; p < INT_ARG_CNT; p++)
 222                         M_STX(REG_WINDOW_TRANSPOSE(rd->argintregs[p]), REG_SP, JITSTACK + (p * 8));
 223         }
 224
 225
 226         for (p = 0, l = 0; p < md->paramcount; p++) {
 227                 t = md->paramtypes[p].type;
 228
 229                 varindex = jd->local_map[l * 5 + t];
 230
 231                 l++;
 232                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 233                         l++;
 234
 235                 if (varindex == UNUSED)
 236                         continue;
 237
 238                 var = VAR(varindex);
 239
 240                 s1 = md->params[p].regoff;
 241                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 242                         if (!md->params[p].inmemory) {           /* register arguments    */
 243                                 /*s2 = rd->argintregs[s1];*/
 244                                 /*s2 = REG_WINDOW_TRANSPOSE(s2);*/
 245                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 246                                         /*M_INTMOVE(s2, var->vv.regoff);*/
 247                                         M_LDX(var->vv.regoff, REG_SP, JITSTACK + (s1 * 8));
 248
 249                                 } else {                             /* reg arg -> spilled    */
 250                                         /*M_STX(s2, REG_SP, (WINSAVE_CNT + var->vv.regoff) * 8);*/
 251
 252                                         M_LDX(REG_ITMP1, REG_SP, JITSTACK + (s1 * 8));
 253                                         M_STX(REG_ITMP1, REG_SP, localbase + (var->vv.regoff * 8));
 254                                 }
 255
 256                         } else {                                 /* stack arguments       */
 257                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 258                                         M_LDX(var->vv.regoff, REG_FP, JITSTACK + (s1 * 8));
 259
 260                                 } else {                             /* stack arg -> spilled  */
 261                                         /* add the callers window save registers */
 262                                         var->vv.regoff = cd->stackframesize + JITSTACK_CNT + s1;
 263                                 }
 264                         }
 265
 266                 } else {                                     /* floating args         */
 267                         if (!md->params[p].inmemory) {           /* register arguments    */
 268                                 s2 = rd->argfltregs[s1];
 269                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 270                                         M_FLTMOVE(s2, var->vv.regoff);
 271
 272                                 } else {                                         /* reg arg -> spilled    */
 273                                         M_DST(s2, REG_SP, localbase + (var->vv.regoff) * 8);
 274                                 }
 275
 276                         } else {                                 /* stack arguments       */
 277                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 278                                         M_DLD(var->vv.regoff, REG_FP, JITSTACK + (s1 * 8));
 279
 280                                 } else {                             /* stack-arg -> spilled  */
 281                                         var->vv.regoff = cd->stackframesize + JITSTACK_CNT + s1;
 282                                 }
 283                         }
 284                 }
 285         } /* end for */
 286
 287         if (md->argintreguse > 0) {
 288                 /* release scratch space */
 289                 M_ADD_IMM(REG_SP, INT_ARG_CNT * 8, REG_SP);
 290         }
 291
 292
 293         /* XXX monitor enter */
 294
 295
 296
 297
 298         }
 299
 300         /* end of header generation */
 301
 302         /* create replacement points */
 303
 304         REPLACEMENT_POINTS_INIT(cd, jd);
 305
 306         /* walk through all basic blocks */
 307
 308         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 309
 310                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 311
 312                 if (bptr->flags >= BBREACHED) {
 313
 314                 /* branch resolving */
 315
 316                 codegen_resolve_branchrefs(cd, bptr);
 317
 318                 /* handle replacement points */
 319
 320 #if 0
 321                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 322                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 323
 324                         replacementpoint++;
 325                 }
 326 #endif
 327
 328                 /* copy interface registers to their destination */
 329
 330                 len = bptr->indepth;
 331                 MCODECHECK(64+len);
 332
 333 #if defined(ENABLE_LSRA)
 334 #error XXX LSRA not tested yet
 335                 if (opt_lsra) {
 336                 while (len) {
 337                         len--;
 338                         src = bptr->invars[len];
 339                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 340                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 341                                         if (!(src->flags & INMEMORY))
 342                                                 d = src->vv.regoff;
 343                                         else
 344                                                 d = REG_ITMP1;
 345                                         M_INTMOVE(REG_ITMP1, d);
 346                                         emit_store(jd, NULL, src, d);
 347                                 }
 348                         }
 349                 } else {
 350 #endif
 351                 while (len) {
 352                         len--;
 353                         var = VAR(bptr->invars[len]);
 354                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 355                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
 356                                 M_INTMOVE(REG_ITMP2_XPTR, d);
 357                                 emit_store(jd, NULL, var, d);
 358                         }
 359                         else {
 360                                 assert((var->flags & INOUT));
 361                         }
 362                 }
 363 #if defined(ENABLE_LSRA)
 364                 }
 365 #endif
 366                 /* walk through all instructions */
 367
 368                 len = bptr->icount;
 369
 370                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
 371                         if (iptr->line != currentline) {
 372                                 dseg_addlinenumber(cd, iptr->line);
 373                                 currentline = iptr->line;
 374                         }
 375
 376                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 377
 378                 switch (iptr->opc) {
 379
 380                 case ICMD_INLINE_START:
 381                 case ICMD_INLINE_END:
 382                         break;
 383
 384                 case ICMD_NOP:        /* ...  ==> ...                                 */
 385                         break;
 386
 387                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 388
 389                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 390                         emit_nullpointer_check(cd, iptr, s1);
 391                         break;
 392
 393                 /* constant operations ************************************************/
 394
 395                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 396
 397                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 398                         ICONST(d, iptr->sx.val.i);
 399                         emit_store_dst(jd, iptr, d);
 400                         break;
 401
 402                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 403
 404                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 405                         LCONST(d, iptr->sx.val.l);
 406                         emit_store_dst(jd, iptr, d);
 407                         break;
 408
 409                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 410
 411                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 412                         disp = dseg_add_float(cd, iptr->sx.val.f);
 413                         M_FLD(d, REG_PV, disp);
 414                         emit_store_dst(jd, iptr, d);
 415                         break;
 416
 417                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 418
 419                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 420                         disp = dseg_add_double(cd, iptr->sx.val.d);
 421                         M_DLD(d, REG_PV, disp);
 422                         emit_store_dst(jd, iptr, d);
 423                         break;
 424
 425                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 426
 427                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 428
 429                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 430                                 cr   = iptr->sx.val.c.ref;
 431                                 disp = dseg_add_unique_address(cd, cr);
 432
 433                                 codegen_add_patch_ref(cd, PATCHER_aconst, cr, disp);
 434
 435                                 M_ALD(d, REG_PV, disp);
 436
 437                         }
 438                         else {
 439                                 if (iptr->sx.val.anyptr == NULL) {
 440                                         M_INTMOVE(REG_ZERO, d);
 441                                 }
 442                                 else {
 443                                         disp = dseg_add_address(cd, iptr->sx.val.anyptr);
 444                                         M_ALD(d, REG_PV, disp);
 445                                 }
 446                         }
 447                         emit_store_dst(jd, iptr, d);
 448                         break;
 449
 450
 451                 /* load/store/copy/move operations ************************************/
 452
 453                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 454                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 455                 case ICMD_ALOAD:      /* ...  ==> ..., content of local variable      */
 456                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 457                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 458                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 459                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 460                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 461                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
 462                 case ICMD_COPY:
 463                 case ICMD_MOVE:
 464
 465                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 466                         break;
 467
 468                 case ICMD_ASTORE:
 469                         if (!(iptr->flags.bits & INS_FLAG_RETADDR))
 470                                 emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 471                         break;
 472
 473
 474                 /* pop/dup/swap operations ********************************************/
 475
 476                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 477
 478                 case ICMD_POP:        /* ..., value  ==> ...                          */
 479                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 480                         break;
 481
 482
 483                 /* integer operations *************************************************/
 484
 485                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 486                 case ICMD_LNEG:
 487
 488                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 489                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 490                         M_SUB(REG_ZERO, s1, d);
 491                         emit_store_dst(jd, iptr, d);
 492                         break;
 493
 494                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 495
 496                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 497                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 498                         M_INTMOVE(s1, d);
 499                         emit_store_dst(jd, iptr, d);
 500                         break;
 501
 502                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 503
 504                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 505                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 506                         M_SRA_IMM(s1, 0, d); /* sign extend upper 32 bits */
 507                         emit_store_dst(jd, iptr, d);
 508                         break;
 509
 510                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 511
 512                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 513                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 514                         M_SLLX_IMM(s1, 56, d);
 515                         M_SRAX_IMM( d, 56, d);
 516                         emit_store_dst(jd, iptr, d);
 517                         break;
 518
 519                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 520
 521                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 522                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 523                         M_SLLX_IMM(s1, 48, d);
 524                         M_SRLX_IMM( d, 48, d);
 525                         emit_store_dst(jd, iptr, d);
 526                         break;
 527
 528                 case ICMD_INT2SHORT:   /* ..., value  ==> ..., value                   */
 529
 530                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 531                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 532                         M_SLLX_IMM(s1, 48, d);
 533                         M_SRAX_IMM( d, 48, d);
 534                         emit_store_dst(jd, iptr, d);
 535                         break;
 536
 537                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 538                 case ICMD_LADD:
 539
 540                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 541                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 542                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 543                         M_ADD(s1, s2, d);
 544                         emit_store_dst(jd, iptr, d);
 545                         break;
 546
 547                 case ICMD_IINC:
 548                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 549                                       /* sx.val.i = constant                             */
 550
 551                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 552                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 553                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 554                                 M_ADD_IMM(s1, iptr->sx.val.i, d);
 555                         } else {
 556                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 557                                 M_ADD(s1, REG_ITMP2, d);
 558                         }
 559                         emit_store_dst(jd, iptr, d);
 560                         break;
 561
 562                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 563                                       /* sx.val.l = constant                             */
 564
 565                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 566                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 567                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 568                                 M_ADD_IMM(s1, iptr->sx.val.l, d);
 569                         } else {
 570                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 571                                 M_ADD(s1, REG_ITMP2, d);
 572                         }
 573                         emit_store_dst(jd, iptr, d);
 574                         break;
 575
 576                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 577                 case ICMD_LSUB:
 578
 579                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 580                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 581                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 582                         M_SUB(s1, s2, d);
 583                         emit_store_dst(jd, iptr, d);
 584                         break;
 585
 586                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 587                                       /* sx.val.i = constant                             */
 588
 589                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 590                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 591                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 592                                 M_SUB_IMM(s1, iptr->sx.val.i, d);
 593                         } else {
 594                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 595                                 M_SUB(s1, REG_ITMP2, d);
 596                         }
 597                         emit_store_dst(jd, iptr, d);
 598                         break;
 599
 600                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 601                                       /* sx.val.l = constant                             */
 602
 603                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 604                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 605                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 606                                 M_SUB_IMM(s1, iptr->sx.val.l, d);
 607                         } else {
 608                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 609                                 M_SUB(s1, REG_ITMP2, d);
 610                         }
 611                         emit_store_dst(jd, iptr, d);
 612                         break;
 613
 614                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 615                 case ICMD_LMUL:
 616
 617                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 618                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 619                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 620                         M_MULX(s1, s2, d);
 621                         emit_store_dst(jd, iptr, d);
 622                         break;
 623
 624                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 625                                       /* sx.val.i = constant                             */
 626
 627                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 628                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 629                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 630                                 M_MULX_IMM(s1, iptr->sx.val.i, d);
 631                         } else {
 632                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 633                                 M_MULX(s1, REG_ITMP2, d);
 634                         }
 635                         emit_store_dst(jd, iptr, d);
 636                         break;
 637
 638                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 639                                       /* sx.val.l = constant                             */
 640
 641                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 642                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 643                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 644                                 M_MULX_IMM(s1, iptr->sx.val.l, d);
 645                         } else {
 646                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 647                                 M_MULX(s1, REG_ITMP2, d);
 648                         }
 649                         emit_store_dst(jd, iptr, d);
 650                         break;
 651
 652                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 653 /* XXX could also clear Y and use 32bit div */
 654                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 655                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 656                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 657                         emit_arithmetic_check(cd, iptr, s2);
 658                         M_ISEXT(s1, s1);
 659                         /* XXX trim s2 like s1 ? */
 660                         M_DIVX(s1, s2, d);
 661                         emit_store_dst(jd, iptr, d);
 662                         break;
 663
 664                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 665
 666                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 667                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 668                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 669                         emit_arithmetic_check(cd, iptr, s2);
 670                         M_DIVX(s1, s2, d);
 671                         emit_store_dst(jd, iptr, d);
 672                         break;
 673
 674                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 675
 676                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 677                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 678                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 679                         emit_arithmetic_check(cd, iptr, s2);
 680                         M_ISEXT(s1, s1);
 681                         /* XXX trim s2 like s1 ? */
 682                         M_DIVX(s1, s2, d);
 683                         M_MULX(s2, d, d);
 684                         M_SUB(s1, d, d);
 685                         emit_store_dst(jd, iptr, d);
 686                         break;
 687
 688                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 689
 690                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 691                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 692                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 693                         emit_arithmetic_check(cd, iptr, s2);
 694                         M_DIVX(s1, s2, d);
 695                         M_MULX(s2, d, d);
 696                         M_SUB(s1, d, d);
 697                         emit_store_dst(jd, iptr, d);
 698                         break;
 699
 700                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 701                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 702
 703                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 704                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 705                         M_SRAX_IMM(s1, 63, REG_ITMP2);
 706                         M_SRLX_IMM(REG_ITMP2, 64 - iptr->sx.val.i, REG_ITMP2);
 707                         M_ADD(s1, REG_ITMP2, REG_ITMP2);
 708                         M_SRAX_IMM(REG_ITMP2, iptr->sx.val.i, d);
 709                         emit_store_dst(jd, iptr, d);
 710                         break;
 711
 712                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 713                 case ICMD_LSHL:
 714
 715                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 716                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 717                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 718                         M_SLLX(s1, s2, d);
 719                         emit_store_dst(jd, iptr, d);
 720                         break;
 721
 722                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 723                 case ICMD_LSHLCONST:  /* val.i = constant                             */
 724
 725                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 726                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 727                         M_SLLX_IMM(s1, iptr->sx.val.i, d);
 728                         emit_store_dst(jd, iptr, d);
 729                         break;
 730
 731                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 732
 733                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 734                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 735                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 736                         M_SRA(s1, s2, d);
 737                         emit_store_dst(jd, iptr, d);
 738                         break;
 739
 740                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 741                                       /* sx.val.i = constant                             */
 742
 743                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 744                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 745                         M_SRA_IMM(s1, iptr->sx.val.i, d);
 746                         emit_store_dst(jd, iptr, d);
 747                         break;
 748
 749                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 750
 751                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 752                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 753                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 754                         M_SRL(s1, s2, d);
 755                         emit_store_dst(jd, iptr, d);
 756                         break;
 757
 758                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 759                                       /* sx.val.i = constant                             */
 760
 761                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 762                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 763                         M_SRL_IMM(s1, iptr->sx.val.i, d);
 764                         emit_store_dst(jd, iptr, d);
 765                         break;
 766
 767                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 768
 769                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 770                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 771                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 772                         M_SRAX(s1, s2, d);
 773                         emit_store_dst(jd, iptr, d);
 774                         break;
 775
 776                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
 777                                       /* sx.val.i = constant                             */
 778
 779                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 780                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 781                         M_SRAX_IMM(s1, iptr->sx.val.i, d);
 782                         emit_store_dst(jd, iptr, d);
 783                         break;
 784
 785                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 786
 787                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 788                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 789                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 790                         M_SRLX(s1, s2, d);
 791                         emit_store_dst(jd, iptr, d);
 792                         break;
 793
 794                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 795                                       /* sx.val.i = constant                             */
 796
 797                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 798                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 799                         M_SRLX_IMM(s1, iptr->sx.val.i, d);
 800                         emit_store_dst(jd, iptr, d);
 801                         break;
 802
 803                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 804                 case ICMD_LAND:
 805
 806                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 807                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 808                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 809                         M_AND(s1, s2, d);
 810                         emit_store_dst(jd, iptr, d);
 811                         break;
 812
 813                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
 814                                       /* sx.val.i = constant                             */
 815
 816                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 817                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 818                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 819                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 820                         } else {
 821                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 822                                 M_AND(s1, REG_ITMP2, d);
 823                         }
 824                         emit_store_dst(jd, iptr, d);
 825                         break;
 826
 827                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
 828                                       /* sx.val.i = constant                             */
 829
 830                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 831                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 832                         M_ISEXT(s1, s1); /* trim for 32-bit compare (BGEZ) */
 833                         if (s1 == d) {
 834                                 M_MOV(s1, REG_ITMP1);
 835                                 s1 = REG_ITMP1;
 836                         }
 837                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 0xffff)) {
 838                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 839                                 M_BGEZ(s1, 4);
 840                                 M_NOP;
 841                                 M_SUB(REG_ZERO, s1, d);
 842                                 M_AND_IMM(d, iptr->sx.val.i, d);
 843                         } else {
 844                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 845                                 M_AND(s1, REG_ITMP2, d);
 846                                 M_BGEZ(s1, 4);
 847                                 M_NOP;
 848                                 M_SUB(REG_ZERO, s1, d);
 849                                 M_AND(d, REG_ITMP2, d);
 850                         }
 851                         M_SUB(REG_ZERO, d, d);
 852                         emit_store_dst(jd, iptr, d);
 853                         break;
 854
 855                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
 856                                       /* sx.val.l = constant                             */
 857
 858                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 859                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 860                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 861                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 862                         } else {
 863                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 864                                 M_AND(s1, REG_ITMP2, d);
 865                         }
 866                         emit_store_dst(jd, iptr, d);
 867                         break;
 868
 869                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
 870                                       /* sx.val.l = constant                             */
 871
 872                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 873                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 874                         if (s1 == d) {
 875                                 M_MOV(s1, REG_ITMP1);
 876                                 s1 = REG_ITMP1;
 877                         }
 878                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 879                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 880                                 M_BGEZ(s1, 4);
 881                                 M_NOP;
 882                                 M_SUB(REG_ZERO, s1, d);
 883                                 M_AND_IMM(d, iptr->sx.val.l, d);
 884                         } else {
 885                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 886                                 M_AND(s1, REG_ITMP2, d);
 887                                 M_BGEZ(s1, 4);
 888                                 M_NOP;
 889                                 M_SUB(REG_ZERO, s1, d);
 890                                 M_AND(d, REG_ITMP2, d);
 891                         }
 892                         M_SUB(REG_ZERO, d, d);
 893                         emit_store_dst(jd, iptr, d);
 894                         break;
 895
 896                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
 897                 case ICMD_LOR:
 898
 899                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 900                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 901                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 902                         M_OR(s1,s2, d);
 903                         emit_store_dst(jd, iptr, d);
 904                         break;
 905
 906                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
 907                                       /* sx.val.i = constant                             */
 908
 909                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 910                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 911                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 912                                 M_OR_IMM(s1, iptr->sx.val.i, d);
 913                         } else {
 914                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 915                                 M_OR(s1, REG_ITMP2, d);
 916                         }
 917                         emit_store_dst(jd, iptr, d);
 918                         break;
 919
 920                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
 921                                       /* sx.val.l = constant                             */
 922
 923                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 924                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 925                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 926                                 M_OR_IMM(s1, iptr->sx.val.l, d);
 927                         } else {
 928                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 929                                 M_OR(s1, REG_ITMP2, d);
 930                         }
 931                         emit_store_dst(jd, iptr, d);
 932                         break;
 933
 934                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
 935                 case ICMD_LXOR:
 936
 937                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 938                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 939                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 940                         M_XOR(s1, s2, d);
 941                         emit_store_dst(jd, iptr, d);
 942                         break;
 943
 944                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 945                                       /* sx.val.i = constant                             */
 946
 947                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 948                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 949                         if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
 950                                 M_XOR_IMM(s1, iptr->sx.val.i, d);
 951                         } else {
 952                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 953                                 M_XOR(s1, REG_ITMP2, d);
 954                         }
 955                         emit_store_dst(jd, iptr, d);
 956                         break;
 957
 958                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 959                                       /* sx.val.l = constant                             */
 960
 961                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 962                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 963                         if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
 964                                 M_XOR_IMM(s1, iptr->sx.val.l, d);
 965                         } else {
 966                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 967                                 M_XOR(s1, REG_ITMP2, d);
 968                         }
 969                         emit_store_dst(jd, iptr, d);
 970                         break;
 971
 972
 973                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
 974
 975                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 976                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 977                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 978                         M_CMP(s1, s2);
 979                         M_MOV(REG_ZERO, d);
 980                         M_XCMOVLT_IMM(-1, d);
 981                         M_XCMOVGT_IMM(1, d);
 982                         emit_store_dst(jd, iptr, d);
 983                         break;
 984
 985
 986                 /* floating operations ************************************************/
 987
 988                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
 989
 990                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 991                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
 992                         M_FNEG(s1, d);
 993                         emit_store_dst(jd, iptr, d);
 994                         break;
 995
 996                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
 997
 998                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 999                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1000                         M_DNEG(s1, d);
1001                         emit_store_dst(jd, iptr, d);
1002                         break;
1003
1004                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1005
1006                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1007                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1008                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1009                         M_FADD(s1, s2, d);
1010                         emit_store_dst(jd, iptr, d);
1011                         break;
1012
1013                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1014
1015                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1016                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1017                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1018                         M_DADD(s1, s2, d);
1019                         emit_store_dst(jd, iptr, d);
1020                         break;
1021
1022                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1023
1024                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1025                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1026                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1027                         M_FSUB(s1, s2, d);
1028                         emit_store_dst(jd, iptr, d);
1029                         break;
1030
1031                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1032
1033                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1034                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1035                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1036                         M_DSUB(s1, s2, d);
1037                         emit_store_dst(jd, iptr, d);
1038                         break;
1039
1040                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1041
1042                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1043                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1044                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1045                         M_FMUL(s1, s2, d);
1046                         emit_store_dst(jd, iptr, d);
1047                         break;
1048
1049                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1050
1051                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1052                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1053                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1054                         M_DMUL(s1, s2, d);
1055                         emit_store_dst(jd, iptr, d);
1056                         break;
1057
1058                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1059
1060                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1061                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1062                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1063                         M_FDIV(s1, s2, d);
1064                         emit_store_dst(jd, iptr, d);
1065                         break;
1066
1067                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1068
1069                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1070                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1071                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1072                         M_DDIV(s1, s2, d);
1073                         emit_store_dst(jd, iptr, d);
1074                         break;
1075
1076                 case ICMD_I2F:
1077                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1078                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1079                         disp = dseg_add_float(cd, 0.0);
1080                         M_IST (s1, REG_PV_CALLEE, disp);
1081                         M_FLD (d, REG_PV_CALLEE, disp);
1082                         M_CVTIF (d, d); /* rd gets translated to double target register */
1083                         emit_store_dst(jd, iptr, d);
1084                         break;
1085
1086                 case ICMD_I2D:
1087                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1088                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1089                         disp = dseg_add_float(cd, 0.0);
1090                         M_IST (s1, REG_PV_CALLEE, disp);
1091                         M_FLD (REG_FTMP2, REG_PV_CALLEE, disp); /* REG_FTMP2 needs to be a double temp */
1092                         M_CVTID (REG_FTMP2, d); /* rd gets translated to double target register */
1093                         emit_store_dst(jd, iptr, d);
1094                         break;
1095
1096                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1097                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1098                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1099                         disp = dseg_add_float(cd, 0.0);
1100                         M_CVTFI(s1, REG_FTMP2);
1101                         M_FST(REG_FTMP2, REG_PV_CALLEE, disp);
1102                         M_ILD(d, REG_PV, disp);
1103                         emit_store_dst(jd, iptr, d);
1104                         break;
1105
1106
1107                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value             */
1108                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1109                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1110                         disp = dseg_add_float(cd, 0.0);
1111                         M_CVTDI(s1, REG_FTMP2);
1112                         M_FST(REG_FTMP2, REG_PV, disp);
1113                         M_ILD(d, REG_PV, disp);
1114                         emit_store_dst(jd, iptr, d);
1115                         break;
1116
1117                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1118                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1119                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1120                         disp = dseg_add_double(cd, 0.0);
1121                         M_CVTFL(s1, REG_FTMP2); /* FTMP2 needs to be double reg */
1122                         M_DST(REG_FTMP2, REG_PV, disp);
1123                         M_LDX(d, REG_PV, disp);
1124                         emit_store_dst(jd, iptr, d);
1125                         break;
1126
1127                 case ICMD_D2L:       /* ..., value  ==> ..., (long) value             */
1128                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1129                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1130                         disp = dseg_add_double(cd, 0.0);
1131                         M_CVTDL(s1, REG_FTMP2); /* FTMP2 needs to be double reg */
1132                         M_DST(REG_FTMP2, REG_PV, disp);
1133                         M_LDX(d, REG_PV, disp);
1134                         emit_store_dst(jd, iptr, d);
1135                         break;
1136
1137                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1138
1139                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1140                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1141                         M_CVTFD(s1, d);
1142                         emit_store_dst(jd, iptr, d);
1143                         break;
1144
1145                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1146
1147                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1148                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1149                         M_CVTDF(s1, d);
1150                         emit_store_dst(jd, iptr, d);
1151                         break;
1152
1153         /* XXX merge F/D versions? only compare instr. is different */
1154                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1155
1156                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1157                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1158                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1159                         M_FCMP(s1,s2);
1160                         M_OR_IMM(REG_ZERO, -1, d); /* less by default (less or unordered) */
1161                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1162                         M_CMOVFGT_IMM(1, d); /* 1 if greater */
1163                         emit_store_dst(jd, iptr, d);
1164                         break;
1165
1166                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1167
1168                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1169                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1170                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1171                         M_DCMP(s1,s2);
1172                         M_OR_IMM(REG_ZERO, -1, d); /* less by default (less or unordered) */
1173                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1174                         M_CMOVFGT_IMM(1, d); /* 1 if greater */
1175                         emit_store_dst(jd, iptr, d);
1176                         break;
1177
1178                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1179
1180                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1181                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1182                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1183                         M_FCMP(s1,s2);
1184                         M_OR_IMM(REG_ZERO, 1, d); /* greater by default (greater or unordered) */
1185                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1186                         M_CMOVFLT_IMM(-1, d); /* -1 if less */
1187                         emit_store_dst(jd, iptr, d);
1188                         break;
1189
1190                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1191
1192                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1193                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1194                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1195                         M_DCMP(s1,s2);
1196                         M_OR_IMM(REG_ZERO, 1, d); /* greater by default (greater or unordered) */
1197                         M_CMOVFEQ_IMM(0, d); /* 0 if equal */
1198                         M_CMOVFLT_IMM(-1, d); /* -1 if less */
1199                         emit_store_dst(jd, iptr, d);
1200                         break;
1201
1202
1203                 /* memory operations **************************************************/
1204
1205                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1206
1207                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1208                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1209                         emit_nullpointer_check(cd, iptr, s1);
1210                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1211                         emit_store_dst(jd, iptr, d);
1212                         break;
1213
1214                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1215
1216                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1217                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1218                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1219                         emit_array_checks(cd, iptr, s1, s2);
1220                         M_AADD(s2, s1, REG_ITMP3);
1221                         M_BLDS(d, REG_ITMP3, OFFSET(java_bytearray, data[0]));
1222                         emit_store_dst(jd, iptr, d);
1223                         break;
1224
1225                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1226
1227                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1228                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1229                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1230                         emit_array_checks(cd, iptr, s1, s2);
1231                         M_AADD(s2, s1, REG_ITMP3);
1232                         M_AADD(s2, REG_ITMP3, REG_ITMP3);
1233                         M_SLDU(d, REG_ITMP3, OFFSET(java_chararray, data[0]));
1234                         emit_store_dst(jd, iptr, d);
1235                         break;
1236
1237                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1238
1239                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1240                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1241                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1242                         emit_array_checks(cd, iptr, s1, s2);
1243                         M_AADD(s2, s1, REG_ITMP3);
1244                         M_AADD(s2, REG_ITMP3, REG_ITMP3);
1245                         M_SLDS(d, REG_ITMP3, OFFSET(java_shortarray, data[0]));
1246                         emit_store_dst(jd, iptr, d);
1247                         break;
1248
1249                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1250
1251                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1252                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1253                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1254                         emit_array_checks(cd, iptr, s1, s2);
1255                         M_ASLL_IMM(s2, 2, REG_ITMP3);
1256                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1257                         M_ILD(d, REG_ITMP3, OFFSET(java_intarray, data[0]));
1258                         emit_store_dst(jd, iptr, d);
1259                         break;
1260
1261                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1262
1263                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1264                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1265                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1266                         emit_array_checks(cd, iptr, s1, s2);
1267                         M_ASLL_IMM(s2, 3, REG_ITMP3);
1268                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1269                         M_LDX(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1270                         emit_store_dst(jd, iptr, d);
1271                         break;
1272
1273                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1274
1275                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1276                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1277                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1278                         emit_array_checks(cd, iptr, s1, s2);
1279                         M_ASLL_IMM(s2, 2, REG_ITMP3);
1280                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1281                         M_FLD(d, REG_ITMP3, OFFSET(java_floatarray, data[0]));
1282                         emit_store_dst(jd, iptr, d);
1283                         break;
1284
1285                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1286
1287                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1288                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1289                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1290                         emit_array_checks(cd, iptr, s1, s2);
1291                         M_ASLL_IMM(s2, 3, REG_ITMP3);
1292                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1293                         M_DLD(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1294                         emit_store_dst(jd, iptr, d);
1295                         break;
1296
1297                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1298
1299                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1300                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1301                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1302                         emit_array_checks(cd, iptr, s1, s2);
1303                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP3);
1304                         M_AADD(REG_ITMP3, s1, REG_ITMP3);
1305                         M_ALD(d, REG_ITMP3, OFFSET(java_objectarray, data[0]));
1306                         emit_store_dst(jd, iptr, d);
1307                         break;
1308
1309
1310                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1311
1312                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1313                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1314                         emit_array_checks(cd, iptr, s1, s2);
1315                         M_AADD(s2, s1, REG_ITMP1);
1316                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1317                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1318                         break;
1319
1320                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1321                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1322
1323                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1324                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1325                         emit_array_checks(cd, iptr, s1, s2);
1326                         M_AADD(s2, s1, REG_ITMP1);
1327                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1328                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1329                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1330                         break;
1331
1332                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1333
1334                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1335                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1336                         emit_array_checks(cd, iptr, s1, s2);
1337                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1338                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1339                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1340                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1341                         break;
1342
1343                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1344
1345                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1346                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1347                         emit_array_checks(cd, iptr, s1, s2);
1348                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1349                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1350                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1351                         M_STX_INTERN(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1352                         break;
1353
1354                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1355
1356                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1357                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1358                         emit_array_checks(cd, iptr, s1, s2);
1359                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1360                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1361                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1362                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1363                         break;
1364
1365                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1366
1367                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1368                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1369                         emit_array_checks(cd, iptr, s1, s2);
1370                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1371                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1372                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1373                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1374                         break;
1375
1376
1377                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1378
1379                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1380                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1381                         emit_array_checks(cd, iptr, s1, s2);
1382                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1383
1384                         M_MOV(s1, rd->argintregs[0]);
1385                         M_MOV(s3, rd->argintregs[1]);
1386                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1387                         M_ALD(REG_ITMP3, REG_PV, disp);
1388                         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
1389                         M_NOP;
1390
1391                         M_BEQZ(REG_RESULT_CALLER, 0);
1392                         codegen_add_arraystoreexception_ref(cd);
1393                         M_NOP;
1394
1395                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1396                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1397                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1398                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1399                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1400                         M_AST_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1401                         break;
1402
1403
1404                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1405
1406                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1407                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1408                         emit_array_checks(cd, iptr, s1, s2);
1409                         M_AADD(s2, s1, REG_ITMP1);
1410                         M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1411                         break;
1412
1413                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1414                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1415
1416                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1417                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1418                         emit_array_checks(cd, iptr, s1, s2);
1419                         M_AADD(s2, s1, REG_ITMP1);
1420                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1421                         M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1422                         break;
1423
1424                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1425
1426                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1427                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1428                         emit_array_checks(cd, iptr, s1, s2);
1429                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1430                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1431                         M_IST_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1432                         break;
1433
1434                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1435
1436                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1437                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1438                         emit_array_checks(cd, iptr, s1, s2);
1439                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1440                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1441                         M_STX_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1442                         break;
1443
1444                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1445
1446                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1447                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1448                         emit_array_checks(cd, iptr, s1, s2);
1449                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1450                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1451                         M_AST_INTERN(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1452                         break;
1453
1454
1455                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1456
1457                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1458                                 uf = iptr->sx.s23.s3.uf;
1459                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1460                                 disp      = dseg_add_unique_address(cd, uf);
1461
1462                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1463                         }
1464                         else {
1465                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1466                                 fieldtype = fi->type;
1467                                 disp = dseg_add_address(cd, &(fi->value));
1468
1469                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1470                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1471                         }
1472
1473                         M_ALD(REG_ITMP1, REG_PV, disp);
1474
1475                         switch (fieldtype) {
1476                         case TYPE_INT:
1477                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1478                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1479                                 break;
1480                         case TYPE_LNG:
1481                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1482                                 M_LDX_INTERN(d, REG_ITMP1, 0);
1483                                 break;
1484                         case TYPE_ADR:
1485                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1486                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1487                                 break;
1488                         case TYPE_FLT:
1489                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1490                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1491                                 break;
1492                         case TYPE_DBL:
1493                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1494                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1495                                 break;
1496                         }
1497                         emit_store_dst(jd, iptr, d);
1498                         break;
1499
1500                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1501
1502                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1503                                 uf = iptr->sx.s23.s3.uf;
1504                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1505                                 disp      = dseg_add_unique_address(cd, uf);
1506
1507                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1508                         }
1509                         else {
1510                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1511                                 fieldtype = fi->type;
1512                                 disp = dseg_add_address(cd, &(fi->value));
1513
1514                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1515                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1516                         }
1517
1518                         M_ALD(REG_ITMP1, REG_PV, disp);
1519
1520                         switch (fieldtype) {
1521                         case TYPE_INT:
1522                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1523                                 M_IST_INTERN(s1, REG_ITMP1, 0);
1524                                 break;
1525                         case TYPE_LNG:
1526                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1527                                 M_STX_INTERN(s1, REG_ITMP1, 0);
1528                                 break;
1529                         case TYPE_ADR:
1530                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1531                                 M_AST_INTERN(s1, REG_ITMP1, 0);
1532                                 break;
1533                         case TYPE_FLT:
1534                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1535                                 M_FST_INTERN(s1, REG_ITMP1, 0);
1536                                 break;
1537                         case TYPE_DBL:
1538                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1539                                 M_DST_INTERN(s1, REG_ITMP1, 0);
1540                                 break;
1541                         }
1542                         break;
1543
1544                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
1545                                           /* val = value (in current instruction)     */
1546                                           /* following NOP)                           */
1547
1548                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1549                                 uf        = iptr->sx.s23.s3.uf;
1550                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1551                                 disp = dseg_add_unique_address(cd, uf);
1552
1553                                 codegen_add_patch_ref(cd, PATCHER_get_putstatic, uf, disp);
1554                         }
1555                         else {
1556                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1557                                 fieldtype = fi->type;
1558                                 disp      = dseg_add_address(cd, &(fi->value));
1559
1560                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class))
1561                                         codegen_add_patch_ref(cd, PATCHER_clinit, fi->class, disp);
1562                         }
1563
1564                         M_ALD(REG_ITMP1, REG_PV, disp);
1565
1566                         switch (fieldtype) {
1567                         case TYPE_INT:
1568                                 M_IST_INTERN(REG_ZERO, REG_ITMP1, 0);
1569                                 break;
1570                         case TYPE_LNG:
1571                                 M_STX_INTERN(REG_ZERO, REG_ITMP1, 0);
1572                                 break;
1573                         case TYPE_ADR:
1574                                 M_AST_INTERN(REG_ZERO, REG_ITMP1, 0);
1575                                 break;
1576                         case TYPE_FLT:
1577                                 M_FST_INTERN(REG_ZERO, REG_ITMP1, 0);
1578                                 break;
1579                         case TYPE_DBL:
1580                                 M_DST_INTERN(REG_ZERO, REG_ITMP1, 0);
1581                                 break;
1582                         }
1583                         break;
1584
1585
1586                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1587
1588                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1589                         emit_nullpointer_check(cd, iptr, s1);
1590
1591                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1592                                 uf = iptr->sx.s23.s3.uf;
1593
1594                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1595                                 disp      = 0;
1596
1597                                 codegen_add_patch_ref(cd, PATCHER_get_putfield, uf, 0);
1598                         }
1599                         else {
1600                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1601                                 fieldtype = fi->type;
1602                                 disp      = fi->offset;
1603                         }
1604
1605                         switch (fieldtype) {
1606                         case TYPE_INT:
1607                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1608                                 M_ILD(d, s1, disp);
1609                                 break;
1610                         case TYPE_LNG:
1611                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1612                                 M_LDX(d, s1, disp);
1613                                 break;
1614                         case TYPE_ADR:
1615                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1616                                 M_ALD(d, s1, disp);
1617                                 break;
1618                         case TYPE_FLT:
1619                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1620                                 M_FLD(d, s1, disp);
1621                                 break;
1622                         case TYPE_DBL:
1623                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1624                                 M_DLD(d, s1, disp);
1625                                 break;
1626                         default:
1627                                 assert(0);
1628                                 break;
1629                         }
1630                         emit_store_dst(jd, iptr, d);
1631                         break;
1632
1633                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1634
1635                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1636                         emit_nullpointer_check(cd, iptr, s1);
1637
1638                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1639                                 uf = iptr->sx.s23.s3.uf;
1640                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1641                                 disp      = 0;
1642                         }
1643                         else {
1644                                 uf        = NULL;
1645                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1646                                 fieldtype = fi->type;
1647                                 disp      = fi->offset;
1648                                 }
1649
1650                         if (IS_INT_LNG_TYPE(fieldtype))
1651                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1652                         else
1653                                 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1654
1655                         if (INSTRUCTION_IS_UNRESOLVED(iptr))
1656                                 codegen_add_patch_ref(cd, PATCHER_get_putfield, uf, 0);
1657
1658                         switch (fieldtype) {
1659                         case TYPE_INT:
1660                                 M_IST(s2, s1, disp);
1661                                 break;
1662                         case TYPE_LNG:
1663                                 M_STX(s2, s1, disp);
1664                                 break;
1665                         case TYPE_ADR:
1666                                 M_AST(s2, s1, disp);
1667                                 break;
1668                         case TYPE_FLT:
1669                                 M_FST(s2, s1, disp);
1670                                 break;
1671                         case TYPE_DBL:
1672                                 M_DST(s2, s1, disp);
1673                                 break;
1674                         default:
1675                                 assert(0);
1676                                 break;
1677                         }
1678                         break;
1679
1680                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
1681                                           /* val = value (in current instruction)     */
1682                                           /* following NOP)                           */
1683
1684                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1685                         emit_nullpointer_check(cd, iptr, s1);
1686
1687                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1688                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1689
1690                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1691
1692                                 codegen_addpatchref(cd, PATCHER_get_putfield,
1693                                                                         uf, 0);
1694
1695                                 if (opt_showdisassemble) {
1696                                         M_NOP; M_NOP;
1697                                 }
1698
1699                                 disp = 0;
1700
1701                         } else {
1702                         {
1703                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1704
1705                                 fieldtype = fi->type;
1706                                 disp = fi->offset;
1707                         }
1708
1709                         }
1710
1711                         switch (fieldtype) {
1712                         case TYPE_INT:
1713                                 M_IST(REG_ZERO, s1, disp);
1714                                 break;
1715                         case TYPE_LNG:
1716                                 M_STX(REG_ZERO, s1, disp);
1717                                 break;
1718                         case TYPE_ADR:
1719                                 M_AST(REG_ZERO, s1, disp);
1720                                 break;
1721                         case TYPE_FLT:
1722                                 M_FST(REG_ZERO, s1, disp);
1723                                 break;
1724                         case TYPE_DBL:
1725                                 M_DST(REG_ZERO, s1, disp);
1726                                 break;
1727                         }
1728                         break;
1729
1730
1731                 /* branch operations **************************************************/
1732
1733                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1734
1735                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1736                         M_INTMOVE(s1, REG_ITMP2_XPTR);
1737
1738 #ifdef ENABLE_VERIFIER
1739                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1740                                 uc = iptr->sx.s23.s2.uc;
1741
1742                                 codegen_add_patch_ref(cd, PATCHER_athrow_areturn, uc, 0);
1743                         }
1744 #endif /* ENABLE_VERIFIER */
1745
1746                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1747                         M_ALD(REG_ITMP1, REG_PV, disp);
1748                         M_JMP(REG_ITMP3_XPC, REG_ITMP1, REG_ZERO);
1749                         M_NOP;
1750                         M_NOP;              /* nop ensures that XPC is less than the end */
1751                                             /* of basic block                            */
1752                         ALIGNCODENOP;
1753                         break;
1754
1755                 case ICMD_GOTO:         /* ... ==> ...                                */
1756                 case ICMD_RET:          /* ... ==> ...                                */
1757
1758                         M_BR(0);
1759                         codegen_add_branch_ref(cd, iptr->dst.block);
1760                         M_NOP;
1761                         ALIGNCODENOP;
1762                         break;
1763
1764                 case ICMD_JSR:          /* ... ==> ...                                */
1765
1766                         M_BR(0);
1767                         codegen_add_branch_ref(cd, iptr->sx.s23.s3.jsrtarget.block);
1768                         M_NOP;
1769                         ALIGNCODENOP;
1770                         break;
1771
1772                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1773
1774                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1775                         M_BEQZ(s1, 0);
1776                         codegen_add_branch_ref(cd, iptr->dst.block);
1777                         M_NOP;
1778                         break;
1779
1780                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
1781
1782                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1783                         M_BNEZ(s1, 0);
1784                         codegen_add_branch_ref(cd, iptr->dst.block);
1785                         M_NOP;
1786                         break;
1787
1788                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
1789
1790                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1791                         if (iptr->sx.val.i == 0) {
1792                                 M_BEQZ(s1, 0);
1793                         } else {
1794                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1795                                         M_CMP_IMM(s1, iptr->sx.val.i);
1796                                         }
1797                                 else {
1798                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1799                                         M_CMP(s1, REG_ITMP2);
1800                                         }
1801                                 M_BEQ(0);
1802                                 }
1803                         codegen_add_branch_ref(cd, iptr->dst.block);
1804                         M_NOP;
1805                         break;
1806
1807                 case ICMD_IFLT:         /* ..., value ==> ...                         */
1808
1809                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1810                         if (iptr->sx.val.i == 0) {
1811                                 M_BLTZ(s1, 0);
1812                         } else {
1813                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1814                                         M_CMP_IMM(s1, iptr->sx.val.i);
1815                                 } else {
1816                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1817                                         M_CMP(s1, REG_ITMP2);
1818                                 }
1819                                 M_BLT(0);
1820                         }
1821                         codegen_add_branch_ref(cd, iptr->dst.block);
1822                         M_NOP;
1823                         break;
1824
1825                 case ICMD_IFLE:         /* ..., value ==> ...                         */
1826
1827                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1828                         if (iptr->sx.val.i == 0) {
1829                                 M_BLEZ(s1, 0);
1830                                 }
1831                         else {
1832                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1833                                         M_CMP_IMM(s1, iptr->sx.val.i);
1834                                         }
1835                                 else {
1836                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1837                                         M_CMP(s1, REG_ITMP2);
1838                                 }
1839                                 M_BLE(0);
1840                         }
1841                         codegen_add_branch_ref(cd, iptr->dst.block);
1842                         M_NOP;
1843                         break;
1844
1845                 case ICMD_IFNE:         /* ..., value ==> ...                         */
1846
1847                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1848                         if (iptr->sx.val.i == 0) {
1849                                 M_BNEZ(s1, 0);
1850                                 }
1851                         else {
1852                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1853                                         M_CMP_IMM(s1, iptr->sx.val.i);
1854                                 }
1855                                 else {
1856                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1857                                         M_CMP(s1, REG_ITMP2);
1858                                 }
1859                                 M_BNE(0);
1860                         }
1861                         codegen_add_branch_ref(cd, iptr->dst.block);
1862                         M_NOP;
1863                         break;
1864
1865                 case ICMD_IFGT:         /* ..., value ==> ...                         */
1866
1867                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1868                         if (iptr->sx.val.i == 0) {
1869                                 M_BGTZ(s1, 0);
1870                         }
1871                         else {
1872                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1873                                         M_CMP_IMM(s1, iptr->sx.val.i);
1874                                 } else {
1875                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1876                                         M_CMP(s1, REG_ITMP2);
1877                                 }
1878                                 M_BGT(0);
1879                         }
1880                         codegen_add_branch_ref(cd, iptr->dst.block);
1881                         M_NOP;
1882                         break;
1883
1884                 case ICMD_IFGE:         /* ..., value ==> ...                         */
1885
1886                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1887                         if (iptr->sx.val.i == 0) {
1888                                 M_BGEZ(s1, 0);
1889                                 }
1890                         else {
1891                                 if ((iptr->sx.val.i >= -4096) && (iptr->sx.val.i <= 4095)) {
1892                                         M_CMP_IMM(s1, iptr->sx.val.i);
1893                                         }
1894                                 else {
1895                                         ICONST(REG_ITMP2, iptr->sx.val.i);
1896                                         M_CMP(s1, REG_ITMP2);
1897                                 }
1898                                 M_BGE(0);
1899                         }
1900                         codegen_add_branch_ref(cd, iptr->dst.block);
1901                         M_NOP;
1902                         break;
1903
1904                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1905
1906                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1907                         if (iptr->sx.val.l == 0) {
1908                                 M_BEQZ(s1, 0);
1909                         }
1910                         else {
1911                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1912                                         M_CMP_IMM(s1, iptr->sx.val.l);
1913                                 }
1914                                 else {
1915                                         LCONST(REG_ITMP2, iptr->sx.val.l);
1916                                         M_CMP(s1, REG_ITMP2);
1917                                 }
1918                                 M_XBEQ(0);
1919                         }
1920                         codegen_add_branch_ref(cd, iptr->dst.block);
1921                         M_NOP;
1922                         break;
1923
1924                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1925
1926                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1927                         if (iptr->sx.val.l == 0) {
1928                                 M_BLTZ(s1, 0);
1929                         }
1930                         else {
1931                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1932                                         M_CMP_IMM(s1, iptr->sx.val.l);
1933                                 }
1934                                 else {
1935                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1936                                         M_CMP(s1, REG_ITMP2);
1937                                 }
1938                                 M_XBLT(0);
1939                         }
1940                         codegen_add_branch_ref(cd, iptr->dst.block);
1941                         M_NOP;
1942                         break;
1943
1944                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1945
1946                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1947                         if (iptr->sx.val.l == 0) {
1948                                 M_BLEZ(s1, 0);
1949                                 }
1950                         else {
1951                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1952                                         M_CMP_IMM(s1, iptr->sx.val.l);
1953                                         }
1954                                 else {
1955                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1956                                         M_CMP(s1, REG_ITMP2);
1957                                 }
1958                                 M_XBLE(0);
1959                         }
1960                         codegen_add_branch_ref(cd, iptr->dst.block);
1961                         M_NOP;
1962                         break;
1963
1964                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1965
1966                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1967                         if (iptr->sx.val.l == 0) {
1968                                 M_BNEZ(s1, 0);
1969                                 }
1970                         else {
1971                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1972                                         M_CMP_IMM(s1, iptr->sx.val.i);
1973                                 }
1974                                 else {
1975                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1976                                         M_CMP(s1, REG_ITMP2);
1977                                 }
1978                                 M_XBNE(0);
1979                         }
1980                         codegen_add_branch_ref(cd, iptr->dst.block);
1981                         M_NOP;
1982                         break;
1983
1984                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1985
1986                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1987                         if (iptr->sx.val.l == 0) {
1988                                 M_BGTZ(s1, 0);
1989                         } else {
1990                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
1991                                         M_CMP_IMM(s1, iptr->sx.val.l);
1992                                 } else {
1993                                         ICONST(REG_ITMP2, iptr->sx.val.l);
1994                                         M_CMP(s1, REG_ITMP2);
1995                                 }
1996                                 M_XBGT(0);
1997                         }
1998                         codegen_add_branch_ref(cd, iptr->dst.block);
1999                         M_NOP;
2000                         break;
2001
2002                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2003
2004                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2005                         if (iptr->sx.val.l == 0) {
2006                                 M_BGEZ(s1, 0);
2007                         }
2008                         else {
2009                                 if ((iptr->sx.val.l >= -4096) && (iptr->sx.val.l <= 4095)) {
2010                                         M_CMP_IMM(s1, iptr->sx.val.l);
2011                                 }
2012                                 else {
2013                                         ICONST(REG_ITMP2, iptr->sx.val.l);
2014                                         M_CMP(s1, REG_ITMP2);
2015                                 }
2016                                 M_XBGE(0);
2017                         }
2018                         codegen_add_branch_ref(cd, iptr->dst.block);
2019                         M_NOP;
2020                         break;
2021
2022
2023                 case ICMD_IF_ACMPEQ:    /* ..., value, value ==> ...                  */
2024                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2025
2026                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2027                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2028                         M_CMP(s1, s2);
2029                         M_XBEQ(0);
2030                         codegen_add_branch_ref(cd, iptr->dst.block);
2031                         M_NOP;
2032                         break;
2033
2034                 case ICMD_IF_ICMPEQ:    /* 32-bit compare                             */
2035
2036                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2037                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2038                         M_CMP(s1, s2);
2039                         M_BEQ(0);
2040                         codegen_add_branch_ref(cd, iptr->dst.block);
2041                         M_NOP;
2042                         break;
2043
2044                 case ICMD_IF_ACMPNE:    /* ..., value, value ==> ...                  */
2045                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2046
2047                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2048                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2049                         M_CMP(s1, s2);
2050                         M_XBNE(0);
2051                         codegen_add_branch_ref(cd, iptr->dst.block);
2052                         M_NOP;
2053                         break;
2054
2055                 case ICMD_IF_ICMPNE:    /* 32-bit compare                             */
2056
2057                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2058                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2059                         M_CMP(s1, s2);
2060                         M_BNE(0);
2061                         codegen_add_branch_ref(cd, iptr->dst.block);
2062                         M_NOP;
2063                         break;
2064
2065                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2066
2067                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2068                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2069                         M_CMP(s1, s2);
2070                         M_XBLT(0);
2071                         codegen_add_branch_ref(cd, iptr->dst.block);
2072                         M_NOP;
2073                         break;
2074
2075                 case ICMD_IF_ICMPLT:    /* 32-bit compare                             */
2076
2077                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2078                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2079                         M_CMP(s1, s2);
2080                         M_BLT(0);
2081                         codegen_add_branch_ref(cd, iptr->dst.block);
2082                         M_NOP;
2083                         break;
2084
2085                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2086
2087                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2088                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2089                         M_CMP(s1, s2);
2090                         M_XBGT(0);
2091                         codegen_add_branch_ref(cd, iptr->dst.block);
2092                         M_NOP;
2093                         break;
2094
2095                 case ICMD_IF_ICMPGT:    /* 32-bit compare                             */
2096
2097                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2098                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2099                         M_CMP(s1, s2);
2100                         M_BGT(0);
2101                         codegen_add_branch_ref(cd, iptr->dst.block);
2102                         M_NOP;
2103                         break;
2104
2105                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2106
2107                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2108                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2109                         M_CMP(s1, s2);
2110                         M_BLE(0);
2111                         codegen_add_branch_ref(cd, iptr->dst.block);
2112                         M_NOP;
2113                         break;
2114
2115                 case ICMD_IF_ICMPLE:    /* 32-bit compare                             */
2116
2117                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2118                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2119                         M_CMP(s1, s2);
2120                         M_BLE(0);
2121                         codegen_add_branch_ref(cd, iptr->dst.block);
2122                         M_NOP;
2123                         break;
2124
2125
2126                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2127
2128                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2129                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2130                         M_CMP(s1, s2);
2131                         M_BGE(0);
2132                         codegen_add_branch_ref(cd, iptr->dst.block);
2133                         M_NOP;
2134                         break;
2135
2136                 case ICMD_IF_ICMPGE:    /* 32-bit compare                             */
2137
2138                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2139                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2140                         M_CMP(s1, s2);
2141                         M_BGE(0);
2142                         codegen_add_branch_ref(cd, iptr->dst.block);
2143                         M_NOP;
2144                         break;
2145
2146
2147                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2148                 case ICMD_LRETURN:
2149
2150                         s1 = emit_load_s1(jd, iptr, REG_RESULT_CALLEE);
2151                         M_INTMOVE(s1, REG_RESULT_CALLEE);
2152                         goto nowperformreturn;
2153
2154                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2155
2156                         s1 = emit_load_s1(jd, iptr, REG_RESULT_CALLEE);
2157                         M_INTMOVE(s1, REG_RESULT_CALLEE);
2158
2159 #ifdef ENABLE_VERIFIER
2160                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2161                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2162                                                                         iptr->sx.s23.s2.uc, 0);
2163
2164                                 if (opt_showdisassemble) {
2165                                         M_NOP; M_NOP;
2166                                 }
2167                         }
2168 #endif /* ENABLE_VERIFIER */
2169                         goto nowperformreturn;
2170
2171                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2172                 case ICMD_DRETURN:
2173
2174                         s1 = emit_load_s1(jd, iptr, REG_FRESULT);
2175                         M_FLTMOVE(s1, REG_FRESULT);
2176                         goto nowperformreturn;
2177
2178                 case ICMD_RETURN:       /* ...  ==> ...                               */
2179
2180 nowperformreturn:
2181                         {
2182                         s4 i, p;
2183
2184                         p = cd->stackframesize;
2185
2186 #if !defined(NDEBUG)
2187                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2188                                 emit_verbosecall_exit(jd);
2189 #endif
2190
2191 #if defined(ENABLE_THREADS)
2192                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2193 /* XXX: REG_RESULT is save, but what about FRESULT? */
2194                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8); /* XXX: what for ? */
2195
2196                                 switch (iptr->opc) {
2197                                 case ICMD_FRETURN:
2198                                 case ICMD_DRETURN:
2199                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2200                                         break;
2201                                 }
2202
2203                                 disp = dseg_add_functionptr(cd, BUILTIN_monitorexit);
2204                                 M_ALD(REG_ITMP3, REG_PV, disp);
2205                                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO); /*REG_RA_CALLER */
2206
2207                                 switch (iptr->opc) {
2208                                 case ICMD_FRETURN:
2209                                 case ICMD_DRETURN:
2210                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2211                                         break;
2212                                 }
2213                         }
2214 #endif
2215
2216
2217
2218                         M_RETURN(REG_RA_CALLEE, 8); /* implicit window restore */
2219                         M_NOP;
2220                         ALIGNCODENOP;
2221                         }
2222                         break;
2223
2224                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2225                         {
2226                         s4 i, l;
2227                         branch_target_t *table;
2228
2229                         table = iptr->dst.table;
2230
2231                         l = iptr->sx.s23.s2.tablelow;
2232                         i = iptr->sx.s23.s3.tablehigh;
2233
2234                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2235                         if (l == 0) {
2236                                 M_INTMOVE(s1, REG_ITMP1);
2237                         }
2238                         else if (l <= 4095) {
2239                                 M_ADD_IMM(s1, -l, REG_ITMP1);
2240                         }
2241                         else {
2242                                 ICONST(REG_ITMP2, l);
2243                                 /* XXX: do I need to truncate s1 to 32-bit ? */
2244                                 M_SUB(s1, REG_ITMP2, REG_ITMP1);
2245                         }
2246                         i = i - l + 1;
2247
2248
2249                         /* range check */
2250
2251                         if (i <= 4095) {
2252                                 M_CMP_IMM(REG_ITMP1, i - 1);
2253                         }
2254                         else {
2255                                 ICONST(REG_ITMP2, i - 1);
2256                                 M_CMP(REG_ITMP1, REG_ITMP2);
2257                         }
2258                         M_XBUGT(0);
2259                         codegen_add_branch_ref(cd, table[0].block); /* default target */
2260                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2261
2262                         /* build jump table top down and use address of lowest entry */
2263
2264                         table += i;
2265
2266                         while (--i >= 0) {
2267                                 dseg_add_target(cd, table->block);
2268                                 --table;
2269                                 }
2270                         }
2271
2272                         /* length of dataseg after last dseg_addtarget is used by load */
2273
2274                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2275                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2276                         M_JMP(REG_ZERO, REG_ITMP2, REG_ZERO);
2277                         M_NOP;
2278                         ALIGNCODENOP;
2279                         break;
2280
2281                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2282                         {
2283                         s4 i;
2284                         lookup_target_t *lookup;
2285
2286                         lookup = iptr->dst.lookup;
2287
2288                         i = iptr->sx.s23.s2.lookupcount;
2289
2290                         MCODECHECK((i<<2)+8);
2291                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2292
2293                         while (--i >= 0) {
2294                                 if ((lookup->value >= -4096) && (lookup->value <= 4095)) {
2295                                         M_CMP_IMM(s1, lookup->value);
2296                                 } else {
2297                                         ICONST(REG_ITMP2, lookup->value);
2298                                         M_CMP(s1, REG_ITMP2);
2299                                 }
2300                                 M_BEQ(0);
2301                                 codegen_add_branch_ref(cd, lookup->target.block);
2302                                 M_NOP;
2303                                 ++lookup;
2304                         }
2305
2306                         M_BR(0);
2307                         codegen_add_branch_ref(cd, iptr->sx.s23.s3.lookupdefault.block);
2308                         M_NOP;
2309                         ALIGNCODENOP;
2310                         break;
2311                         }
2312
2313
2314                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2315
2316                         bte = iptr->sx.s23.s3.bte;
2317                         md = bte->md;
2318
2319                         /* XXX: proper builtin calling and float args are so not implemented */
2320                         assert(md->paramcount <= 5 && md->argfltreguse < 1);
2321
2322                         goto gen_method;
2323
2324                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2325
2326                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2327                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2328                 case ICMD_INVOKEINTERFACE:
2329
2330                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2331                                 lm = NULL;
2332                                 um = iptr->sx.s23.s3.um;
2333                                 md = um->methodref->parseddesc.md;
2334                         }
2335                         else {
2336                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2337                                 um = NULL;
2338                                 md = lm->parseddesc;
2339                         }
2340
2341 gen_method:
2342                         s3 = md->paramcount;
2343
2344                         MCODECHECK((s3 << 1) + 64);
2345
2346                         /* copy arguments to registers or stack location                  */
2347
2348                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2349                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2350
2351                                 if (var->flags & PREALLOC)
2352                                         continue;
2353
2354                                 if (IS_INT_LNG_TYPE(var->type)) {
2355                                         if (!md->params[s3].inmemory) {
2356                                                 s1 = rd->argintregs[md->params[s3].regoff];
2357                                                 d = emit_load(jd, iptr, var, s1);
2358                                                 M_INTMOVE(d, s1);
2359                                         }
2360                                         else {
2361                                                 d = emit_load(jd, iptr, var, REG_ITMP1);
2362                                                 M_STX(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2363                                         }
2364                                 }
2365                                 else {
2366                                         if (!md->params[s3].inmemory) {
2367                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2368                                                 d = emit_load(jd, iptr, var, s1);
2369                                                 if (IS_2_WORD_TYPE(var->type))
2370                                                         M_DMOV(d, s1);
2371                                                 else
2372                                                         M_FMOV(d, s1);
2373                                         }
2374                                         else {
2375                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2376                                                 if (IS_2_WORD_TYPE(var->type))
2377                                                         M_DST(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2378                                                 else
2379                                                         M_FST(d, REG_SP, JITSTACK + md->params[s3].regoff * 8);
2380                                         }
2381                                 }
2382                         }
2383
2384                         switch (iptr->opc) {
2385                         case ICMD_BUILTIN:
2386                                 disp = dseg_add_functionptr(cd, bte->fp);
2387
2388                                 M_ALD(REG_PV_CALLER, REG_PV, disp);  /* built-in-function pointer */
2389                                 s1 = REG_PV_CALLER;
2390
2391                                 /* XXX jit-c-call */
2392
2393                                 break;
2394
2395                         case ICMD_INVOKESPECIAL:
2396                                 M_BEQZ(REG_OUT0, 0);
2397                                 codegen_add_nullpointerexception_ref(cd);
2398                                 M_NOP;
2399                                 /* fall through */
2400
2401                         case ICMD_INVOKESTATIC:
2402                                 if (lm == NULL) {
2403                                         disp = dseg_add_unique_address(cd, NULL);
2404
2405                                         codegen_add_patch_ref(cd, PATCHER_invokestatic_special,
2406                                                                                 um, disp);
2407                                 }
2408                                 else
2409                                         disp = dseg_add_address(cd, lm->stubroutine);
2410
2411                                 M_ALD(REG_PV_CALLER, REG_PV, disp);          /* method pointer in pv */
2412                                 s1 = REG_PV_CALLER;
2413                                 break;
2414
2415                         case ICMD_INVOKEVIRTUAL:
2416                                 emit_nullpointer_check(cd, iptr, REG_OUT0);
2417
2418                                 if (lm == NULL) {
2419                                         codegen_add_patch_ref(cd, PATCHER_invokevirtual, um, 0);
2420
2421                                         s1 = 0;
2422                                 }
2423                                 else
2424                                         s1 = OFFSET(vftbl_t, table[0]) +
2425                                                 sizeof(methodptr) * lm->vftblindex;
2426
2427                                 M_ALD(REG_METHODPTR, REG_OUT0,
2428                                           OFFSET(java_objectheader, vftbl));
2429                                 M_ALD(REG_PV_CALLER, REG_METHODPTR, s1);
2430                                 s1 = REG_PV_CALLER;
2431                                 break;
2432
2433                         case ICMD_INVOKEINTERFACE:
2434                                 emit_nullpointer_check(cd, iptr, REG_OUT0);
2435
2436                                 if (lm == NULL) {
2437                                         codegen_add_patch_ref(cd, PATCHER_invokeinterface, um, 0);
2438
2439                                         s1 = 0;
2440                                         s2 = 0;
2441                                 }
2442                                 else {
2443                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2444                                                 sizeof(methodptr*) * lm->class->index;
2445
2446                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2447                                 }
2448
2449                                 M_ALD(REG_METHODPTR, REG_OUT0,
2450                                           OFFSET(java_objectheader, vftbl));
2451                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2452                                 M_ALD(REG_PV_CALLER, REG_METHODPTR, s2);
2453                                 s1 = REG_PV_CALLER;
2454                                 break;
2455                         }
2456
2457                         /* generate the actual call */
2458
2459                         M_JMP(REG_RA_CALLER, s1, REG_ZERO);
2460                         M_NOP;
2461                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
2462                         /* REG_RA holds the value of the jmp instruction, therefore +8 */
2463                         M_LDA(REG_ZERO, REG_RA_CALLER, -disp + 8);
2464
2465
2466                         /* actually only used for ICMD_BUILTIN */
2467
2468                         if (INSTRUCTION_MUST_CHECK(iptr)) {
2469                                 M_BEQZ(REG_RESULT_CALLER, 0);
2470                                 codegen_add_fillinstacktrace_ref(cd);
2471                                 M_NOP;
2472                         }
2473
2474                         /* store return value */
2475
2476                         d = md->returntype.type;
2477
2478                         if (d != TYPE_VOID) {
2479                                 if (IS_INT_LNG_TYPE(d)) {
2480                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_CALLER);
2481                                         M_INTMOVE(REG_RESULT_CALLER, s1);
2482                                 }
2483                                 else {
2484                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2485                                         if (IS_2_WORD_TYPE(d)) {
2486                                                 M_DBLMOVE(REG_FRESULT, s1);
2487                                         } else {
2488                                                 M_FLTMOVE(REG_FRESULT, s1);
2489                                         }
2490                                 }
2491                                 emit_store_dst(jd, iptr, s1);
2492                         }
2493                         break;
2494
2495
2496                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2497                                       /* val.a: (classinfo*) superclass               */
2498
2499                         /*  superclass is an interface:
2500                          *
2501                          *  OK if ((sub == NULL) ||
2502                          *         (sub->vftbl->interfacetablelength > super->index) &&
2503                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2504                          *
2505                          *  superclass is a class:
2506                          *
2507                          *  OK if ((sub == NULL) || (0
2508                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2509                          *         super->vftbl->diffvall));
2510                          */
2511
2512                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2513                                 classinfo *super;
2514                                 s4         superindex;
2515
2516                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2517                                         super      = NULL;
2518                                         superindex = 0;
2519                                 }
2520                                 else {
2521                                         super = iptr->sx.s23.s3.c.cls;
2522                                         superindex = super->index;
2523                                 }
2524
2525 #if defined(ENABLE_THREADS)
2526                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2527 #endif
2528
2529                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2530
2531                                 /* calculate interface checkcast code size */
2532
2533                                 s2 = 8;
2534                                 if (super == NULL)
2535                                         s2 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2536
2537                                 /* calculate class checkcast code size */
2538
2539                                 s3 = 10;
2540                                 if (super == NULL)
2541                                         s3 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2542
2543                                 /* if class is not resolved, check which code to call */
2544
2545                                 if (super == NULL) {
2546                                         M_BEQZ(s1, 5 + (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0) + s2 + 2 + s3 + 1);
2547                                         M_NOP;
2548
2549                                         cr   = iptr->sx.s23.s3.c.ref;
2550                                         disp = dseg_add_unique_s4(cd, 0);         /* super->flags */
2551
2552                                         codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_flags,
2553                                                                                   cr, disp);
2554
2555                                         M_ILD(REG_ITMP2, REG_PV, disp);
2556                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2557                                         M_BEQZ(REG_ITMP2, s2 + 2 + 2);
2558                                         M_NOP;
2559                                 }
2560
2561                                 /* interface checkcast code */
2562
2563                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2564                                         if (super == NULL) {
2565                                                 cr = iptr->sx.s23.s3.c.ref;
2566
2567                                                 codegen_add_patch_ref(cd, PATCHER_checkcast_interface,
2568                                                                                           cr, 0);
2569                                         }
2570                                         else {
2571                                                 M_BEQZ(s1, s2 + 2);
2572                                                 M_NOP;
2573                                         }
2574
2575                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2576                                         M_ILD(REG_ITMP3, REG_ITMP2,
2577                                                         OFFSET(vftbl_t, interfacetablelength));
2578                                         M_ADD_IMM(REG_ITMP3, -superindex, REG_ITMP3);
2579                                         M_BLEZ(REG_ITMP3, 0);
2580                                         codegen_add_classcastexception_ref(cd, s1);
2581                                         M_NOP;
2582                                         M_ALD(REG_ITMP3, REG_ITMP2,
2583                                                   OFFSET(vftbl_t, interfacetable[0]) -
2584                                                   superindex * sizeof(methodptr*));
2585                                         M_BEQZ(REG_ITMP3, 0);
2586                                         codegen_add_classcastexception_ref(cd, s1);
2587                                         M_NOP;
2588
2589                                         if (super == NULL) {
2590                                     /* on sparc we always add 2 to the size of the code we want  */
2591                                     /* branch over. (1 for branch delay nop, 1 since the base is */
2592                                     /* the address of the branch instruction */
2593                                                 M_BR(s3 + 2);
2594                                                 M_NOP;
2595                                         }
2596                                 }
2597
2598                                 /* class checkcast code */
2599
2600                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2601                                         if (super == NULL) {
2602                                                 cr   = iptr->sx.s23.s3.c.ref;
2603                                                 disp = dseg_add_unique_address(cd, NULL);
2604
2605                                                 codegen_add_patch_ref(cd,
2606                                                                                         PATCHER_checkcast_instanceof_class,
2607                                                                                           cr, disp);
2608                                         }
2609                                         else {
2610                                                 disp = dseg_add_address(cd, super->vftbl);
2611
2612                                                 M_BEQZ(s1, s3 + 2);
2613                                                 M_NOP;
2614                                         }
2615
2616                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2617                                         M_ALD(REG_ITMP3, REG_PV, disp);
2618 #if defined(ENABLE_THREADS)
2619                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2620 #endif
2621                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2622                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2623                                         M_SUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2624                                         M_ALD(REG_ITMP3, REG_PV, disp);
2625                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2626 #if defined(ENABLE_THREADS)
2627                                         codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2628 #endif
2629                                         /*                              } */
2630                                         M_CMP(REG_ITMP3, REG_ITMP2);
2631                                         M_BULT(0);                         /* branch if ITMP3 < ITMP2 */
2632                                         codegen_add_classcastexception_ref(cd, s1);
2633                                         M_NOP;
2634                                 }
2635
2636                                 d = codegen_reg_of_dst(jd, iptr, s1);
2637                         }
2638                         else {
2639                                 /* array type cast-check */
2640
2641                                 s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
2642                                 M_INTMOVE(s1, rd->argintregs[0]);
2643
2644                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2645
2646                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2647                                         cr   = iptr->sx.s23.s3.c.ref;
2648                                         disp = dseg_add_unique_address(cd, NULL);
2649
2650                                         codegen_add_patch_ref(cd, PATCHER_builtin_arraycheckcast,
2651                                                                                   cr, disp);
2652                                 }
2653                                 else
2654                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2655
2656                                 M_ALD(rd->argintregs[1], REG_PV, disp);
2657                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2658                                 M_ALD(REG_ITMP3, REG_PV, disp);
2659                                 /* XXX jit-c-call */
2660                                 M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
2661                                 M_NOP;
2662
2663                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2664                                 M_BEQZ(REG_RESULT_CALLER, 0);
2665                                 codegen_add_classcastexception_ref(cd, s1);
2666                                 M_NOP;
2667
2668                                 d = codegen_reg_of_dst(jd, iptr, s1);
2669                         }
2670
2671                         M_INTMOVE(s1, d);
2672                         emit_store_dst(jd, iptr, d);
2673                         break;
2674
2675                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2676
2677                         /*  superclass is an interface:
2678                          *
2679                          *  return (sub != NULL) &&
2680                          *         (sub->vftbl->interfacetablelength > super->index) &&
2681                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
2682                          *
2683                          *  superclass is a class:
2684                          *
2685                          *  return ((sub != NULL) && (0
2686                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2687                          *          super->vftbl->diffvall));
2688                          */
2689
2690                         {
2691                         classinfo *super;
2692                         vftbl_t   *supervftbl;
2693                         s4         superindex;
2694
2695                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2696                                 super = NULL;
2697                                 superindex = 0;
2698                                 supervftbl = NULL;
2699
2700                         } else {
2701                                 super = iptr->sx.s23.s3.c.cls;
2702                                 superindex = super->index;
2703                                 supervftbl = super->vftbl;
2704                         }
2705
2706 #if defined(ENABLE_THREADS)
2707                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2708 #endif
2709                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2710                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2711                         if (s1 == d) {
2712                                 M_MOV(s1, REG_ITMP1);
2713                                 s1 = REG_ITMP1;
2714                         }
2715
2716                         /* calculate interface instanceof code size */
2717
2718                         s2 = 7;
2719                         if (super == NULL)
2720                                 s2 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2721
2722                         /* calculate class instanceof code size */
2723
2724                         s3 = 8;
2725                         if (super == NULL)
2726                                 s3 += (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0);
2727
2728                         M_CLR(d);
2729
2730                         /* if class is not resolved, check which code to call */
2731
2732                         if (super == NULL) {
2733                                 M_BEQZ(s1, 5 + (opt_shownops ? PATCHER_CALL_INSTRUCTIONS : 0) + s2 + 2 + s3);
2734                                 M_NOP;
2735
2736                                 cr   = iptr->sx.s23.s3.c.ref;
2737                                 disp = dseg_add_unique_s4(cd, 0);             /* super->flags */
2738
2739                                 codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_flags,
2740                                                                           cr, disp);
2741
2742                                 M_ILD(REG_ITMP3, REG_PV, disp);
2743                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
2744                                 M_BEQZ(REG_ITMP3, s2 + 2 + 2);
2745                                 M_NOP;
2746                         }
2747
2748                         /* interface instanceof code */
2749
2750                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2751                                 if (super == NULL) {
2752                                         cr = iptr->sx.s23.s3.c.ref;
2753
2754                                         codegen_add_patch_ref(cd, PATCHER_instanceof_interface,
2755                                                                                   cr, 0);
2756                                 }
2757                                 else {
2758                                         M_BEQZ(s1, s2 + 2);
2759                                         M_NOP;
2760                                 }
2761
2762                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2763                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2764                                 M_CMP_IMM(REG_ITMP3, superindex);
2765                                 M_BLE(4);
2766                                 M_NOP;
2767                                 M_ALD(REG_ITMP1, REG_ITMP1,
2768                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
2769                                                         superindex * sizeof(methodptr*)));
2770                                 M_CMOVRNE_IMM(REG_ITMP1, 1, d);      /* REG_ITMP1 != 0  */
2771
2772                                 if (super == NULL) {
2773                                         M_BR(s3 + 2);
2774                                         M_NOP;
2775                                 }
2776                         }
2777
2778                         /* class instanceof code */
2779
2780                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2781                                 if (super == NULL) {
2782                                         cr   = iptr->sx.s23.s3.c.ref;
2783                                         disp = dseg_add_unique_address(cd, NULL);
2784
2785                                         codegen_add_patch_ref(cd, PATCHER_checkcast_instanceof_class,
2786                                                                                   cr, disp);
2787                                 }
2788                                 else {
2789                                         disp = dseg_add_address(cd, supervftbl);
2790
2791                                         M_BEQZ(s1, s3 + 2);
2792                                         M_NOP;
2793                                 }
2794
2795                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2796                                 M_ALD(REG_ITMP2, REG_PV, disp);
2797 #if defined(ENABLE_THREADS)
2798                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2799 #endif
2800                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2801                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2802                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2803 #if defined(ENABLE_THREADS)
2804                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2805 #endif
2806                                 M_SUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
2807                                 M_CMP(REG_ITMP1, REG_ITMP2);
2808                                 M_XCMOVULE_IMM(1, d);
2809                         }
2810                         emit_store_dst(jd, iptr, d);
2811                         }
2812                         break;
2813
2814
2815                 default:
2816                         exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2817                                                                                    iptr->opc);
2818                         return false;
2819
2820         } /* switch */
2821
2822         } /* for instruction */
2823
2824
2825
2826         } /* if (bptr -> flags >= BBREACHED) */
2827         } /* for basic block */
2828
2829         dseg_createlinenumbertable(cd);
2830
2831         /* generate exception and patcher stubs */
2832
2833         emit_exception_stubs(jd);
2834         emit_patcher_stubs(jd);
2835 #if defined(ENABLE_REPLACEMENT)
2836         emit_replacement_stubs(jd);
2837 #endif /* defined(ENABLE_REPLACEMENT) */
2838
2839         codegen_finish(jd);
2840
2841         /* everything's ok */
2842
2843         return true;
2844 }
2845
2846
2847
2848
2849
2850 /* createcompilerstub **********************************************************
2851
2852    Creates a stub routine which calls the compiler.
2853
2854 *******************************************************************************/
2855
2856 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
2857 #define COMPILERSTUB_CODESIZE    4 * 4
2858
2859 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
2860
2861
2862 u1 *createcompilerstub(methodinfo *m)
2863 {
2864         u1     *s;                          /* memory to hold the stub            */
2865         ptrint      *d;
2866         codeinfo    *code;
2867         codegendata *cd;
2868         s4           dumpsize;
2869
2870         s = CNEW(u1, COMPILERSTUB_SIZE);
2871
2872         /* set data pointer and code pointer */
2873
2874         d = (ptrint *) s;
2875         s = s + COMPILERSTUB_DATASIZE;
2876
2877         /* mark start of dump memory area */
2878
2879         dumpsize = dump_size();
2880
2881         cd = DNEW(codegendata);
2882         cd->mcodeptr = s;
2883
2884         /* Store the codeinfo pointer in the same place as in the
2885            methodheader for compiled methods. */
2886
2887         code = code_codeinfo_new(m);
2888
2889         d[0] = (ptrint) asm_call_jit_compiler;
2890         d[1] = (ptrint) m;
2891         d[2] = (ptrint) code;
2892
2893         /* code for the stub */
2894         /* no window save yet, user caller's PV */
2895         M_ALD_INTERN(REG_ITMP1, REG_PV_CALLER, -2 * SIZEOF_VOID_P);  /* codeinfo pointer */
2896         M_ALD_INTERN(REG_PV_CALLER, REG_PV_CALLER, -3 * SIZEOF_VOID_P);  /* pointer to compiler */
2897         M_JMP(REG_ZERO, REG_PV_CALLER, REG_ZERO);  /* jump to the compiler, RA is wasted */
2898         M_NOP;
2899
2900 #if defined(ENABLE_STATISTICS)
2901         if (opt_stat)
2902                 count_cstub_len += COMPILERSTUB_SIZE;
2903 #endif
2904
2905         /* release dump area */
2906
2907         dump_release(dumpsize);
2908
2909         return s;
2910 }
2911
2912
2913
2914 /* createnativestub ************************************************************
2915
2916    Creates a stub routine which calls a native method.
2917
2918 *******************************************************************************/
2919
2920 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
2921 {
2922         methodinfo   *m;
2923         codeinfo     *code;
2924         codegendata  *cd;
2925         registerdata *rd;
2926         methoddesc   *md;
2927         s4            nativeparams;
2928         s4            i, j;                 /* count variables                    */
2929         s4            t;
2930         s4            s1, s2, disp;
2931         s4            funcdisp;             /* displacement of the function       */
2932
2933         /* get required compiler data */
2934
2935         m    = jd->m;
2936         code = jd->code;
2937         cd   = jd->cd;
2938         rd   = jd->rd;
2939
2940         /* rewrite registers and params */
2941         md_native_reg_setup(jd);
2942         md_native_param_alloc(nmd);
2943
2944         /* initialize variables */
2945
2946         md = m->parseddesc;
2947         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
2948
2949         /* calculate stack frame size */
2950
2951         cd->stackframesize =
2952                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
2953                 sizeof(localref_table) / SIZEOF_VOID_P +
2954                 md->paramcount +                /* for saving arguments over calls    */
2955                 nmd->memuse +  /* nmd knows about the native stackframe layout */
2956                 WINSAVE_CNT;
2957
2958         /* create method header */
2959
2960         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
2961         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
2962         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
2963         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
2964         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
2965         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
2966         (void) dseg_addlinenumbertablesize(cd);
2967         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
2968
2969         /* generate stub code */
2970
2971         M_SAVE(REG_SP, -cd->stackframesize * 8, REG_SP); /* build up stackframe    */
2972
2973 #if !defined(NDEBUG)
2974         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2975                 emit_verbosecall_enter(jd);
2976 #endif
2977
2978         /* get function address (this must happen before the stackframeinfo) */
2979
2980         funcdisp = dseg_add_functionptr(cd, f);
2981
2982 #if !defined(WITH_STATIC_CLASSPATH)
2983         if (f == NULL) {
2984                 codegen_add_patch_ref(cd, PATCHER_resolve_native, m, funcdisp);
2985         }
2986 #endif
2987
2988         /* save float argument registers */
2989
2990         for (i = 0, j = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
2991                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
2992                         M_DST(rd->argfltregs[i], REG_SP, CSTACK + (j * 8));
2993                         j++;
2994                 }
2995         }
2996
2997         /* prepare data structures for native function call */
2998
2999         M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp == top of the stack frame (absolute == +BIAS) */
3000         M_MOV(REG_PV_CALLEE, REG_OUT1);
3001         M_MOV(REG_FP, REG_OUT2); /* java sp */
3002         M_MOV(REG_RA_CALLEE, REG_OUT3);
3003         disp = dseg_add_functionptr(cd, codegen_start_native_call);
3004         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
3005         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
3006         M_NOP; /* XXX fill me! */
3007
3008         /* restore float argument registers */
3009
3010         for (i = 0, j = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3011                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3012                         M_DLD(rd->argfltregs[i], REG_SP, CSTACK + (j * 8));
3013                         j++;
3014                 }
3015         }
3016
3017         /* copy or spill arguments to new locations */
3018         int num_fltregargs = 0;
3019         int fltregarg_inswap[16];
3020         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3021                 t = md->paramtypes[i].type;
3022
3023                 if (IS_INT_LNG_TYPE(t)) {
3024                         if (!md->params[i].inmemory) {
3025                                 s1 = rd->argintregs[md->params[i].regoff];
3026                                 /* s1 refers to the old window, transpose */
3027                                 s1 = REG_WINDOW_TRANSPOSE(s1);
3028
3029                                 if (!nmd->params[j].inmemory) {
3030                                         s2 = nat_argintregs[nmd->params[j].regoff];
3031                                         M_INTMOVE(s1, s2);
3032                                 } else {
3033                                         s2 = nmd->params[j].regoff;
3034                                         M_AST(s1, REG_SP, CSTACK + s2 * 8);
3035                                 }
3036
3037                         } else {
3038                                 s1 = md->params[i].regoff + cd->stackframesize;
3039                                 s2 = nmd->params[j].regoff;
3040                                 M_ALD(REG_ITMP1, REG_SP, CSTACK + s1 * 8);
3041                                 M_AST(REG_ITMP1, REG_SP, CSTACK + s2 * 8);
3042                         }
3043
3044                 } else {
3045                         if (!md->params[i].inmemory) {
3046                                 s1 = rd->argfltregs[md->params[i].regoff];
3047
3048                                 if (!nmd->params[j].inmemory) {
3049                                         /* no mapping to regs needed, native flt args use regoff */
3050                                         s2 = nmd->params[j].regoff;
3051
3052                                         /* we cannot move flt regs to their native arg locations directly */
3053                                         M_DMOV(s1, s2 + 16);
3054                                         fltregarg_inswap[num_fltregargs] = s2;
3055                                         num_fltregargs++;
3056                                         printf("flt arg swap to %d\n", s2 + 16);
3057
3058                                 } else {
3059                                         s2 = nmd->params[j].regoff;
3060                                         if (IS_2_WORD_TYPE(t))
3061                                                 M_DST(s1, REG_SP, CSTACK + (s2 * 8));
3062                                         else
3063                                                 M_FST(s1, REG_SP, CSTACK + (s2 * 8));
3064                                 }
3065
3066                         } else {
3067                                 s1 = md->params[i].regoff + cd->stackframesize;
3068                                 s2 = nmd->params[j].regoff;
3069                                 if (IS_2_WORD_TYPE(t)) {
3070                                         M_DLD(REG_FTMP1, REG_SP, CSTACK + s1 * 8);
3071                                         M_DST(REG_FTMP1, REG_SP, CSTACK + s2 * 8);
3072                                 } else {
3073                                         M_FLD(REG_FTMP1, REG_SP, CSTACK + s1 * 8);
3074                                         M_FST(REG_FTMP1, REG_SP, CSTACK + s2 * 8);
3075                                 }
3076                         }
3077                 }
3078         }
3079
3080         /* move swapped float args to target regs */
3081         for (i = 0; i < num_fltregargs; i++) {
3082                 s1 = fltregarg_inswap[i];
3083                 M_DMOV(s1 + 16, s1);
3084                 printf("float arg to target reg: %d ==> %d\n", s1+16, s1);
3085         }
3086
3087
3088         /* put class into second argument register */
3089
3090         if (m->flags & ACC_STATIC) {
3091                 disp = dseg_add_address(cd, m->class);
3092                 M_ALD(REG_OUT1, REG_PV_CALLEE, disp);
3093         }
3094
3095         /* put env into first argument register */
3096
3097         disp = dseg_add_address(cd, _Jv_env);
3098         M_ALD(REG_OUT0, REG_PV_CALLEE, disp);
3099
3100         /* do the native function call */
3101
3102         M_ALD(REG_ITMP3, REG_PV_CALLEE, funcdisp); /* load adress of native method       */
3103         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO); /* call native method                 */
3104         M_NOP;                              /* delay slot                         */
3105
3106         /* save return value */
3107
3108         if (md->returntype.type != TYPE_VOID) {
3109                 if (IS_INT_LNG_TYPE(md->returntype.type))
3110                         M_MOV(REG_RESULT_CALLER, REG_RESULT_CALLEE);
3111                 else
3112                         M_DST(REG_FRESULT, REG_SP, CSTACK);
3113         }
3114
3115         /* Note: native functions return float values in %f0 (see ABI) */
3116         /* we handle this by doing M_FLD below. (which will load the lower word into %f1) */
3117
3118 #if !defined(NDEBUG)
3119         /* But for the trace function we need to put a flt result into %f1 */
3120         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3121                 if (!IS_2_WORD_TYPE(md->returntype.type))
3122                         M_FLD(REG_FRESULT, REG_SP, CSTACK);
3123                 emit_verbosecall_exit(jd);
3124         }
3125 #endif
3126
3127         /* remove native stackframe info */
3128
3129         M_ADD_IMM(REG_FP, BIAS, REG_OUT0); /* datasp, like above */
3130         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3131         M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
3132         M_JMP(REG_RA_CALLER, REG_ITMP3, REG_ZERO);
3133         M_NOP; /* XXX fill me! */
3134         M_MOV(REG_RESULT_CALLER, REG_ITMP2_XPTR);
3135
3136         /* restore float return value, int return value already in our return reg */
3137
3138         if (md->returntype.type != TYPE_VOID) {
3139                 if (IS_FLT_DBL_TYPE(md->returntype.type)) {
3140                         if (IS_2_WORD_TYPE(md->returntype.type))
3141                                 M_DLD(REG_FRESULT, REG_SP, CSTACK);
3142                         else
3143                                 M_FLD(REG_FRESULT, REG_SP, CSTACK);
3144                 }
3145         }
3146
3147         /* check for exception */
3148
3149         M_BNEZ(REG_ITMP2_XPTR, 4);          /* if no exception then return        */
3150         M_NOP;
3151
3152         M_RETURN(REG_RA_CALLEE, 8); /* implicit window restore */
3153         M_NOP;
3154 #if 0
3155         M_RESTORE(REG_ZERO, 0, REG_ZERO);   /* restore callers window (DELAY)     */
3156
3157         M_RET(REG_RA_CALLER, 8);            /* return to caller                   */
3158         M_NOP;                              /* DELAY SLOT                         */
3159 #endif
3160
3161         /* handle exception */
3162
3163         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3164         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
3165         M_JMP(REG_ZERO, REG_ITMP3, REG_ZERO);/* jump to asm exception handler     */
3166         M_MOV(REG_RA_CALLEE, REG_ITMP3_XPC); /* get exception address (DELAY)    */
3167
3168         /* generate patcher stubs */
3169
3170         emit_patcher_stubs(jd);
3171
3172         codegen_finish(jd);
3173
3174         return code->entrypoint;
3175 }
3176
3177 /*
3178  * These are local overrides for various environment variables in Emacs.
3179  * Please do not remove this and leave it at the end of the file, where
3180  * Emacs will automagically detect them.
3181  * ---------------------------------------------------------------------
3182  * Local variables:
3183  * mode: c
3184  * indent-tabs-mode: t
3185  * c-basic-offset: 4
3186  * tab-width: 4
3187  * End:
3188  * vim:noexpandtab:sw=4:ts=4:
3189  */