1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 8211 2007-07-18 19:52:23Z michi $
38 #include "vm/jit/s390/codegen.h"
39 #include "vm/jit/s390/emit.h"
41 #if defined(ENABLE_THREADS)
42 # include "threads/native/lock.h"
45 #include "vm/builtin.h"
46 #include "vm/jit/abi-asm.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/codegen-common.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
52 #include "vm/jit/abi.h"
53 #include "vm/global.h"
54 #include "mm/memory.h"
55 #include "vm/exceptions.h"
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 __PORTED__ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->vv.regoff;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
102 /* emit_store ******************************************************************
104 This function generates the code to store the result of an
105 operation back into a spilled pseudo-variable. If the
106 pseudo-variable has not been spilled in the first place, this
107 function will generate nothing.
109 *******************************************************************************/
111 __PORTED__ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
115 /* get required compiler data */
119 if (IS_INMEMORY(dst->flags)) {
122 if (IS_FLT_DBL_TYPE(dst->type)) {
123 if (IS_2_WORD_TYPE(dst->type))
124 M_DST(d, REG_SP, dst->vv.regoff);
126 M_FST(d, REG_SP, dst->vv.regoff);
129 if (IS_2_WORD_TYPE(dst->type))
130 M_LST(d, REG_SP, dst->vv.regoff);
132 M_IST(d, REG_SP, dst->vv.regoff);
138 /* emit_copy *******************************************************************
140 Generates a register/memory to register/memory copy.
142 *******************************************************************************/
144 __PORTED__ void emit_copy(jitdata *jd, instruction *iptr)
151 /* get required compiler data */
155 /* get source and destination variables */
157 src = VAROP(iptr->s1);
158 dst = VAROP(iptr->dst);
160 if ((src->vv.regoff != dst->vv.regoff) ||
161 ((src->flags ^ dst->flags) & INMEMORY)) {
163 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
164 /* emit nothing, as the value won't be used anyway */
168 /* If one of the variables resides in memory, we can eliminate
169 the register move from/to the temporary register with the
170 order of getting the destination register and the load. */
172 if (IS_INMEMORY(src->flags)) {
173 if (IS_FLT_DBL_TYPE(dst->type)) {
174 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
176 if (IS_2_WORD_TYPE(dst->type)) {
177 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
179 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
182 s1 = emit_load(jd, iptr, src, d);
185 if (IS_FLT_DBL_TYPE(src->type)) {
186 s1 = emit_load(jd, iptr, src, REG_FTMP1);
188 if (IS_2_WORD_TYPE(src->type)) {
189 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
191 s1 = emit_load(jd, iptr, src, REG_ITMP1);
194 d = codegen_reg_of_var(iptr->opc, dst, s1);
198 if (IS_FLT_DBL_TYPE(src->type)) {
201 if (IS_2_WORD_TYPE(src->type)) {
209 emit_store(jd, iptr, dst, d);
214 /* emit_patcher_stubs **********************************************************
216 Generates the code for the patcher stubs.
218 *******************************************************************************/
220 __PORTED__ void emit_patcher_stubs(jitdata *jd)
232 /* get required compiler data */
236 /* generate code patching stub call code */
240 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
241 /* check code segment size */
245 /* Get machine code which is patched back in later. The
246 call is 1 instruction word long. */
248 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
250 mcode = *((u4 *) tmpmcodeptr);
252 /* Patch in the call to call the following code (done at
255 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
256 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
258 disp = (savedmcodeptr) - (tmpmcodeptr);
260 if (! N_VALID_BRANCH(disp)) {
261 /* Displacement overflow */
263 /* If LONGBRANCHES is not set, the flag and the error flag */
265 if (! CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
266 cd->flags |= (CODEGENDATA_FLAG_ERROR |
267 CODEGENDATA_FLAG_LONGBRANCHES);
270 /* If error flag is set, do nothing. The method has to be recompiled. */
272 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
277 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
279 /* Generating long branches */
281 disp = dseg_add_s4(cd, savedmcodeptr - cd->mcodebase - N_PV_OFFSET);
283 M_ILD_DSEG(REG_ITMP3, disp);
284 M_AADD(REG_PV, REG_ITMP3);
286 /* Do the branch at the end of NOP sequence.
287 * This way the patch position is at a *fixed* offset
288 * (PATCHER_LONGBRANCHES_NOPS_SKIP) of the return address.
291 cd->mcodeptr = tmpmcodeptr + PATCHER_LONGBRANCHES_NOPS_SKIP - SZ_BASR;
292 M_JMP(REG_ITMP3, REG_ITMP3);
295 /* Generating short branches */
297 M_BSR(REG_ITMP3, disp);
300 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
302 /* create stack frame */
304 M_ASUB_IMM(6 * 4, REG_SP);
306 /* move return address onto stack */
308 M_AST(REG_ITMP3, REG_SP, 5 * 4);
310 /* move pointer to java_objectheader onto stack */
312 #if defined(ENABLE_THREADS)
313 /* create a virtual java_objectheader */
315 (void) dseg_add_unique_address(cd, NULL); /* flcword */
316 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
317 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
319 M_LDA_DSEG(REG_ITMP3, disp);
320 M_AST(REG_ITMP3, REG_SP, 4 * 4);
325 /* move machine code onto stack */
327 disp = dseg_add_s4(cd, mcode);
328 M_ILD_DSEG(REG_ITMP3, disp);
329 M_IST(REG_ITMP3, REG_SP, 3 * 4);
331 /* move class/method/field reference onto stack */
333 disp = dseg_add_address(cd, pref->ref);
334 M_ALD_DSEG(REG_ITMP3, disp);
335 M_AST(REG_ITMP3, REG_SP, 2 * 4);
337 /* move data segment displacement onto stack */
339 disp = dseg_add_s4(cd, pref->disp);
340 M_ILD_DSEG(REG_ITMP3, disp);
341 M_IST(REG_ITMP3, REG_SP, 1 * 4);
343 /* move patcher function pointer onto stack */
345 disp = dseg_add_functionptr(cd, pref->patcher);
346 M_ALD_DSEG(REG_ITMP3, disp);
347 M_AST(REG_ITMP3, REG_SP, 0 * 4);
349 if (targetdisp == 0) {
350 targetdisp = (cd->mcodeptr) - (cd->mcodebase);
352 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
353 M_ALD_DSEG(REG_ITMP3, disp);
354 M_JMP(RN, REG_ITMP3);
357 disp = ((cd->mcodebase) + targetdisp) -
360 emit_branch(cd, disp, BRANCH_UNCONDITIONAL, RN, 0);
366 /* emit_verbosecall_enter ******************************************************
368 Generates the code for the call trace.
370 *******************************************************************************/
373 void emit_verbosecall_enter(jitdata *jd)
380 s4 stackframesize, off, foff, aoff, doff, t, iargctr, fargctr, disp;
382 /* get required compiler data */
389 /* mark trace code */
394 (6 * 8) + /* s8 on stack parameters x 6 */
395 (1 * 4) + /* methodinfo on stack parameter */
400 M_ASUB_IMM(stackframesize, REG_SP); /* allocate stackframe */
402 /* save argument registers */
404 off = (6 * 8) + (1 * 4);
406 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
407 M_IST(abi_registers_integer_argument[i], REG_SP, off);
409 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
410 M_DST(abi_registers_float_argument[i], REG_SP, off);
412 /* save temporary registers for leaf methods */
414 if (jd->isleafmethod) {
415 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
416 M_LST(abi_registers_integer_temporary[i], REG_SP, off);
418 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
419 M_DST(abi_registers_float_temporary[i], REG_SP, off);
422 /* Load arguments to new locations */
424 /* First move all arguments to stack
429 * (s8) a1 \ Auxilliary stack frame
434 M_ASUB_IMM(2 * 8, REG_SP);
436 /* offset to where first integer arg is saved on stack */
437 off = (2 * 8) + (6 * 8) + (1 * 4);
438 /* offset to where first float arg is saved on stack */
439 foff = off + (INT_ARG_CNT * 8);
440 /* offset to where first argument is passed on stack */
441 aoff = (2 * 8) + stackframesize + (cd->stackframesize * 4);
442 /* offset to destination on stack */
445 iargctr = fargctr = 0;
447 ICONST(REG_ITMP1, 0);
449 for (i = 0; i < md->paramcount && i < 8; i++) {
450 t = md->paramtypes[i].type;
452 M_IST(REG_ITMP1, REG_SP, doff);
453 M_IST(REG_ITMP1, REG_SP, doff + 4);
455 if (IS_FLT_DBL_TYPE(t)) {
456 if (fargctr < 2) { /* passed in register */
457 N_STD(abi_registers_float_argument[fargctr], doff, RN, REG_SP);
459 } else { /* passed on stack */
460 if (IS_2_WORD_TYPE(t)) {
461 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
464 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
469 if (IS_2_WORD_TYPE(t)) {
470 if (iargctr < 4) { /* passed in 2 registers */
471 N_STM(REG_A0 + iargctr, REG_A0 + iargctr + 1, doff, REG_SP);
473 } else { /* passed on stack */
474 N_MVC(doff, 8, REG_SP, aoff, REG_SP);
478 if (iargctr < 5) { /* passed in register */
479 N_ST(REG_A0 + iargctr, doff + 4, RN, REG_SP);
481 } else { /* passed on stack */
482 N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
491 /* Now move a0 and a1 to registers
501 N_LM(REG_A0, REG_A1, 0, REG_SP);
502 N_LM(REG_A2, REG_A3, 8, REG_SP);
504 M_AADD_IMM(2 * 8, REG_SP);
506 /* Finally load methodinfo argument */
508 disp = dseg_add_address(cd, m);
509 M_ALD_DSEG(REG_ITMP2, disp);
510 M_AST(REG_ITMP2, REG_SP, 6 * 8);
512 /* Call builtin_verbosecall_enter */
514 disp = dseg_add_address(cd, builtin_verbosecall_enter);
515 M_ALD_DSEG(REG_ITMP2, disp);
516 M_ASUB_IMM(96, REG_SP);
518 M_AADD_IMM(96, REG_SP);
520 /* restore argument registers */
522 off = (6 * 8) + (1 * 4);
524 for (i = 0; i < INT_ARG_CNT; i++, off += 8)
525 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
527 for (i = 0; i < FLT_ARG_CNT; i++, off += 8)
528 M_DLD(abi_registers_float_argument[i], REG_SP, off);
530 /* restore temporary registers for leaf methods */
532 if (jd->isleafmethod) {
533 for (i = 0; i < INT_TMP_CNT; i++, off += 8)
534 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
536 for (i = 0; i < FLT_TMP_CNT; i++, off += 8)
537 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
540 /* remove stackframe */
542 M_AADD_IMM(stackframesize, REG_SP);
544 /* mark trace code */
548 #endif /* !defined(NDEBUG) */
551 /* emit_verbosecall_exit *******************************************************
553 Generates the code for the call trace.
555 *******************************************************************************/
558 void emit_verbosecall_exit(jitdata *jd)
565 /* get required compiler data */
571 /* mark trace code */
575 M_ASUB_IMM(2 * 8, REG_SP);
577 N_STM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
578 M_DST(REG_FRESULT, REG_SP, 1 * 8);
580 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type)) {
581 /* (REG_A0, REG_A1) == (REG_RESULT, REG_RESULT2), se no need to move */
583 M_INTMOVE(REG_RESULT, REG_A1);
587 disp = dseg_add_address(cd, m);
588 M_ALD_DSEG(REG_A2, disp);
590 /* REG_FRESULT is REG_FA0, so no need to move */
591 M_FLTMOVE(REG_FRESULT, REG_FA1);
593 disp = dseg_add_address(cd, builtin_verbosecall_exit);
594 M_ALD_DSEG(REG_ITMP1, disp);
595 M_ASUB_IMM(96, REG_SP);
597 M_AADD_IMM(96, REG_SP);
599 N_LM(REG_RESULT, REG_RESULT2, 0 * 8, REG_SP);
600 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
602 M_AADD_IMM(2 * 8, REG_SP);
604 /* mark trace code */
608 #endif /* !defined(NDEBUG) */
611 /* emit_load_high **************************************************************
613 Emits a possible load of the high 32-bits of an operand.
615 *******************************************************************************/
617 __PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
623 assert(src->type == TYPE_LNG);
625 /* get required compiler data */
629 if (IS_INMEMORY(src->flags)) {
632 disp = src->vv.regoff;
634 M_ILD(tempreg, REG_SP, disp);
639 reg = GET_HIGH_REG(src->vv.regoff);
644 /* emit_load_low ***************************************************************
646 Emits a possible load of the low 32-bits of an operand.
648 *******************************************************************************/
650 __PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
656 assert(src->type == TYPE_LNG);
658 /* get required compiler data */
662 if (IS_INMEMORY(src->flags)) {
665 disp = src->vv.regoff;
667 M_ILD(tempreg, REG_SP, disp + 4);
672 reg = GET_LOW_REG(src->vv.regoff);
677 s4 emit_load_s1_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
678 codegendata *cd = jd->cd;
679 s4 reg = emit_load_s1(jd, iptr, tempreg);
688 s4 emit_load_s2_notzero(jitdata *jd, instruction *iptr, s4 tempreg) {
689 codegendata *cd = jd->cd;
690 s4 reg = emit_load_s2(jd, iptr, tempreg);
692 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
693 M_FMOV(reg, tempreg);
703 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
704 codegendata *cd = jd->cd;
705 s4 reg = emit_load_s1(jd, iptr, tempreg);
707 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
708 M_FMOV(reg, tempreg);
718 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
719 codegendata *cd = jd->cd;
720 s4 reg = emit_load_s2(jd, iptr, tempreg);
722 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
723 M_FMOV(reg, tempreg);
733 s4 emit_alloc_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
744 * (r12, r13) Illegal, because r13 is PV
745 * (r14, r15) Illegal, because r15 is SP
749 dst = VAROP(iptr->dst);
751 if (IS_INMEMORY(dst->flags)) {
752 if (! IS_REG_ITMP(ltmpreg)) {
753 M_INTMOVE(ltmpreg, breg);
755 if (! IS_REG_ITMP(htmpreg)) {
756 M_INTMOVE(htmpreg, breg);
758 return PACK_REGS(ltmpreg, htmpreg);
760 hr = GET_HIGH_REG(dst->vv.regoff);
761 lr = GET_LOW_REG(dst->vv.regoff);
762 if (((hr % 2) == 0) && lr == (hr + 1)) {
763 /* the result is already in a even-odd pair */
764 return dst->vv.regoff;
765 } else if (((hr % 2) == 0) && (hr < R12)) {
766 /* the high register is at a even position */
767 M_INTMOVE(hr + 1, breg);
768 return PACK_REGS(hr + 1, hr);
769 } else if (((lr % 2) == 1) && (lr < R12)) {
770 /* the low register is at a odd position */
771 M_INTMOVE(lr - 1, breg);
772 return PACK_REGS(lr, lr - 1);
774 /* no way to create an even-odd pair by 1 copy operation,
775 * Use the temporary register pair.
777 if (! IS_REG_ITMP(ltmpreg)) {
778 M_INTMOVE(ltmpreg, breg);
780 if (! IS_REG_ITMP(htmpreg)) {
781 M_INTMOVE(htmpreg, breg);
783 return PACK_REGS(ltmpreg, htmpreg);
788 void emit_restore_dst_even_odd(jitdata *jd, instruction *iptr, s4 htmpreg, s4 ltmpreg, s4 breg) {
794 dst = VAROP(iptr->dst);
796 if (IS_INMEMORY(dst->flags)) {
797 if (! IS_REG_ITMP(ltmpreg)) {
798 M_INTMOVE(breg, ltmpreg);
800 if (! IS_REG_ITMP(htmpreg)) {
801 M_INTMOVE(breg, htmpreg);
804 hr = GET_HIGH_REG(dst->vv.regoff);
805 lr = GET_LOW_REG(dst->vv.regoff);
806 if (((hr % 2) == 0) && lr == (hr + 1)) {
808 } else if (((hr % 2) == 0) && (hr < R12)) {
809 M_INTMOVE(breg, hr + 1);
810 } else if (((lr % 2) == 1) && (lr < R12)) {
811 M_INTMOVE(breg, lr - 1);
813 if (! IS_REG_ITMP(ltmpreg)) {
814 M_INTMOVE(breg, ltmpreg);
816 if (! IS_REG_ITMP(htmpreg)) {
817 M_INTMOVE(breg, htmpreg);
823 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
827 dst = VAROP(iptr->dst);
828 if (! IS_INMEMORY(dst->flags)) {
829 if (dst->vv.regoff != dtmpreg) {
830 if (IS_FLT_DBL_TYPE(dst->type)) {
831 M_FLTMOVE(dtmpreg, dst->vv.regoff);
832 } else if (IS_2_WORD_TYPE(dst->type)) {
833 M_LNGMOVE(dtmpreg, dst->vv.regoff);
835 M_INTMOVE(dtmpreg, dst->vv.regoff);
841 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
843 s4 branchdisp = disp;
847 if (N_VALID_BRANCH(branchdisp)) {
849 /* valid displacement */
870 case BRANCH_UNCONDITIONAL:
874 vm_abort("emit_branch: unknown condition %d", condition);
878 /* If LONGBRANCHES is not set, the flag and the error flag */
880 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
881 cd->flags |= (CODEGENDATA_FLAG_ERROR |
882 CODEGENDATA_FLAG_LONGBRANCHES);
885 /* If error flag is set, do nothing. The method has to be recompiled. */
887 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
891 /* Patch the displacement to branch over the actual branch manually
892 * to not get yet more nops.
895 branchmpc = cd->mcodeptr - cd->mcodebase;
917 case BRANCH_UNCONDITIONAL:
918 /* fall through, no displacement to patch */
922 vm_abort("emit_branch: unknown condition %d", condition);
925 /* The actual long branch */
927 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
928 M_ILD_DSEG(REG_ITMP3, disp);
929 M_AADD(REG_PV, REG_ITMP3);
930 M_JMP(RN, REG_ITMP3);
932 /* Patch back the displacement */
935 *(u4 *)ref |= (u4)((cd->mcodeptr - ref) / 2);
940 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
941 if (INSTRUCTION_MUST_CHECK(iptr)) {
943 M_BNE(SZ_BRC + SZ_ILL);
944 M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
948 /* emit_arrayindexoutofbounds_check ********************************************
950 Emit a ArrayIndexOutOfBoundsException check.
952 *******************************************************************************/
954 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
956 if (INSTRUCTION_MUST_CHECK(iptr)) {
958 * Do unsigned comparison to catch negative indexes.
960 N_CL(s2, OFFSET(java_arrayheader, size), RN, s1);
961 M_BLT(SZ_BRC + SZ_ILL);
962 M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
966 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
967 if (INSTRUCTION_MUST_CHECK(iptr)) {
973 M_BGT(SZ_BRC + SZ_ILL);
976 M_BNE(SZ_BRC + SZ_ILL);
979 M_BLE(SZ_BRC + SZ_ILL);
982 vm_abort("emit_classcast_check: unknown condition %d", condition);
984 M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
988 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
989 if (INSTRUCTION_MUST_CHECK(iptr)) {
991 M_BNE(SZ_BRC + SZ_ILL);
992 M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
996 void emit_exception_check(codegendata *cd, instruction *iptr) {
997 if (INSTRUCTION_MUST_CHECK(iptr)) {
999 M_BNE(SZ_BRC + SZ_ILL);
1000 M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
1004 void emit_restore_pv(codegendata *cd) {
1005 s4 offset, offset_imm;
1009 disp = (s4) (cd->mcodeptr - cd->mcodebase);
1010 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
1013 /* If the offset from the method start does not fit into an immediate
1014 * value, we can't put it into the data segment!
1017 /* Displacement from start of method to here */
1019 offset = (s4) (cd->mcodeptr - cd->mcodebase);
1020 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
1022 if (N_VALID_IMM(offset_imm)) {
1023 /* Get program counter */
1025 /* Substract displacement */
1026 M_AADD_IMM(offset_imm, REG_PV);
1028 /* Save program counter and jump over displacement in instruction flow */
1029 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
1030 /* Place displacement here */
1031 /* REG_PV points now exactly to this position */
1032 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
1033 /* Substract *(REG_PV) from REG_PV */
1034 N_A(REG_PV, 0, RN, REG_PV);
1039 * These are local overrides for various environment variables in Emacs.
1040 * Please do not remove this and leave it at the end of the file, where
1041 * Emacs will automagically detect them.
1042 * ---------------------------------------------------------------------
1045 * indent-tabs-mode: t