1 /* src/vm/jit/s390/emit.c - s390 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
30 #include "mm/memory.h"
32 #include "threads/lock-common.h"
34 #include "vm/builtin.h"
35 #include "vm/exceptions.h"
36 #include "vm/global.h"
37 #include "vm/jit/abi.h"
38 #include "vm/jit/abi-asm.h"
39 #include "vm/jit/asmpart.h"
40 #include "vm/jit/codegen-common.h"
41 #include "vm/jit/emit-common.h"
42 #include "vm/jit/jit.h"
43 #include "vm/jit/patcher-common.h"
44 #include "vm/jit/replace.h"
45 #include "vm/jit/trace.h"
46 #include "vm/jit/s390/codegen.h"
47 #include "vm/jit/s390/emit.h"
48 #include "vm/jit/s390/md-abi.h"
50 #include "vmcore/options.h"
52 /* emit_load *******************************************************************
54 Emits a possible load of an operand.
56 *******************************************************************************/
58 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
64 /* get required compiler data */
68 if (IS_INMEMORY(src->flags)) {
71 disp = src->vv.regoff;
73 if (IS_FLT_DBL_TYPE(src->type)) {
74 if (IS_2_WORD_TYPE(src->type))
75 M_DLD(tempreg, REG_SP, disp);
77 M_FLD(tempreg, REG_SP, disp);
80 if (IS_2_WORD_TYPE(src->type))
81 M_LLD(tempreg, REG_SP, disp);
83 M_ILD(tempreg, REG_SP, disp);
95 /* emit_store ******************************************************************
97 This function generates the code to store the result of an
98 operation back into a spilled pseudo-variable. If the
99 pseudo-variable has not been spilled in the first place, this
100 function will generate nothing.
102 *******************************************************************************/
104 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
108 /* get required compiler data */
112 if (IS_INMEMORY(dst->flags)) {
115 if (IS_FLT_DBL_TYPE(dst->type)) {
116 if (IS_2_WORD_TYPE(dst->type))
117 M_DST(d, REG_SP, dst->vv.regoff);
119 M_FST(d, REG_SP, dst->vv.regoff);
122 if (IS_2_WORD_TYPE(dst->type))
123 M_LST(d, REG_SP, dst->vv.regoff);
125 M_IST(d, REG_SP, dst->vv.regoff);
131 /* emit_copy *******************************************************************
133 Generates a register/memory to register/memory copy.
135 *******************************************************************************/
137 void emit_copy(jitdata *jd, instruction *iptr)
144 /* get required compiler data */
148 /* get source and destination variables */
150 src = VAROP(iptr->s1);
151 dst = VAROP(iptr->dst);
153 if ((src->vv.regoff != dst->vv.regoff) ||
154 ((src->flags ^ dst->flags) & INMEMORY)) {
156 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
157 /* emit nothing, as the value won't be used anyway */
161 if (IS_INMEMORY(src->flags) && IS_INMEMORY(dst->flags)) {
162 if (IS_2_WORD_TYPE(src->type)) {
163 N_MVC(dst->vv.regoff, 8, REG_SP, src->vv.regoff, REG_SP);
165 N_MVC(dst->vv.regoff, 4, REG_SP, src->vv.regoff, REG_SP);
169 /* If one of the variables resides in memory, we can eliminate
170 the register move from/to the temporary register with the
171 order of getting the destination register and the load. */
173 if (IS_INMEMORY(src->flags)) {
174 if (IS_FLT_DBL_TYPE(dst->type)) {
175 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
177 if (IS_2_WORD_TYPE(dst->type)) {
178 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
180 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
183 s1 = emit_load(jd, iptr, src, d);
186 if (IS_FLT_DBL_TYPE(src->type)) {
187 s1 = emit_load(jd, iptr, src, REG_FTMP1);
189 if (IS_2_WORD_TYPE(src->type)) {
190 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
192 s1 = emit_load(jd, iptr, src, REG_ITMP1);
195 d = codegen_reg_of_var(iptr->opc, dst, s1);
199 if (IS_FLT_DBL_TYPE(src->type)) {
202 if (IS_2_WORD_TYPE(src->type)) {
210 emit_store(jd, iptr, dst, d);
215 /* emit_trap *******************************************************************
217 Emit a trap instruction and return the original machine code.
219 *******************************************************************************/
221 uint32_t emit_trap(codegendata *cd)
225 /* Get machine code which is patched back in later. The
226 trap is 2 bytes long. */
228 mcode = *((u2 *) cd->mcodeptr);
230 M_ILL(EXCEPTION_HARDWARE_PATCHER);
236 /* emit_verbosecall_enter ******************************************************
238 Generates the code for the call trace.
240 *******************************************************************************/
243 void emit_verbosecall_enter(jitdata *jd)
258 /* mark trace code */
262 /* allocate stack frame */
264 stackframesize = 96 + (md->paramcount * 8);
266 /* for leaf methods we need to store unused argument and temporary registers */
268 if (code_is_leafmethod(code)) {
269 stackframesize += (ARG_CNT + TMP_CNT) * 8;
272 /* allocate stack frame */
274 M_ASUB_IMM(stackframesize, REG_SP);
276 /* store argument registers in array */
280 for (i = 0; i < md->paramcount; i++) {
281 if (! md->params[i].inmemory) {
282 s = md->params[i].regoff;
283 switch (md->paramtypes[i].type) {
286 M_IST(s, REG_SP, off);
289 M_LST(s, REG_SP, off);
292 M_FST(s, REG_SP, off);
295 M_DST(s, REG_SP, off);
302 /* save unused (currently all) argument registers for leaf methods */
303 /* save temporary registers for leaf methods */
305 if (code_is_leafmethod(code)) {
307 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
308 M_IST(abi_registers_integer_argument[i], REG_SP, off);
311 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
312 M_DST(abi_registers_float_argument[i], REG_SP, off);
315 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
316 M_IST(abi_registers_integer_temporary[i], REG_SP, off);
319 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
320 M_DST(abi_registers_float_temporary[i], REG_SP, off);
324 /* load arguments for trace_java_call_enter */
328 disp = dseg_add_address(cd, m);
329 M_ALD_DSEG(REG_A0, disp);
330 /* pointer to argument registers array */
331 M_LDA(REG_A1, REG_SP, 96);
332 /* pointer to on stack arguments */
333 M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8));
335 /* call trace_java_call_enter */
337 disp = dseg_add_functionptr(cd, trace_java_call_enter);
338 M_ALD_DSEG(REG_ITMP2, disp);
341 /* restore used argument registers */
342 /* for leaf methods restore all argument and temporary registers */
344 if (code_is_leafmethod(code)) {
345 off = 96 + (8 * md->paramcount);
347 for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
348 M_ILD(abi_registers_integer_argument[i], REG_SP, off);
351 for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
352 M_DLD(abi_registers_float_argument[i], REG_SP, off);
355 for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
356 M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
359 for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
360 M_DLD(abi_registers_float_temporary[i], REG_SP, off);
365 for (i = 0; i < md->paramcount; i++) {
366 if (! md->params[i].inmemory) {
367 s = md->params[i].regoff;
368 switch (md->paramtypes[i].type) {
371 M_ILD(s, REG_SP, off);
374 M_LLD(s, REG_SP, off);
377 M_FLD(s, REG_SP, off);
380 M_DLD(s, REG_SP, off);
388 /* remove stack frame */
390 M_AADD_IMM(stackframesize, REG_SP);
392 /* mark trace code */
397 #endif /* !defined(NDEBUG) */
400 /* emit_verbosecall_exit *******************************************************
402 Generates the code for the call trace.
404 *******************************************************************************/
407 void emit_verbosecall_exit(jitdata *jd)
418 t = m->parseddesc->returntype.type;
420 /* mark trace code */
424 /* allocate stackframe */
426 stackframesize = 96 + (1 * 8);
427 M_ASUB_IMM(stackframesize, REG_SP);
431 /* store return values in array */
433 if (IS_INT_LNG_TYPE(t)) {
434 if (IS_2_WORD_TYPE(t)) {
435 M_LST(REG_RESULT_PACKED, REG_SP, off);
437 M_IST(REG_RESULT, REG_SP, off);
440 M_DST(REG_FRESULT, REG_SP, off);
443 /* call trace_java_call_exit */
445 disp = dseg_add_address(cd, m);
446 M_ALD_DSEG(REG_A0, disp);
447 M_LDA(REG_A1, REG_SP, off);
448 disp = dseg_add_functionptr(cd, trace_java_call_exit);
449 M_ALD_DSEG(REG_ITMP2, disp);
452 /* restore return value */
454 if (IS_INT_LNG_TYPE(t)) {
455 if (IS_2_WORD_TYPE(t)) {
456 M_LLD(REG_RESULT_PACKED, REG_SP, off);
458 M_ILD(REG_RESULT, REG_SP, off);
461 M_DLD(REG_FRESULT, REG_SP, off);
464 /* remove stackframe */
466 M_AADD_IMM(stackframesize, REG_SP);
468 /* mark trace code */
472 #endif /* !defined(NDEBUG) */
475 /* emit_load_high **************************************************************
477 Emits a possible load of the high 32-bits of an operand.
479 *******************************************************************************/
481 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
487 assert(src->type == TYPE_LNG);
489 /* get required compiler data */
493 if (IS_INMEMORY(src->flags)) {
496 disp = src->vv.regoff;
498 M_ILD(tempreg, REG_SP, disp);
503 reg = GET_HIGH_REG(src->vv.regoff);
508 /* emit_load_low ***************************************************************
510 Emits a possible load of the low 32-bits of an operand.
512 *******************************************************************************/
514 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
520 assert(src->type == TYPE_LNG);
522 /* get required compiler data */
526 if (IS_INMEMORY(src->flags)) {
529 disp = src->vv.regoff;
531 M_ILD(tempreg, REG_SP, disp + 4);
536 reg = GET_LOW_REG(src->vv.regoff);
541 s4 emit_load_s1_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
542 codegendata *cd = jd->cd;
543 s4 reg = emit_load_s1(jd, iptr, tempreg);
545 if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
546 M_FMOV(reg, tempreg);
556 s4 emit_load_s2_but(jitdata *jd, instruction *iptr, s4 tempreg, s4 notreg) {
557 codegendata *cd = jd->cd;
558 s4 reg = emit_load_s2(jd, iptr, tempreg);
560 if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
561 M_FMOV(reg, tempreg);
571 void emit_copy_dst(jitdata *jd, instruction *iptr, s4 dtmpreg) {
575 dst = VAROP(iptr->dst);
576 if (! IS_INMEMORY(dst->flags)) {
577 if (dst->vv.regoff != dtmpreg) {
578 if (IS_FLT_DBL_TYPE(dst->type)) {
579 M_FLTMOVE(dtmpreg, dst->vv.regoff);
580 } else if (IS_2_WORD_TYPE(dst->type)) {
581 M_LNGMOVE(dtmpreg, dst->vv.regoff);
583 M_INTMOVE(dtmpreg, dst->vv.regoff);
589 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt) {
591 s4 branchdisp = disp;
595 if (N_VALID_BRANCH(branchdisp)) {
597 /* valid displacement */
618 case BRANCH_UNCONDITIONAL:
622 vm_abort("emit_branch: unknown condition %d", condition);
626 /* If LONGBRANCHES is not set, the flag and the error flag */
628 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
629 cd->flags |= (CODEGENDATA_FLAG_ERROR |
630 CODEGENDATA_FLAG_LONGBRANCHES);
633 /* If error flag is set, do nothing. The method has to be recompiled. */
635 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
639 /* Patch the displacement to branch over the actual branch manually
640 * to not get yet more nops.
643 branchmpc = cd->mcodeptr - cd->mcodebase;
665 case BRANCH_UNCONDITIONAL:
666 /* fall through, no displacement to patch */
670 vm_abort("emit_branch: unknown condition %d", condition);
673 /* The actual long branch */
675 disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
676 M_ILD_DSEG(REG_ITMP2, disp);
677 M_AADD(REG_PV, REG_ITMP2);
678 M_JMP(RN, REG_ITMP2);
680 /* Patch back the displacement */
682 N_BRC_BACK_PATCH(ref);
686 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg) {
687 if (INSTRUCTION_MUST_CHECK(iptr)) {
689 M_BNE(SZ_BRC + SZ_ILL);
690 M_ILL(EXCEPTION_HARDWARE_ARITHMETIC);
694 /* emit_arrayindexoutofbounds_check ********************************************
696 Emit a ArrayIndexOutOfBoundsException check.
698 *******************************************************************************/
700 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
702 if (INSTRUCTION_MUST_CHECK(iptr)) {
704 * Do unsigned comparison to catch negative indexes.
706 N_CL(s2, OFFSET(java_array_t, size), RN, s1);
707 M_BLT(SZ_BRC + SZ_ILL);
708 M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
713 /* emit_arraystore_check *******************************************************
715 Emit an ArrayStoreException check.
717 *******************************************************************************/
719 void emit_arraystore_check(codegendata *cd, instruction *iptr)
721 if (INSTRUCTION_MUST_CHECK(iptr)) {
723 M_BNE(SZ_BRC + SZ_ILL);
724 M_ILL(EXCEPTION_HARDWARE_ARRAYSTORE);
729 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1) {
730 if (INSTRUCTION_MUST_CHECK(iptr)) {
736 M_BGT(SZ_BRC + SZ_ILL);
739 M_BNE(SZ_BRC + SZ_ILL);
742 M_BLE(SZ_BRC + SZ_ILL);
745 vm_abort("emit_classcast_check: unknown condition %d", condition);
747 M_ILL2(s1, EXCEPTION_HARDWARE_CLASSCAST);
751 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg) {
752 if (INSTRUCTION_MUST_CHECK(iptr)) {
754 M_BNE(SZ_BRC + SZ_ILL);
755 M_ILL(EXCEPTION_HARDWARE_NULLPOINTER);
759 void emit_exception_check(codegendata *cd, instruction *iptr) {
760 if (INSTRUCTION_MUST_CHECK(iptr)) {
762 M_BNE(SZ_BRC + SZ_ILL);
763 M_ILL(EXCEPTION_HARDWARE_EXCEPTION);
767 void emit_restore_pv(codegendata *cd) {
768 s4 offset, offset_imm;
772 disp = (s4) (cd->mcodeptr - cd->mcodebase);
773 M_ASUB_IMM32(disp, REG_ITMP1, REG_PV);
776 /* If the offset from the method start does not fit into an immediate
777 * value, we can't put it into the data segment!
780 /* Displacement from start of method to here */
782 offset = (s4) (cd->mcodeptr - cd->mcodebase);
783 offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
785 if (N_VALID_IMM(offset_imm)) {
786 /* Get program counter */
788 /* Substract displacement */
789 M_AADD_IMM(offset_imm, REG_PV);
791 /* Save program counter and jump over displacement in instruction flow */
792 N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
793 /* Place displacement here */
794 /* REG_PV points now exactly to this position */
795 N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
796 /* Substract *(REG_PV) from REG_PV */
797 N_A(REG_PV, 0, RN, REG_PV);
801 /* emit_trap_compiler **********************************************************
803 Emit a trap instruction which calls the JIT compiler.
805 *******************************************************************************/
807 void emit_trap_compiler(codegendata *cd)
809 M_ILL2(REG_METHODPTR, EXCEPTION_HARDWARE_COMPILER);
813 * These are local overrides for various environment variables in Emacs.
814 * Please do not remove this and leave it at the end of the file, where
815 * Emacs will automagically detect them.
816 * ---------------------------------------------------------------------
819 * indent-tabs-mode: t