1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "mm/memory.h"
39 #include "vm/jit/powerpc64/codegen.h"
41 #include "vmcore/options.h"
43 #include "vm/builtin.h"
44 #include "vm/exceptions.h"
47 #include "vm/jit/abi.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
52 #if defined(ENABLE_THREADS)
53 # include "threads/native/lock.h"
57 /* emit_load *******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (src->flags & INMEMORY) {
76 disp = src->vv.regoff * 8;
78 if (IS_FLT_DBL_TYPE(src->type)) {
79 M_DLD(tempreg, REG_SP, disp);
82 M_LLD(tempreg, REG_SP, disp);
94 /* emit_store ******************************************************************
96 Emits a possible store to a variable.
98 *******************************************************************************/
100 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
104 /* get required compiler data */
108 if (dst->flags & INMEMORY) {
111 if (IS_FLT_DBL_TYPE(dst->type)) {
112 M_DST(d, REG_SP, dst->vv.regoff * 8);
115 M_LST(d, REG_SP, dst->vv.regoff * 8);
121 /* emit_copy *******************************************************************
123 Generates a register/memory to register/memory copy.
125 *******************************************************************************/
127 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
133 /* get required compiler data */
138 if ((src->vv.regoff != dst->vv.regoff) ||
139 ((src->flags ^ dst->flags) & INMEMORY)) {
141 /* If one of the variables resides in memory, we can eliminate
142 the register move from/to the temporary register with the
143 order of getting the destination register and the load. */
145 if (IS_INMEMORY(src->flags)) {
146 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
147 s1 = emit_load(jd, iptr, src, d);
150 s1 = emit_load(jd, iptr, src, REG_IFTMP);
151 d = codegen_reg_of_var(iptr->opc, dst, s1);
155 if (IS_FLT_DBL_TYPE(src->type))
161 emit_store(jd, iptr, dst, d);
166 /* emit_iconst *****************************************************************
170 *******************************************************************************/
172 void emit_iconst(codegendata *cd, s4 d, s4 value)
176 if ((value >= -32768) && (value <= 32767)) {
177 M_LDA_INTERN(d, REG_ZERO, value);
179 disp = dseg_add_s4(cd, value);
180 M_ILD(d, REG_PV, disp);
184 void emit_lconst(codegendata *cd, s4 d, s8 value)
187 if ((value >= -32768) && (value <= 32767)) {
188 M_LDA_INTERN(d, REG_ZERO, value);
190 disp = dseg_add_s8(cd, value);
191 M_LLD(d, REG_PV, disp);
196 /* emit_verbosecall_enter ******************************************************
198 Generates the code for the call trace.
200 *******************************************************************************/
202 void emit_verbosecall_enter (jitdata *jd)
211 /* get required compiler data */
219 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
223 /* setup stack for TRACE_ARGS_NUM registers */
224 /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
226 /* in nativestubs no Place to save the LR (Link Register) would be needed */
227 /* but since the stack frame has to be aligned the 4 Bytes would have to */
228 /* be padded again */
230 #if defined(__DARWIN__)
231 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
233 stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
236 /* mark trace code */
240 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
241 M_STDU(REG_SP, REG_SP, -stack_size);
243 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
244 t = md->paramtypes[p].type;
245 if (IS_INT_LNG_TYPE(t)) {
246 if (!md->params[p].inmemory) { /* Param in Arg Reg */
247 M_LST(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
248 } else { /* Param on Stack */
249 s1 = (md->params[p].regoff + cd->stackframesize) * 8 + stack_size;
250 M_LLD(REG_ITMP2, REG_SP, s1);
251 M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
253 } else { /* IS_FLT_DBL_TYPE(t) */
254 if (!md->params[p].inmemory) { /* in Arg Reg */
255 s1 = md->params[p].regoff;
256 M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
257 } else { /* on Stack */
258 /* this should not happen */
264 #if defined(__DARWIN__)
265 #warning "emit_verbosecall_enter not implemented"
268 /* Set integer and float argument registers for trace_args call */
269 /* offset to saved integer argument registers */
270 for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
271 t = md->paramtypes[p].type;
272 if (IS_INT_LNG_TYPE(t)) {
273 M_LLD(abi_registers_integer_argument[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
274 } else { /* Float/Dbl */
275 if (!md->params[p].inmemory) { /* Param in Arg Reg */
276 /* use reserved Place on Stack (sp + 5 * 16) to copy */
277 /* float/double arg reg to int reg */
278 s1 = md->params[p].regoff;
279 M_MOV(s1, abi_registers_integer_argument[p]);
287 /* put methodinfo pointer on Stackframe */
288 p = dseg_add_address(cd, m);
289 M_ALD(REG_ITMP1, REG_PV, p);
290 #if defined(__DARWIN__)
291 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
293 if (TRACE_ARGS_NUM == 8) {
294 /* need to pass via stack */
295 M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
297 /* pass via register, reg 3 is the first */
298 M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
301 /* call via function descriptor */
302 /* XXX: what about TOC? */
303 p = dseg_add_functionptr(cd, builtin_verbosecall_enter);
304 M_ALD(REG_ITMP2, REG_PV, p);
305 M_ALD(REG_ITMP1, REG_ITMP2, 0);
309 #if defined(__DARWIN__)
310 #warning "emit_verbosecall_enter not implemented"
313 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
314 t = md->paramtypes[p].type;
315 if (IS_INT_LNG_TYPE(t)) {
316 if (!md->params[p].inmemory) { /* Param in Arg Reg */
317 /* restore integer argument registers */
318 M_LLD(abi_registers_integer_argument[p], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
320 assert(0); /* TODO: implement this */
322 } else { /* FLT/DBL */
323 if (!md->params[p].inmemory) { /* Param in Arg Reg */
324 M_DLD(md->params[p].regoff, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
326 assert(0); /* this shoudl never happen */
332 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
334 M_LDA(REG_SP, REG_SP, stack_size);
336 /* mark trace code */
341 /* emit_verbosecall_exit ******************************************************
343 Generates the code for the call trace.
345 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
347 *******************************************************************************/
349 void emit_verbosecall_exit(jitdata *jd)
355 /* get required compiler data */
360 /* mark trace code */
365 M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
366 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
367 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
368 M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
370 M_MOV(REG_RESULT, REG_A0);
372 M_FLTMOVE(REG_FRESULT, REG_FA0);
373 M_FLTMOVE(REG_FRESULT, REG_FA1);
375 disp = dseg_add_address(cd, m);
376 M_ALD(REG_A3, REG_PV, disp);
378 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
379 /* call via function descriptor, XXX: what about TOC ? */
380 M_ALD(REG_ITMP2, REG_PV, disp);
381 M_ALD(REG_ITMP2, REG_ITMP2, 0);
385 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
386 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
387 M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
388 M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
391 /* mark trace code */
396 /* emit_branch *****************************************************************
398 Emits the code for conditional and unconditional branchs.
400 *******************************************************************************/
402 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
407 /* calculate the different displacements */
409 checkdisp = disp + 4;
410 branchdisp = (disp - 4) >> 2;
412 /* check which branch to generate */
414 if (condition == BRANCH_UNCONDITIONAL) {
415 /* check displacement for overflow */
417 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
418 /* if the long-branches flag isn't set yet, do it */
420 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
421 log_println("setting error");
422 cd->flags |= (CODEGENDATA_FLAG_ERROR |
423 CODEGENDATA_FLAG_LONGBRANCHES);
426 vm_abort("emit_branch: emit unconditional long-branch code");
433 /* and displacement for overflow */
435 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
436 /* if the long-branches flag isn't set yet, do it */
438 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
439 log_println("setting error");
440 cd->flags |= (CODEGENDATA_FLAG_ERROR |
441 CODEGENDATA_FLAG_LONGBRANCHES);
443 log_println("generating long-branch");
445 branchdisp --; /* we jump from the second instruction */
472 vm_abort("emit_branch: long BRANCH_NAN");
475 vm_abort("emit_branch: unknown condition %d", condition);
503 vm_abort("emit_branch: unknown condition %d", condition);
509 /* emit_arrayindexoutofbounds_check ********************************************
511 Emit a ArrayIndexOutOfBoundsException check.
513 *******************************************************************************/
515 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
520 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
521 M_CMPU(s2, REG_ITMP3);
522 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
525 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
526 M_CMPU(s2, REG_ITMP3);
528 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
529 M_LWZ(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
535 /* emit_arithmetic_check *******************************************************
537 Emit an ArithmeticException check.
539 *******************************************************************************/
541 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
543 if (INSTRUCTION_MUST_CHECK(iptr)) {
546 codegen_add_arithmeticexception_ref(cd);
551 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
552 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
558 /* emit_arraystore_check *******************************************************
560 Emit an ArrayStoreException check.
562 *******************************************************************************/
564 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
566 if (INSTRUCTION_MUST_CHECK(iptr)) {
568 codegen_add_arraystoreexception_ref(cd);
574 /* emit_classcast_check ********************************************************
576 Emit a ClassCastException check.
578 *******************************************************************************/
580 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
582 if (INSTRUCTION_MUST_CHECK(iptr)) {
584 codegen_add_classcastexception_ref(cd, condition, s1);
599 vm_abort("emit_classcast_check: unknown condition %d", condition);
601 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
602 M_LWZ(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
608 /* emit_nullpointer_check ******************************************************
610 Emit a NullPointerException check.
612 *******************************************************************************/
614 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
616 if (INSTRUCTION_MUST_CHECK(iptr)) {
619 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
620 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
624 /* emit_exception_check ********************************************************
626 Emit an Exception check.
628 *******************************************************************************/
630 void emit_exception_check(codegendata *cd, instruction *iptr)
632 if (INSTRUCTION_MUST_CHECK(iptr)) {
634 M_CMPI(REG_RESULT, 0);
635 codegen_add_fillinstacktrace_ref(cd);
640 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
641 M_LWZ(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
647 /* emit_patcher_stubs **********************************************************
649 Generates the code for the patcher stubs.
651 *******************************************************************************/
652 void emit_patcher_stubs(jitdata *jd)
664 /* generate code patching stub call code */
668 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
669 /* check code segment size */
673 /* Get machine code which is patched back in later. The
674 call is 1 instruction word long. */
676 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
678 mcode = *((u4 *) tmpmcodeptr);
680 /* Patch in the call to call the following code (done at
683 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
684 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
686 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
689 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
691 /* create stack frame - keep stack 16-byte aligned */
692 M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
694 /* calculate return address and move it onto the stack */
695 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
696 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
698 /* move pointer to java_objectheader onto stack */
700 #if defined(ENABLE_THREADS)
701 /* order reversed because of data segment layout */
703 (void) dseg_add_unique_address(cd, NULL); /* flcword */
704 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word()); /* monitorPtr */
705 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
707 M_LDA(REG_ITMP3, REG_PV, disp);
708 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
713 /* move machine code onto stack */
714 disp = dseg_add_s4(cd, mcode);
715 M_ILD(REG_ITMP3, REG_PV, disp);
716 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
718 /* move class/method/field reference onto stack */
719 disp = dseg_add_address(cd, pref->ref);
720 M_ALD(REG_ITMP3, REG_PV, disp);
721 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
723 /* move data segment displacement onto stack */
724 disp = dseg_add_s4(cd, pref->disp);
725 M_ILD(REG_ITMP3, REG_PV, disp);
726 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
728 /* move patcher function pointer onto stack */
729 disp = dseg_add_functionptr(cd, pref->patcher);
730 M_ALD(REG_ITMP3, REG_PV, disp);
731 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
733 if (targetdisp == 0) {
734 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
736 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
737 M_ALD(REG_ITMP3, REG_PV, disp);
742 disp = (((u4 *) cd->mcodebase) + targetdisp) -
743 (((u4 *) cd->mcodeptr) + 1);
750 /* emit_replacement_stubs ******************************************************
752 Generates the code for the replacement stubs.
754 *******************************************************************************/
756 #if defined(ENABLE_REPLACEMENT)
757 void emit_replacement_stubs(jitdata *jd)
761 rplpoint *replacementpoint;
768 /* get required compiler data */
773 replacementpoint = jd->code->rplpoints;
775 for (i = 0; i < code->rplpointcount; ++i, ++replacementpoint) {
776 /* do not generate stubs for non-trappable points */
778 if (replacementpoint->flags & RPLPOINT_FLAG_NOTRAP)
782 /* check code segment size */
787 savedmcodeptr = cd->mcodeptr;
789 /* create stack frame - keep 16-byte aligned */
791 M_AADD_IMM(REG_SP, -4 * 8, REG_SP);
793 /* push address of `rplpoint` struct */
795 disp = dseg_add_address(cd, replacementpoint);
796 M_ALD(REG_ITMP3, REG_PV, disp);
797 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
799 /* jump to replacement function */
801 disp = dseg_add_functionptr(cd, asm_replacement_out);
802 M_ALD(REG_ITMP3, REG_PV, disp);
806 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
809 /* note start of stub code */
811 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
813 /* make machine code for patching */
815 savedmcodeptr = cd->mcodeptr;
816 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
818 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
821 cd->mcodeptr = savedmcodeptr;
823 /* create stack frame - keep 16-byte aligned */
825 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
827 /* push address of `rplpoint` struct */
829 disp = dseg_add_unique_address(cd, replacementpoint);
830 M_ALD(REG_ITMP3, REG_PV, disp);
831 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
833 /* jump to replacement function */
835 disp = dseg_add_functionptr(cd, asm_replacement_out);
836 M_ALD(REG_ITMP3, REG_PV, disp);
842 #endif /* define(ENABLE_REPLACEMENT) */
845 * These are local overrides for various environment variables in Emacs.
846 * Please do not remove this and leave it at the end of the file, where
847 * Emacs will automagically detect them.
848 * ---------------------------------------------------------------------
851 * indent-tabs-mode: t
855 * vim:noexpandtab:sw=4:ts=4: