src/vm/jit/powerpc64/emit.c

   1 /* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29
  30 #include "vm/types.h"
  31
  32 #include "mm/memory.h"
  33
  34 #include "md-abi.h"
  35 #include "vm/jit/powerpc64/codegen.h"
  36
  37 #include "threads/lock-common.h"
  38
  39 #include "vm/options.h"
  40 #include "vm/vm.hpp"
  41
  42 #include "vm/jit/abi.h"
  43 #include "vm/jit/asmpart.h"
  44 #include "vm/jit/emit-common.hpp"
  45 #include "vm/jit/jit.hpp"
  46 #include "vm/jit/trace.hpp"
  47 #include "vm/jit/trap.h"
  48
  49
  50 /* emit_load *******************************************************************
  51
  52    Emits a possible load of an operand.
  53
  54 *******************************************************************************/
  55
  56 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  57 {
  58         codegendata  *cd;
  59         s4            disp;
  60         s4            reg;
  61
  62         /* get required compiler data */
  63
  64         cd = jd->cd;
  65
  66         if (src->flags & INMEMORY) {
  67                 COUNT_SPILLS;
  68
  69                 disp = src->vv.regoff;
  70
  71                 if (IS_FLT_DBL_TYPE(src->type)) {
  72                         M_DLD(tempreg, REG_SP, disp);
  73                 }
  74                 else {
  75                         M_LLD(tempreg, REG_SP, disp);
  76                 }
  77
  78                 reg = tempreg;
  79         }
  80         else
  81                 reg = src->vv.regoff;
  82
  83         return reg;
  84 }
  85
  86
  87 /* emit_store ******************************************************************
  88
  89    Emits a possible store to a variable.
  90
  91 *******************************************************************************/
  92
  93 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
  94 {
  95         codegendata  *cd;
  96
  97         /* get required compiler data */
  98
  99         cd = jd->cd;
 100
 101         if (dst->flags & INMEMORY) {
 102                 COUNT_SPILLS;
 103
 104                 if (IS_FLT_DBL_TYPE(dst->type)) {
 105                         M_DST(d, REG_SP, dst->vv.regoff);
 106                 }
 107                 else {
 108                         M_LST(d, REG_SP, dst->vv.regoff);
 109                 }
 110         }
 111 }
 112
 113
 114 /* emit_copy *******************************************************************
 115
 116    Generates a register/memory to register/memory copy.
 117
 118 *******************************************************************************/
 119
 120 void emit_copy(jitdata *jd, instruction *iptr)
 121 {
 122         codegendata *cd;
 123         varinfo     *src;
 124         varinfo     *dst;
 125         s4           s1, d;
 126
 127         /* get required compiler data */
 128
 129         cd = jd->cd;
 130
 131         /* get source and destination variables */
 132
 133         src = VAROP(iptr->s1);
 134         dst = VAROP(iptr->dst);
 135
 136         if ((src->vv.regoff != dst->vv.regoff) ||
 137                 ((src->flags ^ dst->flags) & INMEMORY)) {
 138
 139                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 140                         /* emit nothing, as the value won't be used anyway */
 141                         return;
 142                 }
 143
 144                 /* If one of the variables resides in memory, we can eliminate
 145                    the register move from/to the temporary register with the
 146                    order of getting the destination register and the load. */
 147
 148                 if (IS_INMEMORY(src->flags)) {
 149                         d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 150                         s1 = emit_load(jd, iptr, src, d);
 151                 }
 152                 else {
 153                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 154                         d  = codegen_reg_of_var(iptr->opc, dst, s1);
 155                 }
 156
 157                 if (s1 != d) {
 158                         if (IS_FLT_DBL_TYPE(src->type))
 159                                 M_FMOV(s1, d);
 160                         else
 161                                 M_MOV(s1, d);
 162                 }
 163
 164                 emit_store(jd, iptr, dst, d);
 165         }
 166 }
 167
 168
 169 /* emit_iconst *****************************************************************
 170
 171    XXX
 172
 173 *******************************************************************************/
 174
 175 void emit_iconst(codegendata *cd, s4 d, s4 value)
 176 {
 177         s4 disp;
 178
 179         if ((value >= -32768) && (value <= 32767)) {
 180                 M_LDA_INTERN(d, REG_ZERO, value);
 181         } else {
 182                 disp = dseg_add_s4(cd, value);
 183                 M_ILD(d, REG_PV, disp);
 184         }
 185 }
 186
 187 void emit_lconst(codegendata *cd, s4 d, s8 value)
 188 {
 189         s4 disp;
 190         if ((value >= -32768) && (value <= 32767)) {
 191                 M_LDA_INTERN(d, REG_ZERO, value);
 192         } else {
 193                 disp = dseg_add_s8(cd, value);
 194                 M_LLD(d, REG_PV, disp);
 195         }
 196 }
 197
 198
 199 /* emit_verbosecall_enter ******************************************************
 200
 201    Generates the code for the call trace.
 202
 203 *******************************************************************************/
 204
 205 #if !defined(NDEBUG)
 206 void emit_verbosecall_enter(jitdata *jd)
 207 {
 208         methodinfo   *m;
 209         codegendata  *cd;
 210         methoddesc   *md;
 211         int32_t       paramcount;
 212         int32_t       stackframesize;
 213         s4            disp;
 214         s4            i, s;
 215
 216         /* get required compiler data */
 217
 218         m  = jd->m;
 219         cd = jd->cd;
 220
 221         md = m->parseddesc;
 222
 223         /* mark trace code */
 224
 225         M_NOP;
 226
 227         /* align stack to 16-bytes */
 228
 229         paramcount = md->paramcount;
 230         ALIGN_2(paramcount);
 231         stackframesize = LA_SIZE + PA_SIZE + md->paramcount * 8;
 232
 233         M_MFLR(REG_ZERO);
 234         M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 235         M_STDU(REG_SP, REG_SP, -stackframesize);
 236
 237 #if defined(__DARWIN__)
 238         #warning "emit_verbosecall_enter not implemented"
 239 #else
 240         /* save argument registers */
 241
 242         for (i = 0; i < md->paramcount; i++) {
 243                 if (!md->params[i].inmemory) {
 244                         s = md->params[i].regoff;
 245
 246                         switch (md->paramtypes[i].type) {
 247                         case TYPE_ADR:
 248                         case TYPE_INT:
 249                         case TYPE_LNG:
 250                                 M_LST(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
 251                                 break;
 252                         case TYPE_FLT:
 253                         case TYPE_DBL:
 254                                 M_DST(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
 255                                 break;
 256                         }
 257                 }
 258         }
 259 #endif
 260
 261         disp = dseg_add_address(cd, m);
 262         M_ALD(REG_A0, REG_PV, disp);
 263         M_AADD_IMM(REG_SP, LA_SIZE+PA_SIZE, REG_A1);
 264         M_AADD_IMM(REG_SP, stackframesize + cd->stackframesize * 8, REG_A2);
 265         /* call via function descriptor, XXX: what about TOC? */
 266         disp = dseg_add_functionptr(cd, trace_java_call_enter);
 267         M_ALD(REG_ITMP2, REG_PV, disp);
 268         M_ALD(REG_ITMP1, REG_ITMP2, 0);
 269         M_MTCTR(REG_ITMP1);
 270         M_JSR;
 271
 272 #if defined(__DARWIN__)
 273         #warning "emit_verbosecall_enter not implemented"
 274 #else
 275         /* restore argument registers */
 276
 277         for (i = 0; i < md->paramcount; i++) {
 278                 if (!md->params[i].inmemory) {
 279                         s = md->params[i].regoff;
 280
 281                         switch (md->paramtypes[i].type) {
 282                         case TYPE_ADR:
 283                         case TYPE_INT:
 284                         case TYPE_LNG:
 285                                 M_LLD(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
 286                                 break;
 287                         case TYPE_FLT:
 288                         case TYPE_DBL:
 289                                 M_DLD(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
 290                                 break;
 291                         }
 292                 }
 293         }
 294 #endif
 295
 296         M_ALD(REG_ZERO, REG_SP, stackframesize + LA_LR_OFFSET);
 297         M_MTLR(REG_ZERO);
 298         M_LDA(REG_SP, REG_SP, stackframesize);
 299
 300         /* mark trace code */
 301
 302         M_NOP;
 303 }
 304 #endif
 305
 306
 307 /* emit_verbosecall_exit ******************************************************
 308
 309    Generates the code for the call trace.
 310
 311 *******************************************************************************/
 312
 313 #if !defined(NDEBUG)
 314 void emit_verbosecall_exit(jitdata *jd)
 315 {
 316         methodinfo   *m;
 317         codegendata  *cd;
 318         methoddesc   *md;
 319         s4            disp;
 320
 321         /* get required compiler data */
 322
 323         m  = jd->m;
 324         cd = jd->cd;
 325
 326         md = m->parseddesc;
 327
 328         /* mark trace code */
 329
 330         M_NOP;
 331
 332         M_MFLR(REG_ZERO);
 333         M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
 334         M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+1*8);
 335
 336         /* save return value */
 337
 338         switch (md->returntype.type) {
 339         case TYPE_ADR:
 340         case TYPE_INT:
 341         case TYPE_LNG:
 342                 M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
 343                 break;
 344         case TYPE_FLT:
 345         case TYPE_DBL:
 346                 M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
 347                 break;
 348         }
 349
 350         disp = dseg_add_address(cd, m);
 351         M_ALD(REG_A0, REG_PV, disp);
 352         M_AADD_IMM(REG_SP, LA_SIZE+PA_SIZE, REG_A1);
 353
 354         disp = dseg_add_functionptr(cd, trace_java_call_exit);
 355         /* call via function descriptor, XXX: what about TOC ? */
 356         M_ALD(REG_ITMP2, REG_PV, disp);
 357         M_ALD(REG_ITMP2, REG_ITMP2, 0);
 358         M_MTCTR(REG_ITMP2);
 359         M_JSR;
 360
 361         /* restore return value */
 362
 363         switch (md->returntype.type) {
 364         case TYPE_ADR:
 365         case TYPE_INT:
 366         case TYPE_LNG:
 367                 M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
 368                 break;
 369         case TYPE_FLT:
 370         case TYPE_DBL:
 371                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
 372                 break;
 373         }
 374
 375         M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+1*8);
 376         M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
 377         M_MTLR(REG_ZERO);
 378
 379         /* mark trace code */
 380
 381         M_NOP;
 382 }
 383 #endif
 384
 385
 386 /* emit_branch *****************************************************************
 387
 388    Emits the code for conditional and unconditional branchs.
 389
 390 *******************************************************************************/
 391
 392 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 393 {
 394         s4 checkdisp;
 395         s4 branchdisp;
 396
 397         /* calculate the different displacements */
 398
 399         checkdisp  =  disp + 4;
 400         branchdisp = (disp - 4) >> 2;
 401
 402         /* check which branch to generate */
 403
 404         if (condition == BRANCH_UNCONDITIONAL) {
 405                 /* check displacement for overflow */
 406
 407                 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
 408                         /* if the long-branches flag isn't set yet, do it */
 409
 410                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 411                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 412                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 413                         }
 414
 415                         vm_abort("emit_branch: emit unconditional long-branch code");
 416                 }
 417                 else {
 418                         M_BR(branchdisp);
 419                 }
 420         }
 421         else {
 422                 /* and displacement for overflow */
 423
 424                 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
 425                         /* if the long-branches flag isn't set yet, do it */
 426
 427                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 428                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 429                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 430                         }
 431
 432                         branchdisp --;          /* we jump from the second instruction */
 433                         switch (condition) {
 434                         case BRANCH_EQ:
 435                                 M_BNE(1);
 436                                 M_BR(branchdisp);
 437                                 break;
 438                         case BRANCH_NE:
 439                                 M_BEQ(1);
 440                                 M_BR(branchdisp);
 441                                 break;
 442                         case BRANCH_LT:
 443                                 M_BGE(1);
 444                                 M_BR(branchdisp);
 445                                 break;
 446                         case BRANCH_GE:
 447                                 M_BLT(1);
 448                                 M_BR(branchdisp);
 449                                 break;
 450                         case BRANCH_GT:
 451                                 M_BLE(1);
 452                                 M_BR(branchdisp);
 453                                 break;
 454                         case BRANCH_LE:
 455                                 M_BGT(1);
 456                                 M_BR(branchdisp);
 457                                 break;
 458                         case BRANCH_NAN:
 459                                 vm_abort("emit_branch: long BRANCH_NAN");
 460                                 break;
 461                         default:
 462                                 vm_abort("emit_branch: unknown condition %d", condition);
 463                         }
 464
 465                 }
 466                 else {
 467                         switch (condition) {
 468                         case BRANCH_EQ:
 469                                 M_BEQ(branchdisp);
 470                                 break;
 471                         case BRANCH_NE:
 472                                 M_BNE(branchdisp);
 473                                 break;
 474                         case BRANCH_LT:
 475                                 M_BLT(branchdisp);
 476                                 break;
 477                         case BRANCH_GE:
 478                                 M_BGE(branchdisp);
 479                                 break;
 480                         case BRANCH_GT:
 481                                 M_BGT(branchdisp);
 482                                 break;
 483                         case BRANCH_LE:
 484                                 M_BLE(branchdisp);
 485                                 break;
 486                         case BRANCH_NAN:
 487                                 M_BNAN(branchdisp);
 488                                 break;
 489                         default:
 490                                 vm_abort("emit_branch: unknown condition %d", condition);
 491                         }
 492                 }
 493         }
 494 }
 495
 496 /* emit_arrayindexoutofbounds_check ********************************************
 497
 498    Emit a ArrayIndexOutOfBoundsException check.
 499
 500 *******************************************************************************/
 501
 502 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 503 {
 504         if (checkbounds) {
 505                 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
 506                 M_CMPU(s2, REG_ITMP3);
 507                 M_BLT(1);
 508                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 509                 M_LWZ(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 510         }
 511 }
 512
 513
 514 /* emit_arraystore_check *******************************************************
 515
 516    Emit an ArrayStoreException check.
 517
 518 *******************************************************************************/
 519
 520 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 521 {
 522         if (INSTRUCTION_MUST_CHECK(iptr))       {
 523                 M_TST(REG_RESULT);
 524                 M_BNE(1);
 525                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 526                 M_LWZ(REG_ZERO, REG_ZERO, TRAP_ArrayStoreException);
 527         }
 528 }
 529
 530
 531 /* emit_arithmetic_check *******************************************************
 532
 533    Emit an ArithmeticException check.
 534
 535 *******************************************************************************/
 536
 537 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 538 {
 539         if (INSTRUCTION_MUST_CHECK(iptr))       {
 540                 M_TST(reg);
 541                 M_BNE(1);
 542                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 543                 M_LWZ(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 544         }
 545 }
 546
 547
 548 /* emit_classcast_check ********************************************************
 549
 550    Emit a ClassCastException check.
 551
 552 *******************************************************************************/
 553
 554 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 555 {
 556         if (INSTRUCTION_MUST_CHECK(iptr))       {
 557                 switch(condition)       {
 558                 case BRANCH_LE:
 559                         M_BGT(1);
 560                         break;
 561                 case BRANCH_EQ:
 562                         M_BNE(1);
 563                         break;
 564                 case BRANCH_GT:
 565                         M_BLE(1);
 566                         break;
 567                 default:
 568                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 569                 }
 570
 571                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 572                 M_LWZ(s1, REG_ZERO, TRAP_ClassCastException);
 573         }
 574 }
 575
 576
 577 /* emit_nullpointer_check ******************************************************
 578
 579    Emit a NullPointerException check.
 580
 581 *******************************************************************************/
 582
 583 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 584 {
 585         if (INSTRUCTION_MUST_CHECK(iptr))       {
 586                 M_TST(reg);
 587                 M_BNE(1);
 588                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 589                 M_LWZ(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 590         }
 591 }
 592
 593 /* emit_exception_check ********************************************************
 594
 595    Emit an Exception check.
 596
 597 *******************************************************************************/
 598
 599 void emit_exception_check(codegendata *cd, instruction *iptr)
 600 {
 601         if (INSTRUCTION_MUST_CHECK(iptr))       {
 602                 M_TST(REG_RESULT);
 603                 M_BNE(1);
 604                 /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
 605                 M_LWZ(REG_ZERO, REG_ZERO, TRAP_CHECK_EXCEPTION);
 606         }
 607 }
 608
 609
 610 /* emit_trap_compiler **********************************************************
 611
 612    Emit a trap instruction which calls the JIT compiler.
 613
 614 *******************************************************************************/
 615
 616 void emit_trap_compiler(codegendata *cd)
 617 {
 618         M_LWZ(REG_METHODPTR, REG_ZERO, TRAP_COMPILER);
 619 }
 620
 621
 622 /* emit_trap *******************************************************************
 623
 624    Emit a trap instruction and return the original machine code.
 625
 626 *******************************************************************************/
 627
 628 uint32_t emit_trap(codegendata *cd)
 629 {
 630         uint32_t mcode;
 631
 632         /* Get machine code which is patched back in later. The
 633            trap is 1 instruction word long. */
 634
 635         mcode = *((uint32_t *) cd->mcodeptr);
 636
 637         /* ALD is 4 byte aligned, ILD 2, only LWZ is byte aligned */
 638         M_LWZ(REG_ZERO, REG_ZERO, TRAP_PATCHER);
 639
 640         return mcode;
 641 }
 642
 643
 644 /*
 645  * These are local overrides for various environment variables in Emacs.
 646  * Please do not remove this and leave it at the end of the file, where
 647  * Emacs will automagically detect them.
 648  * ---------------------------------------------------------------------
 649  * Local variables:
 650  * mode: c
 651  * indent-tabs-mode: t
 652  * c-basic-offset: 4
 653  * tab-width: 4
 654  * End:
 655  * vim:noexpandtab:sw=4:ts=4:
 656  */