1 /* src/vm/jit/powerpc64/codegen.h - code generation macros and definitions for
4 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
5 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
6 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
7 J. Wenninger, Institut f. Computersprachen - TU Wien
9 This file is part of CACAO.
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2, or (at
14 your option) any later version.
16 This program is distributed in the hope that it will be useful, but
17 WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 Contact: cacao@cacaojvm.org
28 Authors: Andreas Krall
31 Changes: Christian Thalinger
34 $Id: codegen.h 5618 2006-10-01 23:37:04Z edwin $
46 #include "vm/global.h"
47 #include "vm/jit/jit.h"
48 #include "vm/jit/reg.h"
51 /* additional functions and macros to generate code ***************************/
53 /* gen_nullptr_check(objreg) */
55 #define gen_nullptr_check(objreg) \
59 codegen_add_nullpointerexception_ref(cd); \
62 #define gen_bound_check \
64 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
65 M_CMP(s2, REG_ITMP3);\
67 codegen_add_arrayindexoutofboundsexception_ref(cd, s2); \
71 /* MCODECHECK(icnt) */
73 #define MCODECHECK(icnt) \
75 if ((cd->mcodeptr + (icnt) * 4) > cd->mcodeend) \
76 codegen_increase(cd); \
81 generates an integer-move from register a to b.
82 if a and b are the same int-register, no code will be generated.
85 #define M_INTMOVE(a,b) \
92 #define M_LNGMOVE(a,b) M_INTMOVE(a,b)
96 generates a floating-point-move from register a to b.
97 if a and b are the same float-register, no code will be generated
100 #define M_FLTMOVE(a,b) \
108 #define M_COPY(s,d) emit_copy(jd, iptr, VAR(s), VAR(d))
109 #define ICONST(d,c) emit_iconst(cd, (d), (c))
110 #define LCONST(reg,c) ICONST(reg,c)
113 #define ALIGNCODENOP \
114 if ((s4) ((ptrint) cd->mcodeptr & 7)) { \
119 /* macros to create code ******************************************************/
121 #define M_OP3(opcode,y,oe,rc,d,a,b) \
123 *((u4 *) cd->mcodeptr) = (((opcode) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((oe) << 10) | ((y) << 1) | (rc)); \
127 #define M_OP4(x,y,rc,d,a,b,c) \
129 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((c) << 6) | ((y) << 1) | (rc)); \
133 #define M_OP2_IMM(x,d,a,i) \
135 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((i) & 0xffff)); \
139 #define M_BRMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
140 #define M_BRAMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
142 #define M_BRA(x,i,a,l) \
144 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((((i) * 4) + 4) & M_BRAMASK) | ((a) << 1) | (l)); \
148 #define M_BRAC(x,bo,bi,i,a,l) \
150 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BRMASK) | ((a) << 1) | (l)); \
156 #define M_EXTSW(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
159 /* instruction macros *********************************************************/
161 #define M_IADD(a,b,c) M_LADD(a,b,c)
162 #define M_LADD(a,b,c) M_OP3(31, 266, 0, 0, c, a, b)
163 #define M_IADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b) /* XXX */
164 #define M_LADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b)
165 #define M_ADDC(a,b,c) M_OP3(31, 10, 0, 0, c, a, b)
166 #define M_ADDIC(a,b,c) M_OP2_IMM(12, c, a, b)
167 #define M_ADDICTST(a,b,c) M_OP2_IMM(13, c, a, b)
168 #define M_ADDE(a,b,c) M_OP3(31, 138, 0, 0, c, a, b)
169 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
170 #define M_ADDME(a,b) M_OP3(31, 234, 0, 0, b, a, 0)
172 #define M_SUB(a,b,c) M_OP3(31, 40, 0, 0, c, b, a)
173 #define M_ISUBTST(a,b,c) M_OP3(31, 40, 0, 1, c, b, a)
174 #define M_SUBC(a,b,c) M_OP3(31, 8, 0, 0, c, b, a)
175 #define M_SUBIC(a,b,c) M_OP2_IMM(8, c, b, a)
176 #define M_SUBE(a,b,c) M_OP3(31, 136, 0, 0, c, b, a)
177 #define M_SUBZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
178 #define M_SUBME(a,b) M_OP3(31, 232, 0, 0, b, a, 0)
180 #define M_AND(a,b,c) M_OP3(31, 28, 0, 0, a, c, b)
181 #define M_AND_IMM(a,b,c) M_OP2_IMM(28, a, c, b)
182 #define M_ANDIS(a,b,c) M_OP2_IMM(29, a, c, b)
183 #define M_OR(a,b,c) M_OP3(31, 444, 0, 0, a, c, b)
184 #define M_OR_TST(a,b,c) M_OP3(31, 444, 0, 1, a, c, b)
185 #define M_OR_IMM(a,b,c) M_OP2_IMM(24, a, c, b)
186 #define M_ORIS(a,b,c) M_OP2_IMM(25, a, c, b)
187 #define M_XOR(a,b,c) M_OP3(31, 316, 0, 0, a, c, b)
188 #define M_XOR_IMM(a,b,c) M_OP2_IMM(26, a, c, b)
189 #define M_XORIS(a,b,c) M_OP2_IMM(27, a, c, b)
191 #define M_SLL(a,b,c) M_OP3(31, 24, 0, 0, a, c, b)
192 #define M_SRL(a,b,c) M_OP3(31, 536, 0, 0, a, c, b)
193 #define M_SRA(a,b,c) M_OP3(31, 792, 0, 0, a, c, b)
194 #define M_SRA_IMM(a,b,c) M_OP3(31, 824, 0, 0, a, c, b)
196 #define M_MUL(a,b,c) M_OP3(31, 233, 0, 0, c, a, b)
197 #define M_MUL_IMM(a,b,c) M_OP2_IMM(7, c, a, b)
198 #define M_DIV(a,b,c) M_OP3(31, 489, 0, 0, c, a, b)
200 #define M_NEG(a,b) M_OP3(31, 104, 0, 0, b, a, 0)
201 #define M_NOT(a,b) M_OP3(31, 124, 0, 0, a, b, a)
203 #define M_SUBFIC(a,b,c) M_OP2_IMM(8, c, a, b)
204 #define M_SUBFZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
205 #define M_RLWINM(a,b,c,d,e) M_OP4(21, d, 0, a, e, b, c)
206 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
207 #define M_SLL_IMM(a,b,c) M_OP3(30, 0, 0, 0, a, c, b) /* RLDICL/ROTLDI FIXME: b is a split field */
208 #define M_SRL_IMM(a,b,c) M_RLWINM(a,32-(b),b,31,c)
209 #define M_ADDIS(a,b,c) M_OP2_IMM(15, c, a, b)
210 #define M_STFIWX(a,b,c) M_OP3(31, 983, 0, 0, a, b, c)
212 #define M_LWZX(a,b,c) M_OP3(31, 23, 0, 0, a, b, c)
213 #define M_LHZX(a,b,c) M_OP3(31, 279, 0, 0, a, b, c)
214 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
215 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
216 #define M_LBZX(a,b,c) M_OP3(31, 87, 0, 0, a, b, c)
217 #define M_LFSX(a,b,c) M_OP3(31, 535, 0, 0, a, b, c)
218 #define M_LFDX(a,b,c) M_OP3(31, 599, 0, 0, a, b, c)
220 #define M_STWX(a,b,c) M_OP3(31, 151, 0, 0, a, b, c)
221 #define M_STHX(a,b,c) M_OP3(31, 407, 0, 0, a, b, c)
222 #define M_STBX(a,b,c) M_OP3(31, 215, 0, 0, a, b, c)
223 #define M_STFSX(a,b,c) M_OP3(31, 663, 0, 0, a, b, c)
224 #define M_STFDX(a,b,c) M_OP3(31, 727, 0, 0, a, b, c)
227 #define M_STWU_INTERN(a,b,disp) M_OP2_IMM(37,a,b,disp)
228 #define M_STWU(a,b,disp) \
230 s4 lo = (disp) & 0x0000ffff; \
231 s4 hi = ((disp) >> 16); \
232 if (((disp) >= -32678) && ((disp) <= 32767)) { \
233 M_STWU_INTERN(a,b,lo); \
235 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
236 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
237 M_STWUX(REG_SP,REG_SP,REG_ITMP3); \
241 #define M_STWUX(a,b,c) M_OP3(31,183,0,0,a,b,c)
244 #define M_STDU_INTERN(a,b,disp) M_OP2_IMM(62,a,b,(disp)|0x0001)
245 #define M_STDU(a,b,disp) \
247 s4 lo = (disp) & 0x0000ffff; \
248 s4 hi = ((disp) >> 16); \
249 if (((disp) >= -32678) && ((disp) <= 32767)) { \
250 M_STDU_INTERN(a,b,lo); \
252 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
253 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
254 M_STDUX(REG_SP,REG_SP,REG_ITMP3); \
257 #define M_STDUX(a,b,c) M_OP3(31,181,0,0,a,b,c)
259 #define M_LDAH(a,b,c) M_ADDIS(b, c, a)
260 #define M_TRAP M_OP3(31, 4, 0, 0, 31, 0, 0)
262 #define M_NOP M_OR_IMM(0, 0, 0)
263 #define M_MOV(a,b) M_OR(a, a, b)
264 #define M_TST(a) M_OP3(31, 444, 0, 1, a, a, a)
266 #define M_DADD(a,b,c) M_OP3(63, 21, 0, 0, c, a, b)
267 #define M_FADD(a,b,c) M_OP3(59, 21, 0, 0, c, a, b)
268 #define M_DSUB(a,b,c) M_OP3(63, 20, 0, 0, c, a, b)
269 #define M_FSUB(a,b,c) M_OP3(59, 20, 0, 0, c, a, b)
270 #define M_DMUL(a,b,c) M_OP4(63, 25, 0, c, a, 0, b)
271 #define M_FMUL(a,b,c) M_OP4(59, 25, 0, c, a, 0, b)
272 #define M_DDIV(a,b,c) M_OP3(63, 18, 0, 0, c, a, b)
273 #define M_FDIV(a,b,c) M_OP3(59, 18, 0, 0, c, a, b)
275 #define M_FABS(a,b) M_OP3(63, 264, 0, 0, b, 0, a)
276 #define M_CVTDL(a,b) M_OP3(63, 14, 0, 0, b, 0, a)
277 #define M_CVTDL_C(a,b) M_OP3(63, 15, 0, 0, b, 0, a)
278 #define M_CVTDF(a,b) M_OP3(63, 12, 0, 0, b, 0, a)
279 #define M_FMOV(a,b) M_OP3(63, 72, 0, 0, b, 0, a)
280 #define M_FMOVN(a,b) M_OP3(63, 40, 0, 0, b, 0, a)
281 #define M_DSQRT(a,b) M_OP3(63, 22, 0, 0, b, 0, a)
282 #define M_FSQRT(a,b) M_OP3(59, 22, 0, 0, b, 0, a)
284 #define M_FCMPU(a,b) M_OP3(63, 0, 0, 0, 0, a, b)
285 #define M_FCMPO(a,b) M_OP3(63, 32, 0, 0, 0, a, b)
287 #define M_BLDU(a,b,c) M_OP2_IMM(34, a, b, c) /* LBZ */
288 #define M_SLDU(a,b,c) M_OP2_IMM(40, a, b, c) /* LHZ */
291 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(32,a,b,disp) /* LWZ */
294 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(58, a, b, (((disp) & 0xfffe) | 0x0002))
296 #define M_ILD(a,b,disp) \
298 s4 lo = (short) (disp); \
299 s4 hi = (short) (((disp) - lo) >> 16); \
301 M_ILD_INTERN(a,b,lo); \
304 M_ILD_INTERN(a,a,lo); \
308 #define M_LLD_INTERN(a,b,disp) M_OP2_IMM(58,a,b,disp) /* LD */
310 #define M_LLD(a,b,disp) \
312 s4 lo = (short) (disp); \
313 s4 hi = (short) (((disp) - lo) >> 16); \
315 M_LLD_INTERN(a,b,lo); \
318 M_LLD_INTERN(a,GET_LOW_REG(a),lo); \
322 #define M_ALD_INTERN(a,b,disp) M_LLD_INTERN(a,b,disp)
323 #define M_ALD(a,b,disp) M_LLD(a,b,disp)
324 #define M_ALDX(a,b,c) M_OP3(31, 21, 0, 0, a, b, c) /* LDX */
326 #define M_BST(a,b,c) M_OP2_IMM(38, a, b, c) /* STB */
327 #define M_SST(a,b,c) M_OP2_IMM(44, a, b, c) /* LMW */
329 #define M_IST_INTERN(a,b,disp) M_OP2_IMM(36,a,b,disp) /* STW */
331 /* Stores with displacement overflow should only happen with PUTFIELD
332 or on the stack. The PUTFIELD instruction does not use REG_ITMP3
333 and a reg_of_var call should not use REG_ITMP3!!! */
335 #define M_IST(a,b,disp) \
337 s4 lo = (short) (disp); \
338 s4 hi = (short) (((disp) - lo) >> 16); \
340 M_IST_INTERN(a,b,lo); \
342 M_ADDIS(b,hi,REG_ITMP3); \
343 M_IST_INTERN(a,REG_ITMP3,lo); \
347 #define M_LST_INTERN(a,b,disp) M_OP2_IMM(62,a,b,disp) /* STD */
349 #define M_LST(a,b,disp) \
351 s4 lo = (short) (disp); \
352 s4 hi = (short) (((disp) - lo) >> 16); \
354 M_LST_INTERN(a,b,lo); \
356 M_ADDIS(b,hi,REG_ITMP3); \
357 M_LST_INTERN(a,REG_ITMP3, lo); \
361 #define M_AST_INTERN(a,b,disp) M_LST_INTERN(a,b,disp)
362 #define M_AST(a,b,disp) M_LST(a,b,disp)
363 #define M_ASTX(a,b,c) M_OP3(31, 149, 0, 0, a, b, c)
365 #define M_BSEXT(a,b) M_OP3(31, 954, 0, 0, a, b, 0)
366 #define M_CZEXT(a,b) M_RLWINM(a,0,16,31,b)
367 #define M_SSEXT(a,b) M_OP3(31, 922, 0, 0, a, b, 0)
368 #define M_ISEXT(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
370 #define M_BR(a) M_BRA(18, a, 0, 0)
371 #define M_BL(a) M_BRA(18, a, 0, 1)
372 #define M_RET M_OP3(19, 16, 0, 0, 20, 0, 0)
373 #define M_JSR M_OP3(19, 528, 0, 1, 20, 0, 0)
374 #define M_RTS M_OP3(19, 528, 0, 0, 20, 0, 0)
376 #define M_CMP(a,b) M_OP3(31, 0, 0, 0, 1, a, b)
377 #define M_CMPU(a,b) M_OP3(31, 32, 0, 0, 1, a, b)
378 #define M_CMPI(a,b) M_OP2_IMM(11, 1, a, b)
379 #define M_CMPUI(a,b) M_OP2_IMM(10, 1, a, b)
381 #define M_BLT(a) M_BRAC(16, 12, 0, a, 0, 0)
382 #define M_BLE(a) M_BRAC(16, 4, 1, a, 0, 0)
383 #define M_BGT(a) M_BRAC(16, 12, 1, a, 0, 0)
384 #define M_BGE(a) M_BRAC(16, 4, 0, a, 0, 0)
385 #define M_BEQ(a) M_BRAC(16, 12, 2, a, 0, 0)
386 #define M_BNE(a) M_BRAC(16, 4, 2, a, 0, 0)
387 #define M_BNAN(a) M_BRAC(16, 12, 3, a, 0, 0)
389 #define M_FLD_INTERN(a,b,disp) M_OP2_IMM(48,a,b,disp)
390 #define M_DLD_INTERN(a,b,disp) M_OP2_IMM(50,a,b,disp)
392 #define M_FLD(a,b,disp) \
394 s4 lo = (short) (disp); \
395 s4 hi = (short) (((disp) - lo) >> 16); \
397 M_FLD_INTERN(a,b,lo); \
399 M_ADDIS(b,hi,REG_ITMP3); \
400 M_FLD_INTERN(a,REG_ITMP3,lo); \
404 #define M_DLD(a,b,disp) \
406 s4 lo = (short) (disp); \
407 s4 hi = (short) (((disp) - lo) >> 16); \
409 M_DLD_INTERN(a,b,lo); \
411 M_ADDIS(b,hi,REG_ITMP3); \
412 M_DLD_INTERN(a,REG_ITMP3,lo); \
416 #define M_FST_INTERN(a,b,disp) M_OP2_IMM(52,a,b,disp) /* STFS */
417 #define M_DST_INTERN(a,b,disp) M_OP2_IMM(54,a,b,disp) /* STFD */
419 #define M_FST(a,b,disp) \
421 s4 lo = (short) (disp); \
422 s4 hi = (short) (((disp) - lo) >> 16); \
424 M_FST_INTERN(a,b,lo); \
426 M_ADDIS(b,hi,REG_ITMP3); \
427 M_FST_INTERN(a,REG_ITMP3,lo); \
431 #define M_DST(a,b,disp) \
433 s4 lo = (short) (disp); \
434 s4 hi = (short) (((disp) - lo) >> 16); \
436 M_DST_INTERN(a,b,lo); \
438 M_ADDIS(b,hi,REG_ITMP3); \
439 M_DST_INTERN(a,REG_ITMP3,lo); \
443 #define M_MFLR(a) M_OP3(31, 339, 0, 0, a, 8, 0)
444 #define M_MFXER(a) M_OP3(31, 339, 0, 0, a, 1, 0)
445 #define M_MFCTR(a) M_OP3(31, 339, 0, 0, a, 9, 0)
446 #define M_MTLR(a) M_OP3(31, 467, 0, 0, a, 8, 0)
447 #define M_MTXER(a) M_OP3(31, 467, 0, 0, a, 1, 0)
448 #define M_MTCTR(a) M_OP3(31, 467, 0, 0, a, 9, 0)
450 #define M_LDA_INTERN(a,b,c) M_LADD_IMM(b, c, a)
452 #define M_LDA(a,b,disp) \
454 s4 lo = (short) (disp); \
455 s4 hi = (short) (((disp) - lo) >> 16); \
457 M_LDA_INTERN(a,b,lo); \
460 M_LDA_INTERN(a,a,lo); \
465 #define M_LDATST(a,b,c) M_ADDICTST(b, c, a)
466 #define M_CLR(a) M_LADD_IMM(0, 0, a)
467 #define M_AADD_IMM(a,b,c) M_LADD_IMM(a, b, c)
470 /* function gen_resolvebranch **************************************************
472 parameters: ip ... pointer to instruction after branch (void*)
473 so ... offset of instruction after branch (s4)
474 to ... offset of branch target (s4)
476 *******************************************************************************/
478 #define gen_resolvebranch(ip,so,to) \
479 *((s4*)(ip)-1)=(*((s4*)(ip)-1) & ~M_BRMASK) | (((s4)((to)-(so))+4)&((((*((s4*)(ip)-1)>>26)&63)==18)?M_BRAMASK:M_BRMASK))
481 #endif /* _CODEGEN_H */
485 * These are local overrides for various environment variables in Emacs.
486 * Please do not remove this and leave it at the end of the file, where
487 * Emacs will automagically detect them.
488 * ---------------------------------------------------------------------
491 * indent-tabs-mode: t