1 /* src/vm/jit/powerpc64/codegen.h - code generation macros and
2 definitions for PowerPC64
4 Copyright (C) 1996-2005, 2006, 2007, 2008
5 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
7 This file is part of CACAO.
9 This program is free software; you can redistribute it and/or
10 modify it under the terms of the GNU General Public License as
11 published by the Free Software Foundation; either version 2, or (at
12 your option) any later version.
14 This program is distributed in the hope that it will be useful, but
15 WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
34 #include "vm/global.h"
35 #include "vm/jit/jit.hpp"
36 #include "vm/jit/reg.h"
39 /* additional functions and macros to generate code ***************************/
41 /* MCODECHECK(icnt) */
43 #define MCODECHECK(icnt) \
45 if ((cd->mcodeptr + (icnt) * 4) > cd->mcodeend) \
46 codegen_increase(cd); \
51 generates an integer-move from register a to b.
52 if a and b are the same int-register, no code will be generated.
55 #define M_INTMOVE(a,b) \
62 #define M_LNGMOVE(a,b) M_INTMOVE(a,b)
66 generates a floating-point-move from register a to b.
67 if a and b are the same float-register, no code will be generated
70 #define M_FLTMOVE(a,b) \
78 #define ICONST(d,c) emit_iconst(cd, (d), (c))
79 #define LCONST(reg,c) emit_lconst(cd, (reg), (c))
82 #define ALIGNCODENOP \
83 if ((s4) ((ptrint) cd->mcodeptr & 7)) { \
88 /* branch defines *************************************************************/
89 /* and additional branch is needed when generating long branches */
92 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {\
99 /* patcher defines ************************************************************/
101 #define PATCHER_CALL_SIZE 1 * 4 /* an instruction is 4-bytes long */
103 #define PATCHER_NOPS \
109 /* macros to create code ******************************************************/
111 #define M_OP3(opcode,y,oe,rc,d,a,b) \
113 *((u4 *) cd->mcodeptr) = (((opcode) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((oe) << 10) | ((y) << 1) | (rc)); \
117 #define M_OP4(x,y,rc,d,a,b,c) \
119 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((c) << 6) | ((y) << 1) | (rc)); \
123 #define M_OP2_IMM(x,d,a,i) \
125 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((i) & 0xffff)); \
129 /* for instruction decodeing */
130 #define M_INSTR_OP2_IMM_D(x) (((x) >> 21) & 0x1f )
131 #define M_INSTR_OP2_IMM_A(x) (((x) >> 16) & 0x1f )
132 #define M_INSTR_OP2_IMM_I(x) ( (x) & 0xffff)
134 #define M_BCMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
135 #define M_BMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
137 #define M_B(x,i,a,l) \
139 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((((i) * 4) + 4) & M_BMASK) | ((a) << 1) | (l)); \
143 #define M_BC(x,bo,bi,i,a,l) \
145 *((u4 *) cd->mcodeptr) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BCMASK) | ((a) << 1) | (l)); \
151 #define M_EXTSW(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
154 /* instruction macros *********************************************************/
156 #define M_IADD(a,b,c) M_LADD(a,b,c)
157 #define M_LADD(a,b,c) M_OP3(31, 266, 0, 0, c, a, b)
158 #define M_IADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b) /* XXX */
159 #define M_LADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b)
160 #define M_ADDC(a,b,c) M_OP3(31, 10, 0, 0, c, a, b)
161 #define M_ADDIC(a,b,c) M_OP2_IMM(12, c, a, b)
162 #define M_ADDICTST(a,b,c) M_OP2_IMM(13, c, a, b)
163 #define M_ADDE(a,b,c) M_OP3(31, 138, 0, 0, c, a, b)
164 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
165 #define M_ADDME(a,b) M_OP3(31, 234, 0, 0, b, a, 0)
167 #define M_SUB(a,b,c) M_OP3(31, 40, 0, 0, c, b, a)
168 #define M_ISUBTST(a,b,c) M_OP3(31, 40, 0, 1, c, b, a)
169 #define M_SUBC(a,b,c) M_OP3(31, 8, 0, 0, c, b, a)
170 #define M_SUBIC(a,b,c) M_OP2_IMM(8, c, b, a)
171 #define M_SUBE(a,b,c) M_OP3(31, 136, 0, 0, c, b, a)
172 #define M_SUBZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
173 #define M_SUBME(a,b) M_OP3(31, 232, 0, 0, b, a, 0)
175 #define M_AND(a,b,c) M_OP3(31, 28, 0, 0, a, c, b)
176 #define M_AND_IMM(a,b,c) M_OP2_IMM(28, a, c, b)
177 #define M_ANDIS(a,b,c) M_OP2_IMM(29, a, c, b)
178 #define M_OR(a,b,c) M_OP3(31, 444, 0, 0, a, c, b)
179 #define M_OR_TST(a,b,c) M_OP3(31, 444, 0, 1, a, c, b)
180 #define M_OR_IMM(a,b,c) M_OP2_IMM(24, a, c, b)
181 #define M_ORIS(a,b,c) M_OP2_IMM(25, a, c, b)
182 #define M_XOR(a,b,c) M_OP3(31, 316, 0, 0, a, c, b)
183 #define M_XOR_IMM(a,b,c) M_OP2_IMM(26, a, c, b)
184 #define M_XORIS(a,b,c) M_OP2_IMM(27, a, c, b)
186 /* RLDICR is said to be turing complete, this seems right */
187 #define M_SLL(a,b,c) M_OP3(31, 27, 0, 0, a, c, b)
188 #define M_SLL_IMM(a,b,c) M_OP3(30, ((b)&0x20 ? 1:0), 0, ((((63-(b))&0x1f)<<6) | (((63-(b))&0x20 ? 1:0)<<5) | 0x04), a, c, (b)&0x1f);
189 #define M_SRL(a,b,c) M_OP3(31, 539, 0, 0, a, c, b)
190 #define M_SRL_IMM(a,b,c) M_OP3(30, ((64-(b))&0x20 ? 1:0), 0, (((((b))&0x1f)<<6) | ((((b))&0x20 ? 1:0)<<5) | 0x00), a, c, (64-(b))&0x1f);
191 #define M_SRA(a,b,c) M_OP3(31, 794, 0, 0, a, c, b)
192 #define M_SRA_IMM(a,b,c) M_OP3(31, (826 | ((b)&0x20?1:0)), 0, 0, a, c, ((b)&0x1f))
194 #define M_MUL(a,b,c) M_OP3(31, 233, 0, 0, c, a, b)
195 #define M_MUL_IMM(a,b,c) M_OP2_IMM(7, c, a, b)
196 #define M_DIV(a,b,c) M_OP3(31, 489, 1, 0, c, a, b)
198 #define M_NEG(a,b) M_OP3(31, 104, 0, 0, b, a, 0)
199 #define M_NOT(a,b) M_OP3(31, 124, 0, 0, a, b, a)
201 #define M_SUBFIC(a,b,c) M_OP2_IMM(8, c, a, b)
202 #define M_SUBFZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
203 #define M_RLWINM(a,b,c,d,e) M_OP4(21, d, 0, a, e, b, c)
204 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
205 #define M_ADDIS(a,b,c) M_OP2_IMM(15, c, a, b)
206 #define M_STFIWX(a,b,c) M_OP3(31, 983, 0, 0, a, b, c)
208 #define M_LWAX(a,b,c) M_OP3(31, 341, 0, 0, a, b, c)
209 #define M_LHZX(a,b,c) M_OP3(31, 279, 0, 0, a, b, c)
210 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
211 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
212 #define M_LBZX(a,b,c) M_OP3(31, 87, 0, 0, a, b, c)
213 #define M_LFSX(a,b,c) M_OP3(31, 535, 0, 0, a, b, c)
214 #define M_LFDX(a,b,c) M_OP3(31, 599, 0, 0, a, b, c)
216 #define M_STWX(a,b,c) M_OP3(31, 151, 0, 0, a, b, c)
217 #define M_STHX(a,b,c) M_OP3(31, 407, 0, 0, a, b, c)
218 #define M_STBX(a,b,c) M_OP3(31, 215, 0, 0, a, b, c)
219 #define M_STFSX(a,b,c) M_OP3(31, 663, 0, 0, a, b, c)
220 #define M_STFDX(a,b,c) M_OP3(31, 727, 0, 0, a, b, c)
223 #define M_STWU_INTERN(a,b,disp) M_OP2_IMM(37,a,b,disp)
224 #define M_STWU(a,b,disp) \
226 s4 lo = (disp) & 0x0000ffff; \
227 s4 hi = ((disp) >> 16); \
228 if (((disp) >= -32678) && ((disp) <= 32767)) { \
229 M_STWU_INTERN(a,b,lo); \
231 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
232 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
233 M_STWUX(REG_SP,REG_SP,REG_ITMP3); \
237 #define M_STWUX(a,b,c) M_OP3(31,183,0,0,a,b,c)
240 #define M_STDU_INTERN(a,b,disp) M_OP2_IMM(62,a,b,(disp)|0x0001)
241 #define M_STDU(a,b,disp) \
243 s4 lo = (disp) & 0x0000ffff; \
244 s4 hi = ((disp) >> 16); \
245 if (((disp) >= -32678) && ((disp) <= 32767)) { \
246 M_STDU_INTERN(a,b,lo); \
248 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
249 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
250 M_STDUX(REG_SP,REG_SP,REG_ITMP3); \
253 #define M_STDUX(a,b,c) M_OP3(31,181,0,0,a,b,c)
255 #define M_LDAH(a,b,c) M_ADDIS(b, c, a)
256 #define M_TRAP M_OP3(31, 4, 0, 0, 31, 0, 0)
258 #define M_NOP M_OR_IMM(0, 0, 0)
259 #define M_MOV(a,b) M_OR(a, a, b)
260 #define M_TST(a) M_OP3(31, 444, 0, 1, a, a, a)
262 #define M_DADD(a,b,c) M_OP3(63, 21, 0, 0, c, a, b)
263 #define M_FADD(a,b,c) M_OP3(59, 21, 0, 0, c, a, b)
264 #define M_DSUB(a,b,c) M_OP3(63, 20, 0, 0, c, a, b)
265 #define M_FSUB(a,b,c) M_OP3(59, 20, 0, 0, c, a, b)
266 #define M_DMUL(a,b,c) M_OP4(63, 25, 0, c, a, 0, b)
267 #define M_FMUL(a,b,c) M_OP4(59, 25, 0, c, a, 0, b)
268 #define M_DDIV(a,b,c) M_OP3(63, 18, 0, 0, c, a, b)
269 #define M_FDIV(a,b,c) M_OP3(59, 18, 0, 0, c, a, b)
271 #define M_FABS(a,b) M_OP3(63, 264, 0, 0, b, 0, a)
272 #define M_CVTDL(a,b) M_OP3(63, 14, 0, 0, b, 0, a)
273 #define M_CVTDL_C(a,b) M_OP3(63, 15, 0, 0, b, 0, a)
274 #define M_CVTDF(a,b) M_OP3(63, 12, 0, 0, b, 0, a)
275 #define M_FMOV(a,b) M_OP3(63, 72, 0, 0, b, 0, a)
276 #define M_FMOVN(a,b) M_OP3(63, 40, 0, 0, b, 0, a)
277 #define M_DSQRT(a,b) M_OP3(63, 22, 0, 0, b, 0, a)
278 #define M_FSQRT(a,b) M_OP3(59, 22, 0, 0, b, 0, a)
280 #define M_FCMPU(a,b) M_OP3(63, 0, 0, 0, 0, a, b)
281 #define M_FCMPO(a,b) M_OP3(63, 32, 0, 0, 0, a, b)
283 #define M_BLDU(a,b,c) M_OP2_IMM(34, a, b, c) /* LBZ */
284 #define M_SLDU(a,b,c) M_OP2_IMM(40, a, b, c) /* LHZ */
287 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(32,a,b,disp) /* LWZ */
290 #define M_LWZ(a,b,disp) M_OP2_IMM(32,a,b,disp) /* needed for hardware exceptions */
292 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(58, a, b, (((disp) & 0xfffe) | 0x0002)) /* this is LWA actually */
294 #define M_ILD(a,b,disp) \
296 s4 lo = (short) (disp); \
297 s4 hi = (short) (((disp) - lo) >> 16); \
299 M_ILD_INTERN(a,b,lo); \
302 M_ILD_INTERN(a,a,lo); \
306 #define M_LLD_INTERN(a,b,disp) M_OP2_IMM(58,a,b,disp) /* LD */
308 #define M_LLD(a,b,disp) \
310 s4 lo = (short) (disp); \
311 s4 hi = (short) (((disp) - lo) >> 16); \
313 M_LLD_INTERN(a,b,lo); \
316 M_LLD_INTERN(a,GET_LOW_REG(a),lo); \
320 #define M_ALD_INTERN(a,b,disp) M_LLD_INTERN(a,b,disp)
321 #define M_ALD(a,b,disp) M_LLD(a,b,disp)
322 #define M_ALDX(a,b,c) M_OP3(31, 21, 0, 0, a, b, c) /* LDX */
324 #define M_BST(a,b,c) M_OP2_IMM(38, a, b, c) /* STB */
325 #define M_SST(a,b,c) M_OP2_IMM(44, a, b, c) /* LMW */
327 #define M_IST_INTERN(a,b,disp) M_OP2_IMM(36,a,b,disp) /* STW */
329 /* Stores with displacement overflow should only happen with PUTFIELD
330 or on the stack. The PUTFIELD instruction does not use REG_ITMP3
331 and a reg_of_var call should not use REG_ITMP3!!! */
333 #define M_IST(a,b,disp) \
335 s4 lo = (short) (disp); \
336 s4 hi = (short) (((disp) - lo) >> 16); \
338 M_IST_INTERN(a,b,lo); \
340 M_ADDIS(b,hi,REG_ITMP3); \
341 M_IST_INTERN(a,REG_ITMP3,lo); \
345 #define M_LST_INTERN(a,b,disp) M_OP2_IMM(62,a,b,disp) /* STD */
347 #define M_LST(a,b,disp) \
349 s4 lo = (short) (disp); \
350 s4 hi = (short) (((disp) - lo) >> 16); \
352 M_LST_INTERN(a,b,lo); \
354 M_ADDIS(b,hi,REG_ITMP3); \
355 M_LST_INTERN(a,REG_ITMP3, lo); \
359 #define M_AST_INTERN(a,b,disp) M_LST_INTERN(a,b,disp)
360 #define M_AST(a,b,disp) M_LST(a,b,disp)
361 #define M_ASTX(a,b,c) M_OP3(31, 149, 0, 0, a, b, c)
362 #define M_LSTX(a,b,c) M_ASTX(a,b,c)
365 #define M_BSEXT(a,b) M_OP3(31, 954, 0, 0, a, b, 0)
366 #define M_CZEXT(a,b) M_RLWINM(a,0,16,31,b)
367 #define M_SSEXT(a,b) M_OP3(31, 922, 0, 0, a, b, 0)
368 #define M_ISEXT(a,b) M_OP3(31, 986, 0, 0, a, b, 0)
370 #define M_BR(a) M_B(18, a, 0, 0)
371 #define M_BL(a) M_B(18, a, 0, 1)
372 #define M_RET M_OP3(19, 16, 0, 0, 20, 0, 0)
373 #define M_JSR M_OP3(19, 528, 0, 1, 20, 0, 0)
374 #define M_RTS M_OP3(19, 528, 0, 0, 20, 0, 0)
376 #define M_CMP(a,b) M_OP3(31, 0, 0, 0, 1, a, b)
377 #define M_CMPU(a,b) M_OP3(31, 32, 0, 0, 1, a, b)
378 #define M_CMPI(a,b) M_OP2_IMM(11, 1, a, b)
379 #define M_CMPUI(a,b) M_OP2_IMM(10, 1, a, b)
381 #define M_BLT(a) M_BC(16, 12, 0, a, 0, 0)
382 #define M_BLE(a) M_BC(16, 4, 1, a, 0, 0)
383 #define M_BGT(a) M_BC(16, 12, 1, a, 0, 0)
384 #define M_BGE(a) M_BC(16, 4, 0, a, 0, 0)
385 #define M_BEQ(a) M_BC(16, 12, 2, a, 0, 0)
386 #define M_BNE(a) M_BC(16, 4, 2, a, 0, 0)
387 #define M_BNAN(a) M_BC(16, 12, 3, a, 0, 0)
389 #define M_FLD_INTERN(a,b,disp) M_OP2_IMM(48,a,b,disp)
390 #define M_DLD_INTERN(a,b,disp) M_OP2_IMM(50,a,b,disp)
392 #define M_FLD(a,b,disp) \
394 s4 lo = (short) (disp); \
395 s4 hi = (short) (((disp) - lo) >> 16); \
397 M_FLD_INTERN(a,b,lo); \
399 M_ADDIS(b,hi,REG_ITMP3); \
400 M_FLD_INTERN(a,REG_ITMP3,lo); \
404 #define M_DLD(a,b,disp) \
406 s4 lo = (short) (disp); \
407 s4 hi = (short) (((disp) - lo) >> 16); \
409 M_DLD_INTERN(a,b,lo); \
411 M_ADDIS(b,hi,REG_ITMP3); \
412 M_DLD_INTERN(a,REG_ITMP3,lo); \
416 #define M_FST_INTERN(a,b,disp) M_OP2_IMM(52,a,b,disp) /* STFS */
417 #define M_DST_INTERN(a,b,disp) M_OP2_IMM(54,a,b,disp) /* STFD */
419 #define M_FST(a,b,disp) \
421 s4 lo = (short) (disp); \
422 s4 hi = (short) (((disp) - lo) >> 16); \
424 M_FST_INTERN(a,b,lo); \
426 M_ADDIS(b,hi,REG_ITMP3); \
427 M_FST_INTERN(a,REG_ITMP3,lo); \
431 #define M_DST(a,b,disp) \
433 s4 lo = (short) (disp); \
434 s4 hi = (short) (((disp) - lo) >> 16); \
436 M_DST_INTERN(a,b,lo); \
438 M_ADDIS(b,hi,REG_ITMP3); \
439 M_DST_INTERN(a,REG_ITMP3,lo); \
443 #define M_MFLR(a) M_OP3(31, 339, 0, 0, a, 8, 0)
444 #define M_MFXER(a) M_OP3(31, 339, 0, 0, a, 1, 0)
445 #define M_MFCTR(a) M_OP3(31, 339, 0, 0, a, 9, 0)
446 #define M_MTLR(a) M_OP3(31, 467, 0, 0, a, 8, 0)
447 #define M_MTXER(a) M_OP3(31, 467, 0, 0, a, 1, 0)
448 #define M_MTCTR(a) M_OP3(31, 467, 0, 0, a, 9, 0)
450 #define M_LDA_INTERN(a,b,c) M_LADD_IMM(b, c, a)
452 #define M_LDA(a,b,disp) \
454 s4 lo = (short) (disp); \
455 s4 hi = (short) (((disp) - lo) >> 16); \
457 M_LDA_INTERN(a,b,lo); \
460 M_LDA_INTERN(a,a,lo); \
465 #define M_LDATST(a,b,c) M_ADDICTST(b, c, a)
466 #define M_CLR(a) M_LADD_IMM(0, 0, a)
467 #define M_CLR_HIGH(a) M_OP3(30, 0, 0, 0x20, (a), (a), 0);
468 #define M_AADD_IMM(a,b,c) M_LADD_IMM(a, b, c)
470 #endif /* _CODEGEN_H */
474 * These are local overrides for various environment variables in Emacs.
475 * Please do not remove this and leave it at the end of the file, where
476 * Emacs will automagically detect them.
477 * ---------------------------------------------------------------------
480 * indent-tabs-mode: t