* src/vm/jit/powerpc64/emit.c (emit_verbosecall_enter):
[cacao.git] / src / vm / jit / powerpc64 / codegen.c
1 /* src/vm/jit/powerpc64/codegen.c - machine code generator for 32-bit PowerPC
2
3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6    J. Wenninger, Institut f. Computersprachen - TU Wien
7
8    This file is part of CACAO.
9
10    This program is free software; you can redistribute it and/or
11    modify it under the terms of the GNU General Public License as
12    published by the Free Software Foundation; either version 2, or (at
13    your option) any later version.
14
15    This program is distributed in the hope that it will be useful, but
16    WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    General Public License for more details.
19
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23    02110-1301, USA.
24
25    Contact: cacao@cacaojvm.org
26
27    Authors: Andreas Krall
28             Stefan Ring
29
30    Changes: Christian Thalinger
31             Christian Ullrich
32             Edwin Steiner
33             Roland Lezuo
34
35    $Id: codegen.c 5899 2006-11-04 15:46:18Z tbfg $
36
37 */
38
39
40 #include "config.h"
41
42 #include <assert.h>
43 #include <stdio.h>
44 #include <signal.h>
45
46 #include "vm/types.h"
47
48 #include "md-abi.h"
49 #include "vm/jit/abi-asm.h"
50
51 #include "vm/jit/powerpc64/arch.h"
52 #include "vm/jit/powerpc64/codegen.h"
53
54 #include "mm/memory.h"
55 #include "native/native.h"
56 #include "vm/builtin.h"
57 #include "vm/exceptions.h"
58 #include "vm/global.h"
59 #include "vm/loader.h"
60 #include "vm/options.h"
61 #include "vm/stringlocal.h"
62 #include "vm/vm.h"
63 #include "vm/jit/asmpart.h"
64 #include "vm/jit/codegen-common.h"
65 #include "vm/jit/dseg.h"
66 #include "vm/jit/emit-common.h"
67 #include "vm/jit/jit.h"
68 #include "vm/jit/parse.h"
69 #include "vm/jit/patcher.h"
70 #include "vm/jit/reg.h"
71 #include "vm/jit/replace.h"
72
73 #if defined(ENABLE_LSRA)
74 # include "vm/jit/allocator/lsra.h"
75 #endif
76
77
78 /* codegen *********************************************************************
79
80    Generates machine code.
81
82 *******************************************************************************/
83
84 bool codegen(jitdata *jd)
85 {
86         methodinfo         *m;
87         codeinfo           *code;
88         codegendata        *cd;
89         registerdata       *rd;
90         s4                  len, s1, s2, s3, d, disp;
91         ptrint              a;
92         varinfo            *var;
93         basicblock         *bptr;
94         instruction        *iptr;
95         exception_entry    *ex;
96         u2                  currentline;
97         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
98         builtintable_entry *bte;
99         methoddesc         *md;
100         rplpoint           *replacementpoint;
101         s4                  fieldtype;
102         s4                  varindex;
103         unresolved_field   *uf;
104         fieldinfo          *fi;
105
106         /* get required compiler data */
107
108         m    = jd->m;
109         code = jd->code;
110         cd   = jd->cd;
111         rd   = jd->rd;
112
113         /* prevent compiler warnings */
114
115         d = 0;
116         lm = NULL;
117         bte = NULL;
118
119         {
120         s4 i, p, t, l;
121         s4 savedregs_num;
122
123         savedregs_num = 0;
124
125         /* space to save used callee saved registers */
126
127         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
128         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
129
130         cd->stackframesize = rd->memuse + savedregs_num;
131
132 #if defined(ENABLE_THREADS)
133         /* space to save argument of monitor_enter and Return Values to survive */
134     /* monitor_exit. The stack position for the argument can not be shared  */
135         /* with place to save the return register on PPC64, since both values     */
136         /* reside in R3 */
137         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
138                 /* reserve 2 slots for long/double return values for monitorexit */
139                 cd->stackframesize += 2;
140         }
141
142 #endif
143
144         /* create method header */
145
146         /* align stack to 16-bytes */
147
148 /* FIXME */
149 /*      if (!m->isleafmethod || opt_verbosecall) */
150 /*              stackframesize = (stackframesize + 3) & ~3;
151 */
152 /*      else if (m->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
153 /*              stackframesize = 0; */
154
155         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
156         (void) dseg_adds4(cd, cd->stackframesize * 8);             /* FrameSize       */
157
158 #if defined(ENABLE_THREADS)
159         /* IsSync contains the offset relative to the stack pointer for the
160            argument of monitor_exit used in the exception handler. Since the
161            offset could be zero and give a wrong meaning of the flag it is
162            offset by one.
163         */
164
165         if (checksync && (m->flags & ACC_SYNCHRONIZED))
166                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);       /* IsSync          */
167         else
168 #endif
169                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
170                                                
171         (void) dseg_adds4(cd, jd->isleafmethod);                /* IsLeaf          */
172         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
173         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
174
175         dseg_addlinenumbertablesize(cd);
176
177         (void) dseg_adds4(cd, jd->exceptiontablelength);       /* ExTableSize     */
178
179         /* create exception table */
180
181         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
182                 dseg_addtarget(cd, ex->start);
183                 dseg_addtarget(cd, ex->end);
184                 dseg_addtarget(cd, ex->handler);
185                 (void) dseg_addaddress(cd, ex->catchtype.any);
186         }
187         
188         /* create stack frame (if necessary) */
189
190         if (!jd->isleafmethod) {
191                 M_MFLR(REG_ZERO);
192                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
193         }
194
195         if (cd->stackframesize)
196                 M_STDU(REG_SP, REG_SP, -cd->stackframesize * 8);
197
198         /* save return address and used callee saved registers */
199
200         p = cd->stackframesize;
201         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
202                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
203         }
204         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
205                 p --; M_DST(rd->savfltregs[i], REG_SP, p * 8);
206         }
207
208         /* take arguments out of register or stack frame */
209
210         md = m->parseddesc;
211
212         for (p = 0, l = 0; p < md->paramcount; p++) {
213                 t = md->paramtypes[p].type;
214                 varindex = jd->local_map[l*5 + t];
215                 l++;
216                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
217                         l++;
218                 if (varindex == UNUSED)
219                         continue;
220                 var = VAR(varindex);
221                 s1 = md->params[p].regoff;
222                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
223                         if (!md->params[p].inmemory) {           /* register arguments    */
224                                 s2 = rd->argintregs[s1];
225                                 if (!IS_INMEMORY(var->flags))   {
226                                         M_INTMOVE(s2, var->vv.regoff);
227                                 } else {                             /* reg arg -> spilled    */
228                                         M_LST(s2, REG_SP, var->vv.regoff * 8);
229                                 } 
230                         } else {                                 /* stack arguments       */
231                                 if (!IS_INMEMORY(var->flags)) {      /* stack arg -> register */
232                                         M_LLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
233
234                                 } else {                             /* stack arg -> spilled  */
235                                         var->vv.regoff = cd->stackframesize + s1;
236                                 }
237                         }
238
239                 } else {                                     /* floating args         */
240                         if (!md->params[p].inmemory) {           /* register arguments    */
241                                 s2 = rd->argfltregs[s1];
242                                 if (!IS_INMEMORY(var->flags)) {      /* reg arg -> register   */
243                                         M_FLTMOVE(s2, var->vv.regoff);
244                                 } else {                                         /* reg arg -> spilled    */
245                                         M_DST(s2, REG_SP, var->vv.regoff * 8);
246                                 }
247
248                         } else {                                 /* stack arguments       */
249                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
250                                         M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
251                                 } else {                             /* stack-arg -> spilled  */
252                                         var->vv.regoff = cd->stackframesize + s1;
253                                 }
254                         }
255                 }
256         } /* end for */
257
258         /* save monitorenter argument */
259
260 #if defined(ENABLE_THREADS)
261
262         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
263
264                 /* stackoffset for argument used for LOCK_monitor_exit */
265                 s1 = rd->memuse;
266 #if !defined (NDEBUG)
267                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
268                         M_AADD_IMM(REG_SP, -((LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT) * 8), REG_SP);
269
270                         for (p = 0; p < INT_ARG_CNT; p++)
271                                 M_LST(rd->argintregs[p], REG_SP, LA_SIZE + PA_SIZE + p * 8);
272
273                         for (p = 0; p < FLT_ARG_CNT; p++)
274                                 M_DST(rd->argfltregs[p], REG_SP, LA_SIZE + PA_SIZE + (INT_ARG_CNT + p) * 8);
275
276                         /* used for LOCK_monitor_exit, adopt size because we created another stackframe */
277                         s1 += (LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT);
278                 }
279 #endif
280                 p = dseg_addaddress(cd, LOCK_monitor_enter);
281                 M_ALD(REG_ITMP3, REG_PV, p);
282                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
283                 M_MTCTR(REG_ITMP3);
284
285                 /* get or test the lock object */
286
287                 if (m->flags & ACC_STATIC) {
288                         p = dseg_addaddress(cd, &m->class->object.header);
289                         M_ALD(rd->argintregs[0], REG_PV, p);
290                 }
291                 else {
292                         M_TST(rd->argintregs[0]);
293                         M_BEQ(0);
294                         codegen_add_nullpointerexception_ref(cd);
295                 }
296
297                 M_AST(rd->argintregs[0], REG_SP, s1 * 8);       /* rd->memuse * 8 */
298                 M_JSR;
299 #if !defined (NDEBUG)
300                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
301                         for (p = 0; p < INT_ARG_CNT; p++)
302                                 M_LLD(rd->argintregs[p], REG_SP, LA_SIZE + PA_SIZE + p * 8);
303
304                         for (p = 0; p < FLT_ARG_CNT; p++)
305                                 M_DLD(rd->argfltregs[p], REG_SP, LA_SIZE + PA_SIZE + (INT_ARG_CNT + p) * 8);
306
307                         M_AADD_IMM(REG_SP, (LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT) * 8, REG_SP);
308                 }
309 #endif
310         }
311 #endif
312
313         /* call trace function */
314 #if !defined (NDEBUG)
315         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
316                 emit_verbosecall_enter(jd);
317
318         }
319 #endif
320
321         /* end of header generation */
322
323         replacementpoint = jd->code->rplpoints;
324
325         /* walk through all basic blocks */
326         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
327
328                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
329
330                 if (bptr->flags >= BBREACHED) {
331
332                 /* branch resolving */
333
334                 {
335                 branchref *brefs;
336                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
337                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos, 
338                                           brefs->branchpos,
339                                                           bptr->mpc);
340                         }
341                 }
342
343                 /* handle replacement points */
344
345 #if 0
346                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
347                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
348                         
349                         replacementpoint++;
350                 }
351 #endif
352
353                 /* copy interface registers to their destination */
354
355                 len = bptr->indepth;
356                 MCODECHECK(64+len);
357
358 #if defined(ENABLE_LSRA)
359                 if (opt_lsra) {
360                         while (len) {
361                                 len--;
362                                 var = VAR(bptr->invars[len]);
363                                 if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
364                                         /* d = reg_of_var(m, var, REG_ITMP1); */
365                                         if (!(var->flags & INMEMORY))
366                                                 d = var->vv.regoff;
367                                         else
368                                                 d = REG_ITMP1;
369                                         M_INTMOVE(REG_ITMP1, d);
370                                         emit_store(jd, NULL, var, d);
371                                 }
372                         }
373                 } else {
374 #endif
375                 while (len) {
376                         len--;
377                         var = VAR(bptr->invars[len]);
378                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
379                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
380                                 M_INTMOVE(REG_ITMP1, d);
381                                 emit_store(jd, NULL, var, d);
382                         } 
383                         else {
384                                 assert((var->flags & INOUT));
385                         }
386                 }
387
388 #if defined(ENABLE_LSRA)
389                 }
390 #endif
391                 /* walk through all instructions */
392                 
393                 len = bptr->icount;
394                 currentline = 0;
395                         
396                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
397                         if (iptr->line != currentline) {
398                                 dseg_addlinenumber(cd, iptr->line);
399                                 currentline = iptr->line;
400                         }
401
402                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
403
404                         switch (iptr->opc) {
405                         case ICMD_NOP:    /* ...  ==> ...                                 */
406                         case ICMD_INLINE_START:
407                         case ICMD_INLINE_END:
408                                 break;
409
410                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
411
412                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
413                         M_TST(s1);
414                         M_BEQ(0);
415                         codegen_add_nullpointerexception_ref(cd);
416                         break;
417
418                 /* constant operations ************************************************/
419
420                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
421
422                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
423                         ICONST(d, iptr->sx.val.i);
424                         emit_store_dst(jd, iptr, d);
425                         break;
426
427                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
428
429                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
430                         LCONST(d, iptr->sx.val.l);
431                         emit_store_dst(jd, iptr, d);
432                         break;
433
434                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
435
436                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
437                         a = dseg_addfloat(cd, iptr->sx.val.f);
438                         M_FLD(d, REG_PV, a);
439                         emit_store_dst(jd, iptr, d);
440                         break;
441                         
442                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
443
444                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
445                         a = dseg_adddouble(cd, iptr->sx.val.d);
446                         M_DLD(d, REG_PV, a);
447                         emit_store_dst(jd, iptr, d);
448                         break;
449
450                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
451                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
452                         disp = dseg_addaddress(cd, iptr->sx.val.anyptr);
453
454                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
455                                 codegen_addpatchref(cd, PATCHER_aconst,
456                                                                         iptr->sx.val.c.ref,
457                                                                     disp);
458
459                                 if (opt_showdisassemble)
460                                         M_NOP;
461                         }
462
463                         M_ALD(d, REG_PV, disp);
464                         emit_store_dst(jd, iptr, d);
465                         break;
466
467
468                 /* load/store/copy/move operations ************************************/
469
470                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
471                 case ICMD_ALOAD:      /* s1.localindex = local variable               */
472                 case ICMD_LLOAD:
473                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
474                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
475                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
476                 case ICMD_ASTORE:     /* dst.localindex = local variable              */
477                 case ICMD_LSTORE:
478                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
479                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
480                 case ICMD_COPY:
481                 case ICMD_MOVE:
482
483                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
484                         break;
485
486
487                 /* pop operations *****************************************************/
488
489                 /* attention: double and longs are only one entry in CACAO ICMDs      */
490
491                 case ICMD_POP:        /* ..., value  ==> ...                          */
492                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
493
494                         break;
495
496
497                 /* integer operations *************************************************/
498
499                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
500
501                         s1 = emit_load_s1(jd, iptr, REG_ITMP1); 
502                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
503                         M_NEG(s1, d);
504                         emit_store_dst(jd, iptr, d);
505                         break;
506
507                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
508
509                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
510                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
511                         M_NEG(s1, d); /* XXX */
512                         emit_store_dst(jd, iptr, d);
513                         break;
514
515                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
516
517                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
518                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
519                         M_INTMOVE(s1, d);
520                         emit_store_dst(jd, iptr, d);
521                         break;
522
523                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
524
525                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
526                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
527                         M_ISEXT(s1, d); 
528                         emit_store_dst(jd, iptr, d);
529                         break;
530
531                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
532
533                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
534                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
535                         M_BSEXT(s1, d);
536                         emit_store_dst(jd, iptr, d);
537                         break;
538
539                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
540
541                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
542                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
543                         M_CZEXT(s1, d);
544                         emit_store_dst(jd, iptr, d);
545                         break;
546
547                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
548
549                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
550                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
551                         M_SSEXT(s1, d);
552                         emit_store_dst(jd, iptr, d);
553                         break;
554
555
556                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
557
558                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
559                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
560                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
561                         M_IADD(s1, s2, d);
562                         M_EXTSW(d,d);
563                         emit_store_dst(jd, iptr, d);
564                         break;
565
566                 case ICMD_IINC:
567                 case ICMD_IADDCONST:
568
569                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
570                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
571                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767)) {
572                                 M_IADD_IMM(s1, iptr->sx.val.i, d);
573                         } else {
574                                 ICONST(REG_ITMP2, iptr->sx.val.i);
575                                 M_IADD(s1, REG_ITMP2, d);
576                         }
577                         M_EXTSW(d,d);
578                         emit_store_dst(jd, iptr, d);
579                         break;
580
581                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
582
583                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
584                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
585                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
586                         M_LADD(s1, s2, d);
587                         emit_store_dst(jd, iptr, d);
588                         break;
589
590                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
591                                       /* sx.val.l = constant                          */
592
593                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
594                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
595                         /* XXX check me */
596                         if ((iptr->sx.val.l >= -32768) && (iptr->sx.val.l <= 32767)) {
597                                 M_LADD_IMM(s1, iptr->sx.val.l, d);
598                         } else {
599                                 LCONST(REG_ITMP2, iptr->sx.val.l);
600                                 M_LADD(s1, REG_ITMP2, d);
601                         }
602                         emit_store_dst(jd, iptr, d);
603                         break;
604
605                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
606
607                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
608                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
609                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
610                         M_SUB(s1, s2, d);
611                         emit_store_dst(jd, iptr, d);
612                         break;
613
614                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
615                                       /* sx.val.i = constant                          */
616
617                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
618                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
619                         if ((iptr->sx.val.i >= -32767) && (iptr->sx.val.i <= 32768)) {
620                                 M_IADD_IMM(s1, -iptr->sx.val.i, d);
621                         } else {
622                                 ICONST(REG_ITMP2, iptr->sx.val.i);
623                                 M_SUB(s1, REG_ITMP2, d);
624                                 M_EXTSW(d, d);
625                         }
626                         emit_store_dst(jd, iptr, d);
627                         break;
628
629                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
630
631                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
632                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
633                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
634                         M_SUB(s1, s2, d);
635                         emit_store_dst(jd, iptr, d);
636                         break;
637
638                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
639                                       /* sx.val.l = constant                          */
640
641                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
642                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
643                         /* XXX check me */
644                         if ((iptr->sx.val.l >= -32767) && (iptr->sx.val.l <= 32767)) {
645                                 M_LADD_IMM(s1, -iptr->sx.val.l, d);
646                         } else {
647                                 LCONST(REG_ITMP2, iptr->sx.val.l);
648                                 M_SUB(s1, REG_ITMP2, d);
649                         }
650                         emit_store_dst(jd, iptr, d);
651                         break;
652
653                 case ICMD_IDIV:
654                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
655
656                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
657                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
658                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
659                         M_TST(s2);
660                         M_BEQ(0);
661                         codegen_add_arithmeticexception_ref(cd);
662
663                         M_DIV(s1, s2, d);
664
665                         emit_store_dst(jd, iptr, d);
666                         break;
667
668                 case ICMD_IREM:
669                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
670                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
671                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
672                         M_TST(s2);
673                         M_BEQ(0);
674                         codegen_add_arithmeticexception_ref(cd);
675
676                         /* FIXME s1 == -2^63 && s2 == -1 does not work that way */
677                         M_DIV(s1, s2,  REG_ITMP3);      
678                         M_MUL(REG_ITMP3, s2, REG_ITMP2);
679                         M_SUB(s1, REG_ITMP2,  REG_ITMP3);
680                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
681                         M_MOV(REG_ITMP3, d);
682                         emit_store_dst(jd, iptr, REG_ITMP1);
683                         break;
684
685                 
686                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
687                 case ICMD_LMUL:
688                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
689                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
690                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
691                         M_MUL(s1, s2, d);
692                         emit_store_dst(jd, iptr, d);
693                         break;
694
695                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
696                                       /* sx.val.i = constant                          */
697
698                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
699                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
700                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767))
701                                 M_MUL_IMM(s1, iptr->sx.val.i, d);
702                         else {
703                                 ICONST(REG_ITMP3, iptr->sx.val.i);
704                                 M_MUL(s1, REG_ITMP3, d);
705                         }
706                         emit_store_dst(jd, iptr, d);
707                         break;
708                 case ICMD_LMULCONST:
709                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
710                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
711                         if ((iptr->sx.val.l >= -32767) && (iptr->sx.val.l <= 32767))
712                                 M_MUL_IMM(s1, iptr->sx.val.l, d);
713                         else {
714                                 LCONST(REG_ITMP3, iptr->sx.val.l);
715                                 M_MUL(s1, REG_ITMP3, d);
716                         }
717                         emit_store_dst(jd, iptr, d);
718                         break;
719
720                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
721                                       
722                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
723                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
724                         M_SRA_IMM(s1, iptr->sx.val.i, d);
725                         M_ADDZE(d, d);
726                         emit_store_dst(jd, iptr, d);
727                         break;
728
729                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
730
731                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
732                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
733                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
734                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
735                         M_SLL(s1, REG_ITMP3, d);
736                         emit_store_dst(jd, iptr, d);
737                         break;
738
739                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
740                                       /* sx.val.i = constant                             */
741
742                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
743                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
744                         ICONST(REG_ITMP3, iptr->sx.val.i);
745                         M_SLL(s1, REG_ITMP3, d);
746                         emit_store_dst(jd, iptr, d);
747                         break;
748
749                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
750
751                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
752                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
753                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
754                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
755                         M_SRA(s1, REG_ITMP3, d);
756                         emit_store_dst(jd, iptr, d);
757                         break;
758
759                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
760                                       /* sx.val.i = constant                             */
761
762                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
763                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
764                         M_SRA_IMM(s1, iptr->sx.val.i & 0x1f, d);
765                         emit_store_dst(jd, iptr, d);
766                         break;
767
768                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
769
770                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
771                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
772                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
773                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
774                         M_SRL(s1, REG_ITMP2, d);
775                         emit_store_dst(jd, iptr, d);
776                         break;
777
778                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
779                                       /* sx.val.i = constant                             */
780
781                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
782                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
783                         if (iptr->sx.val.i & 0x1f) {
784                                 M_SRL_IMM(s1, iptr->sx.val.i & 0x1f, d);
785                         } else {
786                                 M_INTMOVE(s1, d);
787                         }
788                         emit_store_dst(jd, iptr, d);
789                         break;
790
791                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
792                 case ICMD_LAND:
793
794                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
795                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
796                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
797                         M_AND(s1, s2, d);
798                         emit_store_dst(jd, iptr, d);
799                         break;
800
801                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
802                                       /* sx.val.i = constant                          */
803
804                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
805                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
806                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535)) {
807                                 M_AND_IMM(s1, iptr->sx.val.i, d);
808                                 }
809                         /*
810                         else if (iptr->sx.val.i == 0xffffff) {
811                                 M_RLWINM(s1, 0, 8, 31, d);
812                                 }
813                         */
814                         else {
815                                 ICONST(REG_ITMP3, iptr->sx.val.i);
816                                 M_AND(s1, REG_ITMP3, d);
817                         }
818                         emit_store_dst(jd, iptr, d);
819                         break;
820
821                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
822                                       /* sx.val.l = constant                          */
823
824                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
825                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
826                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
827                                 M_AND_IMM(s1, iptr->sx.val.l, d);
828                         /*
829                         else if (iptr->sx.val.l == 0xffffff) {
830                                 M_RLWINM(s1, 0, 8, 31, d);
831                                 }
832                         */
833                         else {
834                                 LCONST(REG_ITMP3, iptr->sx.val.l);
835                                 M_AND(s1, REG_ITMP3, d);
836                         }
837                         emit_store_dst(jd, iptr, d);
838                         break;
839
840                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
841                                       /* sx.val.i = constant                             */
842
843                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
844                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
845                         M_MOV(s1, REG_ITMP2);
846                         M_CMPI(s1, 0);
847                         M_BGE(1 + 2*(iptr->sx.val.i >= 32768));
848                         if (iptr->sx.val.i >= 32768) {
849                                 M_ADDIS(REG_ZERO, iptr->sx.val.i >> 16, REG_ITMP2);
850                                 M_OR_IMM(REG_ITMP2, iptr->sx.val.i, REG_ITMP2);
851                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
852                         } else {
853                                 M_IADD_IMM(s1, iptr->sx.val.i, REG_ITMP2);
854                         }
855                         {
856                                 int b=0, m = iptr->sx.val.i;
857                                 while (m >>= 1)
858                                         ++b;
859                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
860                         }
861                         M_SUB(s1, REG_ITMP2, d);
862                         emit_store_dst(jd, iptr, d);
863                         break;
864
865                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
866                 case ICMD_LOR:
867
868                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
869                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
870                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
871                         M_OR(s1, s2, d);
872                         emit_store_dst(jd, iptr, d);
873                         break;
874
875                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
876                                       /* sx.val.i = constant                          */
877
878                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
879                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
880                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535))
881                                 M_OR_IMM(s1, iptr->sx.val.i, d);
882                         else {
883                                 ICONST(REG_ITMP3, iptr->sx.val.i);
884                                 M_OR(s1, REG_ITMP3, d);
885                         }
886                         emit_store_dst(jd, iptr, d);
887                         break;
888
889                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
890                                       /* sx.val.l = constant                          */
891
892                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
893                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
894                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
895                                 M_OR_IMM(s1, iptr->sx.val.l, d);
896                         else {
897                                 LCONST(REG_ITMP3, iptr->sx.val.l);
898                                 M_OR(s1, REG_ITMP3, d);
899                         }
900                         emit_store_dst(jd, iptr, d);
901                         break;
902
903
904                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
905                 case ICMD_LXOR:
906
907                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
908                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
909                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
910                         M_XOR(s1, s2, d);
911                         emit_store_dst(jd, iptr, d);
912                         break;
913
914                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
915                                       /* sx.val.i = constant                          */
916
917                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
918                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
919                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535))
920                                 M_XOR_IMM(s1, iptr->sx.val.i, d);
921                         else {
922                                 ICONST(REG_ITMP3, iptr->sx.val.i);
923                                 M_XOR(s1, REG_ITMP3, d);
924                         }
925                         emit_store_dst(jd, iptr, d);
926                         break;
927
928                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
929                                       /* sx.val.l = constant                          */
930
931                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
932                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
933                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
934                                 M_XOR_IMM(s1, iptr->sx.val.l, d);
935                         else {
936                                 LCONST(REG_ITMP3, iptr->sx.val.l);
937                                 M_XOR(s1, REG_ITMP3, d);
938                         }
939                         emit_store_dst(jd, iptr, d);
940                         break;
941
942                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
943
944                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
945                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
946                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
947                         /* XXX implement me!!! */
948                         emit_store_dst(jd, iptr, d);
949                         break;
950                         break;
951
952
953                 /* floating operations ************************************************/
954
955                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
956
957                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
958                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
959                         M_FMOVN(s1, d);
960                         emit_store_dst(jd, iptr, d);
961                         break;
962
963                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
964
965                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
966                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
967                         M_FMOVN(s1, d);
968                         emit_store_dst(jd, iptr, d);
969                         break;
970
971                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
972
973                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
974                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
975                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
976                         M_FADD(s1, s2, d);
977                         emit_store_dst(jd, iptr, d);
978                         break;
979
980                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
981
982                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
983                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
984                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
985                         M_DADD(s1, s2, d);
986                         emit_store_dst(jd, iptr, d);
987                         break;
988
989                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
990
991                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
992                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
993                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
994                         M_FSUB(s1, s2, d);
995                         emit_store_dst(jd, iptr, d);
996                         break;
997
998                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
999
1000                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1001                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1002                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1003                         M_DSUB(s1, s2, d);
1004                         emit_store_dst(jd, iptr, d);
1005                         break;
1006
1007                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1008
1009                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1010                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1011                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1012                         M_FMUL(s1, s2, d);
1013                         emit_store_dst(jd, iptr, d);
1014                         break;
1015
1016                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1017
1018                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1019                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1020                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1021                         M_DMUL(s1, s2, d);
1022                         emit_store_dst(jd, iptr, d);
1023                         break;
1024
1025                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1026
1027                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1028                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1029                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1030                         M_FDIV(s1, s2, d);
1031                         emit_store_dst(jd, iptr, d);
1032                         break;
1033
1034                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1035
1036                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1037                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1038                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1039                         M_DDIV(s1, s2, d);
1040                         emit_store_dst(jd, iptr, d);
1041                         break;
1042                 
1043                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1044                 case ICMD_D2I:
1045
1046                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1047                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1048                         M_CLR(d);
1049                         disp = dseg_addfloat(cd, 0.0);
1050                         M_FLD(REG_FTMP2, REG_PV, disp);
1051                         M_FCMPU(s1, REG_FTMP2);
1052                         M_BNAN(4);
1053                         disp = dseg_adds4(cd, 0);
1054                         M_CVTDL_C(s1, REG_FTMP1);
1055                         M_LDA(REG_ITMP1, REG_PV, disp);
1056                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1057                         M_ILD(d, REG_PV, disp);
1058                         emit_store_dst(jd, iptr, d);
1059                         break;
1060                 
1061                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1062
1063                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1064                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1065                         M_FLTMOVE(s1, d);
1066                         emit_store_dst(jd, iptr, d);
1067                         break;
1068                                         
1069                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1070
1071                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1072                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1073                         M_CVTDF(s1, d);
1074                         emit_store_dst(jd, iptr, d);
1075                         break;
1076                 
1077                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1078                 case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                     */
1079
1080
1081                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1082                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1083                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1084                         M_FCMPU(s2, s1);
1085                         M_IADD_IMM(REG_ZERO, -1, d);
1086                         M_BNAN(4);
1087                         M_BGT(3);
1088                         M_IADD_IMM(REG_ZERO, 0, d);
1089                         M_BGE(1);
1090                         M_IADD_IMM(REG_ZERO, 1, d);
1091                         emit_store_dst(jd, iptr, d);
1092                         break;
1093
1094                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1095                 case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                     */
1096
1097                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1098                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1099                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1100                         M_FCMPU(s1, s2);
1101                         M_IADD_IMM(REG_ZERO, 1, d);
1102                         M_BNAN(4);
1103                         M_BGT(3);
1104                         M_IADD_IMM(REG_ZERO, 0, d);
1105                         M_BGE(1);
1106                         M_IADD_IMM(REG_ZERO, -1, d);
1107                         emit_store_dst(jd, iptr, d);
1108                         break;
1109                         
1110                 case ICMD_IF_FCMPEQ:    /* ..., value, value ==> ...                  */
1111                 case ICMD_IF_DCMPEQ:
1112
1113                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1114                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1115                         M_FCMPU(s1, s2);
1116                         M_BNAN(1);
1117                         M_BEQ(0);
1118                         codegen_addreference(cd, iptr->dst.block);
1119                         break;
1120
1121                 case ICMD_IF_FCMPNE:    /* ..., value, value ==> ...                  */
1122                 case ICMD_IF_DCMPNE:
1123
1124                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1125                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1126                         M_FCMPU(s1, s2);
1127                         M_BNAN(0);
1128                         codegen_addreference(cd, iptr->dst.block);
1129                         M_BNE(0);
1130                         codegen_addreference(cd, iptr->dst.block);
1131                         break;
1132
1133
1134                 case ICMD_IF_FCMPL_LT:  /* ..., value, value ==> ...                  */
1135                 case ICMD_IF_DCMPL_LT:
1136
1137                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1138                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1139                         M_FCMPU(s1, s2);
1140                         M_BNAN(0);
1141                         codegen_addreference(cd, iptr->dst.block);
1142                         M_BLT(0);
1143                         codegen_addreference(cd, iptr->dst.block);
1144                         break;
1145
1146                 case ICMD_IF_FCMPL_GT:  /* ..., value, value ==> ...                  */
1147                 case ICMD_IF_DCMPL_GT:
1148
1149                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1150                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1151                         M_FCMPU(s1, s2);
1152                         M_BNAN(1);
1153                         M_BGT(0);
1154                         codegen_addreference(cd, iptr->dst.block);
1155                         break;
1156
1157                 case ICMD_IF_FCMPL_LE:  /* ..., value, value ==> ...                  */
1158                 case ICMD_IF_DCMPL_LE:
1159
1160                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1161                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1162                         M_FCMPU(s1, s2);
1163                         M_BNAN(0);
1164                         codegen_addreference(cd, iptr->dst.block);
1165                         M_BLE(0);
1166                         codegen_addreference(cd, iptr->dst.block);
1167                         break;
1168
1169                 case ICMD_IF_FCMPL_GE:  /* ..., value, value ==> ...                  */
1170                 case ICMD_IF_DCMPL_GE:
1171
1172                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1173                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1174                         M_FCMPU(s1, s2);
1175                         M_BNAN(1);
1176                         M_BGE(0);
1177                         codegen_addreference(cd, iptr->dst.block);
1178                         break;
1179
1180                 case ICMD_IF_FCMPG_LT:  /* ..., value, value ==> ...                  */
1181                 case ICMD_IF_DCMPG_LT:
1182
1183                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1184                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1185                         M_FCMPU(s1, s2);
1186                         M_BNAN(1);
1187                         M_BLT(0);
1188                         codegen_addreference(cd, iptr->dst.block);
1189                         break;
1190
1191                 case ICMD_IF_FCMPG_GT:  /* ..., value, value ==> ...                  */
1192                 case ICMD_IF_DCMPG_GT:
1193
1194                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1195                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1196                         M_FCMPU(s1, s2);
1197                         M_BNAN(0);
1198                         codegen_addreference(cd, iptr->dst.block);
1199                         M_BGT(0);
1200                         codegen_addreference(cd, iptr->dst.block);
1201                         break;
1202
1203                 case ICMD_IF_FCMPG_LE:  /* ..., value, value ==> ...                  */
1204                 case ICMD_IF_DCMPG_LE:
1205
1206                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1207                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1208                         M_FCMPU(s1, s2);
1209                         M_BNAN(1);
1210                         M_BLE(0);
1211                         codegen_addreference(cd, iptr->dst.block);
1212                         break;
1213
1214                 case ICMD_IF_FCMPG_GE:  /* ..., value, value ==> ...                  */
1215                 case ICMD_IF_DCMPG_GE:
1216
1217                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1218                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1219                         M_FCMPU(s1, s2);
1220                         M_BNAN(0);
1221                         codegen_addreference(cd, iptr->dst.block);
1222                         M_BGE(0);
1223                         codegen_addreference(cd, iptr->dst.block);
1224                         break;
1225
1226
1227                 /* memory operations **************************************************/
1228
1229                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1230
1231                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1232                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1233                         gen_nullptr_check(s1);
1234                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1235                         emit_store_dst(jd, iptr, d);
1236                         break;
1237
1238                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1239
1240                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1241                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1242                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1243                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1244                                 gen_nullptr_check(s1);
1245                                 gen_bound_check;
1246                         }
1247                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1248                         M_LBZX(d, s1, REG_ITMP2);
1249                         M_BSEXT(d, d);
1250                         emit_store_dst(jd, iptr, d);
1251                         break;                  
1252
1253                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1254
1255                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1256                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1257                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1258                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1259                                 gen_nullptr_check(s1);
1260                                 gen_bound_check;
1261                         }
1262                         M_SLL_IMM(s2, 1, REG_ITMP2);
1263                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1264                         M_LHAX(d, s1, REG_ITMP2);
1265                         emit_store_dst(jd, iptr, d);
1266                         break;
1267
1268                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1269
1270                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1271                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1272                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1273                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1274                                 gen_nullptr_check(s1);
1275                                 gen_bound_check;
1276                         }
1277                         M_SLL_IMM(s2, 1, REG_ITMP2);
1278                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1279                         M_LHAX(d, s1, REG_ITMP2);
1280                         emit_store_dst(jd, iptr, d);
1281                         break;
1282
1283                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1284
1285                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1286                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1287                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1288                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1289                                 gen_nullptr_check(s1);
1290                                 gen_bound_check;
1291                         }
1292                         M_SLL_IMM(s2, 2, REG_ITMP2);
1293                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1294                         M_LWZX(d, s1, REG_ITMP2);
1295                         emit_store_dst(jd, iptr, d);
1296                         break;
1297
1298                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1299
1300                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1301                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1302                         d = codegen_reg_of_dst(jd, iptr, PACK_REGS(REG_ITMP2, REG_ITMP1));
1303                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1304                                 gen_nullptr_check(s1);
1305                                 gen_bound_check;
1306                         }
1307                         M_SLL_IMM(s2, 3, REG_ITMP2);
1308                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1309                         M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1310                         emit_store_dst(jd, iptr, d);
1311                         break;
1312
1313                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1314
1315                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1316                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1317                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1318                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1319                                 gen_nullptr_check(s1);
1320                                 gen_bound_check;
1321                         }
1322                         M_SLL_IMM(s2, 2, REG_ITMP2);
1323                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1324                         M_LFSX(d, s1, REG_ITMP2);
1325                         emit_store_dst(jd, iptr, d);
1326                         break;
1327
1328                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1329
1330                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1331                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1332                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1333                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1334                                 gen_nullptr_check(s1);
1335                                 gen_bound_check;
1336                         }
1337                         M_SLL_IMM(s2, 3, REG_ITMP2);
1338                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1339                         M_LFDX(d, s1, REG_ITMP2);
1340                         emit_store_dst(jd, iptr, d);
1341                         break;
1342
1343                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1344
1345                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1346                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1347                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1348                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1349                                 gen_nullptr_check(s1);
1350                                 gen_bound_check;
1351                         }
1352                         M_SLL_IMM(s2, 3, REG_ITMP2);
1353                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1354                         M_ALDX(d, s1, REG_ITMP2);
1355                         emit_store_dst(jd, iptr, d);
1356                         break;
1357
1358
1359                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1360
1361                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1362                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1363                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1364                                 gen_nullptr_check(s1);
1365                                 gen_bound_check;
1366                         }
1367                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1368                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1369                         M_STBX(s3, s1, REG_ITMP2);
1370                         break;
1371
1372                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1373
1374                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1375                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1376                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1377                                 gen_nullptr_check(s1);
1378                                 gen_bound_check;
1379                         }
1380                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1381                         M_SLL_IMM(s2, 1, REG_ITMP2);
1382                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1383                         M_STHX(s3, s1, REG_ITMP2);
1384                         break;
1385
1386                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1387
1388                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1389                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1390                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1391                                 gen_nullptr_check(s1);
1392                                 gen_bound_check;
1393                         }
1394                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1395                         M_SLL_IMM(s2, 1, REG_ITMP2);
1396                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1397                         M_STHX(s3, s1, REG_ITMP2);
1398                         break;
1399
1400                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1401
1402                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1403                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1404                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1405                                 gen_nullptr_check(s1);
1406                                 gen_bound_check;
1407                         }
1408                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1409                         M_SLL_IMM(s2, 2, REG_ITMP2);
1410                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1411                         M_STWX(s3, s1, REG_ITMP2);
1412                         break;
1413
1414                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1415
1416                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1417                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1418                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1419                                 gen_nullptr_check(s1);
1420                                 gen_bound_check;
1421                         }
1422                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1423                         M_SLL_IMM(s2, 3, REG_ITMP2);
1424                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1425                         M_LSTX(s3, s1, REG_ITMP2);
1426                         break;
1427
1428                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1429
1430                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1431                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1432                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1433                                 gen_nullptr_check(s1);
1434                                 gen_bound_check;
1435                         }
1436                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1437                         M_SLL_IMM(s2, 2, REG_ITMP2);
1438                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1439                         M_STFSX(s3, s1, REG_ITMP2);
1440                         break;
1441
1442                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1443
1444                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1445                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1446                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1447                                 gen_nullptr_check(s1);
1448                                 gen_bound_check;
1449                         }
1450                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1451                         M_SLL_IMM(s2, 3, REG_ITMP2);
1452                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1453                         M_STFDX(s3, s1, REG_ITMP2);
1454                         break;
1455
1456                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1457
1458                         s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
1459                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1460                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1461                                 gen_nullptr_check(s1);
1462                                 gen_bound_check;
1463                         }
1464                         s3 = emit_load_s3(jd, iptr, rd->argintregs[1]);
1465
1466                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1467                         M_ALD(REG_ITMP3, REG_PV, disp);
1468                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
1469                         M_MTCTR(REG_ITMP3);
1470
1471                         M_INTMOVE(s1, rd->argintregs[0]);
1472                         M_INTMOVE(s3, rd->argintregs[1]);
1473
1474                         M_JSR;
1475                         M_TST(REG_RESULT);
1476                         M_BEQ(0);
1477                         codegen_add_arraystoreexception_ref(cd);
1478
1479                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1480                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1481                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1482                         M_SLL_IMM(s2, 3, REG_ITMP2);
1483                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1484                         M_ASTX(s3, s1, REG_ITMP2);
1485                         break;
1486
1487
1488                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1489
1490                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1491                                 uf = iptr->sx.s23.s3.uf;
1492
1493                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1494                                 disp = dseg_addaddress(cd, NULL);
1495
1496                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1497                                                                         iptr->sx.s23.s3.uf, disp);
1498
1499                                 if (opt_showdisassemble)
1500                                         M_NOP;
1501
1502                         } else {
1503                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1504
1505                                 fieldtype = fi->type;
1506                                 disp = dseg_addaddress(cd, &(fi->value));
1507
1508                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1509                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1510
1511                                         if (opt_showdisassemble)
1512                                                 M_NOP;
1513                                 }
1514                         }
1515
1516                         M_ALD(REG_ITMP1, REG_PV, disp);
1517                         switch (fieldtype) {
1518                         case TYPE_INT:
1519                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1520                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1521                                 break;
1522                         case TYPE_LNG:
1523                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1524                                 M_LLD(d, REG_ITMP1, 0);
1525                                 break;
1526                         case TYPE_ADR:
1527                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1528                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1529                                 break;
1530                         case TYPE_FLT:
1531                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1532                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1533                                 break;
1534                         case TYPE_DBL:                          
1535                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1536                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1537                                 break;
1538                         }
1539                         emit_store_dst(jd, iptr, d);
1540                         break;
1541
1542                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1543
1544
1545                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1546                                 uf = iptr->sx.s23.s3.uf;
1547
1548                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1549                                 disp = dseg_addaddress(cd, NULL);
1550
1551                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1552                                                                         iptr->sx.s23.s3.uf, disp);
1553
1554                                 if (opt_showdisassemble)
1555                                         M_NOP;
1556
1557                         } else {
1558                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1559
1560                                 fieldtype = fi->type;
1561                                 disp = dseg_addaddress(cd, &(fi->value));
1562
1563                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1564                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1565
1566                                         if (opt_showdisassemble)
1567                                                 M_NOP;
1568                                 }
1569                         }
1570
1571                         M_ALD(REG_ITMP1, REG_PV, disp);
1572                         switch (fieldtype) {
1573                         case TYPE_INT:
1574                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1575                                 M_IST_INTERN(s1, REG_ITMP1, 0);
1576                                 break;
1577                         case TYPE_LNG:
1578                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1579                                 M_LST_INTERN(s1, REG_ITMP1, 0);
1580                                 break;
1581                         case TYPE_ADR:
1582                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1583                                 M_AST_INTERN(s1, REG_ITMP1, 0);
1584                                 break;
1585                         case TYPE_FLT:
1586                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1587                                 M_FST_INTERN(s1, REG_ITMP1, 0);
1588                                 break;
1589                         case TYPE_DBL:
1590                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1591                                 M_DST_INTERN(s1, REG_ITMP1, 0);
1592                                 break;
1593                         }
1594                         break;
1595
1596
1597                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1598
1599                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1600                         gen_nullptr_check(s1);
1601
1602                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1603                                 uf = iptr->sx.s23.s3.uf;
1604                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1605                                 disp = 0;
1606
1607                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1608
1609                                 if (opt_showdisassemble)
1610                                         M_NOP;
1611
1612                         } else {
1613                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1614                                 fieldtype = fi->type;
1615                                 disp = fi->offset;
1616                         }
1617
1618                         switch (fieldtype) {
1619                         case TYPE_INT:
1620                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1621                                 M_ILD(d, s1, disp);
1622                                 break;
1623                         case TYPE_LNG:
1624                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1625                                 M_LLD(d, s1, disp);
1626                                 break;
1627                         case TYPE_ADR:
1628                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1629                                 M_ALD(d, s1, disp);
1630                                 break;
1631                         case TYPE_FLT:
1632                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1633                                 M_FLD(d, s1, disp);
1634                                 break;
1635                         case TYPE_DBL:                          
1636                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1637                                 M_DLD(d, s1, disp);
1638                                 break;
1639                         }
1640                         emit_store_dst(jd, iptr, d);
1641                         break;
1642
1643                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1644
1645                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1646                         gen_nullptr_check(s1);
1647
1648                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1649                                 uf        = iptr->sx.s23.s3.uf;
1650                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1651                                 disp      = 0;
1652                         }
1653                         else {
1654                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1655                                 fieldtype = fi->type;
1656                                 disp      = fi->offset;
1657                         }
1658
1659                         if (IS_INT_LNG_TYPE(fieldtype)) {
1660                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1661                         }
1662                         else
1663                                 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1664
1665                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1666                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1667
1668                                 if (opt_showdisassemble)
1669                                         M_NOP;
1670                         }
1671
1672
1673                         switch (fieldtype) {
1674                         case TYPE_INT:
1675                                 M_IST(s2, s1, disp);
1676                                 break;
1677                         case TYPE_LNG:
1678                                 M_LST(s2, s1, disp);
1679                                 break;
1680                         case TYPE_ADR:
1681                                 M_AST(s2, s1, disp);
1682                                 break;
1683                         case TYPE_FLT:
1684                                 M_FST(s2, s1, disp);
1685                                 break;
1686                         case TYPE_DBL:
1687                                 M_DST(s2, s1, disp);
1688                                 break;
1689                         }
1690                         break;
1691
1692
1693                 /* branch operations **************************************************/
1694
1695                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1696
1697                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1698                         M_LNGMOVE(s1, REG_ITMP1_XPTR);
1699
1700 #ifdef ENABLE_VERIFIER
1701                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1702                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1703                                                                         iptr->sx.s23.s2.uc, 0);
1704
1705                                 if (opt_showdisassemble)
1706                                         M_NOP;
1707                         }
1708 #endif /* ENABLE_VERIFIER */
1709
1710                         disp = dseg_addaddress(cd, asm_handle_exception);
1711                         M_ALD(REG_ITMP2, REG_PV, disp);
1712                         M_MTCTR(REG_ITMP2);
1713
1714                         if (jd->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
1715                         M_BL(0);                                        /* get current PC */
1716                         M_MFLR(REG_ITMP2_XPC);
1717                         if (jd->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
1718                         M_RTS;                                          /* jump to CTR    */
1719
1720                         ALIGNCODENOP;
1721                         break;
1722
1723                 case ICMD_GOTO:         /* ... ==> ...                                */
1724                 case ICMD_RET:          /* ... ==> ...                                */
1725
1726                         M_BR(0);
1727                         codegen_addreference(cd, iptr->dst.block);
1728                         ALIGNCODENOP;
1729                         break;
1730
1731                 case ICMD_JSR:          /* ... ==> ...                                */
1732
1733                         M_BR(0);
1734                         codegen_addreference(cd, iptr->sx.s23.s3.jsrtarget.block);
1735                         ALIGNCODENOP;
1736                         break;
1737
1738                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1739
1740                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1741                         M_TST(s1);
1742                         M_BEQ(0);
1743                         codegen_addreference(cd, iptr->dst.block);
1744                         break;
1745
1746                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
1747
1748                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1749                         M_TST(s1);
1750                         M_BNE(0);
1751                         codegen_addreference(cd, iptr->dst.block);
1752                         break;
1753
1754                 case ICMD_IFLT:
1755                 case ICMD_IFLE:
1756                 case ICMD_IFNE:
1757                 case ICMD_IFGT:
1758                 case ICMD_IFGE:
1759                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
1760
1761                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1762                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767))
1763                                 M_CMPI(s1, iptr->sx.val.i);
1764                         else {
1765                                 ICONST(REG_ITMP2, iptr->sx.val.i);
1766                                 M_CMP(s1, REG_ITMP2);
1767                         }
1768                         switch (iptr->opc) {
1769                         case ICMD_IFLT:
1770                                 M_BLT(0);
1771                                 break;
1772                         case ICMD_IFLE:
1773                                 M_BLE(0);
1774                                 break;
1775                         case ICMD_IFNE:
1776                                 M_BNE(0);
1777                                 break;
1778                         case ICMD_IFGT:
1779                                 M_BGT(0);
1780                                 break;
1781                         case ICMD_IFGE:
1782                                 M_BGE(0);
1783                                 break;
1784                         case ICMD_IFEQ:
1785                                 M_BEQ(0);
1786                                 break;
1787                         }
1788                         codegen_addreference(cd, iptr->dst.block);
1789                         break;
1790                         
1791                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1792                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1793                         LCONST(REG_ITMP2, iptr->sx.val.l);
1794                         M_CMP(s1, REG_ITMP2);
1795                         M_BEQ(0);
1796                         codegen_addreference(cd, iptr->dst.block);
1797                         break;
1798                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1799                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1800                         LCONST(REG_ITMP2, iptr->sx.val.l);
1801                         M_CMP(s1, REG_ITMP2);
1802                         M_BLT(0);
1803                         codegen_addreference(cd, iptr->dst.block);
1804                         break;
1805                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1806                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1807                         LCONST(REG_ITMP2, iptr->sx.val.l);
1808                         M_CMP(s1, REG_ITMP2);
1809                         M_BLE(0);
1810                         codegen_addreference(cd, iptr->dst.block);
1811                         break;
1812
1813                 case ICMD_IF_LNE:       /* ..., value ==> ... */
1814                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1815                         LCONST(REG_ITMP2, iptr->sx.val.l);
1816                         M_CMP(s1, REG_ITMP2);
1817                         M_BNE(0);
1818                         codegen_addreference(cd, iptr->dst.block);
1819                         break;
1820                 case ICMD_IF_LGE:       /* ..., value ==> ... */
1821                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1822                         LCONST(REG_ITMP2, iptr->sx.val.l);
1823                         M_CMP(s1, REG_ITMP2);
1824                         M_BGE(0);
1825                         codegen_addreference(cd, iptr->dst.block);
1826                         break;
1827                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1828                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1829                         LCONST(REG_ITMP2, iptr->sx.val.l);
1830                         M_CMP(s1, REG_ITMP2);
1831                         M_BGT(0);
1832                         codegen_addreference(cd, iptr->dst.block);
1833                         break;
1834                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
1835                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
1836                 case ICMD_IF_LCMPEQ: 
1837
1838                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1839                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1840                         M_CMP(s1, s2);
1841                         M_BEQ(0);
1842                         codegen_addreference(cd, iptr->dst.block);
1843                         break;
1844
1845                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
1846                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
1847                 case ICMD_IF_LCMPNE:  
1848
1849                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1850                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1851                         M_CMP(s1, s2);
1852                         M_BNE(0);
1853                         codegen_addreference(cd, iptr->dst.block);
1854                         break;
1855
1856
1857                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
1858                 case ICMD_IF_LCMPLT:
1859
1860                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1861                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1862                         M_CMP(s1, s2);
1863                         M_BLT(0);
1864                         codegen_addreference(cd, iptr->dst.block);
1865                         break;
1866
1867                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
1868                 case ICMD_IF_LCMPGT:
1869
1870                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1871                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1872                         M_CMP(s1, s2);
1873                         M_BGT(0);
1874                         codegen_addreference(cd, iptr->dst.block);
1875                         break;
1876
1877                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
1878                 case ICMD_IF_LCMPLE:
1879
1880                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1881                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1882                         M_CMP(s1, s2);
1883                         M_BLE(0);
1884                         codegen_addreference(cd, iptr->dst.block);
1885                         break;
1886
1887                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
1888                 case ICMD_IF_LCMPGE:
1889
1890                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1891                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1892                         M_CMP(s1, s2);
1893                         M_BGE(0);
1894                         codegen_addreference(cd, iptr->dst.block);
1895                         break;
1896
1897
1898                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
1899                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
1900
1901                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
1902                         M_LNGMOVE(s1, REG_RESULT);
1903                         goto nowperformreturn;
1904
1905                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
1906
1907                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
1908                         M_LNGMOVE(s1, REG_RESULT);
1909
1910 #ifdef ENABLE_VERIFIER
1911                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1912                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1913                                                                         iptr->sx.s23.s2.uc, 0);
1914
1915                                 if (opt_showdisassemble)
1916                                         M_NOP;
1917                         }
1918 #endif /* ENABLE_VERIFIER */
1919
1920                         goto nowperformreturn;
1921
1922                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
1923                 case ICMD_DRETURN:
1924
1925                         s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1926                         M_FLTMOVE(s1, REG_FRESULT);
1927                         goto nowperformreturn;
1928
1929                 case ICMD_RETURN:      /* ...  ==> ...                                */
1930
1931 nowperformreturn:
1932                         {
1933                         s4 i, p;
1934                         
1935                         p = cd->stackframesize;
1936
1937                         /* call trace function */
1938
1939 #if !defined(NDEBUG)
1940                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
1941                                 emit_verbosecall_exit(jd);
1942                         }
1943 #endif          
1944
1945 #if defined(ENABLE_THREADS)
1946                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
1947                                 disp = dseg_addaddress(cd, LOCK_monitor_exit);
1948                                 M_ALD(REG_ITMP3, REG_PV, disp);
1949                                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
1950                                 M_MTCTR(REG_ITMP3);
1951
1952                                 /* we need to save the proper return value */
1953
1954                                 switch (iptr->opc) {
1955                                 case ICMD_LRETURN:
1956                                 case ICMD_IRETURN:
1957                                 case ICMD_ARETURN:
1958                                         /* fall through */
1959                                         M_LST(REG_RESULT , REG_SP, rd->memuse * 8 + 8);
1960                                         break;
1961                                 case ICMD_FRETURN:
1962                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1963                                         break;
1964                                 case ICMD_DRETURN:
1965                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1966                                         break;
1967                                 }
1968
1969                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
1970                                 M_JSR;
1971
1972                                 /* and now restore the proper return value */
1973
1974                                 switch (iptr->opc) {
1975                                 case ICMD_LRETURN:
1976                                 case ICMD_IRETURN:
1977                                 case ICMD_ARETURN:
1978                                         /* fall through */
1979                                         M_LLD(REG_RESULT , REG_SP, rd->memuse * 8 + 8);
1980                                         break;
1981                                 case ICMD_FRETURN:
1982                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1983                                         break;
1984                                 case ICMD_DRETURN:
1985                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1986                                         break;
1987                                 }
1988                         }
1989 #endif
1990
1991                         /* restore return address                                         */
1992
1993                         if (!jd->isleafmethod) {
1994                                 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
1995                                    may have a displacement overflow. */
1996
1997                                 M_ALD(REG_ITMP1, REG_SP, p * 8 + LA_LR_OFFSET);
1998                                 M_MTLR(REG_ITMP1);
1999                         }
2000
2001                         /* restore saved registers                                        */
2002
2003                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2004                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2005                         }
2006                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2007                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2008                         }
2009
2010                         /* deallocate stack                                               */
2011
2012                         if (cd->stackframesize)
2013                                 M_LDA(REG_SP, REG_SP, cd->stackframesize * 8);
2014
2015                         M_RET;
2016                         ALIGNCODENOP;
2017                         }
2018                         break;
2019
2020
2021                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2022                         {
2023                         s4 i, l;
2024                         branch_target_t *table;
2025
2026                         table = iptr->dst.table;
2027
2028                         l = iptr->sx.s23.s2.tablelow;
2029                         i = iptr->sx.s23.s3.tablehigh;
2030
2031                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2032                         if (l == 0) {
2033                                 M_INTMOVE(s1, REG_ITMP1);
2034                         } else if (l <= 32768) {
2035                                 M_LDA(REG_ITMP1, s1, -l);
2036                         } else {
2037                                 ICONST(REG_ITMP2, l);
2038                                 M_SUB(s1, REG_ITMP2, REG_ITMP1);
2039                         }
2040
2041                         /* number of targets */
2042                         i = i - l + 1;
2043
2044                         /* range check */
2045
2046                         M_CMPUI(REG_ITMP1, i - 1);
2047                         M_BGT(0);
2048                         codegen_addreference(cd, table[0].block);
2049
2050                         /* build jump table top down and use address of lowest entry */
2051
2052                         table += i;
2053
2054                         while (--i >= 0) {
2055                                 dseg_addtarget(cd, table->block); 
2056                                 --table;
2057                                 }
2058                         }
2059
2060                         /* length of dataseg after last dseg_addtarget is used by load */
2061
2062                         M_SLL_IMM(REG_ITMP1, 3, REG_ITMP1);
2063                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2064                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2065                         M_MTCTR(REG_ITMP2);
2066                         M_RTS;
2067                         ALIGNCODENOP;
2068                         break;
2069
2070
2071                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2072                         {
2073                         s4 i, val;
2074                         lookup_target_t *lookup;
2075
2076                         lookup = iptr->dst.lookup;
2077
2078                         i = iptr->sx.s23.s2.lookupcount;
2079                         
2080                         MCODECHECK((i<<2)+8);
2081                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2082                         while (--i >= 0) {
2083                                 val = lookup->value;
2084                                 if ((val >= -32768) && (val <= 32767)) {
2085                                         M_CMPI(s1, val);
2086                                 } else {
2087                                         a = dseg_adds4(cd, val);
2088                                         M_ILD(REG_ITMP2, REG_PV, a);
2089                                         M_CMP(s1, REG_ITMP2);
2090                                 }
2091                                 M_BEQ(0);
2092                                 codegen_addreference(cd, lookup->target.block);
2093                                 ++lookup;
2094                         }
2095
2096                         M_BR(0);
2097                         codegen_addreference(cd, iptr->sx.s23.s3.lookupdefault.block);
2098
2099                         ALIGNCODENOP;
2100                         break;
2101                         }
2102
2103
2104                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2105
2106                         bte = iptr->sx.s23.s3.bte;
2107                         md = bte->md;
2108                         goto gen_method;
2109
2110                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2111
2112                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2113                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2114                 case ICMD_INVOKEINTERFACE:
2115
2116                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2117                                 md = iptr->sx.s23.s3.um->methodref->parseddesc.md;
2118                                 lm = NULL;
2119                         }
2120                         else {
2121                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2122                                 md = lm->parseddesc;
2123                         }
2124
2125 gen_method:
2126                         s3 = md->paramcount;
2127
2128                         MCODECHECK((s3 << 1) + 64);
2129
2130                         /* copy arguments to registers or stack location */
2131
2132                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2133                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2134
2135                                 if (var->flags & PREALLOC)
2136                                         continue;
2137
2138                                 if (IS_INT_LNG_TYPE(var->type)) {
2139                                         if (!md->params[s3].inmemory) {
2140                                                 s1 = rd->argintregs[md->params[s3].regoff];
2141                                                 d = emit_load(jd, iptr, var, s1);
2142                                                 M_LNGMOVE(d, s1);
2143                                         } else {
2144                                                 d = emit_load(jd, iptr, var, REG_ITMP1);
2145                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
2146                                         }
2147                                 } else {
2148                                         if (!md->params[s3].inmemory) {
2149                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2150                                                 d = emit_load(jd, iptr, var, s1);
2151                                                 M_FLTMOVE(d, s1);
2152                                         } else {
2153                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2154                                                 if (IS_2_WORD_TYPE(var->type))
2155                                                         M_DST(d, REG_SP, md->params[s3].regoff * 8);
2156                                                 else
2157                                                         M_FST(d, REG_SP, md->params[s3].regoff * 8);
2158                                         }
2159                                 }
2160                         } /* end of for */
2161
2162                         switch (iptr->opc) {
2163                         case ICMD_BUILTIN:
2164                                 disp = dseg_addaddress(cd, bte->fp);
2165                                 d = md->returntype.type;
2166
2167                                 M_ALD(REG_PV, REG_PV, disp);    /* pointer to built-in-function descriptor */
2168                                 M_ALD(REG_ITMP1, REG_PV, 0);    /* function entry point address, what about TOC */
2169                                 M_MTCTR(REG_ITMP1);
2170                                 M_JSR;
2171
2172                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2173                                 M_MFLR(REG_ITMP1);
2174                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2175
2176
2177                                 if (INSTRUCTION_MUST_CHECK(iptr)) {
2178                                         M_CMPI(REG_RESULT, 0);
2179                                         M_BEQ(0);
2180                                         codegen_add_fillinstacktrace_ref(cd);
2181                                 }
2182                                 break;
2183
2184                         case ICMD_INVOKESPECIAL:
2185                                 gen_nullptr_check(rd->argintregs[0]);
2186                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2187                                 /* fall through */
2188
2189                         case ICMD_INVOKESTATIC:
2190                                 if (lm == NULL) {
2191                                         unresolved_method *um = iptr->sx.s23.s3.um;
2192
2193                                         disp = dseg_addaddress(cd, NULL);
2194
2195                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2196                                                                                 um, disp);
2197
2198                                         if (opt_showdisassemble)
2199                                                 M_NOP;
2200
2201                                         d = md->returntype.type;
2202
2203                                 } else {
2204                                         disp = dseg_addaddress(cd, lm->stubroutine);
2205                                         d = md->returntype.type;
2206                                 }
2207
2208                                 M_NOP;
2209                                 M_ALD(REG_PV, REG_PV, disp);
2210                                 M_MTCTR(REG_PV);
2211                                 M_JSR;
2212                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2213                                 M_MFLR(REG_ITMP1);
2214                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2215                                 break;
2216
2217                         case ICMD_INVOKEVIRTUAL:
2218                                 gen_nullptr_check(rd->argintregs[0]);
2219
2220                                 if (lm == NULL) {
2221                                         unresolved_method *um = iptr->sx.s23.s3.um;
2222
2223                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2224
2225                                         if (opt_showdisassemble)
2226                                                 M_NOP;
2227
2228                                         s1 = 0;
2229                                         d = md->returntype.type;
2230
2231                                 } else {
2232                                         s1 = OFFSET(vftbl_t, table[0]) +
2233                                                 sizeof(methodptr) * lm->vftblindex;
2234                                         d = md->returntype.type;
2235                                 }
2236
2237                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2238                                           OFFSET(java_objectheader, vftbl));
2239                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2240                                 M_MTCTR(REG_PV);
2241                                 M_JSR;
2242                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2243                                 M_MFLR(REG_ITMP1);
2244                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2245                                 break;
2246
2247                         case ICMD_INVOKEINTERFACE:
2248                                 gen_nullptr_check(rd->argintregs[0]);
2249
2250                                 if (lm == NULL) {
2251                                         unresolved_method *um = iptr->sx.s23.s3.um;
2252
2253                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2254
2255                                         if (opt_showdisassemble)
2256                                                 M_NOP;
2257
2258                                         s1 = 0;
2259                                         s2 = 0;
2260                                         d = md->returntype.type;
2261
2262                                 } else {
2263                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2264                                                 sizeof(methodptr*) * lm->class->index;
2265
2266                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2267
2268                                         d = md->returntype.type;
2269                                 }
2270
2271                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2272                                           OFFSET(java_objectheader, vftbl));    
2273                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2274                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2275                                 M_MTCTR(REG_PV);
2276                                 M_JSR;
2277                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2278                                 M_MFLR(REG_ITMP1);
2279                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2280                                 break;
2281                         }
2282
2283                         /* d contains return type */
2284
2285                         if (d != TYPE_VOID) {
2286                                 if (IS_INT_LNG_TYPE(d)) {
2287                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2288                                         M_MOV(REG_RESULT, s1);
2289                                 } else {
2290                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2291                                         M_FLTMOVE(REG_FRESULT, s1);
2292                                 }
2293                                 emit_store_dst(jd, iptr, s1);
2294                         }
2295                         break;
2296
2297
2298                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2299                                       /* val.a: (classinfo*) superclass               */
2300
2301                         /*  superclass is an interface:
2302                          *
2303                          *  OK if ((sub == NULL) ||
2304                          *         (sub->vftbl->interfacetablelength > super->index) &&
2305                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2306                          *
2307                          *  superclass is a class:
2308                          *
2309                          *  OK if ((sub == NULL) || (0
2310                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2311                          *         super->vftbl->diffvall));
2312                          */
2313
2314                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2315                                 /* object type cast-check */
2316
2317                                 classinfo *super;
2318                                 s4         superindex;
2319
2320                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2321                                         super = NULL;
2322                                         superindex = 0;
2323                                 } else {
2324                                         super = iptr->sx.s23.s3.c.cls;
2325                                         superindex = super->index;
2326                                 }
2327                         
2328 #if defined(ENABLE_THREADS)
2329                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2330 #endif
2331                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2332
2333                                 /* calculate interface checkcast code size */
2334
2335                                 s2 = 7;
2336                                 if (super == NULL)
2337                                         s2 += (opt_showdisassemble ? 1 : 0);
2338
2339                                 /* calculate class checkcast code size */
2340
2341                                 s3 = 9 + (s1 == REG_ITMP1);
2342                                 if (super == NULL)
2343                                         s3 += (opt_showdisassemble ? 1 : 0);
2344
2345                                 /* if class is not resolved, check which code to call */
2346
2347                                 if (super == NULL) {
2348                                         M_TST(s1);
2349                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2350
2351                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2352
2353                                         codegen_addpatchref(cd,
2354                                                                                 PATCHER_checkcast_instanceof_flags,
2355                                                                                 iptr->sx.s23.s3.c.ref,
2356                                                                                 disp);
2357
2358                                         if (opt_showdisassemble)
2359                                                 M_NOP;
2360
2361                                         M_ILD(REG_ITMP2, REG_PV, disp);
2362                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2363                                         M_BEQ(s2 + 1);
2364                                 }
2365
2366                                 /* interface checkcast code */
2367
2368                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2369                                         if (super == NULL) {
2370                                                 codegen_addpatchref(cd,
2371                                                                                         PATCHER_checkcast_instanceof_interface,
2372                                                                                         iptr->sx.s23.s3.c.ref,
2373                                                                                         0);
2374                                                 if (opt_showdisassemble)
2375                                                         M_NOP;
2376
2377                                         } else {
2378                                                 M_TST(s1);
2379                                                 M_BEQ(s2);
2380                                         }
2381
2382                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2383                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2384                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2385                                         M_BLE(0);
2386                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1?? */
2387                                         M_ALD(REG_ITMP3, REG_ITMP2,
2388                                                   OFFSET(vftbl_t, interfacetable[0]) -
2389                                                   superindex * sizeof(methodptr*));
2390                                         M_TST(REG_ITMP3);
2391                                         M_BEQ(0);
2392                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1??*/
2393
2394                                         if (!super)
2395                                                 M_BR(s3);
2396                                 }
2397
2398                                 /* class checkcast code */
2399
2400                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2401                                         if (super == NULL) {
2402                                                 disp = dseg_add_unique_address(cd, NULL);
2403                                                 codegen_addpatchref(cd, PATCHER_checkcast_class,
2404                                                                                         iptr->sx.s23.s3.c.ref,
2405                                                                                         disp);
2406                                                 if (opt_showdisassemble)
2407                                                         M_NOP;
2408                                         } else {
2409                                                 disp = dseg_addaddress(cd, super->vftbl);
2410                                                 M_TST(s1);
2411                                                 M_BEQ(s3);
2412                                         }
2413
2414                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2415 #if defined(ENABLE_THREADS)
2416                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2417 #endif
2418                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2419                                         M_ALD(REG_ITMP2, REG_PV, disp);
2420                                         if (s1 != REG_ITMP1) {
2421                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
2422                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2423 #if defined(ENABLE_THREADS)
2424                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2425 #endif
2426                                                 M_SUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
2427                                                 M_EXTSW(REG_ITMP3, REG_ITMP3);
2428                                         } else {
2429                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2430                                                 M_SUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
2431                                                 M_EXTSW(REG_ITMP3, REG_ITMP3);
2432                                                 M_ALD(REG_ITMP2, REG_PV, disp);
2433                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2434 #if defined(ENABLE_THREADS)
2435                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2436 #endif
2437                                         }
2438                                         M_CMPU(REG_ITMP3, REG_ITMP2);
2439                                         M_BGT(0);
2440                                         codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
2441                                 }
2442                                 d = codegen_reg_of_dst(jd, iptr, s1);
2443
2444                         } else {
2445                                 /* array type cast-check */
2446
2447                                 s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
2448                                 M_INTMOVE(s1, rd->argintregs[0]);
2449
2450
2451                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2452                                         disp = dseg_addaddress(cd, NULL);
2453                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
2454                                                                                 iptr->sx.s23.s3.c.ref,
2455                                                                                 disp);
2456
2457                                         if (opt_showdisassemble)
2458                                                 M_NOP;
2459                                 } else {
2460                                         disp = dseg_addaddress(cd, iptr->sx.s23.s3.c.cls);
2461                                 }
2462
2463                                 M_ALD(rd->argintregs[1], REG_PV, disp);
2464                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
2465                                 M_ALD(REG_ITMP2, REG_PV, disp);
2466                                 M_ALD(REG_ITMP2, REG_ITMP2, 0); /* TOC */
2467                                 M_MTCTR(REG_ITMP2);
2468                                 M_JSR;
2469                                 M_TST(REG_RESULT);
2470                                 M_BEQ(0);
2471                                 codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
2472
2473                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2474                                 d = codegen_reg_of_dst(jd, iptr, s1);
2475                         }
2476                         M_INTMOVE(s1, d);
2477                         emit_store_dst(jd, iptr, d);
2478                         break;
2479
2480                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2481                                       /* val.a: (classinfo*) superclass               */
2482
2483                         /*  superclass is an interface:
2484                          *
2485                          *  return (sub != NULL) &&
2486                          *         (sub->vftbl->interfacetablelength > super->index) &&
2487                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
2488                          *
2489                          *  superclass is a class:
2490                          *
2491                          *  return ((sub != NULL) && (0
2492                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2493                          *          super->vftbl->diffvall));
2494                          */
2495
2496                         {
2497                         classinfo *super;
2498                         vftbl_t   *supervftbl;
2499                         s4         superindex;
2500
2501                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2502                                 super = NULL;
2503                                 superindex = 0;
2504                                 supervftbl = NULL;
2505                         }
2506                         else {
2507                                 super = iptr->sx.s23.s3.c.cls;
2508                                 superindex = super->index;
2509                                 supervftbl = super->vftbl;
2510                         }
2511                         
2512 #if defined(ENABLE_THREADS)
2513             codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2514 #endif
2515                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2516                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2517                         if (s1 == d) {
2518                                 M_MOV(s1, REG_ITMP1);
2519                                 s1 = REG_ITMP1;
2520                         }
2521
2522                         /* calculate interface instanceof code size */
2523
2524                         s2 = 8;
2525                         if (!super)
2526                                 s2 += (opt_showdisassemble ? 1 : 0);
2527
2528                         /* calculate class instanceof code size */
2529
2530                         s3 = 10;
2531                         if (!super)
2532                                 s3 += (opt_showdisassemble ? 1 : 0);
2533
2534                         M_CLR(d);
2535
2536                         /* if class is not resolved, check which code to call */
2537
2538                         if (!super) {
2539                                 M_TST(s1);
2540                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2541
2542                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
2543
2544                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2545                                                                         iptr->sx.s23.s3.c.ref, disp);
2546
2547                                 if (opt_showdisassemble)
2548                                         M_NOP;
2549
2550                                 M_ILD(REG_ITMP3, REG_PV, disp);
2551                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
2552                                 M_BEQ(s2 + 1);
2553                         }
2554
2555                         /* interface instanceof code */
2556
2557                         if (!super || (super->flags & ACC_INTERFACE)) {
2558                                 if (super) {
2559                                         M_TST(s1);
2560                                         M_BEQ(s2);
2561
2562                                 } else {
2563                                         codegen_addpatchref(cd,
2564                                                                                 PATCHER_checkcast_instanceof_interface,
2565                                                                                 iptr->sx.s23.s3.c.ref, 0);
2566
2567                                         if (opt_showdisassemble)
2568                                                 M_NOP;
2569                                 }
2570
2571                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2572                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2573                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2574                                 M_BLE(4);
2575                                 M_ALD(REG_ITMP1, REG_ITMP1,
2576                                           OFFSET(vftbl_t, interfacetable[0]) -
2577                                           superindex * sizeof(methodptr*));
2578                                 M_TST(REG_ITMP1);
2579                                 M_BEQ(1);
2580                                 M_IADD_IMM(REG_ZERO, 1, d);
2581
2582                                 if (!super)
2583                                         M_BR(s3);
2584                         }
2585
2586                         /* class instanceof code */
2587
2588                         if (!super || !(super->flags & ACC_INTERFACE)) {
2589                                 disp = dseg_addaddress(cd, supervftbl);
2590
2591                                 if (super) {
2592                                         M_TST(s1);
2593                                         M_BEQ(s3);
2594
2595                                 } else {
2596                                         codegen_addpatchref(cd, PATCHER_instanceof_class,
2597                                                                                 iptr->sx.s23.s3.c.ref,
2598                                                                                 disp);
2599
2600                                         if (opt_showdisassemble) {
2601                                                 M_NOP;
2602                                         }
2603                                 }
2604
2605                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2606                                 M_ALD(REG_ITMP2, REG_PV, disp);
2607 #if defined(ENABLE_THREADS)
2608                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2609 #endif
2610                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2611                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2612                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2613 #if defined(ENABLE_THREADS)
2614                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2615 #endif
2616                                 M_SUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
2617                                 M_CMPU(REG_ITMP1, REG_ITMP2);
2618                                 M_CLR(d);
2619                                 M_BGT(1);
2620                                 M_IADD_IMM(REG_ZERO, 1, d);
2621                         }
2622                         emit_store_dst(jd, iptr, d);
2623                         }
2624                         break;
2625
2626                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2627
2628                         /* check for negative sizes and copy sizes to stack if necessary  */
2629
2630                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2631
2632                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2633
2634                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2635
2636                                 /* copy SAVEDVAR sizes to stack */
2637
2638                                 if (!(var->flags & PREALLOC)) {
2639                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2640 #if defined(__DARWIN__)
2641                                         M_LST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 8);
2642 #else
2643                                         M_LST(s2, REG_SP, LA_SIZE + (s1 + 3) * 8);
2644 #endif
2645                                 }
2646                         }
2647
2648                         /* a0 = dimension count */
2649
2650                         ICONST(rd->argintregs[0], iptr->s1.argcount);
2651
2652                         /* is patcher function set? */
2653
2654                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2655                                 disp = dseg_add_unique_address(cd, NULL);
2656
2657                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
2658                                                                         iptr->sx.s23.s3.c.ref, disp);
2659
2660                                 if (opt_showdisassemble)
2661                                         M_NOP;
2662
2663                         } else {
2664                                 disp = dseg_addaddress(cd, iptr->sx.s23.s3.c.cls);
2665                         }
2666
2667                         /* a1 = arraydescriptor */
2668
2669                         M_ALD(rd->argintregs[1], REG_PV, disp);
2670
2671                         /* a2 = pointer to dimensions = stack pointer */
2672
2673 #if defined(__DARWIN__)
2674                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 8);
2675 #else
2676                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 8);
2677 #endif
2678
2679                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
2680                         M_ALD(REG_ITMP3, REG_PV, disp);
2681                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
2682                         M_MTCTR(REG_ITMP3);
2683                         M_JSR;
2684
2685                         /* check for exception before result assignment */
2686
2687                         M_CMPI(REG_RESULT, 0);
2688                         M_BEQ(0);
2689                         codegen_add_fillinstacktrace_ref(cd);
2690
2691                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2692                         M_INTMOVE(REG_RESULT, d);
2693                         emit_store_dst(jd, iptr, d);
2694                         break;
2695
2696                 default:
2697                         *exceptionptr =
2698                                 new_internalerror("Unknown ICMD %d during code generation",
2699                                                                   iptr->opc);
2700                         return false;
2701         } /* switch */
2702                 
2703         } /* for instruction */
2704                 
2705         } /* if (bptr -> flags >= BBREACHED) */
2706         } /* for basic block */
2707
2708         dseg_createlinenumbertable(cd);
2709
2710
2711         /* generate exception and patcher stubs */
2712
2713         {
2714                 exceptionref *eref;
2715                 patchref     *pref;
2716                 u4            mcode;
2717                 u1           *savedmcodeptr;
2718                 u1           *tmpmcodeptr;
2719
2720                 savedmcodeptr = NULL;
2721
2722                 /* generate exception stubs */
2723
2724                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
2725                         gen_resolvebranch(cd->mcodebase + eref->branchpos, 
2726                                                           eref->branchpos, cd->mcodeptr - cd->mcodebase);
2727
2728                         MCODECHECK(100);
2729
2730                         /* Check if the exception is an
2731                            ArrayIndexOutOfBoundsException.  If so, move index register
2732                            into REG_ITMP1. */
2733
2734                         if (eref->reg != -1)
2735                                 M_MOV(eref->reg, REG_ITMP1);
2736
2737                         /* calcuate exception address */
2738
2739                         M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
2740
2741                         /* move function to call into REG_ITMP3 */
2742
2743                         disp = dseg_addaddress(cd, eref->function);
2744                         M_ALD(REG_ITMP3, REG_PV, disp);
2745                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
2746
2747                         if (savedmcodeptr != NULL) {
2748                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
2749                                 M_BR(disp);
2750
2751                         } else {
2752                                 savedmcodeptr = cd->mcodeptr;
2753
2754                                 if (jd->isleafmethod) {
2755                                         M_MFLR(REG_ZERO);
2756                                         M_AST(REG_ZERO, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2757                                 }
2758
2759                                 M_MOV(REG_PV, rd->argintregs[0]);
2760                                 M_MOV(REG_SP, rd->argintregs[1]);
2761
2762                                 if (jd->isleafmethod)
2763                                         M_MOV(REG_ZERO, rd->argintregs[2]);
2764                                 else
2765                                         M_ALD(rd->argintregs[2],
2766                                                   REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2767
2768                                 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
2769                                 M_MOV(REG_ITMP1, rd->argintregs[4]);
2770
2771                                 M_STDU(REG_SP, REG_SP, -(LA_SIZE + 6 * 8));
2772                                 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
2773
2774                                 M_MTCTR(REG_ITMP3);
2775                                 M_JSR;
2776                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
2777
2778                                 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
2779                                 M_LADD_IMM(REG_SP, LA_SIZE + 6 * 8, REG_SP);
2780
2781                                 if (jd->isleafmethod) {
2782                                         /* XXX FIXME: REG_ZERO can cause problems here! */
2783                                         assert(cd->stackframesize * 8 <= 32767);
2784
2785                                         M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2786                                         M_MTLR(REG_ZERO);
2787                                 }
2788
2789                                 disp = dseg_addaddress(cd, asm_handle_exception);
2790                                 M_ALD(REG_ITMP3, REG_PV, disp);
2791                                 M_MTCTR(REG_ITMP3);
2792                                 M_RTS;
2793                         }
2794                 }
2795
2796
2797                 /* generate code patching stub call code */
2798
2799                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
2800                         /* check code segment size */
2801
2802                         MCODECHECK(16);
2803
2804                         /* Get machine code which is patched back in later. The
2805                            call is 1 instruction word long. */
2806
2807                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
2808
2809                         mcode = *((u4 *) tmpmcodeptr);
2810
2811                         /* Patch in the call to call the following code (done at
2812                            compile time). */
2813
2814                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
2815                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
2816
2817                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
2818                         M_BR(disp);
2819
2820                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
2821
2822                         /* create stack frame - keep stack 16-byte aligned */
2823
2824                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
2825
2826                         /* calculate return address and move it onto the stack */
2827
2828                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
2829                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
2830
2831                         /* move pointer to java_objectheader onto stack */
2832
2833 #if defined(ENABLE_THREADS)
2834                         /* order reversed because of data segment layout */
2835
2836                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
2837                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
2838                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
2839
2840                         M_LDA(REG_ITMP3, REG_PV, disp);
2841                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
2842 #else
2843                         /* do nothing */
2844 #endif
2845
2846                         /* move machine code onto stack */
2847
2848                         disp = dseg_adds4(cd, mcode);
2849                         M_ILD(REG_ITMP3, REG_PV, disp);
2850                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
2851
2852                         /* move class/method/field reference onto stack */
2853
2854                         disp = dseg_addaddress(cd, pref->ref);
2855                         M_ALD(REG_ITMP3, REG_PV, disp);
2856                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
2857
2858                         /* move data segment displacement onto stack */
2859
2860                         disp = dseg_addaddress(cd, pref->disp);
2861                         M_LLD(REG_ITMP3, REG_PV, disp);
2862                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
2863
2864                         /* move patcher function pointer onto stack */
2865
2866                         disp = dseg_addaddress(cd, pref->patcher);
2867                         M_ALD(REG_ITMP3, REG_PV, disp);
2868                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
2869
2870                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
2871                         M_ALD(REG_ITMP3, REG_PV, disp);
2872                         M_MTCTR(REG_ITMP3);
2873                         M_RTS;
2874                 }
2875
2876                 /* generate replacement-out stubs */
2877
2878 #if 0
2879                 {
2880                         int i;
2881
2882                         replacementpoint = jd->code->rplpoints;
2883
2884                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
2885                                 /* check code segment size */
2886
2887                                 MCODECHECK(100);
2888
2889                                 /* note start of stub code */
2890
2891                                 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
2892
2893                                 /* make machine code for patching */
2894
2895                                 tmpmcodeptr  = cd->mcodeptr;
2896                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
2897
2898                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
2899                                 M_BR(disp);
2900
2901                                 cd->mcodeptr = tmpmcodeptr;
2902
2903                                 /* create stack frame - keep 16-byte aligned */
2904
2905                                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
2906
2907                                 /* push address of `rplpoint` struct */
2908
2909                                 disp = dseg_addaddress(cd, replacementpoint);
2910                                 M_ALD(REG_ITMP3, REG_PV, disp);
2911                                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
2912
2913                                 /* jump to replacement function */
2914
2915                                 disp = dseg_addaddress(cd, asm_replacement_out);
2916                                 M_ALD(REG_ITMP3, REG_PV, disp);
2917                                 M_MTCTR(REG_ITMP3);
2918                                 M_RTS;
2919                         }
2920                 }
2921 #endif
2922         }
2923
2924         codegen_finish(jd);
2925
2926         /* everything's ok */
2927
2928         return true;
2929 }
2930
2931
2932 /* createcompilerstub **********************************************************
2933
2934    Creates a stub routine which calls the compiler.
2935         
2936 *******************************************************************************/
2937
2938 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
2939 #define COMPILERSTUB_CODESIZE    4 * 4
2940
2941 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
2942
2943
2944 u1 *createcompilerstub(methodinfo *m)
2945 {
2946         u1          *s;                     /* memory to hold the stub            */
2947         ptrint      *d;
2948         codeinfo    *code;
2949         codegendata *cd;
2950         s4           dumpsize;
2951
2952         s = CNEW(u1, COMPILERSTUB_SIZE);
2953
2954         /* set data pointer and code pointer */
2955
2956         d = (ptrint *) s;
2957         s = s + COMPILERSTUB_DATASIZE;
2958
2959         /* mark start of dump memory area */
2960
2961         dumpsize = dump_size();
2962
2963         cd = DNEW(codegendata);
2964         cd->mcodeptr = s;
2965
2966         /* Store the codeinfo pointer in the same place as in the
2967            methodheader for compiled methods. */
2968
2969         code = code_codeinfo_new(m);
2970
2971         d[0] = (ptrint) asm_call_jit_compiler;
2972         d[1] = (ptrint) m;
2973         d[2] = (ptrint) code;
2974
2975         M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
2976         M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
2977         M_MTCTR(REG_PV);
2978         M_RTS;
2979
2980         md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
2981
2982 #if defined(ENABLE_STATISTICS)
2983         if (opt_stat)
2984                 count_cstub_len += COMPILERSTUB_SIZE;
2985 #endif
2986
2987         /* release dump area */
2988
2989         dump_release(dumpsize);
2990
2991         return s;
2992 }
2993
2994
2995 /* createnativestub ************************************************************
2996
2997    Creates a stub routine which calls a native method.
2998
2999 *******************************************************************************/
3000
3001 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3002 {
3003         methodinfo   *m;
3004         codeinfo     *code;
3005         codegendata  *cd;
3006         registerdata *rd;
3007         methoddesc   *md;
3008         s4            nativeparams;
3009         s4            i, j;                 /* count variables                    */
3010         s4            t;
3011         s4            s1, s2, disp;
3012         s4            funcdisp;
3013
3014         /* get required compiler data */
3015
3016         m    = jd->m;
3017         code = jd->code;
3018         cd   = jd->cd;
3019         rd   = jd->rd;
3020
3021         /* set some variables */
3022
3023         md = m->parseddesc;
3024         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3025
3026         /* calculate stackframe size */
3027
3028         cd->stackframesize =
3029                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3030                 sizeof(localref_table) / SIZEOF_VOID_P +
3031                 4 +                            /* 4 stackframeinfo arguments (darwin)*/
3032                 nmd->paramcount  + 
3033                 nmd->memuse;
3034
3035         cd->stackframesize = (cd->stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3036
3037         /* create method header */
3038
3039         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3040         (void) dseg_adds4(cd, cd->stackframesize * 8);             /* FrameSize       */
3041         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3042         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3043         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3044         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3045         (void) dseg_addlinenumbertablesize(cd);
3046         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3047
3048         /* generate code */
3049
3050         M_MFLR(REG_ZERO);
3051         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3052         M_STDU(REG_SP, REG_SP, -(cd->stackframesize * 8));
3053
3054 #if !defined(NDEBUG)
3055         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3056                 emit_verbosecall_enter(jd);
3057         }
3058 #endif
3059         /* get function address (this must happen before the stackframeinfo) */
3060
3061         funcdisp = dseg_addaddress(cd, f);
3062
3063 #if !defined(WITH_STATIC_CLASSPATH)
3064         if (f == NULL) {
3065                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3066
3067                 if (opt_showdisassemble)
3068                         M_NOP;
3069         }
3070 #endif
3071
3072         /* save integer and float argument registers */
3073
3074         j = 0;
3075
3076         for (i = 0; i < md->paramcount; i++) {
3077                 t = md->paramtypes[i].type;
3078
3079                 if (IS_INT_LNG_TYPE(t)) {
3080                         if (!md->params[i].inmemory) {
3081                                 s1 = md->params[i].regoff;
3082                                 M_LST(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3083                                 j++;
3084                         }
3085                 }
3086         }
3087
3088         for (i = 0; i < md->paramcount; i++) {
3089                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3090                         if (!md->params[i].inmemory) {
3091                                 s1 = md->params[i].regoff;
3092                                 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3093                                 j++;
3094                         }
3095                 }
3096         }
3097
3098         /* create native stack info */
3099
3100         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[0]);
3101         M_MOV(REG_PV, rd->argintregs[1]);
3102         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[2]);
3103         M_ALD(rd->argintregs[3], REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
3104         disp = dseg_addaddress(cd, codegen_start_native_call);
3105
3106         M_ALD(REG_ITMP1, REG_PV, disp);
3107         M_ALD(REG_ITMP1, REG_ITMP1, 0);         /* TOC */
3108         M_MTCTR(REG_ITMP1);
3109         M_JSR;
3110
3111         /* restore integer and float argument registers */
3112
3113         j = 0;
3114
3115         for (i = 0; i < md->paramcount; i++) {
3116                 t = md->paramtypes[i].type;
3117
3118                 if (IS_INT_LNG_TYPE(t)) {
3119                         if (!md->params[i].inmemory) {
3120                                 s1 = md->params[i].regoff;
3121                                 M_LLD(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3122                                 j++;
3123                         }
3124                 }
3125         }
3126
3127         for (i = 0; i < md->paramcount; i++) {
3128                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3129                         if (!md->params[i].inmemory) {
3130                                 s1 = md->params[i].regoff;
3131                                 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3132                                 j++;
3133                         }
3134                 }
3135         }
3136         
3137         /* copy or spill arguments to new locations */
3138
3139         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3140                 t = md->paramtypes[i].type;
3141
3142                 if (IS_INT_LNG_TYPE(t)) {
3143                         if (!md->params[i].inmemory) {
3144                                 s1 = rd->argintregs[md->params[i].regoff];
3145
3146                                 if (!nmd->params[j].inmemory) {
3147                                         s2 = rd->argintregs[nmd->params[j].regoff];
3148                                         M_INTMOVE(s1, s2);
3149                                 } else {
3150                                         s2 = nmd->params[j].regoff;
3151                                         M_LST(s1, REG_SP, s2 * 8);
3152                                 }
3153
3154                         } else {
3155                                 s1 = md->params[i].regoff + cd->stackframesize;
3156                                 s2 = nmd->params[j].regoff;
3157
3158                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
3159                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
3160                         }
3161
3162                 } else {
3163                         /* We only copy spilled float arguments, as the float
3164                            argument registers keep unchanged. */
3165
3166                         if (md->params[i].inmemory) {
3167                                 s1 = md->params[i].regoff + cd->stackframesize;
3168                                 s2 = nmd->params[j].regoff;
3169
3170                                 if (IS_2_WORD_TYPE(t)) {
3171                                         M_DLD(REG_FTMP1, REG_SP, s1 * 8);
3172                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
3173
3174                                 } else {
3175                                         M_FLD(REG_FTMP1, REG_SP, s1 * 8);
3176                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
3177                                 }
3178                         }
3179                 }
3180         }
3181
3182         /* put class into second argument register */
3183
3184         if (m->flags & ACC_STATIC) {
3185                 disp = dseg_addaddress(cd, m->class);
3186                 M_ALD(rd->argintregs[1], REG_PV, disp);
3187         }
3188
3189         /* put env into first argument register */
3190
3191         disp = dseg_addaddress(cd, _Jv_env);
3192         M_ALD(rd->argintregs[0], REG_PV, disp);
3193
3194         /* generate the actual native call */
3195         /* native functions have a different TOC for sure */
3196
3197         M_AST(REG_TOC, REG_SP, 40);     /* save old TOC */
3198         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3199         M_ALD(REG_TOC, REG_ITMP3, 8);   /* load TOC from func. descriptor */
3200         M_ALD(REG_ITMP3, REG_ITMP3, 0);         
3201         M_MTCTR(REG_ITMP3);
3202         M_JSR;
3203         M_ALD(REG_TOC, REG_SP, 40);     /* restore TOC */
3204
3205         /* save return value */
3206
3207         if (md->returntype.type != TYPE_VOID) {
3208                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3209                         M_LST(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3210                 }
3211                 else {
3212                         if (IS_2_WORD_TYPE(md->returntype.type))
3213                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3214                         else
3215                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);  /* FIXME, needed ?*/
3216                 }
3217         }
3218
3219         /* print call trace */
3220 #if ! defined(NDEBGUU)
3221         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3222                 emit_verbosecall_exit(jd);
3223         }
3224 #endif
3225         /* remove native stackframe info */
3226
3227         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[0]);
3228         disp = dseg_addaddress(cd, codegen_finish_native_call);
3229         M_ALD(REG_ITMP1, REG_PV, disp);
3230         M_ALD(REG_ITMP1, REG_ITMP1, 0); /* XXX what about TOC? */
3231         M_MTCTR(REG_ITMP1);
3232         M_JSR;
3233         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3234
3235         /* restore return value */
3236
3237         if (md->returntype.type != TYPE_VOID) {
3238                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3239                         M_LLD(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3240                 }
3241                 else {
3242                         if (IS_2_WORD_TYPE(md->returntype.type))
3243                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3244                         else
3245                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3246                 }
3247         }
3248
3249         M_ALD(REG_ITMP2_XPC, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
3250         M_MTLR(REG_ITMP2_XPC);
3251         M_LDA(REG_SP, REG_SP, cd->stackframesize * 8); /* remove stackframe           */
3252
3253         /* check for exception */
3254
3255         M_TST(REG_ITMP1_XPTR);
3256         M_BNE(1);                           /* if no exception then return        */
3257
3258         M_RET;
3259
3260         /* handle exception */
3261
3262         M_LADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC);  /* exception address       */
3263
3264         disp = dseg_addaddress(cd, asm_handle_nat_exception);
3265         M_ALD(REG_ITMP3, REG_PV, disp);
3266         M_MTCTR(REG_ITMP3);
3267         M_RTS;
3268
3269         /* generate patcher stub call code */
3270
3271         {
3272                 patchref *pref;
3273                 u4        mcode;
3274                 u1       *savedmcodeptr;
3275                 u1       *tmpmcodeptr;
3276
3277                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3278                         /* Get machine code which is patched back in later. The
3279                            call is 1 instruction word long. */
3280
3281                         tmpmcodeptr = cd->mcodebase + pref->branchpos;
3282
3283                         mcode = *((u4 *) tmpmcodeptr);
3284
3285                         /* Patch in the call to call the following code (done at
3286                            compile time). */
3287
3288                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3289                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3290
3291                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3292                         M_BL(disp);
3293
3294                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3295
3296                         /* create stack frame - keep stack 16-byte aligned */
3297
3298                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
3299
3300                         /* move return address onto stack */
3301
3302                         M_MFLR(REG_ZERO);
3303                         M_AST(REG_ZERO, REG_SP, 5 * 8);
3304
3305                         /* move pointer to java_objectheader onto stack */
3306
3307 #if defined(ENABLE_THREADS)
3308                         /* order reversed because of data segment layout */
3309
3310                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3311                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3312                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3313
3314                         M_LDA(REG_ITMP3, REG_PV, disp);
3315                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
3316 #else
3317                         /* do nothing */
3318 #endif
3319
3320                         /* move machine code onto stack */
3321
3322                         disp = dseg_adds4(cd, mcode);
3323                         M_ILD(REG_ITMP3, REG_PV, disp);
3324                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
3325
3326                         /* move class/method/field reference onto stack */
3327
3328                         disp = dseg_addaddress(cd, pref->ref);
3329                         M_ALD(REG_ITMP3, REG_PV, disp);
3330                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
3331
3332                         /* move data segment displacement onto stack */
3333
3334                         disp = dseg_adds4(cd, pref->disp);
3335                         M_ILD(REG_ITMP3, REG_PV, disp);
3336                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
3337
3338                         /* move patcher function pointer onto stack */
3339
3340                         disp = dseg_addaddress(cd, pref->patcher);
3341                         M_ALD(REG_ITMP3, REG_PV, disp);
3342                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
3343
3344                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
3345                         M_ALD(REG_ITMP3, REG_PV, disp);
3346                         M_MTCTR(REG_ITMP3);
3347                         M_RTS;
3348                 }
3349         }
3350
3351         codegen_finish(jd);
3352
3353         return code->entrypoint;
3354 }
3355
3356
3357
3358
3359 /*
3360  * These are local overrides for various environment variables in Emacs.
3361  * Please do not remove this and leave it at the end of the file, where
3362  * Emacs will automagically detect them.
3363  * ---------------------------------------------------------------------
3364  * Local variables:
3365  * mode: c
3366  * indent-tabs-mode: t
3367  * c-basic-offset: 4
3368  * tab-width: 4
3369  * End:
3370  * vim:noexpandtab:sw=4:ts=4:
3371  */