src/vm/jit/powerpc64/codegen.c

   1 /* src/vm/jit/powerpc64/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32             Edwin Steiner
  33             Roland Lezuo
  34
  35    $Id: codegen.c 5982 2006-11-15 15:30:36Z twisti $
  36
  37 */
  38
  39
  40 #include "config.h"
  41
  42 #include <assert.h>
  43 #include <stdio.h>
  44 #include <signal.h>
  45
  46 #include "vm/types.h"
  47
  48 #include "md-abi.h"
  49 #include "vm/jit/abi-asm.h"
  50
  51 #include "vm/jit/powerpc64/arch.h"
  52 #include "vm/jit/powerpc64/codegen.h"
  53
  54 #include "mm/memory.h"
  55 #include "native/native.h"
  56 #include "vm/builtin.h"
  57 #include "vm/exceptions.h"
  58 #include "vm/global.h"
  59 #include "vm/loader.h"
  60 #include "vm/options.h"
  61 #include "vm/stringlocal.h"
  62 #include "vm/vm.h"
  63 #include "vm/jit/asmpart.h"
  64 #include "vm/jit/codegen-common.h"
  65 #include "vm/jit/dseg.h"
  66 #include "vm/jit/emit-common.h"
  67 #include "vm/jit/jit.h"
  68 #include "vm/jit/parse.h"
  69 #include "vm/jit/patcher.h"
  70 #include "vm/jit/reg.h"
  71 #include "vm/jit/replace.h"
  72
  73 #if defined(ENABLE_LSRA)
  74 # include "vm/jit/allocator/lsra.h"
  75 #endif
  76
  77
  78 /* codegen *********************************************************************
  79
  80    Generates machine code.
  81
  82 *******************************************************************************/
  83
  84 bool codegen(jitdata *jd)
  85 {
  86         methodinfo         *m;
  87         codeinfo           *code;
  88         codegendata        *cd;
  89         registerdata       *rd;
  90         s4                  len, s1, s2, s3, d, disp;
  91         ptrint              a;
  92         varinfo            *var;
  93         basicblock         *bptr;
  94         instruction        *iptr;
  95         exception_entry    *ex;
  96         u2                  currentline;
  97         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  98         builtintable_entry *bte;
  99         methoddesc         *md;
 100         rplpoint           *replacementpoint;
 101         s4                  fieldtype;
 102         s4                  varindex;
 103         unresolved_field   *uf;
 104         fieldinfo          *fi;
 105
 106         /* get required compiler data */
 107
 108         m    = jd->m;
 109         code = jd->code;
 110         cd   = jd->cd;
 111         rd   = jd->rd;
 112
 113         /* prevent compiler warnings */
 114
 115         d = 0;
 116         lm = NULL;
 117         bte = NULL;
 118
 119         {
 120         s4 i, p, t, l;
 121         s4 savedregs_num;
 122
 123         savedregs_num = 0;
 124
 125         /* space to save used callee saved registers */
 126
 127         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 128         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 129
 130         cd->stackframesize = rd->memuse + savedregs_num;
 131
 132 #if defined(ENABLE_THREADS)
 133         /* space to save argument of monitor_enter and Return Values to survive */
 134     /* monitor_exit. The stack position for the argument can not be shared  */
 135         /* with place to save the return register on PPC64, since both values     */
 136         /* reside in R3 */
 137         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 138                 /* reserve 2 slots for long/double return values for monitorexit */
 139                 cd->stackframesize += 2;
 140         }
 141
 142 #endif
 143
 144         /* create method header */
 145
 146         /* align stack to 16-bytes */
 147
 148 /* FIXME */
 149 /*      if (!m->isleafmethod || opt_verbosecall) */
 150 /*              stackframesize = (stackframesize + 3) & ~3;
 151 */
 152 /*      else if (m->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
 153 /*              stackframesize = 0; */
 154
 155         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
 156         (void) dseg_adds4(cd, cd->stackframesize * 8);             /* FrameSize       */
 157
 158 #if defined(ENABLE_THREADS)
 159         /* IsSync contains the offset relative to the stack pointer for the
 160            argument of monitor_exit used in the exception handler. Since the
 161            offset could be zero and give a wrong meaning of the flag it is
 162            offset by one.
 163         */
 164
 165         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 166                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);       /* IsSync          */
 167         else
 168 #endif
 169                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
 170
 171         (void) dseg_adds4(cd, jd->isleafmethod);                /* IsLeaf          */
 172         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
 173         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
 174
 175         dseg_addlinenumbertablesize(cd);
 176
 177         (void) dseg_adds4(cd, jd->exceptiontablelength);       /* ExTableSize     */
 178
 179         /* create exception table */
 180
 181         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
 182                 dseg_addtarget(cd, ex->start);
 183                 dseg_addtarget(cd, ex->end);
 184                 dseg_addtarget(cd, ex->handler);
 185                 (void) dseg_addaddress(cd, ex->catchtype.any);
 186         }
 187
 188         /* create stack frame (if necessary) */
 189
 190         if (!jd->isleafmethod) {
 191                 M_MFLR(REG_ZERO);
 192                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 193         }
 194
 195         if (cd->stackframesize)
 196                 M_STDU(REG_SP, REG_SP, -cd->stackframesize * 8);
 197
 198         /* save return address and used callee saved registers */
 199
 200         p = cd->stackframesize;
 201         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 202                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 203         }
 204         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 205                 p --; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 206         }
 207
 208         /* take arguments out of register or stack frame */
 209
 210         md = m->parseddesc;
 211
 212         for (p = 0, l = 0; p < md->paramcount; p++) {
 213                 t = md->paramtypes[p].type;
 214                 varindex = jd->local_map[l*5 + t];
 215                 l++;
 216                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 217                         l++;
 218                 if (varindex == UNUSED)
 219                         continue;
 220                 var = VAR(varindex);
 221                 s1 = md->params[p].regoff;
 222                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 223                         if (!md->params[p].inmemory) {           /* register arguments    */
 224                                 s2 = rd->argintregs[s1];
 225                                 if (!IS_INMEMORY(var->flags))   {
 226                                         M_INTMOVE(s2, var->vv.regoff);
 227                                 } else {                             /* reg arg -> spilled    */
 228                                         M_LST(s2, REG_SP, var->vv.regoff * 8);
 229                                 }
 230                         } else {                                 /* stack arguments       */
 231                                 if (!IS_INMEMORY(var->flags)) {      /* stack arg -> register */
 232                                         M_LLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
 233
 234                                 } else {                             /* stack arg -> spilled  */
 235                                         var->vv.regoff = cd->stackframesize + s1;
 236                                 }
 237                         }
 238
 239                 } else {                                     /* floating args         */
 240                         if (!md->params[p].inmemory) {           /* register arguments    */
 241                                 s2 = rd->argfltregs[s1];
 242                                 if (!IS_INMEMORY(var->flags)) {      /* reg arg -> register   */
 243                                         M_FLTMOVE(s2, var->vv.regoff);
 244                                 } else {                                         /* reg arg -> spilled    */
 245                                         if (IS_2_WORD_TYPE(t)) {
 246                                                 M_DST(s2, REG_SP, var->vv.regoff * 8);
 247                                         } else {
 248                                                 M_DST(s2, REG_SP, var->vv.regoff * 8);  /*  F XXX */
 249                                         }
 250                                 }
 251
 252                         } else {                                 /* stack arguments       */
 253                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 254                                         if (IS_2_WORD_TYPE(t)) {
 255                                                 M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
 256                                         } else {
 257                                                 M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
 258                                         }
 259                                 } else {                             /* stack-arg -> spilled  */
 260                                         var->vv.regoff = cd->stackframesize + s1;
 261                                 }
 262                         }
 263                 }
 264         } /* end for */
 265
 266         /* save monitorenter argument */
 267
 268 #if defined(ENABLE_THREADS)
 269
 270         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 271
 272                 /* stackoffset for argument used for LOCK_monitor_exit */
 273                 s1 = rd->memuse;
 274 #if !defined (NDEBUG)
 275                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 276                         M_AADD_IMM(REG_SP, -((LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT) * 8), REG_SP);
 277
 278                         for (p = 0; p < INT_ARG_CNT; p++)
 279                                 M_LST(rd->argintregs[p], REG_SP, LA_SIZE + PA_SIZE + p * 8);
 280
 281                         for (p = 0; p < FLT_ARG_CNT; p++)
 282                                 M_DST(rd->argfltregs[p], REG_SP, LA_SIZE + PA_SIZE + (INT_ARG_CNT + p) * 8);
 283
 284                         /* used for LOCK_monitor_exit, adopt size because we created another stackframe */
 285                         s1 += (LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT);
 286                 }
 287 #endif
 288                 p = dseg_addaddress(cd, LOCK_monitor_enter);
 289                 M_ALD(REG_ITMP3, REG_PV, p);
 290                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
 291                 M_MTCTR(REG_ITMP3);
 292
 293                 /* get or test the lock object */
 294
 295                 if (m->flags & ACC_STATIC) {
 296                         p = dseg_addaddress(cd, &m->class->object.header);
 297                         M_ALD(rd->argintregs[0], REG_PV, p);
 298                 }
 299                 else {
 300                         M_TST(rd->argintregs[0]);
 301                         M_BEQ(0);
 302                         codegen_add_nullpointerexception_ref(cd);
 303                 }
 304
 305                 M_AST(rd->argintregs[0], REG_SP, s1 * 8);       /* rd->memuse * 8 */
 306                 M_JSR;
 307 #if !defined (NDEBUG)
 308                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 309                         for (p = 0; p < INT_ARG_CNT; p++)
 310                                 M_LLD(rd->argintregs[p], REG_SP, LA_SIZE + PA_SIZE + p * 8);
 311
 312                         for (p = 0; p < FLT_ARG_CNT; p++)
 313                                 M_DLD(rd->argfltregs[p], REG_SP, LA_SIZE + PA_SIZE + (INT_ARG_CNT + p) * 8);
 314
 315                         M_AADD_IMM(REG_SP, (LA_SIZE_IN_POINTERS + PA_SIZE_IN_POINTERS + ARG_CNT) * 8, REG_SP);
 316                 }
 317 #endif
 318         }
 319 #endif
 320
 321         /* call trace function */
 322 #if !defined (NDEBUG)
 323         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 324                 emit_verbosecall_enter(jd);
 325
 326         }
 327 #endif
 328
 329         /* end of header generation */
 330
 331         replacementpoint = jd->code->rplpoints;
 332
 333         /* walk through all basic blocks */
 334         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 335
 336                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 337
 338                 if (bptr->flags >= BBREACHED) {
 339
 340                 /* branch resolving */
 341
 342                 {
 343                 branchref *brefs;
 344                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 345                         md_codegen_patch_branch(cd, brefs->branchpos, bptr->mpc);
 346                         }
 347                 }
 348
 349                 /* handle replacement points */
 350
 351 #if 0
 352                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 353                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 354
 355                         replacementpoint++;
 356                 }
 357 #endif
 358
 359                 /* copy interface registers to their destination */
 360
 361                 len = bptr->indepth;
 362                 MCODECHECK(64+len);
 363
 364 #if defined(ENABLE_LSRA)
 365                 if (opt_lsra) {
 366                         while (len) {
 367                                 len--;
 368                                 var = VAR(bptr->invars[len]);
 369                                 if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 370                                         /* d = reg_of_var(m, var, REG_ITMP1); */
 371                                         if (!(var->flags & INMEMORY))
 372                                                 d = var->vv.regoff;
 373                                         else
 374                                                 d = REG_ITMP1;
 375                                         M_INTMOVE(REG_ITMP1, d);
 376                                         emit_store(jd, NULL, var, d);
 377                                 }
 378                         }
 379                 } else {
 380 #endif
 381                 while (len) {
 382                         len--;
 383                         var = VAR(bptr->invars[len]);
 384                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 385                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
 386                                 M_INTMOVE(REG_ITMP1, d);
 387                                 emit_store(jd, NULL, var, d);
 388                         }
 389                         else {
 390                                 assert((var->flags & INOUT));
 391                         }
 392                 }
 393
 394 #if defined(ENABLE_LSRA)
 395                 }
 396 #endif
 397                 /* walk through all instructions */
 398
 399                 len = bptr->icount;
 400                 currentline = 0;
 401
 402                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
 403                         bool sign_ext = false;
 404                         if (iptr->line != currentline) {
 405                                 dseg_addlinenumber(cd, iptr->line);
 406                                 currentline = iptr->line;
 407                         }
 408
 409                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 410
 411                         switch (iptr->opc) {
 412                         case ICMD_NOP:    /* ...  ==> ...                                 */
 413                         case ICMD_INLINE_START:
 414                         case ICMD_INLINE_END:
 415                                 break;
 416
 417                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 418
 419                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 420                         M_TST(s1);
 421                         M_BEQ(0);
 422                         codegen_add_nullpointerexception_ref(cd);
 423                         break;
 424
 425                 /* constant operations ************************************************/
 426
 427                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 428
 429                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 430                         ICONST(d, iptr->sx.val.i);
 431                         emit_store_dst(jd, iptr, d);
 432                         break;
 433
 434                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 435
 436                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 437                         LCONST(d, iptr->sx.val.l);
 438                         emit_store_dst(jd, iptr, d);
 439                         break;
 440
 441                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 442
 443                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 444                         a = dseg_addfloat(cd, iptr->sx.val.f);
 445                         M_FLD(d, REG_PV, a);
 446                         emit_store_dst(jd, iptr, d);
 447                         break;
 448
 449                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 450
 451                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 452                         a = dseg_adddouble(cd, iptr->sx.val.d);
 453                         M_DLD(d, REG_PV, a);
 454                         emit_store_dst(jd, iptr, d);
 455                         break;
 456
 457                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 458                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 459                         disp = dseg_addaddress(cd, iptr->sx.val.anyptr);
 460
 461                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 462                                 codegen_addpatchref(cd, PATCHER_aconst,
 463                                                                         iptr->sx.val.c.ref,
 464                                                                     disp);
 465
 466                                 if (opt_showdisassemble)
 467                                         M_NOP;
 468                         }
 469
 470                         M_ALD(d, REG_PV, disp);
 471                         emit_store_dst(jd, iptr, d);
 472                         break;
 473
 474
 475                 /* load/store/copy/move operations ************************************/
 476
 477                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 478                 case ICMD_ALOAD:      /* s1.localindex = local variable               */
 479                 case ICMD_LLOAD:
 480                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 481                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 482                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 483                 case ICMD_ASTORE:     /* dst.localindex = local variable              */
 484                 case ICMD_LSTORE:
 485                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 486                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
 487                 case ICMD_COPY:
 488                 case ICMD_MOVE:
 489
 490                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 491                         break;
 492
 493
 494                 /* pop operations *****************************************************/
 495
 496                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 497
 498                 case ICMD_POP:        /* ..., value  ==> ...                          */
 499                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 500
 501                         break;
 502
 503
 504                 /* integer operations *************************************************/
 505
 506                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 507                         sign_ext = true;
 508                 case ICMD_LNEG:
 509                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 510                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 511                         M_NEG(s1, d);
 512                         if (sign_ext) M_EXTSW(d, d);
 513                         emit_store_dst(jd, iptr, d);
 514                         break;
 515
 516
 517                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 518
 519                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 520                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 521                         M_INTMOVE(s1, d);
 522                         emit_store_dst(jd, iptr, d);
 523                         break;
 524
 525                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 526
 527                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 528                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 529                         M_ISEXT(s1, d);
 530                         emit_store_dst(jd, iptr, d);
 531                         break;
 532
 533                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 534
 535                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 536                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 537                         M_BSEXT(s1, d);
 538                         emit_store_dst(jd, iptr, d);
 539                         break;
 540
 541                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 542
 543                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 544                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 545                         M_CZEXT(s1, d);
 546                         emit_store_dst(jd, iptr, d);
 547                         break;
 548
 549                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 550
 551                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 552                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 553                         M_SSEXT(s1, d);
 554                         emit_store_dst(jd, iptr, d);
 555                         break;
 556
 557
 558                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 559
 560                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 561                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 562                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 563                         M_IADD(s1, s2, d);
 564                         M_EXTSW(d,d);
 565                         emit_store_dst(jd, iptr, d);
 566                         break;
 567
 568                 case ICMD_IINC:
 569                 case ICMD_IADDCONST:
 570
 571                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 572                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 573                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767)) {
 574                                 M_IADD_IMM(s1, iptr->sx.val.i, d);
 575                         } else {
 576                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 577                                 M_IADD(s1, REG_ITMP2, d);
 578                         }
 579                         M_EXTSW(d,d);
 580                         emit_store_dst(jd, iptr, d);
 581                         break;
 582
 583                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 584
 585                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 586                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 587                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 588                         M_LADD(s1, s2, d);
 589                         emit_store_dst(jd, iptr, d);
 590                         break;
 591
 592                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 593                                       /* sx.val.l = constant                          */
 594
 595                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 596                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 597                         /* XXX check me */
 598                         if ((iptr->sx.val.l >= -32768) && (iptr->sx.val.l <= 32767)) {
 599                                 M_LADD_IMM(s1, iptr->sx.val.l, d);
 600                         } else {
 601                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 602                                 M_LADD(s1, REG_ITMP2, d);
 603                         }
 604                         emit_store_dst(jd, iptr, d);
 605                         break;
 606
 607                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 608
 609                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 610                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 611                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 612                         M_SUB(s1, s2, d);
 613                         emit_store_dst(jd, iptr, d);
 614                         break;
 615
 616                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 617                                       /* sx.val.i = constant                          */
 618
 619                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 620                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 621                         if ((iptr->sx.val.i >= -32767) && (iptr->sx.val.i <= 32768)) {
 622                                 M_IADD_IMM(s1, -iptr->sx.val.i, d);
 623                         } else {
 624                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 625                                 M_SUB(s1, REG_ITMP2, d);
 626                         }
 627                         M_EXTSW(d, d);
 628                         emit_store_dst(jd, iptr, d);
 629                         break;
 630
 631                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 632
 633                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 634                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 635                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 636                         M_SUB(s1, s2, d);
 637                         emit_store_dst(jd, iptr, d);
 638                         break;
 639
 640                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 641                                       /* sx.val.l = constant                          */
 642
 643                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 644                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 645                         /* XXX check me */
 646                         if ((iptr->sx.val.l >= -32767) && (iptr->sx.val.l <= 32767)) {
 647                                 M_LADD_IMM(s1, -iptr->sx.val.l, d);
 648                         } else {
 649                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 650                                 M_SUB(s1, REG_ITMP2, d);
 651                         }
 652                         emit_store_dst(jd, iptr, d);
 653                         break;
 654
 655                 case ICMD_IDIV:
 656                         sign_ext = true;
 657                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 658
 659                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 660                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 661                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 662                         M_TST(s2);
 663                         M_BEQ(0);
 664                         codegen_add_arithmeticexception_ref(cd);
 665
 666                         M_DIV(s1, s2, d);
 667                         /* we need to test if divident was 0x8000000000000, bit OV is set in XER in this case */
 668                         /* we only need to check this if we did a LDIV, not for IDIV */
 669                         if (!sign_ext)  {
 670                                 M_MFXER(REG_ITMP2);
 671                                 M_ANDIS(REG_ITMP2, 0x4000, REG_ITMP2);  /* test OV */
 672                                 M_BLE(1);
 673                                 M_MOV(s1, d);                           /* java specs says result == dividend */
 674                         }
 675                         if (sign_ext) M_EXTSW(d, d);
 676                         emit_store_dst(jd, iptr, d);
 677                         break;
 678
 679                 case ICMD_IREM:
 680                         sign_ext = true;
 681                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 682                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 683                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 684                         M_TST(s2);
 685                         M_BEQ(0);
 686                         codegen_add_arithmeticexception_ref(cd);
 687
 688                         M_DIV(s1, s2,  REG_ITMP3);
 689                         /* we need to test if divident was 0x8000000000000, bit OV is set in XER in this case */
 690                         /* we only need to check this if we did a LDIV, not for IDIV */
 691                         if (!sign_ext)  {
 692                                 M_MFXER(REG_ITMP2);
 693                                 M_ANDIS(REG_ITMP2, 0x4000, REG_ITMP2);  /* test OV */
 694                                 M_BLE(2);
 695                                 LCONST(REG_ITMP3, 0);                   /* result == 0 in this case */
 696                                 M_BR(2);
 697                         }
 698                         M_MUL(REG_ITMP3, s2, REG_ITMP2);
 699                         M_SUB(s1, REG_ITMP2,  REG_ITMP3);
 700                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 701
 702                         M_MOV(REG_ITMP3, d);
 703                         emit_store_dst(jd, iptr, REG_ITMP1);
 704                         break;
 705
 706
 707                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 708                         sign_ext = true;
 709                 case ICMD_LMUL:
 710                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 711                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 712                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 713                         M_MUL(s1, s2, d);
 714                         if (sign_ext) M_EXTSW(d, d);
 715                         emit_store_dst(jd, iptr, d);
 716                         break;
 717
 718                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 719                                       /* sx.val.i = constant                          */
 720
 721                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 722                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 723                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767))
 724                                 M_MUL_IMM(s1, iptr->sx.val.i, d);
 725                         else {
 726                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 727                                 M_MUL(s1, REG_ITMP3, d);
 728                         }
 729                         M_EXTSW(d, d);
 730                         emit_store_dst(jd, iptr, d);
 731                         break;
 732                 case ICMD_LMULCONST:
 733                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 734                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 735                         if ((iptr->sx.val.l >= -32767) && (iptr->sx.val.l <= 32767))
 736                                 M_MUL_IMM(s1, iptr->sx.val.l, d);
 737                         else {
 738                                 LCONST(REG_ITMP3, iptr->sx.val.l);
 739                                 M_MUL(s1, REG_ITMP3, d);
 740                         }
 741                         emit_store_dst(jd, iptr, d);
 742                         break;
 743
 744                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 745
 746                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 747                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 748                         M_SRA_IMM(s1, iptr->sx.val.i, d);
 749                         M_ADDZE(d, d);
 750                         emit_store_dst(jd, iptr, d);
 751                         break;
 752
 753                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 754
 755                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 756                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 757                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 758                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 759                         M_SLL(s1, REG_ITMP3, d);
 760                         M_EXTSW(d, d);
 761                         emit_store_dst(jd, iptr, d);
 762                         break;
 763
 764                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 765                                       /* sx.val.i = constant                             */
 766
 767                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 768                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 769                         M_SLL_IMM(s1, iptr->sx.val.i & 0x1f, d);
 770                         M_EXTSW(d,d);
 771                         emit_store_dst(jd, iptr, d);
 772                         break;
 773
 774                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 775
 776                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 777                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 778                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 779                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 780                         M_SRA(s1, REG_ITMP3, d);
 781                         emit_store_dst(jd, iptr, d);
 782                         break;
 783
 784                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 785                                       /* sx.val.i = constant                             */
 786
 787                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 788                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 789                         M_SRA_IMM(s1, iptr->sx.val.i & 0x1f, d);
 790                         emit_store_dst(jd, iptr, d);
 791                         break;
 792
 793                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 794
 795                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 796                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 797                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 798                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 799                         M_SRL(s1, REG_ITMP2, d);
 800                         emit_store_dst(jd, iptr, d);
 801                         break;
 802
 803                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 804                                       /* sx.val.i = constant                             */
 805
 806                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 807                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 808                         if (iptr->sx.val.i & 0x1f) {
 809                                 M_SRL_IMM(s1, iptr->sx.val.i & 0x1f, d);
 810                         } else {
 811                                 M_INTMOVE(s1, d);
 812                         }
 813                         emit_store_dst(jd, iptr, d);
 814                         break;
 815
 816                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 817                 case ICMD_LAND:
 818
 819                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 820                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 821                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 822                         M_AND(s1, s2, d);
 823                         emit_store_dst(jd, iptr, d);
 824                         break;
 825
 826                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
 827                                       /* sx.val.i = constant                          */
 828
 829                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 830                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 831                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535)) {
 832                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 833                                 }
 834                         /*
 835                         else if (iptr->sx.val.i == 0xffffff) {
 836                                 M_RLWINM(s1, 0, 8, 31, d);
 837                                 }
 838                         */
 839                         else {
 840                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 841                                 M_AND(s1, REG_ITMP3, d);
 842                         }
 843                         emit_store_dst(jd, iptr, d);
 844                         break;
 845
 846                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
 847                                       /* sx.val.l = constant                          */
 848
 849                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 850                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 851                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
 852                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 853                         /*
 854                         else if (iptr->sx.val.l == 0xffffff) {
 855                                 M_RLWINM(s1, 0, 8, 31, d);
 856                                 }
 857                         */
 858                         else {
 859                                 LCONST(REG_ITMP3, iptr->sx.val.l);
 860                                 M_AND(s1, REG_ITMP3, d);
 861                         }
 862                         emit_store_dst(jd, iptr, d);
 863                         break;
 864
 865                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
 866                                       /* sx.val.i = constant                             */
 867                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 868                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 869                         M_MOV(s1, REG_ITMP2);
 870                         M_CMPI(s1, 0);
 871                         M_BGE(1 + 2*(iptr->sx.val.i >= 32768));
 872                         if (iptr->sx.val.i >= 32768) {
 873                                 M_ADDIS(REG_ZERO, iptr->sx.val.i >> 16, REG_ITMP2);
 874                                 M_OR_IMM(REG_ITMP2, iptr->sx.val.i, REG_ITMP2);
 875                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
 876                         } else {
 877                                 M_IADD_IMM(s1, iptr->sx.val.i, REG_ITMP2);
 878                         }
 879                         {
 880                                 int b=0, m = iptr->sx.val.i;
 881                                 while (m >>= 1)
 882                                         ++b;
 883                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
 884                         }
 885                         M_SUB(s1, REG_ITMP2, d);
 886                         M_EXTSW(d, d);
 887                         emit_store_dst(jd, iptr, d);
 888                         break;
 889
 890                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
 891                 case ICMD_LOR:
 892
 893                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 894                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 895                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 896                         M_OR(s1, s2, d);
 897                         emit_store_dst(jd, iptr, d);
 898                         break;
 899
 900                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
 901                                       /* sx.val.i = constant                          */
 902
 903                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 904                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 905                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535))
 906                                 M_OR_IMM(s1, iptr->sx.val.i, d);
 907                         else {
 908                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 909                                 M_OR(s1, REG_ITMP3, d);
 910                         }
 911                         emit_store_dst(jd, iptr, d);
 912                         break;
 913
 914                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
 915                                       /* sx.val.l = constant                          */
 916
 917                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 918                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 919                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
 920                                 M_OR_IMM(s1, iptr->sx.val.l, d);
 921                         else {
 922                                 LCONST(REG_ITMP3, iptr->sx.val.l);
 923                                 M_OR(s1, REG_ITMP3, d);
 924                         }
 925                         emit_store_dst(jd, iptr, d);
 926                         break;
 927
 928
 929                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
 930                 case ICMD_LXOR:
 931
 932                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 933                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 934                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 935                         M_XOR(s1, s2, d);
 936                         emit_store_dst(jd, iptr, d);
 937                         break;
 938
 939                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 940                                       /* sx.val.i = constant                          */
 941
 942                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 943                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 944                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 65535))
 945                                 M_XOR_IMM(s1, iptr->sx.val.i, d);
 946                         else {
 947                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 948                                 M_XOR(s1, REG_ITMP3, d);
 949                         }
 950                         emit_store_dst(jd, iptr, d);
 951                         break;
 952
 953                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
 954                                       /* sx.val.l = constant                          */
 955
 956                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 957                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 958                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 65535))
 959                                 M_XOR_IMM(s1, iptr->sx.val.l, d);
 960                         else {
 961                                 LCONST(REG_ITMP3, iptr->sx.val.l);
 962                                 M_XOR(s1, REG_ITMP3, d);
 963                         }
 964                         emit_store_dst(jd, iptr, d);
 965                         break;
 966
 967                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
 968
 969                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 970                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 971                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
 972                         /* XXX implement me!!! */
 973                         emit_store_dst(jd, iptr, d);
 974                         break;
 975                         break;
 976
 977
 978                 /* floating operations ************************************************/
 979
 980                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
 981
 982                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 983                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
 984                         M_FMOVN(s1, d);
 985                         emit_store_dst(jd, iptr, d);
 986                         break;
 987
 988                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
 989
 990                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 991                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
 992                         M_FMOVN(s1, d);
 993                         emit_store_dst(jd, iptr, d);
 994                         break;
 995
 996                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 997
 998                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 999                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1000                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1001                         M_FADD(s1, s2, d);
1002                         emit_store_dst(jd, iptr, d);
1003                         break;
1004
1005                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1006
1007                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1008                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1009                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1010                         M_DADD(s1, s2, d);
1011                         emit_store_dst(jd, iptr, d);
1012                         break;
1013
1014                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1015
1016                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1017                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1018                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1019                         M_FSUB(s1, s2, d);
1020                         emit_store_dst(jd, iptr, d);
1021                         break;
1022
1023                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1024
1025                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1026                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1027                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1028                         M_DSUB(s1, s2, d);
1029                         emit_store_dst(jd, iptr, d);
1030                         break;
1031
1032                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1033
1034                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1035                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1036                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1037                         M_FMUL(s1, s2, d);
1038                         emit_store_dst(jd, iptr, d);
1039                         break;
1040
1041                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1042
1043                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1044                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1045                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1046                         M_DMUL(s1, s2, d);
1047                         emit_store_dst(jd, iptr, d);
1048                         break;
1049
1050                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1051
1052                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1053                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1054                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1055                         M_FDIV(s1, s2, d);
1056                         emit_store_dst(jd, iptr, d);
1057                         break;
1058
1059                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1060
1061                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1062                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1063                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1064                         M_DDIV(s1, s2, d);
1065                         emit_store_dst(jd, iptr, d);
1066                         break;
1067
1068                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1069                 case ICMD_D2I:
1070
1071                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1072                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1073                         M_CLR(d);
1074                         disp = dseg_addfloat(cd, 0.0);
1075                         M_FLD(REG_FTMP2, REG_PV, disp);
1076                         M_FCMPU(s1, REG_FTMP2);
1077                         M_BNAN(4);
1078                         disp = dseg_adds4(cd, 0);
1079                         M_CVTDL_C(s1, REG_FTMP1);
1080                         M_LDA(REG_ITMP1, REG_PV, disp);
1081                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1082                         M_ILD(d, REG_PV, disp);
1083                         emit_store_dst(jd, iptr, d);
1084                         break;
1085
1086                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1087
1088                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1089                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1090                         M_FLTMOVE(s1, d);
1091                         emit_store_dst(jd, iptr, d);
1092                         break;
1093
1094                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1095
1096                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1097                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1098                         M_CVTDF(s1, d);
1099                         emit_store_dst(jd, iptr, d);
1100                         break;
1101
1102                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1103                 case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                     */
1104
1105
1106                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1107                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1108                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1109                         M_FCMPU(s2, s1);
1110                         M_IADD_IMM(REG_ZERO, -1, d);
1111                         M_BNAN(4);
1112                         M_BGT(3);
1113                         M_IADD_IMM(REG_ZERO, 0, d);
1114                         M_BGE(1);
1115                         M_IADD_IMM(REG_ZERO, 1, d);
1116                         emit_store_dst(jd, iptr, d);
1117                         break;
1118
1119                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1120                 case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                     */
1121
1122                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1123                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1124                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1125                         M_FCMPU(s1, s2);
1126                         M_IADD_IMM(REG_ZERO, 1, d);
1127                         M_BNAN(4);
1128                         M_BGT(3);
1129                         M_IADD_IMM(REG_ZERO, 0, d);
1130                         M_BGE(1);
1131                         M_IADD_IMM(REG_ZERO, -1, d);
1132                         emit_store_dst(jd, iptr, d);
1133                         break;
1134
1135                 case ICMD_IF_FCMPEQ:    /* ..., value, value ==> ...                  */
1136                 case ICMD_IF_DCMPEQ:
1137
1138                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1139                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1140                         M_FCMPU(s1, s2);
1141                         M_BNAN(1);
1142                         M_BEQ(0);
1143                         codegen_addreference(cd, iptr->dst.block);
1144                         break;
1145
1146                 case ICMD_IF_FCMPNE:    /* ..., value, value ==> ...                  */
1147                 case ICMD_IF_DCMPNE:
1148
1149                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1150                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1151                         M_FCMPU(s1, s2);
1152                         M_BNAN(0);
1153                         codegen_addreference(cd, iptr->dst.block);
1154                         M_BNE(0);
1155                         codegen_addreference(cd, iptr->dst.block);
1156                         break;
1157
1158
1159                 case ICMD_IF_FCMPL_LT:  /* ..., value, value ==> ...                  */
1160                 case ICMD_IF_DCMPL_LT:
1161
1162                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1163                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1164                         M_FCMPU(s1, s2);
1165                         M_BNAN(0);
1166                         codegen_addreference(cd, iptr->dst.block);
1167                         M_BLT(0);
1168                         codegen_addreference(cd, iptr->dst.block);
1169                         break;
1170
1171                 case ICMD_IF_FCMPL_GT:  /* ..., value, value ==> ...                  */
1172                 case ICMD_IF_DCMPL_GT:
1173
1174                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1175                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1176                         M_FCMPU(s1, s2);
1177                         M_BNAN(1);
1178                         M_BGT(0);
1179                         codegen_addreference(cd, iptr->dst.block);
1180                         break;
1181
1182                 case ICMD_IF_FCMPL_LE:  /* ..., value, value ==> ...                  */
1183                 case ICMD_IF_DCMPL_LE:
1184
1185                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1186                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1187                         M_FCMPU(s1, s2);
1188                         M_BNAN(0);
1189                         codegen_addreference(cd, iptr->dst.block);
1190                         M_BLE(0);
1191                         codegen_addreference(cd, iptr->dst.block);
1192                         break;
1193
1194                 case ICMD_IF_FCMPL_GE:  /* ..., value, value ==> ...                  */
1195                 case ICMD_IF_DCMPL_GE:
1196
1197                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1198                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1199                         M_FCMPU(s1, s2);
1200                         M_BNAN(1);
1201                         M_BGE(0);
1202                         codegen_addreference(cd, iptr->dst.block);
1203                         break;
1204
1205                 case ICMD_IF_FCMPG_LT:  /* ..., value, value ==> ...                  */
1206                 case ICMD_IF_DCMPG_LT:
1207
1208                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1209                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1210                         M_FCMPU(s1, s2);
1211                         M_BNAN(1);
1212                         M_BLT(0);
1213                         codegen_addreference(cd, iptr->dst.block);
1214                         break;
1215
1216                 case ICMD_IF_FCMPG_GT:  /* ..., value, value ==> ...                  */
1217                 case ICMD_IF_DCMPG_GT:
1218
1219                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1220                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1221                         M_FCMPU(s1, s2);
1222                         M_BNAN(0);
1223                         codegen_addreference(cd, iptr->dst.block);
1224                         M_BGT(0);
1225                         codegen_addreference(cd, iptr->dst.block);
1226                         break;
1227
1228                 case ICMD_IF_FCMPG_LE:  /* ..., value, value ==> ...                  */
1229                 case ICMD_IF_DCMPG_LE:
1230
1231                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1232                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1233                         M_FCMPU(s1, s2);
1234                         M_BNAN(1);
1235                         M_BLE(0);
1236                         codegen_addreference(cd, iptr->dst.block);
1237                         break;
1238
1239                 case ICMD_IF_FCMPG_GE:  /* ..., value, value ==> ...                  */
1240                 case ICMD_IF_DCMPG_GE:
1241
1242                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1243                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1244                         M_FCMPU(s1, s2);
1245                         M_BNAN(0);
1246                         codegen_addreference(cd, iptr->dst.block);
1247                         M_BGE(0);
1248                         codegen_addreference(cd, iptr->dst.block);
1249                         break;
1250
1251
1252                 /* memory operations **************************************************/
1253
1254                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1255
1256                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1257                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1258                         gen_nullptr_check(s1);
1259                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1260                         emit_store_dst(jd, iptr, d);
1261                         break;
1262
1263                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1264
1265                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1266                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1267                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1268                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1269                                 gen_nullptr_check(s1);
1270                                 gen_bound_check;
1271                         }
1272                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1273                         M_LBZX(d, s1, REG_ITMP2);
1274                         M_BSEXT(d, d);
1275                         emit_store_dst(jd, iptr, d);
1276                         break;
1277
1278                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1279
1280                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1281                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1282                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1283                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1284                                 gen_nullptr_check(s1);
1285                                 gen_bound_check;
1286                         }
1287                         M_SLL_IMM(s2, 1, REG_ITMP2);
1288                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1289                         M_LHAX(d, s1, REG_ITMP2);
1290                         emit_store_dst(jd, iptr, d);
1291                         break;
1292
1293                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1294
1295                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1296                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1297                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1298                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1299                                 gen_nullptr_check(s1);
1300                                 gen_bound_check;
1301                         }
1302                         M_SLL_IMM(s2, 1, REG_ITMP2);
1303                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1304                         M_LHAX(d, s1, REG_ITMP2);
1305                         emit_store_dst(jd, iptr, d);
1306                         break;
1307
1308                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1309
1310                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1311                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1312                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1313                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1314                                 gen_nullptr_check(s1);
1315                                 gen_bound_check;
1316                         }
1317                         M_SLL_IMM(s2, 2, REG_ITMP2);
1318                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1319                         M_LWZX(d, s1, REG_ITMP2);
1320                         emit_store_dst(jd, iptr, d);
1321                         break;
1322
1323                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1324
1325                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1326                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1327                         d = codegen_reg_of_dst(jd, iptr, PACK_REGS(REG_ITMP2, REG_ITMP1));
1328                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1329                                 gen_nullptr_check(s1);
1330                                 gen_bound_check;
1331                         }
1332                         M_SLL_IMM(s2, 3, REG_ITMP2);
1333                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1334                         M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1335                         emit_store_dst(jd, iptr, d);
1336                         break;
1337
1338                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1339
1340                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1341                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1342                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1343                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1344                                 gen_nullptr_check(s1);
1345                                 gen_bound_check;
1346                         }
1347                         M_SLL_IMM(s2, 2, REG_ITMP2);
1348                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1349                         M_LFSX(d, s1, REG_ITMP2);
1350                         emit_store_dst(jd, iptr, d);
1351                         break;
1352
1353                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1354
1355                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1356                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1357                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1358                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1359                                 gen_nullptr_check(s1);
1360                                 gen_bound_check;
1361                         }
1362                         M_SLL_IMM(s2, 3, REG_ITMP2);
1363                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1364                         M_LFDX(d, s1, REG_ITMP2);
1365                         emit_store_dst(jd, iptr, d);
1366                         break;
1367
1368                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1369
1370                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1371                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1372                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1373                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1374                                 gen_nullptr_check(s1);
1375                                 gen_bound_check;
1376                         }
1377                         M_SLL_IMM(s2, 3, REG_ITMP2);
1378                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1379                         M_ALDX(d, s1, REG_ITMP2);
1380                         emit_store_dst(jd, iptr, d);
1381                         break;
1382
1383
1384                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1385
1386                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1387                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1388                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1389                                 gen_nullptr_check(s1);
1390                                 gen_bound_check;
1391                         }
1392                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1393                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1394                         M_STBX(s3, s1, REG_ITMP2);
1395                         break;
1396
1397                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1398
1399                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1400                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1401                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1402                                 gen_nullptr_check(s1);
1403                                 gen_bound_check;
1404                         }
1405                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1406                         M_SLL_IMM(s2, 1, REG_ITMP2);
1407                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1408                         M_STHX(s3, s1, REG_ITMP2);
1409                         break;
1410
1411                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1412
1413                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1414                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1415                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1416                                 gen_nullptr_check(s1);
1417                                 gen_bound_check;
1418                         }
1419                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1420                         M_SLL_IMM(s2, 1, REG_ITMP2);
1421                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1422                         M_STHX(s3, s1, REG_ITMP2);
1423                         break;
1424
1425                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1426
1427                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1428                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1429                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1430                                 gen_nullptr_check(s1);
1431                                 gen_bound_check;
1432                         }
1433                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1434                         M_SLL_IMM(s2, 2, REG_ITMP2);
1435                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1436                         M_STWX(s3, s1, REG_ITMP2);
1437                         break;
1438
1439                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1440
1441                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1442                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1443                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1444                                 gen_nullptr_check(s1);
1445                                 gen_bound_check;
1446                         }
1447                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1448                         M_SLL_IMM(s2, 3, REG_ITMP2);
1449                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1450                         M_LSTX(s3, s1, REG_ITMP2);
1451                         break;
1452
1453                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1454
1455                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1456                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1457                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1458                                 gen_nullptr_check(s1);
1459                                 gen_bound_check;
1460                         }
1461                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1462                         M_SLL_IMM(s2, 2, REG_ITMP2);
1463                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1464                         M_STFSX(s3, s1, REG_ITMP2);
1465                         break;
1466
1467                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1468
1469                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1470                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1471                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1472                                 gen_nullptr_check(s1);
1473                                 gen_bound_check;
1474                         }
1475                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1476                         M_SLL_IMM(s2, 3, REG_ITMP2);
1477                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1478                         M_STFDX(s3, s1, REG_ITMP2);
1479                         break;
1480
1481                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1482
1483                         s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
1484                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1485                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1486                                 gen_nullptr_check(s1);
1487                                 gen_bound_check;
1488                         }
1489                         s3 = emit_load_s3(jd, iptr, rd->argintregs[1]);
1490
1491                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1492                         M_ALD(REG_ITMP3, REG_PV, disp);
1493                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
1494                         M_MTCTR(REG_ITMP3);
1495
1496                         M_INTMOVE(s1, rd->argintregs[0]);
1497                         M_INTMOVE(s3, rd->argintregs[1]);
1498
1499                         M_JSR;
1500                         M_TST(REG_RESULT);
1501                         M_BEQ(0);
1502                         codegen_add_arraystoreexception_ref(cd);
1503
1504                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1505                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1506                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1507                         M_SLL_IMM(s2, 3, REG_ITMP2);
1508                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1509                         M_ASTX(s3, s1, REG_ITMP2);
1510                         break;
1511
1512
1513                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1514
1515                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1516                                 uf = iptr->sx.s23.s3.uf;
1517
1518                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1519                                 disp = dseg_addaddress(cd, NULL);
1520
1521                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1522                                                                         iptr->sx.s23.s3.uf, disp);
1523
1524                                 if (opt_showdisassemble)
1525                                         M_NOP;
1526
1527                         } else {
1528                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1529
1530                                 fieldtype = fi->type;
1531                                 disp = dseg_addaddress(cd, &(fi->value));
1532
1533                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1534                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1535
1536                                         if (opt_showdisassemble)
1537                                                 M_NOP;
1538                                 }
1539                         }
1540
1541                         M_ALD(REG_ITMP1, REG_PV, disp);
1542                         switch (fieldtype) {
1543                         case TYPE_INT:
1544                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1545                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1546                                 break;
1547                         case TYPE_LNG:
1548                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1549                                 M_LLD(d, REG_ITMP1, 0);
1550                                 break;
1551                         case TYPE_ADR:
1552                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1553                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1554                                 break;
1555                         case TYPE_FLT:
1556                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1557                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1558                                 break;
1559                         case TYPE_DBL:
1560                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1561                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1562                                 break;
1563                         }
1564                         emit_store_dst(jd, iptr, d);
1565                         break;
1566
1567                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1568
1569
1570                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1571                                 uf = iptr->sx.s23.s3.uf;
1572
1573                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1574                                 disp = dseg_addaddress(cd, NULL);
1575
1576                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1577                                                                         iptr->sx.s23.s3.uf, disp);
1578
1579                                 if (opt_showdisassemble)
1580                                         M_NOP;
1581
1582                         } else {
1583                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1584
1585                                 fieldtype = fi->type;
1586                                 disp = dseg_addaddress(cd, &(fi->value));
1587
1588                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1589                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1590
1591                                         if (opt_showdisassemble)
1592                                                 M_NOP;
1593                                 }
1594                         }
1595
1596                         M_ALD(REG_ITMP1, REG_PV, disp);
1597                         switch (fieldtype) {
1598                         case TYPE_INT:
1599                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1600                                 M_IST_INTERN(s1, REG_ITMP1, 0);
1601                                 break;
1602                         case TYPE_LNG:
1603                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1604                                 M_LST_INTERN(s1, REG_ITMP1, 0);
1605                                 break;
1606                         case TYPE_ADR:
1607                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1608                                 M_AST_INTERN(s1, REG_ITMP1, 0);
1609                                 break;
1610                         case TYPE_FLT:
1611                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1612                                 M_FST_INTERN(s1, REG_ITMP1, 0);
1613                                 break;
1614                         case TYPE_DBL:
1615                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1616                                 M_DST_INTERN(s1, REG_ITMP1, 0);
1617                                 break;
1618                         }
1619                         break;
1620
1621
1622                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1623
1624                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1625                         gen_nullptr_check(s1);
1626
1627                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1628                                 uf = iptr->sx.s23.s3.uf;
1629                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1630                                 disp = 0;
1631
1632                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1633
1634                                 if (opt_showdisassemble)
1635                                         M_NOP;
1636
1637                         } else {
1638                                 fi = iptr->sx.s23.s3.fmiref->p.field;
1639                                 fieldtype = fi->type;
1640                                 disp = fi->offset;
1641                         }
1642
1643                         switch (fieldtype) {
1644                         case TYPE_INT:
1645                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1646                                 M_ILD(d, s1, disp);
1647                                 break;
1648                         case TYPE_LNG:
1649                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1650                                 M_LLD(d, s1, disp);
1651                                 break;
1652                         case TYPE_ADR:
1653                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1654                                 M_ALD(d, s1, disp);
1655                                 break;
1656                         case TYPE_FLT:
1657                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1658                                 M_FLD(d, s1, disp);
1659                                 break;
1660                         case TYPE_DBL:
1661                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1662                                 M_DLD(d, s1, disp);
1663                                 break;
1664                         }
1665                         emit_store_dst(jd, iptr, d);
1666                         break;
1667
1668                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1669
1670                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1671                         gen_nullptr_check(s1);
1672
1673                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1674                                 uf        = iptr->sx.s23.s3.uf;
1675                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1676                                 disp      = 0;
1677                         }
1678                         else {
1679                                 fi        = iptr->sx.s23.s3.fmiref->p.field;
1680                                 fieldtype = fi->type;
1681                                 disp      = fi->offset;
1682                         }
1683
1684                         if (IS_INT_LNG_TYPE(fieldtype)) {
1685                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1686                         }
1687                         else
1688                                 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1689
1690                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1691                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1692
1693                                 if (opt_showdisassemble)
1694                                         M_NOP;
1695                         }
1696
1697
1698                         switch (fieldtype) {
1699                         case TYPE_INT:
1700                                 M_IST(s2, s1, disp);
1701                                 break;
1702                         case TYPE_LNG:
1703                                 M_LST(s2, s1, disp);
1704                                 break;
1705                         case TYPE_ADR:
1706                                 M_AST(s2, s1, disp);
1707                                 break;
1708                         case TYPE_FLT:
1709                                 M_FST(s2, s1, disp);
1710                                 break;
1711                         case TYPE_DBL:
1712                                 M_DST(s2, s1, disp);
1713                                 break;
1714                         }
1715                         break;
1716
1717
1718                 /* branch operations **************************************************/
1719
1720                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1721
1722                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1723                         M_LNGMOVE(s1, REG_ITMP1_XPTR);
1724
1725 #ifdef ENABLE_VERIFIER
1726                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1727                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1728                                                                         iptr->sx.s23.s2.uc, 0);
1729
1730                                 if (opt_showdisassemble)
1731                                         M_NOP;
1732                         }
1733 #endif /* ENABLE_VERIFIER */
1734
1735                         disp = dseg_addaddress(cd, asm_handle_exception);
1736                         M_ALD(REG_ITMP2, REG_PV, disp);
1737                         M_MTCTR(REG_ITMP2);
1738
1739                         if (jd->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
1740                         M_BL(0);                                        /* get current PC */
1741                         M_MFLR(REG_ITMP2_XPC);
1742                         if (jd->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
1743                         M_RTS;                                          /* jump to CTR    */
1744
1745                         ALIGNCODENOP;
1746                         break;
1747
1748                 case ICMD_GOTO:         /* ... ==> ...                                */
1749                 case ICMD_RET:          /* ... ==> ...                                */
1750
1751                         M_BR(0);
1752                         codegen_addreference(cd, iptr->dst.block);
1753                         ALIGNCODENOP;
1754                         break;
1755
1756                 case ICMD_JSR:          /* ... ==> ...                                */
1757
1758                         M_BR(0);
1759                         codegen_addreference(cd, iptr->sx.s23.s3.jsrtarget.block);
1760                         ALIGNCODENOP;
1761                         break;
1762
1763                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1764
1765                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1766                         M_TST(s1);
1767                         M_BEQ(0);
1768                         codegen_addreference(cd, iptr->dst.block);
1769                         break;
1770
1771                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
1772
1773                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1774                         M_TST(s1);
1775                         M_BNE(0);
1776                         codegen_addreference(cd, iptr->dst.block);
1777                         break;
1778
1779                 case ICMD_IFLT:
1780                 case ICMD_IFLE:
1781                 case ICMD_IFNE:
1782                 case ICMD_IFGT:
1783                 case ICMD_IFGE:
1784                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
1785
1786                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1787                         if ((iptr->sx.val.i >= -32768) && (iptr->sx.val.i <= 32767))
1788                                 M_CMPI(s1, iptr->sx.val.i);
1789                         else {
1790                                 ICONST(REG_ITMP2, iptr->sx.val.i);
1791                                 M_CMP(s1, REG_ITMP2);
1792                         }
1793                         switch (iptr->opc) {
1794                         case ICMD_IFLT:
1795                                 M_BLT(0);
1796                                 break;
1797                         case ICMD_IFLE:
1798                                 M_BLE(0);
1799                                 break;
1800                         case ICMD_IFNE:
1801                                 M_BNE(0);
1802                                 break;
1803                         case ICMD_IFGT:
1804                                 M_BGT(0);
1805                                 break;
1806                         case ICMD_IFGE:
1807                                 M_BGE(0);
1808                                 break;
1809                         case ICMD_IFEQ:
1810                                 M_BEQ(0);
1811                                 break;
1812                         }
1813                         codegen_addreference(cd, iptr->dst.block);
1814                         break;
1815
1816                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1817                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1818                         LCONST(REG_ITMP2, iptr->sx.val.l);
1819                         M_CMP(s1, REG_ITMP2);
1820                         M_BEQ(0);
1821                         codegen_addreference(cd, iptr->dst.block);
1822                         break;
1823                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1824                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1825                         LCONST(REG_ITMP2, iptr->sx.val.l);
1826                         M_CMP(s1, REG_ITMP2);
1827                         M_BLT(0);
1828                         codegen_addreference(cd, iptr->dst.block);
1829                         break;
1830                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1831                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1832                         LCONST(REG_ITMP2, iptr->sx.val.l);
1833                         M_CMP(s1, REG_ITMP2);
1834                         M_BLE(0);
1835                         codegen_addreference(cd, iptr->dst.block);
1836                         break;
1837
1838                 case ICMD_IF_LNE:       /* ..., value ==> ... */
1839                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1840                         LCONST(REG_ITMP2, iptr->sx.val.l);
1841                         M_CMP(s1, REG_ITMP2);
1842                         M_BNE(0);
1843                         codegen_addreference(cd, iptr->dst.block);
1844                         break;
1845                 case ICMD_IF_LGE:       /* ..., value ==> ... */
1846                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1847                         LCONST(REG_ITMP2, iptr->sx.val.l);
1848                         M_CMP(s1, REG_ITMP2);
1849                         M_BGE(0);
1850                         codegen_addreference(cd, iptr->dst.block);
1851                         break;
1852                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1853                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1854                         LCONST(REG_ITMP2, iptr->sx.val.l);
1855                         M_CMP(s1, REG_ITMP2);
1856                         M_BGT(0);
1857                         codegen_addreference(cd, iptr->dst.block);
1858                         break;
1859                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
1860                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
1861                 case ICMD_IF_LCMPEQ:
1862
1863                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1864                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1865                         M_CMP(s1, s2);
1866                         M_BEQ(0);
1867                         codegen_addreference(cd, iptr->dst.block);
1868                         break;
1869
1870                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
1871                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
1872                 case ICMD_IF_LCMPNE:
1873
1874                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1875                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1876                         M_CMP(s1, s2);
1877                         M_BNE(0);
1878                         codegen_addreference(cd, iptr->dst.block);
1879                         break;
1880
1881
1882                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
1883                 case ICMD_IF_LCMPLT:
1884
1885                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1886                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1887                         M_CMP(s1, s2);
1888                         M_BLT(0);
1889                         codegen_addreference(cd, iptr->dst.block);
1890                         break;
1891
1892                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
1893                 case ICMD_IF_LCMPGT:
1894
1895                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1896                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1897                         M_CMP(s1, s2);
1898                         M_BGT(0);
1899                         codegen_addreference(cd, iptr->dst.block);
1900                         break;
1901
1902                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
1903                 case ICMD_IF_LCMPLE:
1904
1905                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1906                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1907                         M_CMP(s1, s2);
1908                         M_BLE(0);
1909                         codegen_addreference(cd, iptr->dst.block);
1910                         break;
1911
1912                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
1913                 case ICMD_IF_LCMPGE:
1914
1915                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1916                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1917                         M_CMP(s1, s2);
1918                         M_BGE(0);
1919                         codegen_addreference(cd, iptr->dst.block);
1920                         break;
1921
1922
1923                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
1924                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
1925
1926                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
1927                         M_LNGMOVE(s1, REG_RESULT);
1928                         goto nowperformreturn;
1929
1930                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
1931
1932                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
1933                         M_LNGMOVE(s1, REG_RESULT);
1934
1935 #ifdef ENABLE_VERIFIER
1936                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1937                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1938                                                                         iptr->sx.s23.s2.uc, 0);
1939
1940                                 if (opt_showdisassemble)
1941                                         M_NOP;
1942                         }
1943 #endif /* ENABLE_VERIFIER */
1944
1945                         goto nowperformreturn;
1946
1947                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
1948                 case ICMD_DRETURN:
1949
1950                         s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1951                         M_FLTMOVE(s1, REG_FRESULT);
1952                         goto nowperformreturn;
1953
1954                 case ICMD_RETURN:      /* ...  ==> ...                                */
1955
1956 nowperformreturn:
1957                         {
1958                         s4 i, p;
1959
1960                         p = cd->stackframesize;
1961
1962                         /* call trace function */
1963
1964 #if !defined(NDEBUG)
1965                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
1966                                 emit_verbosecall_exit(jd);
1967                         }
1968 #endif
1969
1970 #if defined(ENABLE_THREADS)
1971                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
1972                                 disp = dseg_addaddress(cd, LOCK_monitor_exit);
1973                                 M_ALD(REG_ITMP3, REG_PV, disp);
1974                                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
1975                                 M_MTCTR(REG_ITMP3);
1976
1977                                 /* we need to save the proper return value */
1978
1979                                 switch (iptr->opc) {
1980                                 case ICMD_LRETURN:
1981                                 case ICMD_IRETURN:
1982                                 case ICMD_ARETURN:
1983                                         /* fall through */
1984                                         M_LST(REG_RESULT , REG_SP, rd->memuse * 8 + 8);
1985                                         break;
1986                                 case ICMD_FRETURN:
1987                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1988                                         break;
1989                                 case ICMD_DRETURN:
1990                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
1991                                         break;
1992                                 }
1993
1994                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
1995                                 M_JSR;
1996
1997                                 /* and now restore the proper return value */
1998
1999                                 switch (iptr->opc) {
2000                                 case ICMD_LRETURN:
2001                                 case ICMD_IRETURN:
2002                                 case ICMD_ARETURN:
2003                                         /* fall through */
2004                                         M_LLD(REG_RESULT , REG_SP, rd->memuse * 8 + 8);
2005                                         break;
2006                                 case ICMD_FRETURN:
2007                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
2008                                         break;
2009                                 case ICMD_DRETURN:
2010                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8 + 8);
2011                                         break;
2012                                 }
2013                         }
2014 #endif
2015
2016                         /* restore return address                                         */
2017
2018                         if (!jd->isleafmethod) {
2019                                 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
2020                                    may have a displacement overflow. */
2021
2022                                 M_ALD(REG_ITMP1, REG_SP, p * 8 + LA_LR_OFFSET);
2023                                 M_MTLR(REG_ITMP1);
2024                         }
2025
2026                         /* restore saved registers                                        */
2027
2028                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2029                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2030                         }
2031                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2032                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2033                         }
2034
2035                         /* deallocate stack                                               */
2036
2037                         if (cd->stackframesize)
2038                                 M_LDA(REG_SP, REG_SP, cd->stackframesize * 8);
2039
2040                         M_RET;
2041                         ALIGNCODENOP;
2042                         }
2043                         break;
2044
2045
2046                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2047                         {
2048                         s4 i, l;
2049                         branch_target_t *table;
2050
2051                         table = iptr->dst.table;
2052
2053                         l = iptr->sx.s23.s2.tablelow;
2054                         i = iptr->sx.s23.s3.tablehigh;
2055
2056                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2057                         if (l == 0) {
2058                                 M_INTMOVE(s1, REG_ITMP1);
2059                         } else if (l <= 32768) {
2060                                 M_LDA(REG_ITMP1, s1, -l);
2061                         } else {
2062                                 ICONST(REG_ITMP2, l);
2063                                 M_SUB(s1, REG_ITMP2, REG_ITMP1);
2064                         }
2065
2066                         /* number of targets */
2067                         i = i - l + 1;
2068
2069                         /* range check */
2070
2071                         M_CMPUI(REG_ITMP1, i - 1);
2072                         M_BGT(0);
2073                         codegen_addreference(cd, table[0].block);
2074
2075                         /* build jump table top down and use address of lowest entry */
2076
2077                         table += i;
2078
2079                         while (--i >= 0) {
2080                                 dseg_addtarget(cd, table->block);
2081                                 --table;
2082                                 }
2083                         }
2084
2085                         /* length of dataseg after last dseg_addtarget is used by load */
2086
2087                         M_SLL_IMM(REG_ITMP1, 3, REG_ITMP1);
2088                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2089                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2090                         M_MTCTR(REG_ITMP2);
2091                         M_RTS;
2092                         ALIGNCODENOP;
2093                         break;
2094
2095
2096                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2097                         {
2098                         s4 i, val;
2099                         lookup_target_t *lookup;
2100
2101                         lookup = iptr->dst.lookup;
2102
2103                         i = iptr->sx.s23.s2.lookupcount;
2104
2105                         MCODECHECK((i<<2)+8);
2106                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2107                         while (--i >= 0) {
2108                                 val = lookup->value;
2109                                 if ((val >= -32768) && (val <= 32767)) {
2110                                         M_CMPI(s1, val);
2111                                 } else {
2112                                         a = dseg_adds4(cd, val);
2113                                         M_ILD(REG_ITMP2, REG_PV, a);
2114                                         M_CMP(s1, REG_ITMP2);
2115                                 }
2116                                 M_BEQ(0);
2117                                 codegen_addreference(cd, lookup->target.block);
2118                                 ++lookup;
2119                         }
2120
2121                         M_BR(0);
2122                         codegen_addreference(cd, iptr->sx.s23.s3.lookupdefault.block);
2123
2124                         ALIGNCODENOP;
2125                         break;
2126                         }
2127
2128
2129                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2130
2131                         bte = iptr->sx.s23.s3.bte;
2132                         md = bte->md;
2133                         goto gen_method;
2134
2135                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2136                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2137                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2138                 case ICMD_INVOKEINTERFACE:
2139
2140                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2141                                 md = iptr->sx.s23.s3.um->methodref->parseddesc.md;
2142                                 lm = NULL;
2143                         }
2144                         else {
2145                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2146                                 md = lm->parseddesc;
2147                         }
2148
2149 gen_method:
2150                         s3 = md->paramcount;
2151
2152                         MCODECHECK((s3 << 1) + 64);
2153
2154                         /* copy arguments to registers or stack location */
2155
2156                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2157                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2158
2159                                 if (var->flags & PREALLOC)
2160                                         continue;
2161
2162                                 if (IS_INT_LNG_TYPE(var->type)) {
2163                                         if (!md->params[s3].inmemory) {
2164                                                 s1 = rd->argintregs[md->params[s3].regoff];
2165                                                 d = emit_load(jd, iptr, var, s1);
2166                                                 M_LNGMOVE(d, s1);
2167                                         } else {
2168                                                 d = emit_load(jd, iptr, var, REG_ITMP1);
2169                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
2170                                         }
2171                                 } else {
2172                                         if (!md->params[s3].inmemory) {
2173                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2174                                                 d = emit_load(jd, iptr, var, s1);
2175                                                 M_FLTMOVE(d, s1);
2176                                         } else {
2177                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2178                                                 if (IS_2_WORD_TYPE(var->type))
2179                                                         M_DST(d, REG_SP, md->params[s3].regoff * 8);
2180                                                 else
2181                                                         M_DST(d, REG_SP, md->params[s3].regoff * 8);    /* F XXX */
2182                                         }
2183                                 }
2184                         } /* end of for */
2185
2186                         switch (iptr->opc) {
2187                         case ICMD_BUILTIN:
2188                                 disp = dseg_addaddress(cd, bte->fp);
2189                                 d = md->returntype.type;
2190
2191                                 M_ALD(REG_PV, REG_PV, disp);    /* pointer to built-in-function descriptor */
2192                                 M_ALD(REG_ITMP1, REG_PV, 0);    /* function entry point address, what about TOC */
2193                                 M_MTCTR(REG_ITMP1);
2194                                 M_JSR;
2195
2196                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2197                                 M_MFLR(REG_ITMP1);
2198                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2199
2200
2201                                 if (INSTRUCTION_MUST_CHECK(iptr)) {
2202                                         M_CMPI(REG_RESULT, 0);
2203                                         M_BEQ(0);
2204                                         codegen_add_fillinstacktrace_ref(cd);
2205                                 }
2206                                 break;
2207
2208                         case ICMD_INVOKESPECIAL:
2209                                 gen_nullptr_check(rd->argintregs[0]);
2210                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2211                                 /* fall through */
2212
2213                         case ICMD_INVOKESTATIC:
2214                                 if (lm == NULL) {
2215                                         unresolved_method *um = iptr->sx.s23.s3.um;
2216
2217                                         disp = dseg_addaddress(cd, NULL);
2218
2219                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2220                                                                                 um, disp);
2221
2222                                         if (opt_showdisassemble)
2223                                                 M_NOP;
2224
2225                                         d = md->returntype.type;
2226
2227                                 } else {
2228                                         disp = dseg_addaddress(cd, lm->stubroutine);
2229                                         d = md->returntype.type;
2230                                 }
2231
2232                                 M_NOP;
2233                                 M_ALD(REG_PV, REG_PV, disp);
2234                                 M_MTCTR(REG_PV);
2235                                 M_JSR;
2236                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2237                                 M_MFLR(REG_ITMP1);
2238                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2239                                 break;
2240
2241                         case ICMD_INVOKEVIRTUAL:
2242                                 gen_nullptr_check(rd->argintregs[0]);
2243
2244                                 if (lm == NULL) {
2245                                         unresolved_method *um = iptr->sx.s23.s3.um;
2246
2247                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2248
2249                                         if (opt_showdisassemble)
2250                                                 M_NOP;
2251
2252                                         s1 = 0;
2253                                         d = md->returntype.type;
2254
2255                                 } else {
2256                                         s1 = OFFSET(vftbl_t, table[0]) +
2257                                                 sizeof(methodptr) * lm->vftblindex;
2258                                         d = md->returntype.type;
2259                                 }
2260
2261                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2262                                           OFFSET(java_objectheader, vftbl));
2263                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2264                                 M_MTCTR(REG_PV);
2265                                 M_JSR;
2266                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2267                                 M_MFLR(REG_ITMP1);
2268                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2269                                 break;
2270
2271                         case ICMD_INVOKEINTERFACE:
2272                                 gen_nullptr_check(rd->argintregs[0]);
2273
2274                                 if (lm == NULL) {
2275                                         unresolved_method *um = iptr->sx.s23.s3.um;
2276
2277                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2278
2279                                         if (opt_showdisassemble)
2280                                                 M_NOP;
2281
2282                                         s1 = 0;
2283                                         s2 = 0;
2284                                         d = md->returntype.type;
2285
2286                                 } else {
2287                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2288                                                 sizeof(methodptr*) * lm->class->index;
2289
2290                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2291
2292                                         d = md->returntype.type;
2293                                 }
2294
2295                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2296                                           OFFSET(java_objectheader, vftbl));
2297                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2298                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2299                                 M_MTCTR(REG_PV);
2300                                 M_JSR;
2301                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2302                                 M_MFLR(REG_ITMP1);
2303                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2304                                 break;
2305                         }
2306
2307                         /* d contains return type */
2308
2309                         if (d != TYPE_VOID) {
2310                                 if (IS_INT_LNG_TYPE(d)) {
2311                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2312                                         M_MOV(REG_RESULT, s1);
2313                                 } else {
2314                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2315                                         M_FLTMOVE(REG_FRESULT, s1);
2316                                 }
2317                                 emit_store_dst(jd, iptr, s1);
2318                         }
2319                         break;
2320
2321
2322                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2323                                       /* val.a: (classinfo*) superclass               */
2324
2325                         /*  superclass is an interface:
2326                          *
2327                          *  OK if ((sub == NULL) ||
2328                          *         (sub->vftbl->interfacetablelength > super->index) &&
2329                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2330                          *
2331                          *  superclass is a class:
2332                          *
2333                          *  OK if ((sub == NULL) || (0
2334                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2335                          *         super->vftbl->diffvall));
2336                          */
2337
2338                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2339                                 /* object type cast-check */
2340
2341                                 classinfo *super;
2342                                 s4         superindex;
2343
2344                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2345                                         super = NULL;
2346                                         superindex = 0;
2347                                 } else {
2348                                         super = iptr->sx.s23.s3.c.cls;
2349                                         superindex = super->index;
2350                                 }
2351
2352 #if defined(ENABLE_THREADS)
2353                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2354 #endif
2355                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2356
2357                                 /* calculate interface checkcast code size */
2358
2359                                 s2 = 7;
2360                                 if (super == NULL)
2361                                         s2 += (opt_showdisassemble ? 1 : 0);
2362
2363                                 /* calculate class checkcast code size */
2364
2365                                 s3 = 9 + (s1 == REG_ITMP1);
2366                                 if (super == NULL)
2367                                         s3 += (opt_showdisassemble ? 1 : 0);
2368
2369                                 /* if class is not resolved, check which code to call */
2370
2371                                 if (super == NULL) {
2372                                         M_TST(s1);
2373                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2374
2375                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2376
2377                                         codegen_addpatchref(cd,
2378                                                                                 PATCHER_checkcast_instanceof_flags,
2379                                                                                 iptr->sx.s23.s3.c.ref,
2380                                                                                 disp);
2381
2382                                         if (opt_showdisassemble)
2383                                                 M_NOP;
2384
2385                                         M_ILD(REG_ITMP2, REG_PV, disp);
2386                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2387                                         M_BEQ(s2 + 1);
2388                                 }
2389
2390                                 /* interface checkcast code */
2391
2392                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2393                                         if (super == NULL) {
2394                                                 codegen_addpatchref(cd,
2395                                                                                         PATCHER_checkcast_instanceof_interface,
2396                                                                                         iptr->sx.s23.s3.c.ref,
2397                                                                                         0);
2398                                                 if (opt_showdisassemble)
2399                                                         M_NOP;
2400
2401                                         } else {
2402                                                 M_TST(s1);
2403                                                 M_BEQ(s2);
2404                                         }
2405
2406                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2407                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2408                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2409                                         M_BLE(0);
2410                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1?? */
2411                                         M_ALD(REG_ITMP3, REG_ITMP2,
2412                                                   OFFSET(vftbl_t, interfacetable[0]) -
2413                                                   superindex * sizeof(methodptr*));
2414                                         M_TST(REG_ITMP3);
2415                                         M_BEQ(0);
2416                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1??*/
2417
2418                                         if (!super)
2419                                                 M_BR(s3);
2420                                 }
2421
2422                                 /* class checkcast code */
2423
2424                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2425                                         if (super == NULL) {
2426                                                 disp = dseg_add_unique_address(cd, NULL);
2427                                                 codegen_addpatchref(cd, PATCHER_checkcast_class,
2428                                                                                         iptr->sx.s23.s3.c.ref,
2429                                                                                         disp);
2430                                                 if (opt_showdisassemble)
2431                                                         M_NOP;
2432                                         } else {
2433                                                 disp = dseg_addaddress(cd, super->vftbl);
2434                                                 M_TST(s1);
2435                                                 M_BEQ(s3);
2436                                         }
2437
2438                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2439 #if defined(ENABLE_THREADS)
2440                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2441 #endif
2442                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2443                                         M_ALD(REG_ITMP2, REG_PV, disp);
2444                                         if (s1 != REG_ITMP1) {
2445                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
2446                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2447 #if defined(ENABLE_THREADS)
2448                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2449 #endif
2450                                                 M_SUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
2451                                                 M_EXTSW(REG_ITMP3, REG_ITMP3);
2452                                         } else {
2453                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2454                                                 M_SUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
2455                                                 M_EXTSW(REG_ITMP3, REG_ITMP3);
2456                                                 M_ALD(REG_ITMP2, REG_PV, disp);
2457                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2458 #if defined(ENABLE_THREADS)
2459                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2460 #endif
2461                                         }
2462                                         M_CMPU(REG_ITMP3, REG_ITMP2);
2463                                         M_BGT(0);
2464                                         codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
2465                                 }
2466                                 d = codegen_reg_of_dst(jd, iptr, s1);
2467
2468                         } else {
2469                                 /* array type cast-check */
2470
2471                                 s1 = emit_load_s1(jd, iptr, rd->argintregs[0]);
2472                                 M_INTMOVE(s1, rd->argintregs[0]);
2473
2474
2475                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2476                                         disp = dseg_addaddress(cd, NULL);
2477                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
2478                                                                                 iptr->sx.s23.s3.c.ref,
2479                                                                                 disp);
2480
2481                                         if (opt_showdisassemble)
2482                                                 M_NOP;
2483                                 } else {
2484                                         disp = dseg_addaddress(cd, iptr->sx.s23.s3.c.cls);
2485                                 }
2486
2487                                 M_ALD(rd->argintregs[1], REG_PV, disp);
2488                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
2489                                 M_ALD(REG_ITMP2, REG_PV, disp);
2490                                 M_ALD(REG_ITMP2, REG_ITMP2, 0); /* TOC */
2491                                 M_MTCTR(REG_ITMP2);
2492                                 M_JSR;
2493                                 M_TST(REG_RESULT);
2494                                 M_BEQ(0);
2495                                 codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
2496
2497                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2498                                 d = codegen_reg_of_dst(jd, iptr, s1);
2499                         }
2500                         M_INTMOVE(s1, d);
2501                         emit_store_dst(jd, iptr, d);
2502                         break;
2503
2504                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2505                                       /* val.a: (classinfo*) superclass               */
2506
2507                         /*  superclass is an interface:
2508                          *
2509                          *  return (sub != NULL) &&
2510                          *         (sub->vftbl->interfacetablelength > super->index) &&
2511                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
2512                          *
2513                          *  superclass is a class:
2514                          *
2515                          *  return ((sub != NULL) && (0
2516                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2517                          *          super->vftbl->diffvall));
2518                          */
2519
2520                         {
2521                         classinfo *super;
2522                         vftbl_t   *supervftbl;
2523                         s4         superindex;
2524
2525                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2526                                 super = NULL;
2527                                 superindex = 0;
2528                                 supervftbl = NULL;
2529                         }
2530                         else {
2531                                 super = iptr->sx.s23.s3.c.cls;
2532                                 superindex = super->index;
2533                                 supervftbl = super->vftbl;
2534                         }
2535
2536 #if defined(ENABLE_THREADS)
2537             codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2538 #endif
2539                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2540                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2541                         if (s1 == d) {
2542                                 M_MOV(s1, REG_ITMP1);
2543                                 s1 = REG_ITMP1;
2544                         }
2545
2546                         /* calculate interface instanceof code size */
2547
2548                         s2 = 8;
2549                         if (!super)
2550                                 s2 += (opt_showdisassemble ? 1 : 0);
2551
2552                         /* calculate class instanceof code size */
2553
2554                         s3 = 10;
2555                         if (!super)
2556                                 s3 += (opt_showdisassemble ? 1 : 0);
2557
2558                         M_CLR(d);
2559
2560                         /* if class is not resolved, check which code to call */
2561
2562                         if (!super) {
2563                                 M_TST(s1);
2564                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2565
2566                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
2567
2568                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2569                                                                         iptr->sx.s23.s3.c.ref, disp);
2570
2571                                 if (opt_showdisassemble)
2572                                         M_NOP;
2573
2574                                 M_ILD(REG_ITMP3, REG_PV, disp);
2575                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
2576                                 M_BEQ(s2 + 1);
2577                         }
2578
2579                         /* interface instanceof code */
2580
2581                         if (!super || (super->flags & ACC_INTERFACE)) {
2582                                 if (super) {
2583                                         M_TST(s1);
2584                                         M_BEQ(s2);
2585
2586                                 } else {
2587                                         codegen_addpatchref(cd,
2588                                                                                 PATCHER_checkcast_instanceof_interface,
2589                                                                                 iptr->sx.s23.s3.c.ref, 0);
2590
2591                                         if (opt_showdisassemble)
2592                                                 M_NOP;
2593                                 }
2594
2595                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2596                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2597                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2598                                 M_BLE(4);
2599                                 M_ALD(REG_ITMP1, REG_ITMP1,
2600                                           OFFSET(vftbl_t, interfacetable[0]) -
2601                                           superindex * sizeof(methodptr*));
2602                                 M_TST(REG_ITMP1);
2603                                 M_BEQ(1);
2604                                 M_IADD_IMM(REG_ZERO, 1, d);
2605
2606                                 if (!super)
2607                                         M_BR(s3);
2608                         }
2609
2610                         /* class instanceof code */
2611
2612                         if (!super || !(super->flags & ACC_INTERFACE)) {
2613                                 disp = dseg_addaddress(cd, supervftbl);
2614
2615                                 if (super) {
2616                                         M_TST(s1);
2617                                         M_BEQ(s3);
2618
2619                                 } else {
2620                                         codegen_addpatchref(cd, PATCHER_instanceof_class,
2621                                                                                 iptr->sx.s23.s3.c.ref,
2622                                                                                 disp);
2623
2624                                         if (opt_showdisassemble) {
2625                                                 M_NOP;
2626                                         }
2627                                 }
2628
2629                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2630                                 M_ALD(REG_ITMP2, REG_PV, disp);
2631 #if defined(ENABLE_THREADS)
2632                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2633 #endif
2634                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2635                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2636                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2637 #if defined(ENABLE_THREADS)
2638                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2639 #endif
2640                                 M_SUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
2641                                 M_CMPU(REG_ITMP1, REG_ITMP2);
2642                                 M_CLR(d);
2643                                 M_BGT(1);
2644                                 M_IADD_IMM(REG_ZERO, 1, d);
2645                         }
2646                         emit_store_dst(jd, iptr, d);
2647                         }
2648                         break;
2649
2650                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2651
2652                         /* check for negative sizes and copy sizes to stack if necessary  */
2653
2654                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2655
2656                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2657
2658                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2659
2660                                 /* copy SAVEDVAR sizes to stack */
2661
2662                                 if (!(var->flags & PREALLOC)) {
2663                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2664 #if defined(__DARWIN__)
2665                                         M_LST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 8);
2666 #else
2667                                         M_LST(s2, REG_SP, LA_SIZE + (s1 + 3) * 8);
2668 #endif
2669                                 }
2670                         }
2671
2672                         /* a0 = dimension count */
2673
2674                         ICONST(rd->argintregs[0], iptr->s1.argcount);
2675
2676                         /* is patcher function set? */
2677
2678                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2679                                 disp = dseg_add_unique_address(cd, NULL);
2680
2681                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
2682                                                                         iptr->sx.s23.s3.c.ref, disp);
2683
2684                                 if (opt_showdisassemble)
2685                                         M_NOP;
2686
2687                         } else {
2688                                 disp = dseg_addaddress(cd, iptr->sx.s23.s3.c.cls);
2689                         }
2690
2691                         /* a1 = arraydescriptor */
2692
2693                         M_ALD(rd->argintregs[1], REG_PV, disp);
2694
2695                         /* a2 = pointer to dimensions = stack pointer */
2696
2697 #if defined(__DARWIN__)
2698                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 8);
2699 #else
2700                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 8);
2701 #endif
2702
2703                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
2704                         M_ALD(REG_ITMP3, REG_PV, disp);
2705                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
2706                         M_MTCTR(REG_ITMP3);
2707                         M_JSR;
2708
2709                         /* check for exception before result assignment */
2710
2711                         M_CMPI(REG_RESULT, 0);
2712                         M_BEQ(0);
2713                         codegen_add_fillinstacktrace_ref(cd);
2714
2715                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2716                         M_INTMOVE(REG_RESULT, d);
2717                         emit_store_dst(jd, iptr, d);
2718                         break;
2719
2720                 default:
2721                         *exceptionptr =
2722                                 new_internalerror("Unknown ICMD %d during code generation",
2723                                                                   iptr->opc);
2724                         return false;
2725         } /* switch */
2726
2727         } /* for instruction */
2728
2729         } /* if (bptr -> flags >= BBREACHED) */
2730         } /* for basic block */
2731
2732         dseg_createlinenumbertable(cd);
2733
2734
2735         /* generate exception and patcher stubs */
2736
2737         {
2738                 exceptionref *eref;
2739                 patchref     *pref;
2740                 u4            mcode;
2741                 u1           *savedmcodeptr;
2742                 u1           *tmpmcodeptr;
2743
2744                 savedmcodeptr = NULL;
2745
2746                 /* generate exception stubs */
2747
2748                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
2749                         md_codegen_patch_branch(cd, eref->branchpos, cd->mcodeptr - cd->mcodebase);
2750
2751                         MCODECHECK(100);
2752
2753                         /* Check if the exception is an
2754                            ArrayIndexOutOfBoundsException.  If so, move index register
2755                            into REG_ITMP1. */
2756
2757                         if (eref->reg != -1)
2758                                 M_MOV(eref->reg, REG_ITMP1);
2759
2760                         /* calcuate exception address */
2761
2762                         M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
2763
2764                         /* move function to call into REG_ITMP3 */
2765
2766                         disp = dseg_addaddress(cd, eref->function);
2767                         M_ALD(REG_ITMP3, REG_PV, disp);
2768                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
2769
2770                         if (savedmcodeptr != NULL) {
2771                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
2772                                 M_BR(disp);
2773
2774                         } else {
2775                                 savedmcodeptr = cd->mcodeptr;
2776
2777                                 if (jd->isleafmethod) {
2778                                         M_MFLR(REG_ZERO);
2779                                         M_AST(REG_ZERO, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2780                                 }
2781
2782                                 M_MOV(REG_PV, rd->argintregs[0]);
2783                                 M_MOV(REG_SP, rd->argintregs[1]);
2784
2785                                 if (jd->isleafmethod)
2786                                         M_MOV(REG_ZERO, rd->argintregs[2]);
2787                                 else
2788                                         M_ALD(rd->argintregs[2],
2789                                                   REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2790
2791                                 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
2792                                 M_MOV(REG_ITMP1, rd->argintregs[4]);
2793
2794                                 M_STDU(REG_SP, REG_SP, -(LA_SIZE + 6 * 8));
2795                                 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
2796
2797                                 M_MTCTR(REG_ITMP3);
2798                                 M_JSR;
2799                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
2800
2801                                 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
2802                                 M_LADD_IMM(REG_SP, LA_SIZE + 6 * 8, REG_SP);
2803
2804                                 if (jd->isleafmethod) {
2805                                         /* XXX FIXME: REG_ZERO can cause problems here! */
2806                                         assert(cd->stackframesize * 8 <= 32767);
2807
2808                                         M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
2809                                         M_MTLR(REG_ZERO);
2810                                 }
2811
2812                                 disp = dseg_addaddress(cd, asm_handle_exception);
2813                                 M_ALD(REG_ITMP3, REG_PV, disp);
2814                                 M_MTCTR(REG_ITMP3);
2815                                 M_RTS;
2816                         }
2817                 }
2818
2819
2820                 /* generate code patching stub call code */
2821
2822                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
2823                         /* check code segment size */
2824
2825                         MCODECHECK(16);
2826
2827                         /* Get machine code which is patched back in later. The
2828                            call is 1 instruction word long. */
2829
2830                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
2831
2832                         mcode = *((u4 *) tmpmcodeptr);
2833
2834                         /* Patch in the call to call the following code (done at
2835                            compile time). */
2836
2837                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
2838                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
2839
2840                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
2841                         M_BR(disp);
2842
2843                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
2844
2845                         /* create stack frame - keep stack 16-byte aligned */
2846
2847                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
2848
2849                         /* calculate return address and move it onto the stack */
2850
2851                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
2852                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
2853
2854                         /* move pointer to java_objectheader onto stack */
2855
2856 #if defined(ENABLE_THREADS)
2857                         /* order reversed because of data segment layout */
2858
2859                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
2860                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
2861                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
2862
2863                         M_LDA(REG_ITMP3, REG_PV, disp);
2864                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
2865 #else
2866                         /* do nothing */
2867 #endif
2868
2869                         /* move machine code onto stack */
2870
2871                         disp = dseg_adds4(cd, mcode);
2872                         M_ILD(REG_ITMP3, REG_PV, disp);
2873                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
2874
2875                         /* move class/method/field reference onto stack */
2876
2877                         disp = dseg_addaddress(cd, pref->ref);
2878                         M_ALD(REG_ITMP3, REG_PV, disp);
2879                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
2880
2881                         /* move data segment displacement onto stack */
2882
2883                         disp = dseg_addaddress(cd, pref->disp);
2884                         M_LLD(REG_ITMP3, REG_PV, disp);
2885                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
2886
2887                         /* move patcher function pointer onto stack */
2888
2889                         disp = dseg_addaddress(cd, pref->patcher);
2890                         M_ALD(REG_ITMP3, REG_PV, disp);
2891                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
2892
2893                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
2894                         M_ALD(REG_ITMP3, REG_PV, disp);
2895                         M_MTCTR(REG_ITMP3);
2896                         M_RTS;
2897                 }
2898
2899                 /* generate replacement-out stubs */
2900
2901 #if 0
2902                 {
2903                         int i;
2904
2905                         replacementpoint = jd->code->rplpoints;
2906
2907                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
2908                                 /* check code segment size */
2909
2910                                 MCODECHECK(100);
2911
2912                                 /* note start of stub code */
2913
2914                                 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
2915
2916                                 /* make machine code for patching */
2917
2918                                 tmpmcodeptr  = cd->mcodeptr;
2919                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
2920
2921                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
2922                                 M_BR(disp);
2923
2924                                 cd->mcodeptr = tmpmcodeptr;
2925
2926                                 /* create stack frame - keep 16-byte aligned */
2927
2928                                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
2929
2930                                 /* push address of `rplpoint` struct */
2931
2932                                 disp = dseg_addaddress(cd, replacementpoint);
2933                                 M_ALD(REG_ITMP3, REG_PV, disp);
2934                                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
2935
2936                                 /* jump to replacement function */
2937
2938                                 disp = dseg_addaddress(cd, asm_replacement_out);
2939                                 M_ALD(REG_ITMP3, REG_PV, disp);
2940                                 M_MTCTR(REG_ITMP3);
2941                                 M_RTS;
2942                         }
2943                 }
2944 #endif
2945         }
2946
2947         codegen_finish(jd);
2948
2949         /* everything's ok */
2950
2951         return true;
2952 }
2953
2954
2955 /* createcompilerstub **********************************************************
2956
2957    Creates a stub routine which calls the compiler.
2958
2959 *******************************************************************************/
2960
2961 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
2962 #define COMPILERSTUB_CODESIZE    4 * 4
2963
2964 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
2965
2966
2967 u1 *createcompilerstub(methodinfo *m)
2968 {
2969         u1          *s;                     /* memory to hold the stub            */
2970         ptrint      *d;
2971         codeinfo    *code;
2972         codegendata *cd;
2973         s4           dumpsize;
2974
2975         s = CNEW(u1, COMPILERSTUB_SIZE);
2976
2977         /* set data pointer and code pointer */
2978
2979         d = (ptrint *) s;
2980         s = s + COMPILERSTUB_DATASIZE;
2981
2982         /* mark start of dump memory area */
2983
2984         dumpsize = dump_size();
2985
2986         cd = DNEW(codegendata);
2987         cd->mcodeptr = s;
2988
2989         /* Store the codeinfo pointer in the same place as in the
2990            methodheader for compiled methods. */
2991
2992         code = code_codeinfo_new(m);
2993
2994         d[0] = (ptrint) asm_call_jit_compiler;
2995         d[1] = (ptrint) m;
2996         d[2] = (ptrint) code;
2997
2998         M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
2999         M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
3000         M_MTCTR(REG_PV);
3001         M_RTS;
3002
3003         md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
3004
3005 #if defined(ENABLE_STATISTICS)
3006         if (opt_stat)
3007                 count_cstub_len += COMPILERSTUB_SIZE;
3008 #endif
3009
3010         /* release dump area */
3011
3012         dump_release(dumpsize);
3013
3014         return s;
3015 }
3016
3017
3018 /* createnativestub ************************************************************
3019
3020    Creates a stub routine which calls a native method.
3021
3022 *******************************************************************************/
3023
3024 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3025 {
3026         methodinfo   *m;
3027         codeinfo     *code;
3028         codegendata  *cd;
3029         registerdata *rd;
3030         methoddesc   *md;
3031         s4            nativeparams;
3032         s4            i, j;                 /* count variables                    */
3033         s4            t;
3034         s4            s1, s2, disp;
3035         s4            funcdisp;
3036
3037         /* get required compiler data */
3038
3039         m    = jd->m;
3040         code = jd->code;
3041         cd   = jd->cd;
3042         rd   = jd->rd;
3043
3044         /* set some variables */
3045
3046         md = m->parseddesc;
3047         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3048
3049         /* calculate stackframe size */
3050
3051         cd->stackframesize =
3052                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3053                 sizeof(localref_table) / SIZEOF_VOID_P +
3054                 4 +                            /* 4 stackframeinfo arguments (darwin)*/
3055                 nmd->paramcount  +
3056                 nmd->memuse;
3057
3058 /*      cd->stackframesize = (cd->stackframesize + 3) & ~3;*/ /* keep stack 16-byte aligned */
3059
3060         /* create method header */
3061
3062         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3063         (void) dseg_adds4(cd, cd->stackframesize * 8);             /* FrameSize       */
3064         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3065         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3066         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3067         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3068         (void) dseg_addlinenumbertablesize(cd);
3069         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3070
3071         /* generate code */
3072
3073         M_MFLR(REG_ZERO);
3074         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3075         M_STDU(REG_SP, REG_SP, -(cd->stackframesize * 8));
3076
3077 #if !defined(NDEBUG)
3078         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3079                 emit_verbosecall_enter(jd);
3080         }
3081 #endif
3082         /* get function address (this must happen before the stackframeinfo) */
3083
3084         funcdisp = dseg_addaddress(cd, f);
3085
3086 #if !defined(WITH_STATIC_CLASSPATH)
3087         if (f == NULL) {
3088                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3089
3090                 if (opt_showdisassemble)
3091                         M_NOP;
3092         }
3093 #endif
3094
3095         /* save integer and float argument registers */
3096
3097         j = 0;
3098
3099         for (i = 0; i < md->paramcount; i++) {
3100                 t = md->paramtypes[i].type;
3101
3102                 if (IS_INT_LNG_TYPE(t)) {
3103                         if (!md->params[i].inmemory) {
3104                                 s1 = md->params[i].regoff;
3105                                 M_LST(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4*8 + j * 8);
3106                                 j++;
3107                         }
3108                 }
3109         }
3110
3111         for (i = 0; i < md->paramcount; i++) {
3112                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3113                         if (!md->params[i].inmemory) {
3114                                 s1 = md->params[i].regoff;
3115                                 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4*8 + j * 8);
3116                                 j++;
3117                         }
3118                 }
3119         }
3120
3121         /* create native stack info */
3122
3123         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[0]);
3124         M_MOV(REG_PV, rd->argintregs[1]);
3125         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[2]);
3126         M_ALD(rd->argintregs[3], REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
3127         disp = dseg_addaddress(cd, codegen_start_native_call);
3128
3129         M_ALD(REG_ITMP1, REG_PV, disp);
3130         M_ALD(REG_ITMP1, REG_ITMP1, 0);         /* TOC */
3131         M_MTCTR(REG_ITMP1);
3132         M_JSR;
3133
3134         /* restore integer and float argument registers */
3135
3136         j = 0;
3137
3138         for (i = 0; i < md->paramcount; i++) {
3139                 t = md->paramtypes[i].type;
3140
3141                 if (IS_INT_LNG_TYPE(t)) {
3142                         if (!md->params[i].inmemory) {
3143                                 s1 = md->params[i].regoff;
3144                                 M_LLD(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3145                                 j++;
3146                         }
3147                 }
3148         }
3149
3150         for (i = 0; i < md->paramcount; i++) {
3151                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3152                         if (!md->params[i].inmemory) {
3153                                 s1 = md->params[i].regoff;
3154                                 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3155                                 j++;
3156                         }
3157                 }
3158         }
3159
3160         /* copy or spill arguments to new locations */
3161
3162         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3163                 t = md->paramtypes[i].type;
3164
3165                 if (IS_INT_LNG_TYPE(t)) {
3166                         if (!md->params[i].inmemory) {
3167                                 s1 = rd->argintregs[md->params[i].regoff];
3168
3169                                 if (!nmd->params[j].inmemory) {
3170                                         s2 = rd->argintregs[nmd->params[j].regoff];
3171                                         M_INTMOVE(s1, s2);
3172                                 } else {
3173                                         s2 = nmd->params[j].regoff;
3174                                         M_LST(s1, REG_SP, s2 * 8);
3175                                 }
3176
3177                         } else {
3178                                 s1 = md->params[i].regoff + cd->stackframesize;
3179                                 s2 = nmd->params[j].regoff;
3180
3181                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
3182                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
3183                         }
3184
3185                 } else {
3186                         /* We only copy spilled float arguments, as the float
3187                            argument registers keep unchanged. */
3188
3189                         if (md->params[i].inmemory) {
3190                                 s1 = md->params[i].regoff + cd->stackframesize;
3191                                 s2 = nmd->params[j].regoff;
3192
3193                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
3194
3195                                 if (IS_2_WORD_TYPE(t)) {
3196                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
3197                                 } else {
3198                                         M_FST(REG_FTMP1, REG_SP, s2 * 8 + 4);
3199                                 }
3200                         }
3201                 }
3202         }
3203
3204         /* put class into second argument register */
3205
3206         if (m->flags & ACC_STATIC) {
3207                 disp = dseg_addaddress(cd, m->class);
3208                 M_ALD(rd->argintregs[1], REG_PV, disp);
3209         }
3210
3211         /* put env into first argument register */
3212
3213         disp = dseg_addaddress(cd, _Jv_env);
3214         M_ALD(rd->argintregs[0], REG_PV, disp);
3215
3216         /* generate the actual native call */
3217         /* native functions have a different TOC for sure */
3218
3219         M_AST(REG_TOC, REG_SP, 40);     /* save old TOC */
3220         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3221         M_ALD(REG_TOC, REG_ITMP3, 8);   /* load TOC from func. descriptor */
3222         M_ALD(REG_ITMP3, REG_ITMP3, 0);
3223         M_MTCTR(REG_ITMP3);
3224         M_JSR;
3225         M_ALD(REG_TOC, REG_SP, 40);     /* restore TOC */
3226
3227         /* save return value */
3228
3229         if (md->returntype.type != TYPE_VOID) {
3230                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3231                         M_LST(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3232                 }
3233                 else {
3234 /*                      if (IS_2_WORD_TYPE(md->returntype.type)) */
3235                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3236 /*                      else
3237                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);  */ /* FIXME, needed F XXX?*/
3238
3239                 }
3240         }
3241
3242         /* print call trace */
3243 #if ! defined(NDEBGUU)
3244         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3245                 emit_verbosecall_exit(jd);
3246         }
3247 #endif
3248         /* remove native stackframe info */
3249
3250         M_AADD_IMM(REG_SP, cd->stackframesize * 8, rd->argintregs[0]);
3251         disp = dseg_addaddress(cd, codegen_finish_native_call);
3252         M_ALD(REG_ITMP1, REG_PV, disp);
3253         M_ALD(REG_ITMP1, REG_ITMP1, 0); /* XXX what about TOC? */
3254         M_MTCTR(REG_ITMP1);
3255         M_JSR;
3256         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3257
3258         /* restore return value */
3259
3260         if (md->returntype.type != TYPE_VOID) {
3261                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3262                         M_LLD(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3263                 }
3264                 else {
3265 /*                      if (IS_2_WORD_TYPE(md->returntype.type)) */
3266                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3267 /*                      else
3268                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8); F XXX
3269                                 */
3270                 }
3271         }
3272
3273         M_ALD(REG_ITMP2_XPC, REG_SP, cd->stackframesize * 8 + LA_LR_OFFSET);
3274         M_MTLR(REG_ITMP2_XPC);
3275         M_LDA(REG_SP, REG_SP, cd->stackframesize * 8); /* remove stackframe           */
3276
3277         /* check for exception */
3278
3279         M_TST(REG_ITMP1_XPTR);
3280         M_BNE(1);                           /* if no exception then return        */
3281
3282         M_RET;
3283
3284         /* handle exception */
3285
3286         M_LADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC);  /* exception address       */
3287
3288         disp = dseg_addaddress(cd, asm_handle_nat_exception);
3289         M_ALD(REG_ITMP3, REG_PV, disp);
3290         M_MTCTR(REG_ITMP3);
3291         M_RTS;
3292
3293         /* generate patcher stub call code */
3294
3295         {
3296                 patchref *pref;
3297                 u4        mcode;
3298                 u1       *savedmcodeptr;
3299                 u1       *tmpmcodeptr;
3300
3301                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3302                         /* Get machine code which is patched back in later. The
3303                            call is 1 instruction word long. */
3304
3305                         tmpmcodeptr = cd->mcodebase + pref->branchpos;
3306
3307                         mcode = *((u4 *) tmpmcodeptr);
3308
3309                         /* Patch in the call to call the following code (done at
3310                            compile time). */
3311
3312                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3313                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3314
3315                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3316                         M_BL(disp);
3317
3318                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3319
3320                         /* create stack frame - keep stack 16-byte aligned */
3321
3322                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
3323
3324                         /* move return address onto stack */
3325
3326                         M_MFLR(REG_ZERO);
3327                         M_AST(REG_ZERO, REG_SP, 5 * 8);
3328
3329                         /* move pointer to java_objectheader onto stack */
3330
3331 #if defined(ENABLE_THREADS)
3332                         /* order reversed because of data segment layout */
3333
3334                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3335                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3336                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3337
3338                         M_LDA(REG_ITMP3, REG_PV, disp);
3339                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
3340 #else
3341                         /* do nothing */
3342 #endif
3343
3344                         /* move machine code onto stack */
3345
3346                         disp = dseg_adds4(cd, mcode);
3347                         M_ILD(REG_ITMP3, REG_PV, disp);
3348                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
3349
3350                         /* move class/method/field reference onto stack */
3351
3352                         disp = dseg_addaddress(cd, pref->ref);
3353                         M_ALD(REG_ITMP3, REG_PV, disp);
3354                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
3355
3356                         /* move data segment displacement onto stack */
3357
3358                         disp = dseg_adds4(cd, pref->disp);
3359                         M_ILD(REG_ITMP3, REG_PV, disp);
3360                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
3361
3362                         /* move patcher function pointer onto stack */
3363
3364                         disp = dseg_addaddress(cd, pref->patcher);
3365                         M_ALD(REG_ITMP3, REG_PV, disp);
3366                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
3367
3368                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
3369                         M_ALD(REG_ITMP3, REG_PV, disp);
3370                         M_MTCTR(REG_ITMP3);
3371                         M_RTS;
3372                 }
3373         }
3374
3375         codegen_finish(jd);
3376
3377         return code->entrypoint;
3378 }
3379
3380
3381
3382
3383 /*
3384  * These are local overrides for various environment variables in Emacs.
3385  * Please do not remove this and leave it at the end of the file, where
3386  * Emacs will automagically detect them.
3387  * ---------------------------------------------------------------------
3388  * Local variables:
3389  * mode: c
3390  * indent-tabs-mode: t
3391  * c-basic-offset: 4
3392  * tab-width: 4
3393  * End:
3394  * vim:noexpandtab:sw=4:ts=4:
3395  */