src/vm/jit/powerpc64/codegen.c

   1 /* src/vm/jit/powerpc64/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32             Edwin Steiner
  33
  34    $Id: codegen.c 5323 2006-09-05 16:45:24Z edwin $
  35
  36 */
  37
  38
  39 #include "config.h"
  40
  41 #include <assert.h>
  42 #include <stdio.h>
  43 #include <signal.h>
  44
  45 #include "vm/types.h"
  46
  47 #include "md-abi.h"
  48
  49 #include "vm/jit/powerpc64/arch.h"
  50 #include "vm/jit/powerpc64/codegen.h"
  51
  52 #include "mm/memory.h"
  53 #include "native/native.h"
  54 #include "vm/builtin.h"
  55 #include "vm/exceptions.h"
  56 #include "vm/global.h"
  57 #include "vm/loader.h"
  58 #include "vm/options.h"
  59 #include "vm/stringlocal.h"
  60 #include "vm/vm.h"
  61 #include "vm/jit/asmpart.h"
  62 #include "vm/jit/codegen-common.h"
  63 #include "vm/jit/dseg.h"
  64 #include "vm/jit/emit.h"
  65 #include "vm/jit/jit.h"
  66 #include "vm/jit/parse.h"
  67 #include "vm/jit/patcher.h"
  68 #include "vm/jit/reg.h"
  69 #include "vm/jit/replace.h"
  70
  71 #if defined(ENABLE_LSRA)
  72 # include "vm/jit/allocator/lsra.h"
  73 #endif
  74
  75
  76 /* codegen *********************************************************************
  77
  78    Generates machine code.
  79
  80 *******************************************************************************/
  81
  82 bool codegen(jitdata *jd)
  83 {
  84         methodinfo         *m;
  85         codeinfo           *code;
  86         codegendata        *cd;
  87         registerdata       *rd;
  88         s4                  len, s1, s2, s3, d, disp;
  89         ptrint              a;
  90         s4                  stackframesize;
  91         stackptr            src;
  92         varinfo            *var;
  93         basicblock         *bptr;
  94         instruction        *iptr;
  95         exceptiontable     *ex;
  96         u2                  currentline;
  97         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  98         builtintable_entry *bte;
  99         methoddesc         *md;
 100         rplpoint           *replacementpoint;
 101
 102         /* get required compiler data */
 103
 104         m    = jd->m;
 105         code = jd->code;
 106         cd   = jd->cd;
 107         rd   = jd->rd;
 108
 109         /* prevent compiler warnings */
 110
 111         d = 0;
 112         lm = NULL;
 113         bte = NULL;
 114
 115         {
 116         s4 i, p, t, l;
 117         s4 savedregs_num;
 118
 119         savedregs_num = 0;
 120
 121         /* space to save used callee saved registers */
 122
 123         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 124         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 125
 126         stackframesize = rd->memuse + savedregs_num;
 127
 128 #if defined(ENABLE_THREADS)
 129         /* space to save argument of monitor_enter and Return Values to survive */
 130     /* monitor_exit. The stack position for the argument can not be shared  */
 131         /* with place to save the return register on PPC64, since both values     */
 132         /* reside in R3 */
 133         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 134                 /* reserve 2 slots for long/double return values for monitorexit */
 135                 stackframesize += 2;
 136         }
 137
 138 #endif
 139
 140         /* create method header */
 141
 142         /* align stack to 16-bytes */
 143
 144 /*      if (!m->isleafmethod || opt_verbosecall) */
 145                 stackframesize = (stackframesize + 3) & ~3;
 146
 147 /*      else if (m->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
 148 /*              stackframesize = 0; */
 149
 150         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
 151         (void) dseg_adds4(cd, stackframesize * 8);             /* FrameSize       */
 152
 153 #if defined(ENABLE_THREADS)
 154         /* IsSync contains the offset relative to the stack pointer for the
 155            argument of monitor_exit used in the exception handler. Since the
 156            offset could be zero and give a wrong meaning of the flag it is
 157            offset by one.
 158         */
 159
 160         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 161                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);       /* IsSync          */
 162         else
 163 #endif
 164                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
 165
 166         (void) dseg_adds4(cd, jd->isleafmethod);                /* IsLeaf          */
 167         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
 168         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
 169
 170         dseg_addlinenumbertablesize(cd);
 171
 172         (void) dseg_adds4(cd, cd->exceptiontablelength);       /* ExTableSize     */
 173
 174         /* create exception table */
 175
 176         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 177                 dseg_addtarget(cd, ex->start);
 178                 dseg_addtarget(cd, ex->end);
 179                 dseg_addtarget(cd, ex->handler);
 180                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 181         }
 182
 183         /* create stack frame (if necessary) */
 184
 185         if (!jd->isleafmethod) {
 186                 M_MFLR(REG_ZERO);
 187                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 188         }
 189
 190         if (stackframesize)
 191                 M_STDU(REG_SP, REG_SP, -stackframesize * 8);
 192
 193         /* save return address and used callee saved registers */
 194
 195         p = stackframesize;
 196         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 197                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 198         }
 199         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 200                 p --; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 201         }
 202
 203         /* take arguments out of register or stack frame */
 204
 205         md = m->parseddesc;
 206
 207         for (p = 0, l = 0; p < md->paramcount; p++) {
 208                 t = md->paramtypes[p].type;
 209                 var = &(rd->locals[l][t]);
 210                 l++;
 211                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 212                         l++;
 213                 if (var->type < 0)
 214                         continue;
 215                 s1 = md->params[p].regoff;
 216                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 217                         if (IS_2_WORD_TYPE(t))
 218                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
 219                                                            rd->argintregs[GET_HIGH_REG(s1)]);
 220                         else
 221                                 s2 = rd->argintregs[s1];
 222                         if (!md->params[p].inmemory) {           /* register arguments    */
 223                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 224                                         M_NOP;
 225                                         if (IS_2_WORD_TYPE(t))          /* FIXME, only M_INTMOVE here */
 226                                                 M_LNGMOVE(s2, var->regoff);
 227                                         else
 228                                                 M_INTMOVE(s2, var->regoff);
 229
 230                                 } else {                             /* reg arg -> spilled    */
 231                                         if (IS_2_WORD_TYPE(t))
 232                                                 M_LST(s2, REG_SP, var->regoff * 4);
 233                                         else
 234                                                 M_IST(s2, REG_SP, var->regoff * 4);
 235                                 }
 236
 237                         } else {                                 /* stack arguments       */
 238                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 239                                         if (IS_2_WORD_TYPE(t))
 240                                                 M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 241                                         else
 242                                                 M_ILD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 243
 244                                 } else {                             /* stack arg -> spilled  */
 245 #if 1
 246                                         M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4);
 247                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
 248                                         if (IS_2_WORD_TYPE(t)) {
 249                                                 M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4 +4);
 250                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
 251                                         }
 252 #else
 253                                         /* Reuse Memory Position on Caller Stack */
 254                                         var->regoff = stackframesize + s1;
 255 #endif
 256                                 }
 257                         }
 258
 259                 } else {                                     /* floating args         */
 260                         if (!md->params[p].inmemory) {           /* register arguments    */
 261                                 s2 = rd->argfltregs[s1];
 262                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 263                                         M_FLTMOVE(s2, var->regoff);
 264
 265                                 } else {                                         /* reg arg -> spilled    */
 266                                         if (IS_2_WORD_TYPE(t))
 267                                                 M_DST(s2, REG_SP, var->regoff * 4);
 268                                         else
 269                                                 M_FST(s2, REG_SP, var->regoff * 4);
 270                                 }
 271
 272                         } else {                                 /* stack arguments       */
 273                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 274                                         if (IS_2_WORD_TYPE(t))
 275                                                 M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 276
 277                                         else
 278                                                 M_FLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 279
 280                                 } else {                             /* stack-arg -> spilled  */
 281 #if 1
 282                                         if (IS_2_WORD_TYPE(t)) {
 283                                                 M_DLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
 284                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
 285                                                 var->regoff = stackframesize + s1;
 286
 287                                         } else {
 288                                                 M_FLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
 289                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
 290                                         }
 291 #else
 292                                         /* Reuse Memory Position on Caller Stack */
 293                                         var->regoff = stackframesize + s1;
 294 #endif
 295                                 }
 296                         }
 297                 }
 298         } /* end for */
 299
 300         /* save monitorenter argument */
 301
 302 #if defined(ENABLE_THREADS)
 303         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 304                 p = dseg_addaddress(cd, LOCK_monitor_enter);
 305                 M_ALD(REG_ITMP3, REG_PV, p);
 306                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
 307                 M_MTCTR(REG_ITMP3);
 308
 309                 /* get or test the lock object */
 310
 311                 if (m->flags & ACC_STATIC) {
 312                         p = dseg_addaddress(cd, &m->class->object.header);
 313                         M_ALD(rd->argintregs[0], REG_PV, p);
 314                 }
 315                 else {
 316                         M_TST(rd->argintregs[0]);
 317                         M_BEQ(0);
 318                         codegen_add_nullpointerexception_ref(cd);
 319                 }
 320
 321                 M_AST(rd->argintregs[0], REG_SP, rd->memuse * 8);
 322                 M_JSR;
 323         }
 324 #endif
 325
 326         /* call trace function */
 327
 328         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 329                 emit_verbosecall_enter(jd);
 330
 331         }
 332
 333         /* end of header generation */
 334
 335         replacementpoint = jd->code->rplpoints;
 336
 337         /* walk through all basic blocks */
 338         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 339
 340                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 341
 342                 if (bptr->flags >= BBREACHED) {
 343
 344                 /* branch resolving */
 345
 346                 {
 347                 branchref *brefs;
 348                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 349                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 350                                           brefs->branchpos,
 351                                                           bptr->mpc);
 352                         }
 353                 }
 354
 355                 /* handle replacement points */
 356
 357                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 358                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 359
 360                         replacementpoint++;
 361                 }
 362
 363                 /* copy interface registers to their destination */
 364
 365                 src = bptr->instack;
 366                 len = bptr->indepth;
 367                 MCODECHECK(64+len);
 368
 369 #if defined(ENABLE_LSRA)
 370                 if (opt_lsra) {
 371                         while (src != NULL) {
 372                                 len--;
 373                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 374                                         /* d = reg_of_var(m, src, REG_ITMP1); */
 375                                         if (!(src->flags & INMEMORY))
 376                                                 d = src->regoff;
 377                                         else
 378                                                 d = REG_ITMP1;
 379                                         M_INTMOVE(REG_ITMP1, d);
 380                                         emit_store(jd, NULL, src, d);
 381                                 }
 382                                 src = src->prev;
 383                         }
 384                 } else {
 385 #endif
 386                 while (src != NULL) {
 387                         len--;
 388                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 389                                 d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
 390                                 M_INTMOVE(REG_ITMP1, d);
 391                                 emit_store(jd, NULL, src, d);
 392                         } else {
 393                                 if (src->type == TYPE_LNG)
 394                                         d = codegen_reg_of_var(rd, 0, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 395                                 else
 396                                         d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
 397                                 if ((src->varkind != STACKVAR)) {
 398                                         s2 = src->type;
 399                                         if (IS_FLT_DBL_TYPE(s2)) {
 400                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 401                                                         s1 = rd->interfaces[len][s2].regoff;
 402                                                         M_FLTMOVE(s1, d);
 403                                                 } else {
 404                                                         if (IS_2_WORD_TYPE(s2)) {
 405                                                                 M_DLD(d, REG_SP,
 406                                                                           rd->interfaces[len][s2].regoff * 4);
 407                                                         } else {
 408                                                                 M_FLD(d, REG_SP,
 409                                                                           rd->interfaces[len][s2].regoff * 4);
 410                                                         }
 411                                                 }
 412
 413                                                 emit_store(jd, NULL, src, d);
 414
 415                                         } else {
 416                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 417                                                         s1 = rd->interfaces[len][s2].regoff;
 418                                                         if (IS_2_WORD_TYPE(s2))
 419                                                                 M_LNGMOVE(s1, d);
 420                                                         else
 421                                                                 M_INTMOVE(s1, d);
 422                                                 } else {
 423                                                         if (IS_2_WORD_TYPE(s2))
 424                                                                 M_LLD(d, REG_SP,
 425                                                                           rd->interfaces[len][s2].regoff * 4);
 426                                                         else
 427                                                                 M_ILD(d, REG_SP,
 428                                                                           rd->interfaces[len][s2].regoff * 4);
 429                                                 }
 430
 431                                                 emit_store(jd, NULL, src, d);
 432                                         }
 433                                 }
 434                         }
 435                         src = src->prev;
 436                 }
 437
 438 #if defined(ENABLE_LSRA)
 439                 }
 440 #endif
 441                 /* walk through all instructions */
 442
 443                 src = bptr->instack;
 444                 len = bptr->icount;
 445                 currentline = 0;
 446
 447                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 448                         if (iptr->line != currentline) {
 449                                 dseg_addlinenumber(cd, iptr->line);
 450                                 currentline = iptr->line;
 451                         }
 452
 453                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 454
 455                         M_NOP; M_NOP; /* XXX */
 456                         switch (iptr->opc) {
 457                         case ICMD_NOP:    /* ...  ==> ...                                 */
 458                         case ICMD_INLINE_START:
 459                         case ICMD_INLINE_END:
 460                                 break;
 461
 462                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 463
 464                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 465                         M_TST(s1);
 466                         M_BEQ(0);
 467                         codegen_add_nullpointerexception_ref(cd);
 468                         break;
 469
 470                 /* constant operations ************************************************/
 471
 472                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 473                                       /* op1 = 0, val.i = constant                    */
 474
 475                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 476                         ICONST(d, iptr->val.i);
 477                         emit_store(jd, iptr, iptr->dst, d);
 478                         break;
 479
 480                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 481                                       /* op1 = 0, val.l = constant                    */
 482
 483                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 484                         LCONST(d, iptr->val.l);
 485                         emit_store(jd, iptr, iptr->dst, d);
 486                         break;
 487
 488                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 489                                       /* op1 = 0, val.f = constant                    */
 490
 491                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 492                         a = dseg_addfloat(cd, iptr->val.f);
 493                         M_FLD(d, REG_PV, a);
 494                         emit_store(jd, iptr, iptr->dst, d);
 495                         break;
 496
 497                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 498                                       /* op1 = 0, val.d = constant                    */
 499
 500                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 501                         a = dseg_adddouble(cd, iptr->val.d);
 502                         M_DLD(d, REG_PV, a);
 503                         emit_store(jd, iptr, iptr->dst, d);
 504                         break;
 505
 506                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 507                                       /* op1 = 0, val.a = constant                    */
 508                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 509                         disp = dseg_addaddress(cd, iptr->val.a);
 510
 511                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 512                                 codegen_addpatchref(cd, PATCHER_aconst,
 513                                                                         ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
 514                                                                     disp);
 515
 516                                 if (opt_showdisassemble)
 517                                         M_NOP;
 518                         }
 519
 520                         M_ALD(d, REG_PV, disp);
 521                         emit_store(jd, iptr, iptr->dst, d);
 522                         break;
 523
 524
 525                 /* load/store operations **********************************************/
 526
 527                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 528
 529                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 530                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 531                         if ((iptr->dst->varkind == LOCALVAR) &&
 532                             (iptr->dst->varnum == iptr->op1))
 533                                 break;
 534                         if (var->flags & INMEMORY)
 535                                 M_ILD(d, REG_SP, var->regoff * 4);
 536                         else
 537                                 M_INTMOVE(var->regoff, d);
 538                         emit_store(jd, iptr, iptr->dst, d);
 539                         break;
 540
 541                 case ICMD_ALOAD:      /* op1 = local variable                         */
 542                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 543                                       /* op1 = local variable                         */
 544
 545                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 546                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 547                         if ((iptr->dst->varkind == LOCALVAR) &&
 548                                 (iptr->dst->varnum == iptr->op1))
 549                                 break;
 550                         if (var->flags & INMEMORY)
 551                                 M_LLD(d, REG_SP, var->regoff * 4);
 552                         else
 553                                 M_LNGMOVE(var->regoff, d);
 554                         emit_store(jd, iptr, iptr->dst, d);
 555                         break;
 556
 557                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 558                                       /* op1 = local variable                         */
 559
 560                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 561                         if ((iptr->dst->varkind == LOCALVAR) &&
 562                                 (iptr->dst->varnum == iptr->op1))
 563                                 break;
 564                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 565                         if (var->flags & INMEMORY)
 566                                 M_FLD(d, REG_SP, var->regoff * 4);
 567                         else
 568                                 M_FLTMOVE(var->regoff, d);
 569                         emit_store(jd, iptr, iptr->dst, d);
 570                         break;
 571
 572                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 573                                       /* op1 = local variable                         */
 574
 575                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 576                         if ((iptr->dst->varkind == LOCALVAR) &&
 577                                 (iptr->dst->varnum == iptr->op1))
 578                                 break;
 579                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 580                         if (var->flags & INMEMORY)
 581                                 M_DLD(d, REG_SP, var->regoff * 4);
 582                         else
 583                                 M_FLTMOVE(var->regoff, d);
 584                         emit_store(jd, iptr, iptr->dst, d);
 585                         break;
 586
 587
 588                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 589                 case ICMD_ASTORE:     /* op1 = local variable                         */
 590
 591                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 592                                 break;
 593                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 594                         if (var->flags & INMEMORY) {
 595                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 596                                 M_IST(s1, REG_SP, var->regoff * 4);
 597                         } else {
 598                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 599                                 M_INTMOVE(s1, var->regoff);
 600                         }
 601                         break;
 602
 603                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 604                                       /* op1 = local variable                         */
 605
 606                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 607                                 break;
 608                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 609                         if (var->flags & INMEMORY) {
 610                                 s1 = emit_load_s1(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 611                                 M_LST(s1, REG_SP, var->regoff * 4);
 612                         } else {
 613                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 614                                 M_LNGMOVE(s1, var->regoff);
 615                         }
 616                         break;
 617
 618                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 619                                       /* op1 = local variable                         */
 620
 621                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 622                                 break;
 623                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 624                         if (var->flags & INMEMORY) {
 625                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
 626                                 M_FST(s1, REG_SP, var->regoff * 4);
 627                         } else {
 628                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 629                                 M_FLTMOVE(s1, var->regoff);
 630                         }
 631                         break;
 632
 633                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
 634                                       /* op1 = local variable                         */
 635
 636                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 637                                 break;
 638                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 639                         if (var->flags & INMEMORY) {
 640                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
 641                                 M_DST(s1, REG_SP, var->regoff * 4);
 642                         } else {
 643                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 644                                 M_FLTMOVE(s1, var->regoff);
 645                         }
 646                         break;
 647
 648
 649                 /* pop/dup/swap operations ********************************************/
 650
 651                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 652
 653                 case ICMD_POP:        /* ..., value  ==> ...                          */
 654                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 655                         break;
 656
 657                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 658                         M_COPY(src, iptr->dst);
 659                         break;
 660
 661                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 662
 663                         M_COPY(src,       iptr->dst);
 664                         M_COPY(src->prev, iptr->dst->prev);
 665                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 666                         break;
 667
 668                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 669
 670                         M_COPY(src,             iptr->dst);
 671                         M_COPY(src->prev,       iptr->dst->prev);
 672                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 673                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 674                         break;
 675
 676                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 677
 678                         M_COPY(src,       iptr->dst);
 679                         M_COPY(src->prev, iptr->dst->prev);
 680                         break;
 681
 682                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 683
 684                         M_COPY(src,             iptr->dst);
 685                         M_COPY(src->prev,       iptr->dst->prev);
 686                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 687                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 688                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 689                         break;
 690
 691                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 692
 693                         M_COPY(src,                   iptr->dst);
 694                         M_COPY(src->prev,             iptr->dst->prev);
 695                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 696                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 697                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 698                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 699                         break;
 700
 701                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 702
 703                         M_COPY(src,       iptr->dst->prev);
 704                         M_COPY(src->prev, iptr->dst);
 705                         break;
 706
 707
 708                 /* integer operations *************************************************/
 709
 710                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 711
 712                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 713                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 714                         M_NEG(s1, d);
 715                         emit_store(jd, iptr, iptr->dst, d);
 716                         break;
 717
 718                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 719
 720                         s1 = emit_load_s1(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 721                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 722                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
 723                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 724                         emit_store(jd, iptr, iptr->dst, d);
 725                         break;
 726
 727                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 728
 729                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
 730                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 731                         M_INTMOVE(s1, GET_LOW_REG(d));
 732                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
 733                         emit_store(jd, iptr, iptr->dst, d);
 734                         break;
 735
 736                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 737
 738                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP2);
 739                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 740                         M_INTMOVE(s1, d);
 741                         emit_store(jd, iptr, iptr->dst, d);
 742                         break;
 743
 744                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 745
 746                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 747                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 748                         M_BSEXT(s1, d);
 749                         emit_store(jd, iptr, iptr->dst, d);
 750                         break;
 751
 752                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 753
 754                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 755                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 756                         M_CZEXT(s1, d);
 757                         emit_store(jd, iptr, iptr->dst, d);
 758                         break;
 759
 760                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 761
 762                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 763                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 764                         M_SSEXT(s1, d);
 765                         emit_store(jd, iptr, iptr->dst, d);
 766                         break;
 767
 768
 769                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 770
 771                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 772                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 773                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 774                         M_IADD(s1, s2, d);
 775                         emit_store(jd, iptr, iptr->dst, d);
 776                         break;
 777
 778                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 779                                       /* val.i = constant                             */
 780
 781                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 782                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 783                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 784                                 M_IADD_IMM(s1, iptr->val.i, d);
 785                         } else {
 786                                 ICONST(REG_ITMP2, iptr->val.i);
 787                                 M_IADD(s1, REG_ITMP2, d);
 788                         }
 789                         emit_store(jd, iptr, iptr->dst, d);
 790                         break;
 791
 792                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 793
 794                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
 795                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
 796                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 797                         M_ADDC(s1, s2, GET_LOW_REG(d));
 798                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
 799                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 800                         M_ADDE(s1, s2, GET_HIGH_REG(d));
 801                         emit_store(jd, iptr, iptr->dst, d);
 802                         break;
 803
 804                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 805                                       /* val.l = constant                             */
 806
 807                         s3 = iptr->val.l & 0xffffffff;
 808                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
 809                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 810                         if ((s3 >= -32768) && (s3 <= 32767)) {
 811                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 812                         } else {
 813                                 ICONST(REG_ITMP2, s3);
 814                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 815                         }
 816                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
 817                         s3 = iptr->val.l >> 32;
 818                         if (s3 == -1) {
 819                                 M_ADDME(s1, GET_HIGH_REG(d));
 820                         } else if (s3 == 0) {
 821                                 M_ADDZE(s1, GET_HIGH_REG(d));
 822                         } else {
 823                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 824                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 825                         }
 826                         emit_store(jd, iptr, iptr->dst, d);
 827                         break;
 828
 829                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 830
 831                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 832                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 833                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 834                         M_ISUB(s1, s2, d);
 835                         emit_store(jd, iptr, iptr->dst, d);
 836                         break;
 837
 838                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 839                                       /* val.i = constant                             */
 840
 841                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 842                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 843                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 844                                 M_IADD_IMM(s1, -iptr->val.i, d);
 845                         } else {
 846                                 ICONST(REG_ITMP2, -iptr->val.i);
 847                                 M_IADD(s1, REG_ITMP2, d);
 848                         }
 849                         emit_store(jd, iptr, iptr->dst, d);
 850                         break;
 851
 852                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 853
 854                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
 855                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
 856                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 857                         M_SUBC(s1, s2, GET_LOW_REG(d));
 858                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
 859                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 860                         M_SUBE(s1, s2, GET_HIGH_REG(d));
 861                         emit_store(jd, iptr, iptr->dst, d);
 862                         break;
 863
 864                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 865                                       /* val.l = constant                             */
 866
 867                         s3 = (-iptr->val.l) & 0xffffffff;
 868                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
 869                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 870                         if ((s3 >= -32768) && (s3 <= 32767)) {
 871                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 872                         } else {
 873                                 ICONST(REG_ITMP2, s3);
 874                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 875                         }
 876                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
 877                         s3 = (-iptr->val.l) >> 32;
 878                         if (s3 == -1)
 879                                 M_ADDME(s1, GET_HIGH_REG(d));
 880                         else if (s3 == 0)
 881                                 M_ADDZE(s1, GET_HIGH_REG(d));
 882                         else {
 883                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 884                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 885                         }
 886                         emit_store(jd, iptr, iptr->dst, d);
 887                         break;
 888
 889                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 890
 891                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 892                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 893                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 894                         M_TST(s2);
 895                         M_BEQ(0);
 896                         codegen_add_arithmeticexception_ref(cd);
 897                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 898                         M_CMP(REG_ITMP3, s1);
 899                         M_BNE(3 + (s1 != d));
 900                         M_CMPI(s2, -1);
 901                         M_BNE(1 + (s1 != d));
 902                         M_INTMOVE(s1, d);
 903                         M_BR(1);
 904                         M_IDIV(s1, s2, d);
 905                         emit_store(jd, iptr, iptr->dst, d);
 906                         break;
 907
 908                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 909
 910                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 911                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 912                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 913                         M_TST(s2);
 914                         M_BEQ(0);
 915                         codegen_add_arithmeticexception_ref(cd);
 916                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 917                         M_CMP(REG_ITMP3, s1);
 918                         M_BNE(4);
 919                         M_CMPI(s2, -1);
 920                         M_BNE(2);
 921                         M_CLR(d);
 922                         M_BR(3);
 923                         M_IDIV(s1, s2, REG_ITMP3);
 924                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
 925                         M_ISUB(s1, REG_ITMP3, d);
 926                         emit_store(jd, iptr, iptr->dst, d);
 927                         break;
 928
 929                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 930                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 931
 932                         bte = iptr->val.a;
 933                         md = bte->md;
 934
 935                         s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 936                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
 937                         M_BEQ(0);
 938                         codegen_add_arithmeticexception_ref(cd);
 939
 940                         disp = dseg_addaddress(cd, bte->fp);
 941                         M_ALD(REG_ITMP3, REG_PV, disp);
 942                         M_MTCTR(REG_ITMP3);
 943
 944                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
 945                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
 946                         M_LNGMOVE(s2, s3);
 947
 948                         s1 = emit_load_s1(jd, iptr, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
 949                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
 950                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
 951                         M_LNGMOVE(s1, s3);
 952
 953                         M_JSR;
 954
 955                         /*d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT)); //FIXME */
 956                         /*M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), d); FIXME*/
 957                         emit_store(jd, iptr, iptr->dst, d);
 958                         break;
 959
 960                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 961
 962                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 963                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 964                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 965                         M_IMUL(s1, s2, d);
 966                         emit_store(jd, iptr, iptr->dst, d);
 967                         break;
 968
 969                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 970                                       /* val.i = constant                             */
 971
 972                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 973                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 974                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 975                                 M_IMUL_IMM(s1, iptr->val.i, d);
 976                         } else {
 977                                 ICONST(REG_ITMP3, iptr->val.i);
 978                                 M_IMUL(s1, REG_ITMP3, d);
 979                         }
 980                         emit_store(jd, iptr, iptr->dst, d);
 981                         break;
 982
 983                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 984
 985                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 986                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
 987                         M_SRA_IMM(s1, iptr->val.i, d);
 988                         M_ADDZE(d, d);
 989                         emit_store(jd, iptr, iptr->dst, d);
 990                         break;
 991
 992                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 993
 994                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 995                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 996                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 997                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 998                         M_SLL(s1, REG_ITMP3, d);
 999                         emit_store(jd, iptr, iptr->dst, d);
1000                         break;
1001
1002                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1003                                       /* val.i = constant                             */
1004
1005                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1006                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1007                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1008                         emit_store(jd, iptr, iptr->dst, d);
1009                         break;
1010
1011                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1012
1013                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1014                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1015                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1016                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1017                         M_SRA(s1, REG_ITMP3, d);
1018                         emit_store(jd, iptr, iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1022                                       /* val.i = constant                             */
1023
1024                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1025                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1026                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1027                         emit_store(jd, iptr, iptr->dst, d);
1028                         break;
1029
1030                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1031
1032                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1033                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1034                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1035                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1036                         M_SRL(s1, REG_ITMP2, d);
1037                         emit_store(jd, iptr, iptr->dst, d);
1038                         break;
1039
1040                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1041                                       /* val.i = constant                             */
1042
1043                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1044                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1045                         if (iptr->val.i & 0x1f) {
1046                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1047                         } else {
1048                                 M_INTMOVE(s1, d);
1049                         }
1050                         emit_store(jd, iptr, iptr->dst, d);
1051                         break;
1052
1053                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1054
1055                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1056                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1057                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1058                         M_AND(s1, s2, d);
1059                         emit_store(jd, iptr, iptr->dst, d);
1060                         break;
1061
1062                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1063                                       /* val.i = constant                             */
1064
1065                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1066                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1067                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1068                                 M_AND_IMM(s1, iptr->val.i, d);
1069                                 }
1070                         /*
1071                         else if (iptr->val.i == 0xffffff) {
1072                                 M_RLWINM(s1, 0, 8, 31, d);
1073                                 }
1074                         */
1075                         else {
1076                                 ICONST(REG_ITMP3, iptr->val.i);
1077                                 M_AND(s1, REG_ITMP3, d);
1078                         }
1079                         emit_store(jd, iptr, iptr->dst, d);
1080                         break;
1081
1082                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1083
1084                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1085                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1086                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1087                         M_AND(s1, s2, GET_LOW_REG(d));
1088                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1089                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1090                         M_AND(s1, s2, GET_HIGH_REG(d));
1091                         emit_store(jd, iptr, iptr->dst, d);
1092                         break;
1093
1094                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1095                                       /* val.l = constant                             */
1096
1097                         s3 = iptr->val.l & 0xffffffff;
1098                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1099                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1100                         if ((s3 >= 0) && (s3 <= 65535)) {
1101                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1102                         } else {
1103                                 ICONST(REG_ITMP3, s3);
1104                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1105                         }
1106                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1107                         s3 = iptr->val.l >> 32;
1108                         if ((s3 >= 0) && (s3 <= 65535)) {
1109                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1110                         } else {
1111                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1112                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1113                         }
1114                         emit_store(jd, iptr, iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1118                                       /* val.i = constant                             */
1119
1120                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1121                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1122                         M_MOV(s1, REG_ITMP2);
1123                         M_CMPI(s1, 0);
1124                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1125                         if (iptr->val.i >= 32768) {
1126                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1127                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1128                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1129                         } else {
1130                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1131                         }
1132                         {
1133                                 int b=0, m = iptr->val.i;
1134                                 while (m >>= 1)
1135                                         ++b;
1136                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1137                         }
1138                         M_ISUB(s1, REG_ITMP2, d);
1139                         emit_store(jd, iptr, iptr->dst, d);
1140                         break;
1141
1142                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1143
1144                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1145                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1146                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1147                         M_OR(s1, s2, d);
1148                         emit_store(jd, iptr, iptr->dst, d);
1149                         break;
1150
1151                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1152                                       /* val.i = constant                             */
1153
1154                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1155                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1156                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1157                                 M_OR_IMM(s1, iptr->val.i, d);
1158                         } else {
1159                                 ICONST(REG_ITMP3, iptr->val.i);
1160                                 M_OR(s1, REG_ITMP3, d);
1161                         }
1162                         emit_store(jd, iptr, iptr->dst, d);
1163                         break;
1164
1165                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1166
1167                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1168                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1169                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1170                         M_OR(s1, s2, GET_LOW_REG(d));
1171                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1172                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1173                         M_OR(s1, s2, GET_HIGH_REG(d));
1174                         emit_store(jd, iptr, iptr->dst, d);
1175                         break;
1176
1177                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1178                                       /* val.l = constant                             */
1179
1180                         s3 = iptr->val.l & 0xffffffff;
1181                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1182                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1183                         if ((s3 >= 0) && (s3 <= 65535)) {
1184                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1185                         } else {
1186                                 ICONST(REG_ITMP3, s3);
1187                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1188                         }
1189                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1190                         s3 = iptr->val.l >> 32;
1191                         if ((s3 >= 0) && (s3 <= 65535)) {
1192                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1193                         } else {
1194                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1195                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1196                         }
1197                         emit_store(jd, iptr, iptr->dst, d);
1198                         break;
1199
1200                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1201
1202                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1203                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1204                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1205                         M_XOR(s1, s2, d);
1206                         emit_store(jd, iptr, iptr->dst, d);
1207                         break;
1208
1209                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1210                                       /* val.i = constant                             */
1211
1212                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1213                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1214                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1215                                 M_XOR_IMM(s1, iptr->val.i, d);
1216                         } else {
1217                                 ICONST(REG_ITMP3, iptr->val.i);
1218                                 M_XOR(s1, REG_ITMP3, d);
1219                         }
1220                         emit_store(jd, iptr, iptr->dst, d);
1221                         break;
1222
1223                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1224
1225                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1226                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1227                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1228                         M_XOR(s1, s2, GET_LOW_REG(d));
1229                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1230                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1231                         M_XOR(s1, s2, GET_HIGH_REG(d));
1232                         emit_store(jd, iptr, iptr->dst, d);
1233                         break;
1234
1235                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1236                                       /* val.l = constant                             */
1237
1238                         s3 = iptr->val.l & 0xffffffff;
1239                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1240                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1241                         if ((s3 >= 0) && (s3 <= 65535)) {
1242                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1243                         } else {
1244                                 ICONST(REG_ITMP3, s3);
1245                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1246                         }
1247                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1248                         s3 = iptr->val.l >> 32;
1249                         if ((s3 >= 0) && (s3 <= 65535)) {
1250                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1251                         } else {
1252                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1253                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1254                         }
1255                         emit_store(jd, iptr, iptr->dst, d);
1256                         break;
1257
1258                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1259                         /*******************************************************************
1260                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1261                         *******************************************************************/
1262                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP3);
1263                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
1264                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1265                         {
1266                                 int tempreg = false;
1267                                 int dreg;
1268                                 u1  *br1;
1269
1270                                 if (src->prev->flags & INMEMORY) {
1271                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1272                                 } else {
1273                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1274                                                         || (d == GET_LOW_REG(src->prev->regoff));
1275                                 }
1276                                 if (src->flags & INMEMORY) {
1277                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1278                                 } else {
1279                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1280                                  || (d == GET_LOW_REG(src->regoff));
1281                                 }
1282
1283                                 dreg = tempreg ? REG_ITMP1 : d;
1284                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1285                                 M_CMP(s1, s2);
1286                                 M_BGT(0);
1287                                 br1 = cd->mcodeptr;
1288                                 M_BLT(0);
1289                                 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP3);
1290                                 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1291                                 M_CMPU(s1, s2);
1292                                 M_BGT(3);
1293                                 M_BEQ(1);
1294                                 M_IADD_IMM(dreg, -1, dreg);
1295                                 M_IADD_IMM(dreg, -1, dreg);
1296                                 gen_resolvebranch(br1, br1, cd->mcodeptr);
1297                                 gen_resolvebranch(br1 + 1 * 4, br1 + 1 * 4, cd->mcodeptr - 2 * 4);
1298                                 M_INTMOVE(dreg, d);
1299                         }
1300                         emit_store(jd, iptr, iptr->dst, d);
1301                         break;
1302
1303                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1304                                       /* op1 = variable, val.i = constant             */
1305
1306                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1307                         if (var->flags & INMEMORY) {
1308                                 s1 = REG_ITMP1;
1309                                 M_ILD(s1, REG_SP, var->regoff * 4);
1310                         } else
1311                                 s1 = var->regoff;
1312                         {
1313                                 u4 m = iptr->val.i;
1314                                 if (m & 0x8000)
1315                                         m += 65536;
1316                                 if (m & 0xffff0000)
1317                                         M_ADDIS(s1, m >> 16, s1);
1318                                 if (m & 0xffff)
1319                                         M_IADD_IMM(s1, m & 0xffff, s1);
1320                         }
1321                         if (var->flags & INMEMORY)
1322                                 M_IST(s1, REG_SP, var->regoff * 4);
1323                         break;
1324
1325
1326                 /* floating operations ************************************************/
1327
1328                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1329
1330                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1331                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1332                         M_FMOVN(s1, d);
1333                         emit_store(jd, iptr, iptr->dst, d);
1334                         break;
1335
1336                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1337
1338                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1339                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1340                         M_FMOVN(s1, d);
1341                         emit_store(jd, iptr, iptr->dst, d);
1342                         break;
1343
1344                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1345
1346                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1347                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1348                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1349                         M_FADD(s1, s2, d);
1350                         emit_store(jd, iptr, iptr->dst, d);
1351                         break;
1352
1353                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1354
1355                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1356                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1357                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1358                         M_DADD(s1, s2, d);
1359                         emit_store(jd, iptr, iptr->dst, d);
1360                         break;
1361
1362                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1363
1364                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1365                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1366                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1367                         M_FSUB(s1, s2, d);
1368                         emit_store(jd, iptr, iptr->dst, d);
1369                         break;
1370
1371                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1372
1373                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1374                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1375                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1376                         M_DSUB(s1, s2, d);
1377                         emit_store(jd, iptr, iptr->dst, d);
1378                         break;
1379
1380                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1381
1382                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1383                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1384                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1385                         M_FMUL(s1, s2, d);
1386                         emit_store(jd, iptr, iptr->dst, d);
1387                         break;
1388
1389                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1390
1391                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1392                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1393                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1394                         M_DMUL(s1, s2, d);
1395                         emit_store(jd, iptr, iptr->dst, d);
1396                         break;
1397
1398                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1399
1400                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1401                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1402                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1403                         M_FDIV(s1, s2, d);
1404                         emit_store(jd, iptr, iptr->dst, d);
1405                         break;
1406
1407                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1408
1409                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1410                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1411                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1412                         M_DDIV(s1, s2, d);
1413                         emit_store(jd, iptr, iptr->dst, d);
1414                         break;
1415
1416                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1417                 case ICMD_D2I:
1418
1419                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1420                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1421                         M_CLR(d);
1422                         disp = dseg_addfloat(cd, 0.0);
1423                         M_FLD(REG_FTMP2, REG_PV, disp);
1424                         M_FCMPU(s1, REG_FTMP2);
1425                         M_BNAN(4);
1426                         disp = dseg_adds4(cd, 0);
1427                         M_CVTDL_C(s1, REG_FTMP1);
1428                         M_LDA(REG_ITMP1, REG_PV, disp);
1429                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1430                         M_ILD(d, REG_PV, disp);
1431                         emit_store(jd, iptr, iptr->dst, d);
1432                         break;
1433
1434                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1435
1436                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1437                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1438                         M_FLTMOVE(s1, d);
1439                         emit_store(jd, iptr, iptr->dst, d);
1440                         break;
1441
1442                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1443
1444                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1445                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1446                         M_CVTDF(s1, d);
1447                         emit_store(jd, iptr, iptr->dst, d);
1448                         break;
1449
1450                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1451                 case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                     */
1452
1453
1454                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1455                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1456                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1457                         M_FCMPU(s2, s1);
1458                         M_IADD_IMM(REG_ZERO, -1, d);
1459                         M_BNAN(4);
1460                         M_BGT(3);
1461                         M_IADD_IMM(REG_ZERO, 0, d);
1462                         M_BGE(1);
1463                         M_IADD_IMM(REG_ZERO, 1, d);
1464                         emit_store(jd, iptr, iptr->dst, d);
1465                         break;
1466
1467                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1468                 case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                     */
1469
1470                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1471                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1472                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1473                         M_FCMPU(s1, s2);
1474                         M_IADD_IMM(REG_ZERO, 1, d);
1475                         M_BNAN(4);
1476                         M_BGT(3);
1477                         M_IADD_IMM(REG_ZERO, 0, d);
1478                         M_BGE(1);
1479                         M_IADD_IMM(REG_ZERO, -1, d);
1480                         emit_store(jd, iptr, iptr->dst, d);
1481                         break;
1482
1483                 case ICMD_IF_FCMPEQ:    /* ..., value, value ==> ...                  */
1484                 case ICMD_IF_DCMPEQ:
1485
1486                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1487                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1488                         M_FCMPU(s1, s2);
1489                         M_BNAN(1);
1490                         M_BEQ(0);
1491                         codegen_addreference(cd, (basicblock *) iptr->target);
1492                         break;
1493
1494                 case ICMD_IF_FCMPNE:    /* ..., value, value ==> ...                  */
1495                 case ICMD_IF_DCMPNE:
1496
1497                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1498                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1499                         M_FCMPU(s1, s2);
1500                         M_BNAN(0);
1501                         codegen_addreference(cd, (basicblock *) iptr->target);
1502                         M_BNE(0);
1503                         codegen_addreference(cd, (basicblock *) iptr->target);
1504                         break;
1505
1506
1507                 case ICMD_IF_FCMPL_LT:  /* ..., value, value ==> ...                  */
1508                 case ICMD_IF_DCMPL_LT:
1509
1510                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1511                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1512                         M_FCMPU(s1, s2);
1513                         M_BNAN(0);
1514                         codegen_addreference(cd, (basicblock *) iptr->target);
1515                         M_BLT(0);
1516                         codegen_addreference(cd, (basicblock *) iptr->target);
1517                         break;
1518
1519                 case ICMD_IF_FCMPL_GT:  /* ..., value, value ==> ...                  */
1520                 case ICMD_IF_DCMPL_GT:
1521
1522                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1523                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1524                         M_FCMPU(s1, s2);
1525                         M_BNAN(1);
1526                         M_BGT(0);
1527                         codegen_addreference(cd, (basicblock *) iptr->target);
1528                         break;
1529
1530                 case ICMD_IF_FCMPL_LE:  /* ..., value, value ==> ...                  */
1531                 case ICMD_IF_DCMPL_LE:
1532
1533                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1534                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1535                         M_FCMPU(s1, s2);
1536                         M_BNAN(0);
1537                         codegen_addreference(cd, (basicblock *) iptr->target);
1538                         M_BLE(0);
1539                         codegen_addreference(cd, (basicblock *) iptr->target);
1540                         break;
1541
1542                 case ICMD_IF_FCMPL_GE:  /* ..., value, value ==> ...                  */
1543                 case ICMD_IF_DCMPL_GE:
1544
1545                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1546                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1547                         M_FCMPU(s1, s2);
1548                         M_BNAN(1);
1549                         M_BGE(0);
1550                         codegen_addreference(cd, (basicblock *) iptr->target);
1551                         break;
1552
1553                 case ICMD_IF_FCMPG_LT:  /* ..., value, value ==> ...                  */
1554                 case ICMD_IF_DCMPG_LT:
1555
1556                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1557                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1558                         M_FCMPU(s1, s2);
1559                         M_BNAN(1);
1560                         M_BLT(0);
1561                         codegen_addreference(cd, (basicblock *) iptr->target);
1562                         break;
1563
1564                 case ICMD_IF_FCMPG_GT:  /* ..., value, value ==> ...                  */
1565                 case ICMD_IF_DCMPG_GT:
1566
1567                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1568                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1569                         M_FCMPU(s1, s2);
1570                         M_BNAN(0);
1571                         codegen_addreference(cd, (basicblock *) iptr->target);
1572                         M_BGT(0);
1573                         codegen_addreference(cd, (basicblock *) iptr->target);
1574                         break;
1575
1576                 case ICMD_IF_FCMPG_LE:  /* ..., value, value ==> ...                  */
1577                 case ICMD_IF_DCMPG_LE:
1578
1579                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1580                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1581                         M_FCMPU(s1, s2);
1582                         M_BNAN(1);
1583                         M_BLE(0);
1584                         codegen_addreference(cd, (basicblock *) iptr->target);
1585                         break;
1586
1587                 case ICMD_IF_FCMPG_GE:  /* ..., value, value ==> ...                  */
1588                 case ICMD_IF_DCMPG_GE:
1589
1590                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1591                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1592                         M_FCMPU(s1, s2);
1593                         M_BNAN(0);
1594                         codegen_addreference(cd, (basicblock *) iptr->target);
1595                         M_BGE(0);
1596                         codegen_addreference(cd, (basicblock *) iptr->target);
1597                         break;
1598
1599
1600                 /* memory operations **************************************************/
1601
1602                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1603
1604                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1605                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1606                         gen_nullptr_check(s1);
1607                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1608                         emit_store(jd, iptr, iptr->dst, d);
1609                         break;
1610
1611                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1612
1613                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1614                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1615                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1616                         if (iptr->op1 == 0) {
1617                                 gen_nullptr_check(s1);
1618                                 gen_bound_check;
1619                         }
1620                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1621                         M_LBZX(d, s1, REG_ITMP2);
1622                         M_BSEXT(d, d);
1623                         emit_store(jd, iptr, iptr->dst, d);
1624                         break;
1625
1626                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1627
1628                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1629                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1630                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1631                         if (iptr->op1 == 0) {
1632                                 gen_nullptr_check(s1);
1633                                 gen_bound_check;
1634                         }
1635                         M_SLL_IMM(s2, 1, REG_ITMP2);
1636                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1637                         M_LHZX(d, s1, REG_ITMP2);
1638                         emit_store(jd, iptr, iptr->dst, d);
1639                         break;
1640
1641                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1642
1643                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1644                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1645                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1646                         if (iptr->op1 == 0) {
1647                                 gen_nullptr_check(s1);
1648                                 gen_bound_check;
1649                         }
1650                         M_SLL_IMM(s2, 1, REG_ITMP2);
1651                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1652                         M_LHAX(d, s1, REG_ITMP2);
1653                         emit_store(jd, iptr, iptr->dst, d);
1654                         break;
1655
1656                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1657
1658                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1659                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1660                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1661                         if (iptr->op1 == 0) {
1662                                 gen_nullptr_check(s1);
1663                                 gen_bound_check;
1664                         }
1665                         M_SLL_IMM(s2, 2, REG_ITMP2);
1666                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1667                         M_LWZX(d, s1, REG_ITMP2);
1668                         emit_store(jd, iptr, iptr->dst, d);
1669                         break;
1670
1671                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1672
1673                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1674                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1675                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1676                         if (iptr->op1 == 0) {
1677                                 gen_nullptr_check(s1);
1678                                 gen_bound_check;
1679                         }
1680                         M_SLL_IMM(s2, 3, REG_ITMP2);
1681                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1682                         M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1683                         emit_store(jd, iptr, iptr->dst, d);
1684                         break;
1685
1686                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1687
1688                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1689                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1690                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1691                         if (iptr->op1 == 0) {
1692                                 gen_nullptr_check(s1);
1693                                 gen_bound_check;
1694                         }
1695                         M_SLL_IMM(s2, 2, REG_ITMP2);
1696                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1697                         M_LFSX(d, s1, REG_ITMP2);
1698                         emit_store(jd, iptr, iptr->dst, d);
1699                         break;
1700
1701                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1702
1703                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1704                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1705                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1706                         if (iptr->op1 == 0) {
1707                                 gen_nullptr_check(s1);
1708                                 gen_bound_check;
1709                         }
1710                         M_SLL_IMM(s2, 3, REG_ITMP2);
1711                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1712                         M_LFDX(d, s1, REG_ITMP2);
1713                         emit_store(jd, iptr, iptr->dst, d);
1714                         break;
1715
1716                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1717
1718                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1719                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1720                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1721                         if (iptr->op1 == 0) {
1722                                 gen_nullptr_check(s1);
1723                                 gen_bound_check;
1724                         }
1725                         M_SLL_IMM(s2, 2, REG_ITMP2);
1726                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1727                         M_LWZX(d, s1, REG_ITMP2);
1728                         emit_store(jd, iptr, iptr->dst, d);
1729                         break;
1730
1731
1732                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1733
1734                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1735                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1736                         if (iptr->op1 == 0) {
1737                                 gen_nullptr_check(s1);
1738                                 gen_bound_check;
1739                         }
1740                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1741                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1742                         M_STBX(s3, s1, REG_ITMP2);
1743                         break;
1744
1745                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1746
1747                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1748                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1749                         if (iptr->op1 == 0) {
1750                                 gen_nullptr_check(s1);
1751                                 gen_bound_check;
1752                         }
1753                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1754                         M_SLL_IMM(s2, 1, REG_ITMP2);
1755                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1756                         M_STHX(s3, s1, REG_ITMP2);
1757                         break;
1758
1759                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1760
1761                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1762                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1763                         if (iptr->op1 == 0) {
1764                                 gen_nullptr_check(s1);
1765                                 gen_bound_check;
1766                         }
1767                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1768                         M_SLL_IMM(s2, 1, REG_ITMP2);
1769                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1770                         M_STHX(s3, s1, REG_ITMP2);
1771                         break;
1772
1773                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1774
1775                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1776                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1777                         if (iptr->op1 == 0) {
1778                                 gen_nullptr_check(s1);
1779                                 gen_bound_check;
1780                         }
1781                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1782                         M_SLL_IMM(s2, 2, REG_ITMP2);
1783                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1784                         M_STWX(s3, s1, REG_ITMP2);
1785                         break;
1786
1787                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1788
1789                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1790                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1791                         if (iptr->op1 == 0) {
1792                                 gen_nullptr_check(s1);
1793                                 gen_bound_check;
1794                         }
1795                         s3 = emit_load_s3_high(jd, iptr, src, REG_ITMP3);
1796                         M_SLL_IMM(s2, 3, REG_ITMP2);
1797                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1798                         M_STWX(s3, s1, REG_ITMP2);
1799                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1800                         s3 = emit_load_s3_low(jd, iptr, src, REG_ITMP3);
1801                         M_STWX(s3, s1, REG_ITMP2);
1802                         break;
1803
1804                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1805
1806                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1807                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1808                         if (iptr->op1 == 0) {
1809                                 gen_nullptr_check(s1);
1810                                 gen_bound_check;
1811                         }
1812                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1813                         M_SLL_IMM(s2, 2, REG_ITMP2);
1814                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1815                         M_STFSX(s3, s1, REG_ITMP2);
1816                         break;
1817
1818                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1819
1820                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1821                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1822                         if (iptr->op1 == 0) {
1823                                 gen_nullptr_check(s1);
1824                                 gen_bound_check;
1825                         }
1826                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1827                         M_SLL_IMM(s2, 3, REG_ITMP2);
1828                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1829                         M_STFDX(s3, s1, REG_ITMP2);
1830                         break;
1831
1832                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1833
1834                         s1 = emit_load_s1(jd, iptr, src->prev->prev, rd->argintregs[0]);
1835                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1836                         if (iptr->op1 == 0) {
1837                                 gen_nullptr_check(s1);
1838                                 gen_bound_check;
1839                         }
1840                         s3 = emit_load_s3(jd, iptr, src, rd->argintregs[1]);
1841
1842                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1843                         M_ALD(REG_ITMP3, REG_PV, disp);
1844                         M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
1845                         M_MTCTR(REG_ITMP3);
1846
1847                         M_INTMOVE(s1, rd->argintregs[0]);
1848                         M_INTMOVE(s3, rd->argintregs[1]);
1849
1850                         M_JSR;
1851                         M_TST(REG_RESULT);
1852                         M_BEQ(0);
1853                         codegen_add_arraystoreexception_ref(cd);
1854
1855                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1856                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1857                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1858                         M_SLL_IMM(s2, 2, REG_ITMP2);
1859                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1860                         M_STWX(s3, s1, REG_ITMP2);
1861                         break;
1862
1863
1864                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1865                                       /* op1 = type, val.a = field address            */
1866
1867                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1868                                 disp = dseg_addaddress(cd, NULL);
1869
1870                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1871                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1872
1873                                 if (opt_showdisassemble)
1874                                         M_NOP;
1875
1876                         } else {
1877                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1878
1879                                 disp = dseg_addaddress(cd, &(fi->value));
1880
1881                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1882                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1883
1884                                         if (opt_showdisassemble)
1885                                                 M_NOP;
1886                                 }
1887                         }
1888
1889                         M_ALD(REG_ITMP1, REG_PV, disp);
1890                         switch (iptr->op1) {
1891                         case TYPE_INT:
1892                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1893                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1894                                 break;
1895                         case TYPE_LNG:
1896                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1897                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1898                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1899                                 break;
1900                         case TYPE_ADR:
1901                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1902                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1903                                 break;
1904                         case TYPE_FLT:
1905                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1906                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1907                                 break;
1908                         case TYPE_DBL:
1909                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1910                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1911                                 break;
1912                         }
1913                         emit_store(jd, iptr, iptr->dst, d);
1914                         break;
1915
1916                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1917                                       /* op1 = type, val.a = field address            */
1918
1919
1920                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1921                                 disp = dseg_addaddress(cd, NULL);
1922
1923                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1924                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1925
1926                                 if (opt_showdisassemble)
1927                                         M_NOP;
1928
1929                         } else {
1930                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1931
1932                                 disp = dseg_addaddress(cd, &(fi->value));
1933
1934                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1935                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1936
1937                                         if (opt_showdisassemble)
1938                                                 M_NOP;
1939                                 }
1940                         }
1941
1942                         M_ALD(REG_ITMP1, REG_PV, disp);
1943                         switch (iptr->op1) {
1944                         case TYPE_INT:
1945                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
1946                                 M_IST_INTERN(s1, REG_ITMP1, 0);
1947                                 break;
1948                         case TYPE_LNG:
1949                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
1950                                 M_LST_INTERN(s1, REG_ITMP1, 0);
1951                                 break;
1952                         case TYPE_ADR:
1953                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
1954                                 M_AST_INTERN(s1, REG_ITMP1, 0);
1955                                 break;
1956                         case TYPE_FLT:
1957                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP2);
1958                                 M_FST_INTERN(s1, REG_ITMP1, 0);
1959                                 break;
1960                         case TYPE_DBL:
1961                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP2);
1962                                 M_DST_INTERN(s1, REG_ITMP1, 0);
1963                                 break;
1964                         }
1965                         break;
1966
1967
1968                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1969                                       /* op1 = type, val.i = field offset             */
1970
1971                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1972                         gen_nullptr_check(s1);
1973
1974                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1975                                 codegen_addpatchref(cd, PATCHER_get_putfield,
1976                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
1977
1978                                 if (opt_showdisassemble)
1979                                         M_NOP;
1980
1981                                 disp = 0;
1982
1983                         } else {
1984                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
1985                         }
1986
1987                         switch (iptr->op1) {
1988                         case TYPE_INT:
1989                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1990                                 M_ILD(d, s1, disp);
1991                                 break;
1992                         case TYPE_LNG:
1993                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1994                                 M_LLD(d, s1, disp);
1995                                 break;
1996                         case TYPE_ADR:
1997                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1998                                 M_ALD(d, s1, disp);
1999                                 break;
2000                         case TYPE_FLT:
2001                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2002                                 M_FLD(d, s1, disp);
2003                                 break;
2004                         case TYPE_DBL:
2005                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2006                                 M_DLD(d, s1, disp);
2007                                 break;
2008                         }
2009                         emit_store(jd, iptr, iptr->dst, d);
2010                         break;
2011
2012                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2013                                       /* op1 = type, val.i = field offset             */
2014
2015                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2016                         gen_nullptr_check(s1);
2017
2018                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2019                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2020                         } else {
2021                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2022                         }
2023
2024                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2025                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2026                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2027
2028                                 if (opt_showdisassemble)
2029                                         M_NOP;
2030
2031                                 disp = 0;
2032
2033                         } else {
2034                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2035                         }
2036
2037                         switch (iptr->op1) {
2038                         case TYPE_INT:
2039                                 M_IST(s2, s1, disp);
2040                                 break;
2041                         case TYPE_LNG:
2042                                 M_LST(s2, s1, disp);
2043                                 break;
2044                         case TYPE_ADR:
2045                                 M_AST(s2, s1, disp);
2046                                 break;
2047                         case TYPE_FLT:
2048                                 M_FST(s2, s1, disp);
2049                                 break;
2050                         case TYPE_DBL:
2051                                 M_DST(s2, s1, disp);
2052                                 break;
2053                         }
2054                         break;
2055
2056
2057                 /* branch operations **************************************************/
2058
2059                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2060
2061                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2062                         M_LNGMOVE(s1, REG_ITMP1_XPTR);
2063
2064 #ifdef ENABLE_VERIFIER
2065                         if (iptr->val.a) {
2066                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2067                                                                         (unresolved_class *) iptr->val.a, 0);
2068
2069                                 if (opt_showdisassemble)
2070                                         M_NOP;
2071                         }
2072 #endif /* ENABLE_VERIFIER */
2073
2074                         disp = dseg_addaddress(cd, asm_handle_exception);
2075                         M_ALD(REG_ITMP2, REG_PV, disp);
2076                         M_MTCTR(REG_ITMP2);
2077
2078                         if (jd->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
2079                         M_BL(0);                                        /* get current PC */
2080                         M_MFLR(REG_ITMP2_XPC);
2081                         if (jd->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
2082                         M_RTS;                                          /* jump to CTR    */
2083
2084                         ALIGNCODENOP;
2085                         break;
2086
2087                 case ICMD_GOTO:         /* ... ==> ...                                */
2088                                         /* op1 = target JavaVM pc                     */
2089                         M_BR(0);
2090                         codegen_addreference(cd, (basicblock *) iptr->target);
2091                         ALIGNCODENOP;
2092                         break;
2093
2094                 case ICMD_JSR:          /* ... ==> ...                                */
2095                                         /* op1 = target JavaVM pc                     */
2096
2097                         if (jd->isleafmethod)
2098                                 M_MFLR(REG_ITMP2);
2099                         M_BL(0);
2100                         M_MFLR(REG_ITMP1);
2101                         M_IADD_IMM(REG_ITMP1, jd->isleafmethod ? 4*4 : 3*4, REG_ITMP1);
2102                         if (jd->isleafmethod)
2103                                 M_MTLR(REG_ITMP2);
2104                         M_BR(0);
2105                         codegen_addreference(cd, (basicblock *) iptr->target);
2106                         break;
2107
2108                 case ICMD_RET:          /* ... ==> ...                                */
2109                                         /* op1 = local variable                       */
2110
2111                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2112                         if (var->flags & INMEMORY) {
2113                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2114                                 M_MTCTR(REG_ITMP1);
2115                         } else {
2116                                 M_MTCTR(var->regoff);
2117                         }
2118                         M_RTS;
2119                         ALIGNCODENOP;
2120                         break;
2121
2122                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2123                                         /* op1 = target JavaVM pc                     */
2124
2125                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2126                         M_TST(s1);
2127                         M_BEQ(0);
2128                         codegen_addreference(cd, (basicblock *) iptr->target);
2129                         break;
2130
2131                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2132                                         /* op1 = target JavaVM pc                     */
2133
2134                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2135                         M_TST(s1);
2136                         M_BNE(0);
2137                         codegen_addreference(cd, (basicblock *) iptr->target);
2138                         break;
2139
2140                 case ICMD_IFLT:
2141                 case ICMD_IFLE:
2142                 case ICMD_IFNE:
2143                 case ICMD_IFGT:
2144                 case ICMD_IFGE:
2145                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2146                                         /* op1 = target JavaVM pc, val.i = constant   */
2147
2148                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2149                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767))
2150                                 M_CMPI(s1, iptr->val.i);
2151                         else {
2152                                 ICONST(REG_ITMP2, iptr->val.i);
2153                                 M_CMP(s1, REG_ITMP2);
2154                         }
2155                         switch (iptr->opc) {
2156                         case ICMD_IFLT:
2157                                 M_BLT(0);
2158                                 break;
2159                         case ICMD_IFLE:
2160                                 M_BLE(0);
2161                                 break;
2162                         case ICMD_IFNE:
2163                                 M_BNE(0);
2164                                 break;
2165                         case ICMD_IFGT:
2166                                 M_BGT(0);
2167                                 break;
2168                         case ICMD_IFGE:
2169                                 M_BGE(0);
2170                                 break;
2171                         case ICMD_IFEQ:
2172                                 M_BEQ(0);
2173                                 break;
2174                         }
2175                         codegen_addreference(cd, (basicblock *) iptr->target);
2176                         break;
2177
2178
2179                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2180                                         /* op1 = target JavaVM pc, val.l = constant   */
2181
2182                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2183                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2184                         if (iptr->val.l == 0) {
2185                                 M_OR_TST(s1, s2, REG_ITMP3);
2186                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2187                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2188                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2189                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2190                         } else {
2191                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2192                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2193                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2194                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2195                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2196                         }
2197                         M_BEQ(0);
2198                         codegen_addreference(cd, (basicblock *) iptr->target);
2199                         break;
2200
2201                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2202                                         /* op1 = target JavaVM pc, val.l = constant   */
2203                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2204                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2205                         if (iptr->val.l == 0) {
2206                                 /* if high word is less than zero, the whole long is too */
2207                                 M_CMPI(s2, 0);
2208                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2209                                 M_CMPI(s2, 0);
2210                                 M_BLT(0);
2211                                 codegen_addreference(cd, (basicblock *) iptr->target);
2212                                 M_BGT(2);
2213                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2214                         } else {
2215                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2216                                 M_CMP(s2, REG_ITMP3);
2217                                 M_BLT(0);
2218                                 codegen_addreference(cd, (basicblock *) iptr->target);
2219                                 M_BGT(3);
2220                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2221                                 M_CMPU(s1, REG_ITMP3);
2222                         }
2223                         M_BLT(0);
2224                         codegen_addreference(cd, (basicblock *) iptr->target);
2225                         break;
2226
2227                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2228                                         /* op1 = target JavaVM pc, val.l = constant   */
2229
2230                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2231                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2232 /*                      if (iptr->val.l == 0) { */
2233 /*                              M_OR(s1, s2, REG_ITMP3); */
2234 /*                              M_CMPI(REG_ITMP3, 0); */
2235
2236 /*                      } else  */
2237                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2238                                 M_CMPI(s2, 0);
2239                                 M_BLT(0);
2240                                 codegen_addreference(cd, (basicblock *) iptr->target);
2241                                 M_BGT(2);
2242                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2243                         } else {
2244                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2245                                 M_CMP(s2, REG_ITMP3);
2246                                 M_BLT(0);
2247                                 codegen_addreference(cd, (basicblock *) iptr->target);
2248                                 M_BGT(3);
2249                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2250                                 M_CMPU(s1, REG_ITMP3);
2251                         }
2252                         M_BLE(0);
2253                         codegen_addreference(cd, (basicblock *) iptr->target);
2254                         break;
2255
2256                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2257                                         /* op1 = target JavaVM pc, val.l = constant   */
2258
2259                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2260                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2261                         if (iptr->val.l == 0) {
2262                                 M_OR_TST(s1, s2, REG_ITMP3);
2263                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2264                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2265                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2266                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2267                         } else {
2268                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2269                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2270                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2271                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2272                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2273                         }
2274                         M_BNE(0);
2275                         codegen_addreference(cd, (basicblock *) iptr->target);
2276                         break;
2277
2278                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2279                                         /* op1 = target JavaVM pc, val.l = constant   */
2280
2281                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2282                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2283 /*                      if (iptr->val.l == 0) { */
2284 /*                              M_OR(s1, s2, REG_ITMP3); */
2285 /*                              M_CMPI(REG_ITMP3, 0); */
2286
2287 /*                      } else  */
2288                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2289                                 M_CMPI(s2, 0);
2290                                 M_BGT(0);
2291                                 codegen_addreference(cd, (basicblock *) iptr->target);
2292                                 M_BLT(2);
2293                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2294                         } else {
2295                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2296                                 M_CMP(s2, REG_ITMP3);
2297                                 M_BGT(0);
2298                                 codegen_addreference(cd, (basicblock *) iptr->target);
2299                                 M_BLT(3);
2300                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2301                                 M_CMPU(s1, REG_ITMP3);
2302                         }
2303                         M_BGT(0);
2304                         codegen_addreference(cd, (basicblock *) iptr->target);
2305                         break;
2306
2307                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2308                                         /* op1 = target JavaVM pc, val.l = constant   */
2309
2310                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2311                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2312                         if (iptr->val.l == 0) {
2313                                 /* if high word is greater equal zero, the whole long is too */
2314                                 M_CMPI(s2, 0);
2315                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2316                                 M_CMPI(s2, 0);
2317                                 M_BGT(0);
2318                                 codegen_addreference(cd, (basicblock *) iptr->target);
2319                                 M_BLT(2);
2320                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2321                         } else {
2322                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2323                                 M_CMP(s2, REG_ITMP3);
2324                                 M_BGT(0);
2325                                 codegen_addreference(cd, (basicblock *) iptr->target);
2326                                 M_BLT(3);
2327                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2328                                 M_CMPU(s1, REG_ITMP3);
2329                         }
2330                         M_BGE(0);
2331                         codegen_addreference(cd, (basicblock *) iptr->target);
2332                         break;
2333
2334                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2335                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
2336
2337                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2338                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2339                         M_CMP(s1, s2);
2340                         M_BEQ(0);
2341                         codegen_addreference(cd, (basicblock *) iptr->target);
2342                         break;
2343
2344                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2345                                         /* op1 = target JavaVM pc                     */
2346
2347                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2348                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2349                         M_CMP(s1, s2);
2350                         /* load low-bits before the branch, so we know the distance */
2351                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2352                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2353                         M_BNE(2);
2354                         M_CMP(s1, s2);
2355                         M_BEQ(0);
2356                         codegen_addreference(cd, (basicblock *) iptr->target);
2357                         break;
2358
2359                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2360                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
2361
2362                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2363                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2364                         M_CMP(s1, s2);
2365                         M_BNE(0);
2366                         codegen_addreference(cd, (basicblock *) iptr->target);
2367                         break;
2368
2369                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
2370                                         /* op1 = target JavaVM pc                     */
2371
2372                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2373                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2374                         M_CMP(s1, s2);
2375                         M_BNE(0);
2376                         codegen_addreference(cd, (basicblock *) iptr->target);
2377                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2378                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2379                         M_CMP(s1, s2);
2380                         M_BNE(0);
2381                         codegen_addreference(cd, (basicblock *) iptr->target);
2382                         break;
2383
2384                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2385                                         /* op1 = target JavaVM pc                     */
2386
2387                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2388                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2389                         M_CMP(s1, s2);
2390                         M_BLT(0);
2391                         codegen_addreference(cd, (basicblock *) iptr->target);
2392                         break;
2393
2394                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2395                                         /* op1 = target JavaVM pc                     */
2396
2397                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2398                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2399                         M_CMP(s1, s2);
2400                         M_BLT(0);
2401                         codegen_addreference(cd, (basicblock *) iptr->target);
2402                         /* load low-bits before the branch, so we know the distance */
2403                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2404                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2405                         M_BGT(2);
2406                         M_CMPU(s1, s2);
2407                         M_BLT(0);
2408                         codegen_addreference(cd, (basicblock *) iptr->target);
2409                         break;
2410
2411                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2412                                         /* op1 = target JavaVM pc                     */
2413
2414                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2415                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2416                         M_CMP(s1, s2);
2417                         M_BGT(0);
2418                         codegen_addreference(cd, (basicblock *) iptr->target);
2419                         break;
2420
2421                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2422                                         /* op1 = target JavaVM pc                     */
2423
2424                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2425                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2426                         M_CMP(s1, s2);
2427                         M_BGT(0);
2428                         codegen_addreference(cd, (basicblock *) iptr->target);
2429                         /* load low-bits before the branch, so we know the distance */
2430                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2431                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2432                         M_BLT(2);
2433                         M_CMPU(s1, s2);
2434                         M_BGT(0);
2435                         codegen_addreference(cd, (basicblock *) iptr->target);
2436                         break;
2437
2438                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2439                                         /* op1 = target JavaVM pc                     */
2440
2441                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2442                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2443                         M_CMP(s1, s2);
2444                         M_BLE(0);
2445                         codegen_addreference(cd, (basicblock *) iptr->target);
2446                         break;
2447
2448                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2449                                         /* op1 = target JavaVM pc                     */
2450
2451                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2452                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2453                         M_CMP(s1, s2);
2454                         M_BLT(0);
2455                         codegen_addreference(cd, (basicblock *) iptr->target);
2456                         /* load low-bits before the branch, so we know the distance */
2457                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2458                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2459                         M_BGT(2);
2460                         M_CMPU(s1, s2);
2461                         M_BLE(0);
2462                         codegen_addreference(cd, (basicblock *) iptr->target);
2463                         break;
2464
2465                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2466                                         /* op1 = target JavaVM pc                     */
2467
2468                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2469                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2470                         M_CMP(s1, s2);
2471                         M_BGE(0);
2472                         codegen_addreference(cd, (basicblock *) iptr->target);
2473                         break;
2474
2475                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2476                                         /* op1 = target JavaVM pc                     */
2477
2478                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2479                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2480                         M_CMP(s1, s2);
2481                         M_BGT(0);
2482                         codegen_addreference(cd, (basicblock *) iptr->target);
2483                         /* load low-bits before the branch, so we know the distance */
2484                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2485                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2486                         M_BLT(2);
2487                         M_CMPU(s1, s2);
2488                         M_BGE(0);
2489                         codegen_addreference(cd, (basicblock *) iptr->target);
2490                         break;
2491
2492                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2493                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2494
2495                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2496                         M_LNGMOVE(s1, REG_RESULT);
2497                         goto nowperformreturn;
2498
2499                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2500
2501                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2502                         M_LNGMOVE(s1, REG_RESULT);
2503
2504 #ifdef ENABLE_VERIFIER
2505                         if (iptr->val.a) {
2506                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2507                                                                         (unresolved_class *) iptr->val.a, 0);
2508
2509                                 if (opt_showdisassemble)
2510                                         M_NOP;
2511                         }
2512 #endif /* ENABLE_VERIFIER */
2513
2514                         goto nowperformreturn;
2515
2516                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2517                 case ICMD_DRETURN:
2518
2519                         s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2520                         M_FLTMOVE(s1, REG_FRESULT);
2521                         goto nowperformreturn;
2522
2523                 case ICMD_RETURN:      /* ...  ==> ...                                */
2524
2525 nowperformreturn:
2526                         {
2527                         s4 i, p;
2528
2529                         p = stackframesize;
2530
2531                         /* call trace function */
2532
2533                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
2534                                 emit_verbosecall_exit(jd);
2535                         }
2536
2537 #if defined(ENABLE_THREADS)
2538                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2539                                 disp = dseg_addaddress(cd, LOCK_monitor_exit);
2540                                 M_ALD(REG_ITMP3, REG_PV, disp);
2541                                 M_ALD(REG_ITMP3, REG_ITMP3, 0); /* TOC */
2542                                 M_MTCTR(REG_ITMP3);
2543
2544                                 /* we need to save the proper return value */
2545
2546                                 switch (iptr->opc) {
2547                                 case ICMD_LRETURN:
2548                                 case ICMD_IRETURN:
2549                                 case ICMD_ARETURN:
2550                                         /* fall through */
2551                                         M_LST(REG_RESULT , REG_SP, rd->memuse * 4 + 8);
2552                                         break;
2553                                 case ICMD_FRETURN:
2554                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 8);
2555                                         break;
2556                                 case ICMD_DRETURN:
2557                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 8);
2558                                         break;
2559                                 }
2560
2561                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2562                                 M_JSR;
2563
2564                                 /* and now restore the proper return value */
2565
2566                                 switch (iptr->opc) {
2567                                 case ICMD_LRETURN:
2568                                 case ICMD_IRETURN:
2569                                 case ICMD_ARETURN:
2570                                         /* fall through */
2571                                         M_LLD(REG_RESULT , REG_SP, rd->memuse * 4 + 8);
2572                                         break;
2573                                 case ICMD_FRETURN:
2574                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 8);
2575                                         break;
2576                                 case ICMD_DRETURN:
2577                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 8);
2578                                         break;
2579                                 }
2580                         }
2581 #endif
2582
2583                         /* restore return address                                         */
2584
2585                         if (!jd->isleafmethod) {
2586                                 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
2587                                    may have a displacement overflow. */
2588
2589                                 M_ALD(REG_ITMP1, REG_SP, p * 8 + LA_LR_OFFSET);
2590                                 M_MTLR(REG_ITMP1);
2591                         }
2592
2593                         /* restore saved registers                                        */
2594
2595                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2596                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2597                         }
2598                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2599                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2600                         }
2601
2602                         /* deallocate stack                                               */
2603
2604                         if (stackframesize)
2605                                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
2606
2607                         M_RET;
2608                         ALIGNCODENOP;
2609                         }
2610                         break;
2611
2612
2613                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2614                         {
2615                         s4 i, l, *s4ptr;
2616                         void **tptr;
2617
2618                         tptr = (void **) iptr->target;
2619
2620                         s4ptr = iptr->val.a;
2621                         l = s4ptr[1];                          /* low     */
2622                         i = s4ptr[2];                          /* high    */
2623
2624                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2625                         if (l == 0) {
2626                                 M_INTMOVE(s1, REG_ITMP1);
2627                         } else if (l <= 32768) {
2628                                 M_LDA(REG_ITMP1, s1, -l);
2629                         } else {
2630                                 ICONST(REG_ITMP2, l);
2631                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2632                         }
2633                         i = i - l + 1;
2634
2635                         /* range check */
2636
2637                         M_CMPUI(REG_ITMP1, i - 1);
2638                         M_BGT(0);
2639                         codegen_addreference(cd, (basicblock *) tptr[0]);
2640
2641                         /* build jump table top down and use address of lowest entry */
2642
2643                         /* s4ptr += 3 + i; */
2644                         tptr += i;
2645
2646                         while (--i >= 0) {
2647                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2648                                 --tptr;
2649                         }
2650                         }
2651
2652                         /* length of dataseg after last dseg_addtarget is used by load */
2653
2654                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2655                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2656                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2657                         M_MTCTR(REG_ITMP2);
2658                         M_RTS;
2659                         ALIGNCODENOP;
2660                         break;
2661
2662
2663                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2664                         {
2665                         s4 i, l, val, *s4ptr;
2666                         void **tptr;
2667
2668                         tptr = (void **) iptr->target;
2669
2670                         s4ptr = iptr->val.a;
2671                         l = s4ptr[0];                          /* default  */
2672                         i = s4ptr[1];                          /* count    */
2673
2674                         MCODECHECK((i<<2)+8);
2675                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2676                         while (--i >= 0) {
2677                                 s4ptr += 2;
2678                                 ++tptr;
2679
2680                                 val = s4ptr[0];
2681                                 if ((val >= -32768) && (val <= 32767)) {
2682                                         M_CMPI(s1, val);
2683                                 } else {
2684                                         a = dseg_adds4(cd, val);
2685                                         M_ILD(REG_ITMP2, REG_PV, a);
2686                                         M_CMP(s1, REG_ITMP2);
2687                                 }
2688                                 M_BEQ(0);
2689                                 codegen_addreference(cd, (basicblock *) tptr[0]);
2690                         }
2691
2692                         M_BR(0);
2693                         tptr = (void **) iptr->target;
2694                         codegen_addreference(cd, (basicblock *) tptr[0]);
2695
2696                         ALIGNCODENOP;
2697                         break;
2698                         }
2699
2700
2701                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2702                                         /* op1 = arg count val.a = builtintable entry */
2703
2704                         bte = iptr->val.a;
2705                         md = bte->md;
2706                         goto gen_method;
2707
2708                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2709                                         /* op1 = arg count, val.a = method pointer    */
2710
2711                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2712                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2713                 case ICMD_INVOKEINTERFACE:
2714
2715                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2716                                 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
2717                                 lm = NULL;
2718                         }
2719                         else {
2720                                 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
2721                                 md = lm->parseddesc;
2722                         }
2723
2724 gen_method:
2725                         s3 = md->paramcount;
2726
2727                         MCODECHECK((s3 << 1) + 64);
2728
2729                         /* copy arguments to registers or stack location */
2730
2731                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2732                                 if (src->varkind == ARGVAR)
2733                                         continue;
2734                                 if (IS_INT_LNG_TYPE(src->type)) {
2735                                         if (!md->params[s3].inmemory) {
2736                                                 if (IS_2_WORD_TYPE(src->type)) {
2737                                                         s1 = rd->argintregs[md->params[s3].regoff];     /* removed PACKREGS */
2738                                                         d = emit_load_s1(jd, iptr, src, s1);
2739                                                         M_LNGMOVE(d, s1);
2740                                                 } else {
2741                                                         s1 = rd->argintregs[md->params[s3].regoff];
2742                                                         d = emit_load_s1(jd, iptr, src, s1);
2743                                                         M_INTMOVE(d, s1);
2744                                                 }
2745
2746                                         } else {
2747                                                 if (IS_2_WORD_TYPE(src->type)) {
2748                                                         d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2749                                                         M_LST(d, REG_SP, md->params[s3].regoff * 8);    /* XXX */
2750                                                 } else {
2751                                                         d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2752                                                         M_LST(d, REG_SP, md->params[s3].regoff * 8);
2753                                                 }
2754                                         }
2755
2756                                 } else {
2757                                         if (!md->params[s3].inmemory) {
2758                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2759                                                 d = emit_load_s1(jd, iptr, src, s1);
2760                                                 M_FLTMOVE(d, s1);
2761
2762                                         } else {
2763                                                 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
2764                                                 if (IS_2_WORD_TYPE(src->type))
2765                                                         M_DST(d, REG_SP, md->params[s3].regoff * 8);
2766                                                 else
2767                                                         M_FST(d, REG_SP, md->params[s3].regoff * 8);
2768                                         }
2769                                 }
2770                         } /* end of for */
2771
2772                         switch (iptr->opc) {
2773                         case ICMD_BUILTIN:
2774                                 disp = dseg_addaddress(cd, bte->fp);
2775                                 d = md->returntype.type;
2776
2777                                 M_ALD(REG_PV, REG_PV, disp);    /* pointer to built-in-function descriptor */
2778                                 M_ALD(REG_ITMP1, REG_PV, 0);    /* function entry point address */
2779                                 M_ALD(REG_ITMP2, REG_PV, 8);    /* TOC of callee */
2780                                 M_MOV(REG_TOC, REG_ITMP2);              /* load TOC for callee */
2781                                 M_MTCTR(REG_ITMP1);
2782                                 M_JSR;
2783                                 /* TODO: restore TOC */
2784                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2785                                 M_MFLR(REG_ITMP1);
2786                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2787
2788                                 /* if op1 == true, we need to check for an exception */
2789
2790                                 if (iptr->op1 == true) {
2791                                         M_CMPI(REG_RESULT, 0);
2792                                         M_BEQ(0);
2793                                         codegen_add_fillinstacktrace_ref(cd);
2794                                 }
2795                                 break;
2796
2797                         case ICMD_INVOKESPECIAL:
2798                                 gen_nullptr_check(rd->argintregs[0]);
2799                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2800                                 /* fall through */
2801
2802                         case ICMD_INVOKESTATIC:
2803                                 if (lm == NULL) {
2804                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2805
2806                                         disp = dseg_addaddress(cd, NULL);
2807
2808                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2809                                                                                 um, disp);
2810
2811                                         if (opt_showdisassemble)
2812                                                 M_NOP;
2813
2814                                         d = md->returntype.type;
2815
2816                                 } else {
2817                                         disp = dseg_addaddress(cd, lm->stubroutine);
2818                                         d = md->returntype.type;
2819                                 }
2820
2821                                 M_ALD(REG_PV, REG_PV, disp);
2822                                 M_MTCTR(REG_PV);
2823                                 M_JSR;
2824                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2825                                 M_MFLR(REG_ITMP1);
2826                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2827                                 break;
2828
2829                         case ICMD_INVOKEVIRTUAL:
2830                                 gen_nullptr_check(rd->argintregs[0]);
2831
2832                                 if (lm == NULL) {
2833                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2834
2835                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2836
2837                                         if (opt_showdisassemble)
2838                                                 M_NOP;
2839
2840                                         s1 = 0;
2841                                         d = md->returntype.type;
2842
2843                                 } else {
2844                                         s1 = OFFSET(vftbl_t, table[0]) +
2845                                                 sizeof(methodptr) * lm->vftblindex;
2846                                         d = md->returntype.type;
2847                                 }
2848
2849                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2850                                           OFFSET(java_objectheader, vftbl));
2851                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2852                                 M_MTCTR(REG_PV);
2853                                 M_JSR;
2854                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2855                                 M_MFLR(REG_ITMP1);
2856                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2857                                 break;
2858
2859                         case ICMD_INVOKEINTERFACE:
2860                                 gen_nullptr_check(rd->argintregs[0]);
2861
2862                                 if (lm == NULL) {
2863                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2864
2865                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2866
2867                                         if (opt_showdisassemble)
2868                                                 M_NOP;
2869
2870                                         s1 = 0;
2871                                         s2 = 0;
2872                                         d = md->returntype.type;
2873
2874                                 } else {
2875                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2876                                                 sizeof(methodptr*) * lm->class->index;
2877
2878                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2879
2880                                         d = md->returntype.type;
2881                                 }
2882
2883                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2884                                           OFFSET(java_objectheader, vftbl));
2885                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2886                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2887                                 M_MTCTR(REG_PV);
2888                                 M_JSR;
2889                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2890                                 M_MFLR(REG_ITMP1);
2891                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2892                                 break;
2893                         }
2894
2895                         /* d contains return type */
2896
2897                         if (d != TYPE_VOID) {
2898                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2899                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
2900                                                 /*s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst,
2901                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT)); FIXME*/
2902                                                 /*M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), s1); FIXME*/
2903                                         } else {
2904                                                 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
2905                                                 M_INTMOVE(REG_RESULT, s1);
2906                                         }
2907                                 } else {
2908                                         s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
2909                                         M_FLTMOVE(REG_FRESULT, s1);
2910                                 }
2911                                 emit_store(jd, iptr, iptr->dst, s1);
2912                         }
2913                         break;
2914
2915
2916                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2917                                       /* op1:   0 == array, 1 == class                */
2918                                       /* val.a: (classinfo*) superclass               */
2919
2920                         /*  superclass is an interface:
2921                          *
2922                          *  OK if ((sub == NULL) ||
2923                          *         (sub->vftbl->interfacetablelength > super->index) &&
2924                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2925                          *
2926                          *  superclass is a class:
2927                          *
2928                          *  OK if ((sub == NULL) || (0
2929                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2930                          *         super->vftbl->diffvall));
2931                          */
2932
2933                         if (iptr->op1 == 1) {
2934                                 /* object type cast-check */
2935
2936                                 classinfo *super;
2937                                 vftbl_t   *supervftbl;
2938                                 s4         superindex;
2939
2940                                 super = (classinfo *) iptr->val.a;
2941
2942                                 if (!super) {
2943                                         superindex = 0;
2944                                         supervftbl = NULL;
2945
2946                                 } else {
2947                                         superindex = super->index;
2948                                         supervftbl = super->vftbl;
2949                                 }
2950
2951 #if defined(ENABLE_THREADS)
2952                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2953 #endif
2954                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2955
2956                                 /* calculate interface checkcast code size */
2957
2958                                 s2 = 7;
2959                                 if (!super)
2960                                         s2 += (opt_showdisassemble ? 1 : 0);
2961
2962                                 /* calculate class checkcast code size */
2963
2964                                 s3 = 8 + (s1 == REG_ITMP1);
2965                                 if (!super)
2966                                         s3 += (opt_showdisassemble ? 1 : 0);
2967
2968                                 /* if class is not resolved, check which code to call */
2969
2970                                 if (!super) {
2971                                         M_TST(s1);
2972                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2973
2974                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2975
2976                                         codegen_addpatchref(cd,
2977                                                                                 PATCHER_checkcast_instanceof_flags,
2978                                                                                 (constant_classref *) iptr->target,
2979                                                                                 disp);
2980
2981                                         if (opt_showdisassemble)
2982                                                 M_NOP;
2983
2984                                         M_ILD(REG_ITMP2, REG_PV, disp);
2985                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2986                                         M_BEQ(s2 + 1);
2987                                 }
2988
2989                                 /* interface checkcast code */
2990
2991                                 if (!super || (super->flags & ACC_INTERFACE)) {
2992                                         if (super) {
2993                                                 M_TST(s1);
2994                                                 M_BEQ(s2);
2995
2996                                         } else {
2997                                                 codegen_addpatchref(cd,
2998                                                                                         PATCHER_checkcast_instanceof_interface,
2999                                                                                         (constant_classref *) iptr->target,
3000                                                                                         0);
3001
3002                                                 if (opt_showdisassemble)
3003                                                         M_NOP;
3004                                         }
3005
3006                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3007                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3008                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3009                                         M_BLE(0);
3010                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1?? */
3011                                         M_ALD(REG_ITMP3, REG_ITMP2,
3012                                                   OFFSET(vftbl_t, interfacetable[0]) -
3013                                                   superindex * sizeof(methodptr*));
3014                                         M_TST(REG_ITMP3);
3015                                         M_BEQ(0);
3016                                         codegen_add_classcastexception_ref(cd, s1);     /*XXX s1??*/
3017
3018                                         if (!super)
3019                                                 M_BR(s3);
3020                                 }
3021
3022                                 /* class checkcast code */
3023
3024                                 if (!super || !(super->flags & ACC_INTERFACE)) {
3025                                         disp = dseg_addaddress(cd, supervftbl);
3026
3027                                         if (super) {
3028                                                 M_TST(s1);
3029                                                 M_BEQ(s3);
3030
3031                                         } else {
3032                                                 codegen_addpatchref(cd, PATCHER_checkcast_class,
3033                                                                                         (constant_classref *) iptr->target,
3034                                                                                         disp);
3035
3036                                                 if (opt_showdisassemble)
3037                                                         M_NOP;
3038                                         }
3039
3040                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3041 #if defined(ENABLE_THREADS)
3042                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3043 #endif
3044                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3045                                         M_ALD(REG_ITMP2, REG_PV, disp);
3046                                         if (s1 != REG_ITMP1) {
3047                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
3048                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3049 #if defined(ENABLE_THREADS)
3050                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3051 #endif
3052                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
3053                                         } else {
3054                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3055                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3056                                                 M_ALD(REG_ITMP2, REG_PV, disp);
3057                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3058 #if defined(ENABLE_THREADS)
3059                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3060 #endif
3061                                         }
3062                                         M_CMPU(REG_ITMP3, REG_ITMP2);
3063                                         M_BGT(0);
3064                                         codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
3065                                 }
3066                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3067
3068                         } else {
3069                                 /* array type cast-check */
3070
3071                                 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3072                                 M_INTMOVE(s1, rd->argintregs[0]);
3073
3074                                 disp = dseg_addaddress(cd, iptr->val.a);
3075
3076                                 if (iptr->val.a == NULL) {
3077                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3078                                                                                 (constant_classref *) iptr->target,
3079                                                                                 disp);
3080
3081                                         if (opt_showdisassemble)
3082                                                 M_NOP;
3083                                 }
3084
3085                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3086                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3087                                 M_ALD(REG_ITMP2, REG_PV, disp);
3088                                 M_MTCTR(REG_ITMP2);
3089                                 M_JSR;
3090                                 M_TST(REG_RESULT);
3091                                 M_BEQ(0);
3092                                 codegen_add_classcastexception_ref(cd, s1); /* XXX s1? */
3093
3094                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3095                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3096                         }
3097                         M_INTMOVE(s1, d);
3098                         emit_store(jd, iptr, iptr->dst, d);
3099                         break;
3100
3101                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3102                                       /* val.a: (classinfo*) superclass               */
3103
3104                         /*  superclass is an interface:
3105                          *
3106                          *  return (sub != NULL) &&
3107                          *         (sub->vftbl->interfacetablelength > super->index) &&
3108                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3109                          *
3110                          *  superclass is a class:
3111                          *
3112                          *  return ((sub != NULL) && (0
3113                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3114                          *          super->vftbl->diffvall));
3115                          */
3116
3117                         {
3118                         classinfo *super;
3119                         vftbl_t   *supervftbl;
3120                         s4         superindex;
3121
3122                         super = (classinfo *) iptr->val.a;
3123
3124                         if (!super) {
3125                                 superindex = 0;
3126                                 supervftbl = NULL;
3127
3128                         } else {
3129                                 superindex = super->index;
3130                                 supervftbl = super->vftbl;
3131                         }
3132
3133 #if defined(ENABLE_THREADS)
3134             codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3135 #endif
3136                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3137                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3138                         if (s1 == d) {
3139                                 M_MOV(s1, REG_ITMP1);
3140                                 s1 = REG_ITMP1;
3141                         }
3142
3143                         /* calculate interface instanceof code size */
3144
3145                         s2 = 8;
3146                         if (!super)
3147                                 s2 += (opt_showdisassemble ? 1 : 0);
3148
3149                         /* calculate class instanceof code size */
3150
3151                         s3 = 10;
3152                         if (!super)
3153                                 s3 += (opt_showdisassemble ? 1 : 0);
3154
3155                         M_CLR(d);
3156
3157                         /* if class is not resolved, check which code to call */
3158
3159                         if (!super) {
3160                                 M_TST(s1);
3161                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3162
3163                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3164
3165                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3166                                                                         (constant_classref *) iptr->target, disp);
3167
3168                                 if (opt_showdisassemble)
3169                                         M_NOP;
3170
3171                                 M_ILD(REG_ITMP3, REG_PV, disp);
3172                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3173                                 M_BEQ(s2 + 1);
3174                         }
3175
3176                         /* interface instanceof code */
3177
3178                         if (!super || (super->flags & ACC_INTERFACE)) {
3179                                 if (super) {
3180                                         M_TST(s1);
3181                                         M_BEQ(s2);
3182
3183                                 } else {
3184                                         codegen_addpatchref(cd,
3185                                                                                 PATCHER_checkcast_instanceof_interface,
3186                                                                                 (constant_classref *) iptr->target, 0);
3187
3188                                         if (opt_showdisassemble)
3189                                                 M_NOP;
3190                                 }
3191
3192                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3193                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3194                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3195                                 M_BLE(4);
3196                                 M_ALD(REG_ITMP1, REG_ITMP1,
3197                                           OFFSET(vftbl_t, interfacetable[0]) -
3198                                           superindex * sizeof(methodptr*));
3199                                 M_TST(REG_ITMP1);
3200                                 M_BEQ(1);
3201                                 M_IADD_IMM(REG_ZERO, 1, d);
3202
3203                                 if (!super)
3204                                         M_BR(s3);
3205                         }
3206
3207                         /* class instanceof code */
3208
3209                         if (!super || !(super->flags & ACC_INTERFACE)) {
3210                                 disp = dseg_addaddress(cd, supervftbl);
3211
3212                                 if (super) {
3213                                         M_TST(s1);
3214                                         M_BEQ(s3);
3215
3216                                 } else {
3217                                         codegen_addpatchref(cd, PATCHER_instanceof_class,
3218                                                                                 (constant_classref *) iptr->target,
3219                                                                                 disp);
3220
3221                                         if (opt_showdisassemble) {
3222                                                 M_NOP;
3223                                         }
3224                                 }
3225
3226                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3227                                 M_ALD(REG_ITMP2, REG_PV, disp);
3228 #if defined(ENABLE_THREADS)
3229                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3230 #endif
3231                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3232                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3233                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3234 #if defined(ENABLE_THREADS)
3235                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3236 #endif
3237                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3238                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3239                                 M_CLR(d);
3240                                 M_BGT(1);
3241                                 M_IADD_IMM(REG_ZERO, 1, d);
3242                         }
3243                         emit_store(jd, iptr, iptr->dst, d);
3244                         }
3245                         break;
3246
3247                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3248                                       /* op1 = dimension, val.a = class               */
3249
3250                         /* check for negative sizes and copy sizes to stack if necessary  */
3251
3252                         MCODECHECK((iptr->op1 << 1) + 64);
3253
3254                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3255                                 /* copy SAVEDVAR sizes to stack */
3256
3257                                 if (src->varkind != ARGVAR) {
3258                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3259 #if defined(__DARWIN__)
3260                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3261 #else
3262                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3263 #endif
3264                                 }
3265                         }
3266
3267                         /* a0 = dimension count */
3268
3269                         ICONST(rd->argintregs[0], iptr->op1);
3270
3271                         /* is patcher function set? */
3272
3273                         if (iptr->val.a == NULL) {
3274                                 disp = dseg_addaddress(cd, NULL);
3275
3276                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3277                                                                         (constant_classref *) iptr->target, disp);
3278
3279                                 if (opt_showdisassemble)
3280                                         M_NOP;
3281
3282                         } else {
3283                                 disp = dseg_addaddress(cd, iptr->val.a);
3284                         }
3285
3286                         /* a1 = arraydescriptor */
3287
3288                         M_ALD(rd->argintregs[1], REG_PV, disp);
3289
3290                         /* a2 = pointer to dimensions = stack pointer */
3291
3292 #if defined(__DARWIN__)
3293                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3294 #else
3295                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3296 #endif
3297
3298                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3299                         M_ALD(REG_ITMP3, REG_PV, disp);
3300                         M_MTCTR(REG_ITMP3);
3301                         M_JSR;
3302
3303                         /* check for exception before result assignment */
3304
3305                         M_CMPI(REG_RESULT, 0);
3306                         M_BEQ(0);
3307                         codegen_add_fillinstacktrace_ref(cd);
3308
3309                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3310                         M_INTMOVE(REG_RESULT, d);
3311                         emit_store(jd, iptr, iptr->dst, d);
3312                         break;
3313
3314                 default:
3315                         *exceptionptr =
3316                                 new_internalerror("Unknown ICMD %d during code generation",
3317                                                                   iptr->opc);
3318                         return false;
3319         } /* switch */
3320
3321         } /* for instruction */
3322
3323         /* copy values to interface registers */
3324
3325         src = bptr->outstack;
3326         len = bptr->outdepth;
3327         MCODECHECK(64 + len);
3328 #if defined(ENABLE_LSRA)
3329         if (!opt_lsra)
3330 #endif
3331         while (src) {
3332                 len--;
3333                 if ((src->varkind != STACKVAR)) {
3334                         s2 = src->type;
3335                         if (IS_FLT_DBL_TYPE(s2)) {
3336                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
3337                                 if (!(rd->interfaces[len][s2].flags & INMEMORY))
3338                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3339                                 else
3340                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3341
3342                         } else {
3343                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3344                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3345                                         if (IS_2_WORD_TYPE(s2))
3346                                                 M_LNGMOVE(s1, rd->interfaces[len][s2].regoff);
3347                                         else
3348                                                 M_INTMOVE(s1, rd->interfaces[len][s2].regoff);
3349
3350                                 } else {
3351                                         if (IS_2_WORD_TYPE(s2))
3352                                                 M_LST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3353                                         else
3354                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3355                                 }
3356                         }
3357                 }
3358                 src = src->prev;
3359         }
3360         } /* if (bptr -> flags >= BBREACHED) */
3361         } /* for basic block */
3362
3363         dseg_createlinenumbertable(cd);
3364
3365
3366         /* generate exception and patcher stubs */
3367
3368         {
3369                 exceptionref *eref;
3370                 patchref     *pref;
3371                 u4            mcode;
3372                 u1           *savedmcodeptr;
3373                 u1           *tmpmcodeptr;
3374
3375                 savedmcodeptr = NULL;
3376
3377                 /* generate exception stubs */
3378
3379                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3380                         gen_resolvebranch(cd->mcodebase + eref->branchpos,
3381                                                           eref->branchpos, cd->mcodeptr - cd->mcodebase);
3382
3383                         MCODECHECK(100);
3384
3385                         /* Check if the exception is an
3386                            ArrayIndexOutOfBoundsException.  If so, move index register
3387                            into REG_ITMP1. */
3388
3389                         if (eref->reg != -1)
3390                                 M_MOV(eref->reg, REG_ITMP1);
3391
3392                         /* calcuate exception address */
3393
3394                         M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
3395
3396                         /* move function to call into REG_ITMP3 */
3397
3398                         disp = dseg_addaddress(cd, eref->function);
3399                         M_ALD(REG_ITMP3, REG_PV, disp);
3400
3401                         if (savedmcodeptr != NULL) {
3402                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3403                                 M_BR(disp);
3404
3405                         } else {
3406                                 savedmcodeptr = cd->mcodeptr;
3407
3408                                 if (jd->isleafmethod) {
3409                                         M_MFLR(REG_ZERO);
3410                                         M_AST(REG_ZERO, REG_SP, stackframesize * 8 + LA_LR_OFFSET);
3411                                 }
3412
3413                                 M_MOV(REG_PV, rd->argintregs[0]);
3414                                 M_MOV(REG_SP, rd->argintregs[1]);
3415
3416                                 if (jd->isleafmethod)
3417                                         M_MOV(REG_ZERO, rd->argintregs[2]);
3418                                 else
3419                                         M_ALD(rd->argintregs[2],
3420                                                   REG_SP, stackframesize * 8 + LA_LR_OFFSET);
3421
3422                                 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3423                                 M_MOV(REG_ITMP1, rd->argintregs[4]);
3424
3425                                 M_STDU(REG_SP, REG_SP, -(LA_SIZE + 6 * 8));
3426                                 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
3427
3428                                 M_MTCTR(REG_ITMP3);
3429                                 M_JSR;
3430                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3431
3432                                 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 8);
3433                                 M_LADD_IMM(REG_SP, LA_SIZE + 6 * 8, REG_SP);
3434
3435                                 if (jd->isleafmethod) {
3436                                         /* XXX FIXME: REG_ZERO can cause problems here! */
3437                                         assert(stackframesize * 8 <= 32767);
3438
3439                                         M_ALD(REG_ZERO, REG_SP, stackframesize * 8 + LA_LR_OFFSET);
3440                                         M_MTLR(REG_ZERO);
3441                                 }
3442
3443                                 disp = dseg_addaddress(cd, asm_handle_exception);
3444                                 M_ALD(REG_ITMP3, REG_PV, disp);
3445                                 M_MTCTR(REG_ITMP3);
3446                                 M_RTS;
3447                         }
3448                 }
3449
3450
3451                 /* generate code patching stub call code */
3452
3453                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3454                         /* check code segment size */
3455
3456                         MCODECHECK(16);
3457
3458                         /* Get machine code which is patched back in later. The
3459                            call is 1 instruction word long. */
3460
3461                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3462
3463                         mcode = *((u4 *) tmpmcodeptr);
3464
3465                         /* Patch in the call to call the following code (done at
3466                            compile time). */
3467
3468                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3469                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3470
3471                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3472                         M_BR(disp);
3473
3474                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3475
3476                         /* create stack frame - keep stack 16-byte aligned */
3477
3478                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
3479
3480                         /* calculate return address and move it onto the stack */
3481
3482                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3483                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 8);
3484
3485                         /* move pointer to java_objectheader onto stack */
3486
3487 #if defined(ENABLE_THREADS)
3488                         /* order reversed because of data segment layout */
3489
3490                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3491                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3492                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3493
3494                         M_LDA(REG_ITMP3, REG_PV, disp);
3495                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 8);
3496 #else
3497                         /* do nothing */
3498 #endif
3499
3500                         /* move machine code onto stack */
3501
3502                         disp = dseg_adds4(cd, mcode);
3503                         M_ILD(REG_ITMP3, REG_PV, disp);
3504                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 8);
3505
3506                         /* move class/method/field reference onto stack */
3507
3508                         disp = dseg_addaddress(cd, pref->ref);
3509                         M_ALD(REG_ITMP3, REG_PV, disp);
3510                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 8);
3511
3512                         /* move data segment displacement onto stack */
3513
3514                         disp = dseg_addaddress(cd, pref->disp);
3515                         M_LLD(REG_ITMP3, REG_PV, disp);
3516                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 8);
3517
3518                         /* move patcher function pointer onto stack */
3519
3520                         disp = dseg_addaddress(cd, pref->patcher);
3521                         M_ALD(REG_ITMP3, REG_PV, disp);
3522                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 8);
3523
3524                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
3525                         M_ALD(REG_ITMP3, REG_PV, disp);
3526                         M_MTCTR(REG_ITMP3);
3527                         M_RTS;
3528                 }
3529
3530                 /* generate replacement-out stubs */
3531
3532                 {
3533                         int i;
3534
3535                         replacementpoint = jd->code->rplpoints;
3536
3537                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3538                                 /* check code segment size */
3539
3540                                 MCODECHECK(100);
3541
3542                                 /* note start of stub code */
3543
3544                                 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
3545
3546                                 /* make machine code for patching */
3547
3548                                 tmpmcodeptr  = cd->mcodeptr;
3549                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
3550
3551                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3552                                 M_BR(disp);
3553
3554                                 cd->mcodeptr = tmpmcodeptr;
3555
3556                                 /* create stack frame - keep 16-byte aligned */
3557
3558                                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
3559
3560                                 /* push address of `rplpoint` struct */
3561
3562                                 disp = dseg_addaddress(cd, replacementpoint);
3563                                 M_ALD(REG_ITMP3, REG_PV, disp);
3564                                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3565
3566                                 /* jump to replacement function */
3567
3568                                 disp = dseg_addaddress(cd, asm_replacement_out);
3569                                 M_ALD(REG_ITMP3, REG_PV, disp);
3570                                 M_MTCTR(REG_ITMP3);
3571                                 M_RTS;
3572                         }
3573                 }
3574         }
3575
3576         codegen_finish(jd);
3577
3578         /* everything's ok */
3579
3580         return true;
3581 }
3582
3583
3584 /* createcompilerstub **********************************************************
3585
3586    Creates a stub routine which calls the compiler.
3587
3588 *******************************************************************************/
3589
3590 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
3591 #define COMPILERSTUB_CODESIZE    4 * 4
3592
3593 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3594
3595
3596 u1 *createcompilerstub(methodinfo *m)
3597 {
3598         u1          *s;                     /* memory to hold the stub            */
3599         ptrint      *d;
3600         codeinfo    *code;
3601         codegendata *cd;
3602         s4           dumpsize;
3603
3604         s = CNEW(u1, COMPILERSTUB_SIZE);
3605
3606         /* set data pointer and code pointer */
3607
3608         d = (ptrint *) s;
3609         s = s + COMPILERSTUB_DATASIZE;
3610
3611         /* mark start of dump memory area */
3612
3613         dumpsize = dump_size();
3614
3615         cd = DNEW(codegendata);
3616         cd->mcodeptr = s;
3617
3618         /* Store the codeinfo pointer in the same place as in the
3619            methodheader for compiled methods. */
3620
3621         code = code_codeinfo_new(m);
3622
3623         d[0] = (ptrint) asm_call_jit_compiler;
3624         d[1] = (ptrint) m;
3625         d[2] = (ptrint) code;
3626
3627         M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
3628         M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
3629         M_MTCTR(REG_PV);
3630         M_RTS;
3631
3632         md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
3633
3634 #if defined(ENABLE_STATISTICS)
3635         if (opt_stat)
3636                 count_cstub_len += COMPILERSTUB_SIZE;
3637 #endif
3638
3639         /* release dump area */
3640
3641         dump_release(dumpsize);
3642
3643         return s;
3644 }
3645
3646
3647 /* createnativestub ************************************************************
3648
3649    Creates a stub routine which calls a native method.
3650
3651 *******************************************************************************/
3652
3653 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3654 {
3655         methodinfo   *m;
3656         codeinfo     *code;
3657         codegendata  *cd;
3658         registerdata *rd;
3659         s4            stackframesize;       /* size of stackframe if needed       */
3660         methoddesc   *md;
3661         s4            nativeparams;
3662         s4            i, j;                 /* count variables                    */
3663         s4            t;
3664         s4            s1, s2, disp;
3665         s4            funcdisp;
3666
3667         /* get required compiler data */
3668
3669         m    = jd->m;
3670         code = jd->code;
3671         cd   = jd->cd;
3672         rd   = jd->rd;
3673
3674         /* set some variables */
3675
3676         md = m->parseddesc;
3677         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3678
3679         /* calculate stackframe size */
3680
3681         stackframesize =
3682                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3683                 sizeof(localref_table) / SIZEOF_VOID_P +
3684                 4 +                            /* 4 stackframeinfo arguments (darwin)*/
3685                 nmd->paramcount  +
3686                 nmd->memuse;
3687
3688         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3689
3690         /* create method header */
3691
3692         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3693         (void) dseg_adds4(cd, stackframesize * 8);             /* FrameSize       */
3694         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3695         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3696         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3697         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3698         (void) dseg_addlinenumbertablesize(cd);
3699         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3700
3701         /* generate code */
3702
3703         M_MFLR(REG_ZERO);
3704         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3705         M_STDU(REG_SP, REG_SP, -(stackframesize * 8));
3706
3707         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3708                 emit_verbosecall_enter(jd);
3709         }
3710
3711         /* get function address (this must happen before the stackframeinfo) */
3712
3713         funcdisp = dseg_addaddress(cd, f);
3714
3715 #if !defined(WITH_STATIC_CLASSPATH)
3716         if (f == NULL) {
3717                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3718
3719                 if (opt_showdisassemble)
3720                         M_NOP;
3721         }
3722 #endif
3723
3724         /* save integer and float argument registers */
3725
3726         j = 0;
3727
3728         for (i = 0; i < md->paramcount; i++) {
3729                 t = md->paramtypes[i].type;
3730
3731                 if (IS_INT_LNG_TYPE(t)) {
3732                         if (!md->params[i].inmemory) {
3733                                 s1 = md->params[i].regoff;
3734                                 M_LST(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3735                                 j++;
3736                         }
3737                 }
3738         }
3739
3740         for (i = 0; i < md->paramcount; i++) {
3741                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3742                         if (!md->params[i].inmemory) {
3743                                 s1 = md->params[i].regoff;
3744                                 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3745                                 j++;
3746                         }
3747                 }
3748         }
3749
3750         /* create native stack info */
3751
3752         M_AADD_IMM(REG_SP, stackframesize * 8, rd->argintregs[0]);
3753         M_MOV(REG_PV, rd->argintregs[1]);
3754         M_AADD_IMM(REG_SP, stackframesize * 8, rd->argintregs[2]);
3755         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 + LA_LR_OFFSET);
3756         disp = dseg_addaddress(cd, codegen_start_native_call);
3757         M_ALD(REG_ITMP1, REG_PV, disp);
3758         M_ALD(REG_ITMP1, REG_ITMP1, 0); /* FIXME what about TOC? */
3759         M_MTCTR(REG_ITMP1);
3760         M_JSR;
3761
3762         M_NOP;
3763         M_NOP;
3764         M_NOP;
3765
3766         /* restore integer and float argument registers */
3767
3768         j = 0;
3769
3770         for (i = 0; i < md->paramcount; i++) {
3771                 t = md->paramtypes[i].type;
3772
3773                 if (IS_INT_LNG_TYPE(t)) {
3774                         if (!md->params[i].inmemory) {
3775                                 s1 = md->params[i].regoff;
3776                                 M_LLD(rd->argintregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3777                                 j++;
3778                         }
3779                 }
3780         }
3781
3782         for (i = 0; i < md->paramcount; i++) {
3783                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3784                         if (!md->params[i].inmemory) {
3785                                 s1 = md->params[i].regoff;
3786                                 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + j * 8);
3787                                 j++;
3788                         }
3789                 }
3790         }
3791
3792         /* copy or spill arguments to new locations */
3793
3794         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3795                 t = md->paramtypes[i].type;
3796
3797                 if (IS_INT_LNG_TYPE(t)) {
3798                         if (!md->params[i].inmemory) {
3799                                 s1 = rd->argintregs[md->params[i].regoff];
3800
3801                                 if (!nmd->params[j].inmemory) {
3802                                         s2 = rd->argintregs[nmd->params[j].regoff];
3803                                         M_INTMOVE(s1, s2);
3804                                 } else {
3805                                         s2 = nmd->params[j].regoff;
3806                                         M_LST(s1, REG_SP, s2 * 8);
3807                                 }
3808
3809                         } else {
3810                                 s1 = md->params[i].regoff + stackframesize;
3811                                 s2 = nmd->params[j].regoff;
3812
3813                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
3814                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
3815                         }
3816
3817                 } else {
3818                         /* We only copy spilled float arguments, as the float
3819                            argument registers keep unchanged. */
3820
3821                         if (md->params[i].inmemory) {
3822                                 s1 = md->params[i].regoff + stackframesize;
3823                                 s2 = nmd->params[j].regoff;
3824
3825                                 if (IS_2_WORD_TYPE(t)) {
3826                                         M_DLD(REG_FTMP1, REG_SP, s1 * 8);
3827                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
3828
3829                                 } else {
3830                                         M_FLD(REG_FTMP1, REG_SP, s1 * 8);
3831                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
3832                                 }
3833                         }
3834                 }
3835         }
3836
3837         /* put class into second argument register */
3838
3839         if (m->flags & ACC_STATIC) {
3840                 disp = dseg_addaddress(cd, m->class);
3841                 M_ALD(rd->argintregs[1], REG_PV, disp);
3842         }
3843
3844         /* put env into first argument register */
3845
3846         disp = dseg_addaddress(cd, _Jv_env);
3847         M_ALD(rd->argintregs[0], REG_PV, disp);
3848
3849         /* generate the actual native call */
3850
3851         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3852         M_ALD(REG_ITMP3, REG_ITMP3, 0);         /* XXX what about TOC ? */
3853         M_MTCTR(REG_ITMP3);
3854         M_JSR;
3855
3856         M_NOP;
3857         M_NOP;
3858         M_NOP;
3859
3860         /* save return value */
3861
3862         if (md->returntype.type != TYPE_VOID) {
3863                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3864                         M_LST(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3865                 }
3866                 else {
3867                         if (IS_2_WORD_TYPE(md->returntype.type))
3868                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3869                         else
3870                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);  /* FIXME, needed ?*/
3871                 }
3872         }
3873
3874         /* print call trace */
3875
3876         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
3877                 emit_verbosecall_exit(jd);
3878         }
3879
3880         /* remove native stackframe info */
3881
3882         M_NOP;
3883         M_NOP;
3884         M_NOP;
3885
3886         M_AADD_IMM(REG_SP, stackframesize * 8, rd->argintregs[0]);
3887         disp = dseg_addaddress(cd, codegen_finish_native_call);
3888         M_ALD(REG_ITMP1, REG_PV, disp);
3889         M_ALD(REG_ITMP1, REG_ITMP1, 0); /* XXX what about TOC? */
3890         M_MTCTR(REG_ITMP1);
3891         M_JSR;
3892         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3893
3894         /* restore return value */
3895
3896         if (md->returntype.type != TYPE_VOID) {
3897                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3898                         M_LLD(REG_RESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3899                 }
3900                 else {
3901                         if (IS_2_WORD_TYPE(md->returntype.type))
3902                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3903                         else
3904                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + PA_SIZE + 1 * 8);
3905                 }
3906         }
3907
3908         M_ALD(REG_ITMP2_XPC, REG_SP, stackframesize * 8 + LA_LR_OFFSET);
3909         M_MTLR(REG_ITMP2_XPC);
3910         M_LDA(REG_SP, REG_SP, stackframesize * 8); /* remove stackframe           */
3911
3912         /* check for exception */
3913
3914         M_TST(REG_ITMP1_XPTR);
3915         M_BNE(1);                           /* if no exception then return        */
3916
3917         M_RET;
3918
3919         /* handle exception */
3920
3921         M_LADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC);  /* exception address       */
3922
3923         disp = dseg_addaddress(cd, asm_handle_nat_exception);
3924         M_ALD(REG_ITMP3, REG_PV, disp);
3925         M_MTCTR(REG_ITMP3);
3926         M_RTS;
3927
3928         /* generate patcher stub call code */
3929
3930         {
3931                 patchref *pref;
3932                 u4        mcode;
3933                 u1       *savedmcodeptr;
3934                 u1       *tmpmcodeptr;
3935
3936                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3937                         /* Get machine code which is patched back in later. The
3938                            call is 1 instruction word long. */
3939
3940                         tmpmcodeptr = cd->mcodebase + pref->branchpos;
3941
3942                         mcode = *((u4 *) tmpmcodeptr);
3943
3944                         /* Patch in the call to call the following code (done at
3945                            compile time). */
3946
3947                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3948                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3949
3950                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3951                         M_BL(disp);
3952
3953                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3954
3955                         /* create stack frame - keep stack 16-byte aligned */
3956
3957                         M_AADD_IMM(REG_SP, -8 * 8, REG_SP);
3958
3959                         /* move return address onto stack */
3960
3961                         M_MFLR(REG_ZERO);
3962                         M_AST(REG_ZERO, REG_SP, 5 * 8);
3963
3964                         /* move pointer to java_objectheader onto stack */
3965
3966 #if defined(ENABLE_THREADS)
3967                         /* order reversed because of data segment layout */
3968
3969                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3970                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3971                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3972
3973                         M_LDA(REG_ITMP3, REG_PV, disp);
3974                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
3975 #else
3976                         /* do nothing */
3977 #endif
3978
3979                         /* move machine code onto stack */
3980
3981                         disp = dseg_adds4(cd, mcode);
3982                         M_ILD(REG_ITMP3, REG_PV, disp);
3983                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
3984
3985                         /* move class/method/field reference onto stack */
3986
3987                         disp = dseg_addaddress(cd, pref->ref);
3988                         M_ALD(REG_ITMP3, REG_PV, disp);
3989                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
3990
3991                         /* move data segment displacement onto stack */
3992
3993                         disp = dseg_adds4(cd, pref->disp);
3994                         M_ILD(REG_ITMP3, REG_PV, disp);
3995                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
3996
3997                         /* move patcher function pointer onto stack */
3998
3999                         disp = dseg_addaddress(cd, pref->patcher);
4000                         M_ALD(REG_ITMP3, REG_PV, disp);
4001                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4002
4003                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
4004                         M_ALD(REG_ITMP3, REG_PV, disp);
4005                         M_MTCTR(REG_ITMP3);
4006                         M_RTS;
4007                 }
4008         }
4009
4010         codegen_finish(jd);
4011
4012         return code->entrypoint;
4013 }
4014
4015
4016
4017
4018 /*
4019  * These are local overrides for various environment variables in Emacs.
4020  * Please do not remove this and leave it at the end of the file, where
4021  * Emacs will automagically detect them.
4022  * ---------------------------------------------------------------------
4023  * Local variables:
4024  * mode: c
4025  * indent-tabs-mode: t
4026  * c-basic-offset: 4
4027  * tab-width: 4
4028  * End:
4029  * vim:noexpandtab:sw=4:ts=4:
4030  */