1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
42 #include "vm/jit/powerpc/codegen.h"
44 #include "mm/memory.h"
45 #include "vm/builtin.h"
46 #include "vm/exceptions.h"
47 #include "vm/options.h"
48 #include "vm/jit/asmpart.h"
49 #include "vm/jit/dseg.h"
50 #include "vm/jit/emit-common.h"
51 #include "vm/jit/jit.h"
52 #include "vm/jit/replace.h"
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff * 4;
76 if (IS_FLT_DBL_TYPE(src->type)) {
77 if (IS_2_WORD_TYPE(src->type))
78 M_DLD(tempreg, REG_SP, disp);
80 M_FLD(tempreg, REG_SP, disp);
83 if (IS_2_WORD_TYPE(src->type))
84 M_LLD(tempreg, REG_SP, disp);
86 M_ILD(tempreg, REG_SP, disp);
98 /* emit_load_low ***************************************************************
100 Emits a possible load of the low 32-bits of an operand.
102 *******************************************************************************/
104 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
110 assert(src->type == TYPE_LNG);
112 /* get required compiler data */
116 if (IS_INMEMORY(src->flags)) {
119 disp = src->vv.regoff * 4;
121 M_ILD(tempreg, REG_SP, disp + 4);
126 reg = GET_LOW_REG(src->vv.regoff);
132 /* emit_load_high **************************************************************
134 Emits a possible load of the high 32-bits of an operand.
136 *******************************************************************************/
138 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
144 assert(src->type == TYPE_LNG);
146 /* get required compiler data */
150 if (IS_INMEMORY(src->flags)) {
153 disp = src->vv.regoff * 4;
155 M_ILD(tempreg, REG_SP, disp);
160 reg = GET_HIGH_REG(src->vv.regoff);
166 /* emit_store ******************************************************************
170 *******************************************************************************/
172 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
176 /* get required compiler data */
180 if (IS_INMEMORY(dst->flags)) {
183 if (IS_FLT_DBL_TYPE(dst->type)) {
184 if (IS_2_WORD_TYPE(dst->type))
185 M_DST(d, REG_SP, dst->vv.regoff * 4);
187 M_FST(d, REG_SP, dst->vv.regoff * 4);
190 if (IS_2_WORD_TYPE(dst->type))
191 M_LST(d, REG_SP, dst->vv.regoff * 4);
193 M_IST(d, REG_SP, dst->vv.regoff * 4);
199 /* emit_copy *******************************************************************
201 Generates a register/memory to register/memory copy.
203 *******************************************************************************/
205 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
210 /* get required compiler data */
214 if ((src->vv.regoff != dst->vv.regoff) ||
215 (IS_INMEMORY(src->flags ^ dst->flags))) {
217 /* If one of the variables resides in memory, we can eliminate
218 the register move from/to the temporary register with the
219 order of getting the destination register and the load. */
221 if (IS_INMEMORY(src->flags)) {
222 if (IS_LNG_TYPE(src->type))
223 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
225 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
227 s1 = emit_load(jd, iptr, src, d);
230 if (IS_LNG_TYPE(src->type))
231 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
233 s1 = emit_load(jd, iptr, src, REG_IFTMP);
235 d = codegen_reg_of_var(iptr->opc, dst, s1);
239 if (IS_FLT_DBL_TYPE(src->type))
242 if (IS_2_WORD_TYPE(src->type)) {
243 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
244 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
251 emit_store(jd, iptr, dst, d);
256 /* emit_iconst *****************************************************************
260 *******************************************************************************/
262 void emit_iconst(codegendata *cd, s4 d, s4 value)
266 if ((value >= -32768) && (value <= 32767))
267 M_LDA_INTERN(d, REG_ZERO, value);
269 disp = dseg_add_s4(cd, value);
270 M_ILD(d, REG_PV, disp);
275 /* emit_nullpointer_check ******************************************************
277 Emit a NullPointerException check.
279 *******************************************************************************/
281 void emit_nullpointer_check(codegendata *cd, s4 reg)
286 codegen_add_nullpointerexception_ref(cd);
291 /* emit_arrayindexoutofbounds_check ********************************************
293 Emit a ArrayIndexOutOfBoundsException check.
295 *******************************************************************************/
297 void emit_arrayindexoutofbounds_check(codegendata *cd, s4 s1, s4 s2)
301 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
302 M_CMPU(s2, REG_ITMP3);
304 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
307 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
308 M_CMPU(s2, REG_ITMP3);
310 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_LOAD_DISP_ARRAYINDEXOUTOFBOUNDS);
315 /* emit_exception_stubs ********************************************************
317 Generates the code for the exception stubs.
319 *******************************************************************************/
321 void emit_exception_stubs(jitdata *jd)
331 /* get required compiler data */
336 /* generate exception stubs */
340 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
341 /* back-patch the branch to this exception code */
343 branchmpc = er->branchpos;
344 targetmpc = cd->mcodeptr - cd->mcodebase;
346 md_codegen_patch_branch(cd, branchmpc, targetmpc);
350 /* Move the value register to a temporary register, if
351 there is the need for it. */
354 M_MOV(er->reg, REG_ITMP1);
356 /* calcuate exception address */
358 M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
360 /* move function to call into REG_ITMP3 */
362 disp = dseg_add_functionptr(cd, er->function);
363 M_ALD(REG_ITMP3, REG_PV, disp);
365 if (targetdisp == 0) {
366 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
368 if (jd->isleafmethod) {
370 M_AST(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
373 M_MOV(REG_PV, rd->argintregs[0]);
374 M_MOV(REG_SP, rd->argintregs[1]);
376 if (jd->isleafmethod)
377 M_MOV(REG_ZERO, rd->argintregs[2]);
379 M_ALD(rd->argintregs[2],
380 REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
382 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
383 M_MOV(REG_ITMP1, rd->argintregs[4]);
385 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
386 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
390 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
392 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
393 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
395 if (jd->isleafmethod) {
396 /* XXX FIXME: REG_ZERO can cause problems here! */
397 assert(cd->stackframesize * 4 <= 32767);
399 M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
403 disp = dseg_add_functionptr(cd, asm_handle_exception);
404 M_ALD(REG_ITMP3, REG_PV, disp);
409 disp = (((u4 *) cd->mcodebase) + targetdisp) -
410 (((u4 *) cd->mcodeptr) + 1);
417 /* emit_patcher_stubs **********************************************************
419 Generates the code for the patcher stubs.
421 *******************************************************************************/
423 void emit_patcher_stubs(jitdata *jd)
433 /* get required compiler data */
437 /* generate code patching stub call code */
441 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
442 /* check code segment size */
446 /* Get machine code which is patched back in later. The
447 call is 1 instruction word long. */
449 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
451 mcode = *((u4 *) tmpmcodeptr);
453 /* Patch in the call to call the following code (done at
456 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
457 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
459 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
462 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
464 /* create stack frame - keep stack 16-byte aligned */
466 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
468 /* calculate return address and move it onto the stack */
470 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
471 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
473 /* move pointer to java_objectheader onto stack */
475 #if defined(ENABLE_THREADS)
476 /* order reversed because of data segment layout */
478 (void) dseg_add_unique_address(cd, NULL); /* flcword */
479 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
480 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
482 M_LDA(REG_ITMP3, REG_PV, disp);
483 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
488 /* move machine code onto stack */
490 disp = dseg_add_s4(cd, mcode);
491 M_ILD(REG_ITMP3, REG_PV, disp);
492 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
494 /* move class/method/field reference onto stack */
496 disp = dseg_add_address(cd, pref->ref);
497 M_ALD(REG_ITMP3, REG_PV, disp);
498 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
500 /* move data segment displacement onto stack */
502 disp = dseg_add_s4(cd, pref->disp);
503 M_ILD(REG_ITMP3, REG_PV, disp);
504 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
506 /* move patcher function pointer onto stack */
508 disp = dseg_add_functionptr(cd, pref->patcher);
509 M_ALD(REG_ITMP3, REG_PV, disp);
510 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
512 if (targetdisp == 0) {
513 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
515 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
516 M_ALD(REG_ITMP3, REG_PV, disp);
521 disp = (((u4 *) cd->mcodebase) + targetdisp) -
522 (((u4 *) cd->mcodeptr) + 1);
529 /* emit_replacement_stubs ******************************************************
531 Generates the code for the replacement stubs.
533 *******************************************************************************/
535 void emit_replacement_stubs(jitdata *jd)
545 /* get required compiler data */
550 rplp = code->rplpoints;
552 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
553 /* check code segment size */
557 /* note start of stub code */
559 outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
561 /* make machine code for patching */
563 savedmcodeptr = cd->mcodeptr;
564 cd->mcodeptr = (u1 *) &(rplp->mcode) + 1; /* big-endian */
566 disp = (ptrint) ((s4 *) outcode - (s4 *) rplp->pc) - 1;
569 cd->mcodeptr = savedmcodeptr;
571 /* create stack frame - keep 16-byte aligned */
573 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
575 /* push address of `rplpoint` struct */
577 disp = dseg_add_address(cd, rplp);
578 M_ALD(REG_ITMP3, REG_PV, disp);
579 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
581 /* jump to replacement function */
583 disp = dseg_add_functionptr(cd, asm_replacement_out);
584 M_ALD(REG_ITMP3, REG_PV, disp);
591 /* emit_verbosecall_enter ******************************************************
593 Generates the code for the call trace.
595 *******************************************************************************/
598 void emit_verbosecall_enter(jitdata *jd)
608 /* get required compiler data */
616 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
618 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
619 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
620 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
622 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
623 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
624 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
625 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
627 /* in nativestubs no Place to save the LR (Link Register) would be needed */
628 /* but since the stack frame has to be aligned the 4 Bytes would have to */
629 /* be padded again */
631 #if defined(__DARWIN__)
632 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
637 /* mark trace code */
642 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
643 M_STWU(REG_SP, REG_SP, -stack_size);
645 M_CLR(REG_ITMP1); /* clear help register */
647 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
648 #if defined(__DARWIN__)
649 /* Copy Params starting from first to Stack */
650 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
654 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
655 /* integer argument regs */
656 /* all integer argument registers have to be saved */
657 for (p = 0; p < 8; p++) {
658 d = rd->argintregs[p];
659 /* save integer argument registers */
660 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
665 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
666 t = md->paramtypes[p].type;
667 if (IS_INT_LNG_TYPE(t)) {
668 if (!md->params[p].inmemory) { /* Param in Arg Reg */
669 if (IS_2_WORD_TYPE(t)) {
670 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
671 , REG_SP, stack_off);
672 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
673 , REG_SP, stack_off + 4);
675 M_IST(REG_ITMP1, REG_SP, stack_off);
676 M_IST(rd->argintregs[md->params[p].regoff]
677 , REG_SP, stack_off + 4);
679 } else { /* Param on Stack */
680 s1 = (md->params[p].regoff + cd->stackframesize) * 4
682 if (IS_2_WORD_TYPE(t)) {
683 M_ILD(REG_ITMP2, REG_SP, s1);
684 M_IST(REG_ITMP2, REG_SP, stack_off);
685 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
686 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
688 M_IST(REG_ITMP1, REG_SP, stack_off);
689 M_ILD(REG_ITMP2, REG_SP, s1);
690 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
693 } else { /* IS_FLT_DBL_TYPE(t) */
694 if (!md->params[p].inmemory) { /* in Arg Reg */
695 s1 = rd->argfltregs[md->params[p].regoff];
696 if (!IS_2_WORD_TYPE(t)) {
697 M_IST(REG_ITMP1, REG_SP, stack_off);
698 M_FST(s1, REG_SP, stack_off + 4);
700 M_DST(s1, REG_SP, stack_off);
702 } else { /* on Stack */
703 /* this should not happen */
708 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
709 #if defined(__DARWIN__)
710 for (p = 0; p < 8; p++) {
711 d = rd->argintregs[p];
712 M_ILD(d, REG_SP, LA_SIZE + p * 4);
716 /* Set integer and float argument registers vor trace_args call */
717 /* offset to saved integer argument registers */
718 stack_off = LA_SIZE + 4 * 8 + 4;
719 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
720 t = md->paramtypes[p].type;
721 if (IS_INT_LNG_TYPE(t)) {
722 /* "stretch" int types */
723 if (!IS_2_WORD_TYPE(t)) {
724 M_CLR(rd->argintregs[2 * p]);
725 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
728 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
729 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
732 } else { /* Float/Dbl */
733 if (!md->params[p].inmemory) { /* Param in Arg Reg */
734 /* use reserved Place on Stack (sp + 5 * 16) to copy */
735 /* float/double arg reg to int reg */
736 s1 = rd->argfltregs[md->params[p].regoff];
737 if (!IS_2_WORD_TYPE(t)) {
738 M_FST(s1, REG_SP, 5 * 16);
739 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
740 M_CLR(rd->argintregs[2 * p]);
742 M_DST(s1, REG_SP, 5 * 16);
743 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
744 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
751 /* put methodinfo pointer on Stackframe */
752 p = dseg_add_address(cd, m);
753 M_ALD(REG_ITMP1, REG_PV, p);
754 #if defined(__DARWIN__)
755 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
757 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
759 p = dseg_add_functionptr(cd, builtin_trace_args);
760 M_ALD(REG_ITMP2, REG_PV, p);
764 #if defined(__DARWIN__)
765 /* restore integer argument registers from the reserved stack space */
768 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
769 p++, stack_off += 8) {
770 t = md->paramtypes[p].type;
772 if (IS_INT_LNG_TYPE(t)) {
773 if (!md->params[p].inmemory) {
774 if (IS_2_WORD_TYPE(t)) {
775 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
776 , REG_SP, stack_off);
777 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
778 , REG_SP, stack_off + 4);
780 M_ILD(rd->argintregs[md->params[p].regoff]
781 , REG_SP, stack_off + 4);
788 for (p = 0; p < 8; p++) {
789 d = rd->argintregs[p];
790 /* save integer argument registers */
791 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
795 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
797 M_LDA(REG_SP, REG_SP, stack_size);
799 /* mark trace code */
803 #endif /* !defined(NDEBUG) */
806 /* emit_verbosecall_exit *******************************************************
808 Generates the code for the call trace.
810 *******************************************************************************/
813 void emit_verbosecall_exit(jitdata *jd)
821 /* get required compiler data */
829 /* mark trace code */
834 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
835 M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
837 /* save return registers */
839 M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
840 M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
842 /* keep this order */
843 switch (md->returntype.type) {
846 #if defined(__DARWIN__)
847 M_MOV(REG_RESULT, rd->argintregs[2]);
848 M_CLR(rd->argintregs[1]);
850 M_MOV(REG_RESULT, rd->argintregs[3]);
851 M_CLR(rd->argintregs[2]);
856 #if defined(__DARWIN__)
857 M_MOV(REG_RESULT2, rd->argintregs[2]);
858 M_MOV(REG_RESULT, rd->argintregs[1]);
860 M_MOV(REG_RESULT2, rd->argintregs[3]);
861 M_MOV(REG_RESULT, rd->argintregs[2]);
866 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
867 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
869 disp = dseg_add_address(cd, m);
870 M_ALD(rd->argintregs[0], REG_PV, disp);
872 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
873 M_ALD(REG_ITMP2, REG_PV, disp);
877 /* restore return registers */
879 M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
880 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
882 M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
884 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
886 /* mark trace code */
890 #endif /* !defined(NDEBUG) */
894 * These are local overrides for various environment variables in Emacs.
895 * Please do not remove this and leave it at the end of the file, where
896 * Emacs will automagically detect them.
897 * ---------------------------------------------------------------------
900 * indent-tabs-mode: t
904 * vim:noexpandtab:sw=4:ts=4: