1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
44 #include "vm/jit/powerpc/codegen.h"
46 #include "vm/builtin.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
66 /* get required compiler data */
70 if (src->flags & INMEMORY) {
73 disp = src->regoff * 4;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
97 /* emit_load_low ***************************************************************
99 Emits a possible load of the low 32-bits of an operand.
101 *******************************************************************************/
103 s4 emit_load_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
109 assert(src->type == TYPE_LNG);
111 /* get required compiler data */
115 if (src->flags & INMEMORY) {
118 disp = src->regoff * 4;
120 M_ILD(tempreg, REG_SP, disp + 4);
125 reg = GET_LOW_REG(src->regoff);
131 /* emit_load_high **************************************************************
133 Emits a possible load of the high 32-bits of an operand.
135 *******************************************************************************/
137 s4 emit_load_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
143 assert(src->type == TYPE_LNG);
145 /* get required compiler data */
149 if (src->flags & INMEMORY) {
152 disp = src->regoff * 4;
154 M_ILD(tempreg, REG_SP, disp);
159 reg = GET_LOW_REG(src->regoff);
165 /* emit_load_s1 ****************************************************************
167 Emits a possible load of the first source operand.
169 *******************************************************************************/
171 s4 emit_load_s1(jitdata *jd, instruction *iptr, s4 tempreg)
178 reg = emit_load(jd, iptr, src, tempreg);
184 /* emit_load_s2 ****************************************************************
186 Emits a possible load of the second source operand.
188 *******************************************************************************/
190 s4 emit_load_s2(jitdata *jd, instruction *iptr, s4 tempreg)
195 src = iptr->sx.s23.s2.var;
197 reg = emit_load(jd, iptr, src, tempreg);
203 /* emit_load_s3 ****************************************************************
205 Emits a possible load of the third source operand.
207 *******************************************************************************/
209 s4 emit_load_s3(jitdata *jd, instruction *iptr, s4 tempreg)
214 src = iptr->sx.s23.s2.var;
216 reg = emit_load(jd, iptr, src, tempreg);
222 /* emit_load_s1_low ************************************************************
224 Emits a possible load of the low 32-bits of the first long source
227 *******************************************************************************/
229 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, s4 tempreg)
234 assert(src->type == TYPE_LNG);
238 reg = emit_load_low(jd, iptr, src, tempreg);
244 /* emit_load_s2_low ************************************************************
246 Emits a possible load of the low 32-bits of the second long source
249 *******************************************************************************/
251 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, s4 tempreg)
256 assert(src->type == TYPE_LNG);
258 src = iptr->sx.s23.s2.var;
260 reg = emit_load_low(jd, iptr, src, tempreg);
266 /* emit_load_s3_low ************************************************************
268 Emits a possible load of the low 32-bits of the third long source
271 *******************************************************************************/
273 s4 emit_load_s3_low(jitdata *jd, instruction *iptr, s4 tempreg)
278 assert(src->type == TYPE_LNG);
280 src = iptr->sx.s23.s3.var;
282 reg = emit_load_low(jd, iptr, src, tempreg);
288 /* emit_load_s1_high ***********************************************************
290 Emits a possible load of the high 32-bits of the first long source
293 *******************************************************************************/
295 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, s4 tempreg)
300 assert(src->type == TYPE_LNG);
304 reg = emit_load_high(jd, iptr, src, tempreg);
310 /* emit_load_s2_high ***********************************************************
312 Emits a possible load of the high 32-bits of the second long source
315 *******************************************************************************/
317 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, s4 tempreg)
322 assert(src->type == TYPE_LNG);
324 src = iptr->sx.s23.s2.var;
326 reg = emit_load_high(jd, iptr, src, tempreg);
332 /* emit_load_s3_high ***********************************************************
334 Emits a possible load of the high 32-bits of the third long source
337 *******************************************************************************/
339 s4 emit_load_s3_high(jitdata *jd, instruction *iptr, s4 tempreg)
344 assert(src->type == TYPE_LNG);
346 src = iptr->sx.s23.s3.var;
348 reg = emit_load_high(jd, iptr, src, tempreg);
354 /* emit_store ******************************************************************
358 *******************************************************************************/
360 void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
364 /* get required compiler data */
368 if (dst->flags & INMEMORY) {
371 if (IS_FLT_DBL_TYPE(dst->type)) {
372 if (IS_2_WORD_TYPE(dst->type))
373 M_DST(d, REG_SP, dst->regoff * 4);
375 M_FST(d, REG_SP, dst->regoff * 4);
378 if (IS_2_WORD_TYPE(dst->type))
379 M_LST(d, REG_SP, dst->regoff * 4);
381 M_IST(d, REG_SP, dst->regoff * 4);
387 /* emit_copy *******************************************************************
391 *******************************************************************************/
393 void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
399 /* get required compiler data */
404 if (src->type == TYPE_LNG)
405 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
407 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_IFTMP);
409 if ((src->regoff != dst->regoff) ||
410 ((src->flags ^ dst->flags) & INMEMORY)) {
411 s1 = emit_load(jd, iptr, src, d);
414 if (IS_FLT_DBL_TYPE(src->type))
417 if (IS_2_WORD_TYPE(src->type)) {
418 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
419 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
426 emit_store(jd, iptr, dst, d);
431 /* emit_iconst *****************************************************************
435 *******************************************************************************/
437 void emit_iconst(codegendata *cd, s4 d, s4 value)
441 if ((value >= -32768) && (value <= 32767))
442 M_LDA_INTERN(d, REG_ZERO, value);
444 disp = dseg_add_s4(cd, value);
445 M_ILD(d, REG_PV, disp);
450 /* emit_exception_stubs ********************************************************
452 Generates the code for the exception stubs.
454 *******************************************************************************/
456 void emit_exception_stubs(jitdata *jd)
464 /* get required compiler data */
469 /* generate exception stubs */
473 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
474 gen_resolvebranch(cd->mcodebase + eref->branchpos,
475 eref->branchpos, cd->mcodeptr - cd->mcodebase);
479 /* Move the value register to a temporary register, if
480 there is the need for it. */
483 M_MOV(eref->reg, REG_ITMP1);
485 /* calcuate exception address */
487 M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
489 /* move function to call into REG_ITMP3 */
491 disp = dseg_add_functionptr(cd, eref->function);
492 M_ALD(REG_ITMP3, REG_PV, disp);
494 if (targetdisp == 0) {
495 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
497 if (jd->isleafmethod) {
499 M_AST(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
502 M_MOV(REG_PV, rd->argintregs[0]);
503 M_MOV(REG_SP, rd->argintregs[1]);
505 if (jd->isleafmethod)
506 M_MOV(REG_ZERO, rd->argintregs[2]);
508 M_ALD(rd->argintregs[2],
509 REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
511 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
512 M_MOV(REG_ITMP1, rd->argintregs[4]);
514 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
515 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
519 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
521 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
522 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
524 if (jd->isleafmethod) {
525 /* XXX FIXME: REG_ZERO can cause problems here! */
526 assert(cd->stackframesize * 4 <= 32767);
528 M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
532 disp = dseg_add_functionptr(cd, asm_handle_exception);
533 M_ALD(REG_ITMP3, REG_PV, disp);
538 disp = (((u4 *) cd->mcodebase) + targetdisp) -
539 (((u4 *) cd->mcodeptr) + 1);
546 /* emit_patcher_stubs **********************************************************
548 Generates the code for the patcher stubs.
550 *******************************************************************************/
552 void emit_patcher_stubs(jitdata *jd)
562 /* get required compiler data */
566 /* generate code patching stub call code */
570 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
571 /* check code segment size */
575 /* Get machine code which is patched back in later. The
576 call is 1 instruction word long. */
578 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
580 mcode = *((u4 *) tmpmcodeptr);
582 /* Patch in the call to call the following code (done at
585 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
586 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
588 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
591 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
593 /* create stack frame - keep stack 16-byte aligned */
595 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
597 /* calculate return address and move it onto the stack */
599 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
600 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
602 /* move pointer to java_objectheader onto stack */
604 #if defined(ENABLE_THREADS)
605 /* order reversed because of data segment layout */
607 (void) dseg_add_unique_address(cd, NULL); /* flcword */
608 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
609 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
611 M_LDA(REG_ITMP3, REG_PV, disp);
612 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
617 /* move machine code onto stack */
619 disp = dseg_add_s4(cd, mcode);
620 M_ILD(REG_ITMP3, REG_PV, disp);
621 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
623 /* move class/method/field reference onto stack */
625 disp = dseg_add_address(cd, pref->ref);
626 M_ALD(REG_ITMP3, REG_PV, disp);
627 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
629 /* move data segment displacement onto stack */
631 disp = dseg_add_s4(cd, pref->disp);
632 M_ILD(REG_ITMP3, REG_PV, disp);
633 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
635 /* move patcher function pointer onto stack */
637 disp = dseg_add_functionptr(cd, pref->patcher);
638 M_ALD(REG_ITMP3, REG_PV, disp);
639 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
641 if (targetdisp == 0) {
642 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
644 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
645 M_ALD(REG_ITMP3, REG_PV, disp);
650 disp = (((u4 *) cd->mcodebase) + targetdisp) -
651 (((u4 *) cd->mcodeptr) + 1);
658 /* emit_replacement_stubs ******************************************************
660 Generates the code for the replacement stubs.
662 *******************************************************************************/
664 void emit_replacement_stubs(jitdata *jd)
673 /* get required compiler data */
678 rplp = code->rplpoints;
680 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
681 /* check code segment size */
685 /* note start of stub code */
687 rplp->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
689 /* make machine code for patching */
691 savedmcodeptr = cd->mcodeptr;
692 cd->mcodeptr = (u1 *) &(rplp->mcode) + 1; /* big-endian */
694 disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
697 cd->mcodeptr = savedmcodeptr;
699 /* create stack frame - keep 16-byte aligned */
701 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
703 /* push address of `rplpoint` struct */
705 disp = dseg_add_address(cd, rplp);
706 M_ALD(REG_ITMP3, REG_PV, disp);
707 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
709 /* jump to replacement function */
711 disp = dseg_add_functionptr(cd, asm_replacement_out);
712 M_ALD(REG_ITMP3, REG_PV, disp);
719 /* emit_verbosecall_enter ******************************************************
721 Generates the code for the call trace.
723 *******************************************************************************/
725 void emit_verbosecall_enter(jitdata *jd)
735 /* get required compiler data */
743 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
745 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
746 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
747 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
749 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
750 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
751 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
752 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
754 /* in nativestubs no Place to save the LR (Link Register) would be needed */
755 /* but since the stack frame has to be aligned the 4 Bytes would have to */
756 /* be padded again */
758 #if defined(__DARWIN__)
759 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
764 /* mark trace code */
769 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
770 M_STWU(REG_SP, REG_SP, -stack_size);
772 M_CLR(REG_ITMP1); /* clear help register */
774 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
775 #if defined(__DARWIN__)
776 /* Copy Params starting from first to Stack */
777 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
781 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
782 /* integer argument regs */
783 /* all integer argument registers have to be saved */
784 for (p = 0; p < 8; p++) {
785 d = rd->argintregs[p];
786 /* save integer argument registers */
787 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
792 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
793 t = md->paramtypes[p].type;
794 if (IS_INT_LNG_TYPE(t)) {
795 if (!md->params[p].inmemory) { /* Param in Arg Reg */
796 if (IS_2_WORD_TYPE(t)) {
797 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
798 , REG_SP, stack_off);
799 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
800 , REG_SP, stack_off + 4);
802 M_IST(REG_ITMP1, REG_SP, stack_off);
803 M_IST(rd->argintregs[md->params[p].regoff]
804 , REG_SP, stack_off + 4);
806 } else { /* Param on Stack */
807 s1 = (md->params[p].regoff + cd->stackframesize) * 4
809 if (IS_2_WORD_TYPE(t)) {
810 M_ILD(REG_ITMP2, REG_SP, s1);
811 M_IST(REG_ITMP2, REG_SP, stack_off);
812 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
813 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
815 M_IST(REG_ITMP1, REG_SP, stack_off);
816 M_ILD(REG_ITMP2, REG_SP, s1);
817 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
820 } else { /* IS_FLT_DBL_TYPE(t) */
821 if (!md->params[p].inmemory) { /* in Arg Reg */
822 s1 = rd->argfltregs[md->params[p].regoff];
823 if (!IS_2_WORD_TYPE(t)) {
824 M_IST(REG_ITMP1, REG_SP, stack_off);
825 M_FST(s1, REG_SP, stack_off + 4);
827 M_DST(s1, REG_SP, stack_off);
829 } else { /* on Stack */
830 /* this should not happen */
835 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
836 #if defined(__DARWIN__)
837 for (p = 0; p < 8; p++) {
838 d = rd->argintregs[p];
839 M_ILD(d, REG_SP, LA_SIZE + p * 4);
843 /* Set integer and float argument registers vor trace_args call */
844 /* offset to saved integer argument registers */
845 stack_off = LA_SIZE + 4 * 8 + 4;
846 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
847 t = md->paramtypes[p].type;
848 if (IS_INT_LNG_TYPE(t)) {
849 /* "stretch" int types */
850 if (!IS_2_WORD_TYPE(t)) {
851 M_CLR(rd->argintregs[2 * p]);
852 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
855 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
856 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
859 } else { /* Float/Dbl */
860 if (!md->params[p].inmemory) { /* Param in Arg Reg */
861 /* use reserved Place on Stack (sp + 5 * 16) to copy */
862 /* float/double arg reg to int reg */
863 s1 = rd->argfltregs[md->params[p].regoff];
864 if (!IS_2_WORD_TYPE(t)) {
865 M_FST(s1, REG_SP, 5 * 16);
866 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
867 M_CLR(rd->argintregs[2 * p]);
869 M_DST(s1, REG_SP, 5 * 16);
870 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
871 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
878 /* put methodinfo pointer on Stackframe */
879 p = dseg_add_address(cd, m);
880 M_ALD(REG_ITMP1, REG_PV, p);
881 #if defined(__DARWIN__)
882 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
884 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
886 p = dseg_add_functionptr(cd, builtin_trace_args);
887 M_ALD(REG_ITMP2, REG_PV, p);
891 #if defined(__DARWIN__)
892 /* restore integer argument registers from the reserved stack space */
895 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
896 p++, stack_off += 8) {
897 t = md->paramtypes[p].type;
899 if (IS_INT_LNG_TYPE(t)) {
900 if (!md->params[p].inmemory) {
901 if (IS_2_WORD_TYPE(t)) {
902 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
903 , REG_SP, stack_off);
904 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
905 , REG_SP, stack_off + 4);
907 M_ILD(rd->argintregs[md->params[p].regoff]
908 , REG_SP, stack_off + 4);
915 for (p = 0; p < 8; p++) {
916 d = rd->argintregs[p];
917 /* save integer argument registers */
918 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
922 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
924 M_LDA(REG_SP, REG_SP, stack_size);
926 /* mark trace code */
932 /* emit_verbosecall_exit *******************************************************
934 Generates the code for the call trace.
936 *******************************************************************************/
938 void emit_verbosecall_exit(jitdata *jd)
946 /* get required compiler data */
954 /* mark trace code */
959 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
960 M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
962 /* save return registers */
964 M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
965 M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
967 /* keep this order */
968 switch (md->returntype.type) {
971 #if defined(__DARWIN__)
972 M_MOV(REG_RESULT, rd->argintregs[2]);
973 M_CLR(rd->argintregs[1]);
975 M_MOV(REG_RESULT, rd->argintregs[3]);
976 M_CLR(rd->argintregs[2]);
981 #if defined(__DARWIN__)
982 M_MOV(REG_RESULT2, rd->argintregs[2]);
983 M_MOV(REG_RESULT, rd->argintregs[1]);
985 M_MOV(REG_RESULT2, rd->argintregs[3]);
986 M_MOV(REG_RESULT, rd->argintregs[2]);
991 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
992 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
994 disp = dseg_add_address(cd, m);
995 M_ALD(rd->argintregs[0], REG_PV, disp);
997 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
998 M_ALD(REG_ITMP2, REG_PV, disp);
1002 /* restore return registers */
1004 M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
1005 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
1007 M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
1009 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
1011 /* mark trace code */
1018 * These are local overrides for various environment variables in Emacs.
1019 * Please do not remove this and leave it at the end of the file, where
1020 * Emacs will automagically detect them.
1021 * ---------------------------------------------------------------------
1024 * indent-tabs-mode: t
1028 * vim:noexpandtab:sw=4:ts=4: