1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
44 #include "vm/jit/powerpc/codegen.h"
46 #include "vm/builtin.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 /* get required compiler data */
70 if (IS_INMEMORY(src->flags)) {
73 disp = src->vv.regoff * 4;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
97 /* emit_load_low ***************************************************************
99 Emits a possible load of the low 32-bits of an operand.
101 *******************************************************************************/
103 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
109 assert(src->type == TYPE_LNG);
111 /* get required compiler data */
115 if (IS_INMEMORY(src->flags)) {
118 disp = src->vv.regoff * 4;
120 M_ILD(tempreg, REG_SP, disp + 4);
125 reg = GET_LOW_REG(src->vv.regoff);
131 /* emit_load_high **************************************************************
133 Emits a possible load of the high 32-bits of an operand.
135 *******************************************************************************/
137 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
143 assert(src->type == TYPE_LNG);
145 /* get required compiler data */
149 if (IS_INMEMORY(src->flags)) {
152 disp = src->vv.regoff * 4;
154 M_ILD(tempreg, REG_SP, disp);
159 reg = GET_HIGH_REG(src->vv.regoff);
165 /* emit_store ******************************************************************
169 *******************************************************************************/
171 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
175 /* get required compiler data */
179 if (IS_INMEMORY(dst->flags)) {
182 if (IS_FLT_DBL_TYPE(dst->type)) {
183 if (IS_2_WORD_TYPE(dst->type))
184 M_DST(d, REG_SP, dst->vv.regoff * 4);
186 M_FST(d, REG_SP, dst->vv.regoff * 4);
189 if (IS_2_WORD_TYPE(dst->type))
190 M_LST(d, REG_SP, dst->vv.regoff * 4);
192 M_IST(d, REG_SP, dst->vv.regoff * 4);
198 /* emit_copy *******************************************************************
200 Generates a register/memory to register/memory copy.
202 *******************************************************************************/
204 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
209 /* get required compiler data */
213 if ((src->vv.regoff != dst->vv.regoff) ||
214 (IS_INMEMORY(src->flags ^ dst->flags))) {
216 /* If one of the variables resides in memory, we can eliminate
217 the register move from/to the temporary register with the
218 order of getting the destination register and the load. */
220 if (IS_INMEMORY(src->flags)) {
221 if (IS_LNG_TYPE(src->type))
222 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
224 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
226 s1 = emit_load(jd, iptr, src, d);
229 if (IS_LNG_TYPE(src->type))
230 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
232 s1 = emit_load(jd, iptr, src, REG_IFTMP);
234 d = codegen_reg_of_var(iptr->opc, dst, s1);
238 if (IS_FLT_DBL_TYPE(src->type))
241 if (IS_2_WORD_TYPE(src->type)) {
242 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
243 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
250 emit_store(jd, iptr, dst, d);
255 /* emit_iconst *****************************************************************
259 *******************************************************************************/
261 void emit_iconst(codegendata *cd, s4 d, s4 value)
265 if ((value >= -32768) && (value <= 32767))
266 M_LDA_INTERN(d, REG_ZERO, value);
268 disp = dseg_add_s4(cd, value);
269 M_ILD(d, REG_PV, disp);
274 /* emit_exception_stubs ********************************************************
276 Generates the code for the exception stubs.
278 *******************************************************************************/
280 void emit_exception_stubs(jitdata *jd)
288 /* get required compiler data */
293 /* generate exception stubs */
297 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
298 gen_resolvebranch(cd->mcodebase + eref->branchpos,
299 eref->branchpos, cd->mcodeptr - cd->mcodebase);
303 /* Move the value register to a temporary register, if
304 there is the need for it. */
307 M_MOV(eref->reg, REG_ITMP1);
309 /* calcuate exception address */
311 M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
313 /* move function to call into REG_ITMP3 */
315 disp = dseg_add_functionptr(cd, eref->function);
316 M_ALD(REG_ITMP3, REG_PV, disp);
318 if (targetdisp == 0) {
319 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
321 if (jd->isleafmethod) {
323 M_AST(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
326 M_MOV(REG_PV, rd->argintregs[0]);
327 M_MOV(REG_SP, rd->argintregs[1]);
329 if (jd->isleafmethod)
330 M_MOV(REG_ZERO, rd->argintregs[2]);
332 M_ALD(rd->argintregs[2],
333 REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
335 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
336 M_MOV(REG_ITMP1, rd->argintregs[4]);
338 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
339 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
343 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
345 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
346 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
348 if (jd->isleafmethod) {
349 /* XXX FIXME: REG_ZERO can cause problems here! */
350 assert(cd->stackframesize * 4 <= 32767);
352 M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
356 disp = dseg_add_functionptr(cd, asm_handle_exception);
357 M_ALD(REG_ITMP3, REG_PV, disp);
362 disp = (((u4 *) cd->mcodebase) + targetdisp) -
363 (((u4 *) cd->mcodeptr) + 1);
370 /* emit_patcher_stubs **********************************************************
372 Generates the code for the patcher stubs.
374 *******************************************************************************/
376 void emit_patcher_stubs(jitdata *jd)
386 /* get required compiler data */
390 /* generate code patching stub call code */
394 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
395 /* check code segment size */
399 /* Get machine code which is patched back in later. The
400 call is 1 instruction word long. */
402 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
404 mcode = *((u4 *) tmpmcodeptr);
406 /* Patch in the call to call the following code (done at
409 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
410 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
412 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
415 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
417 /* create stack frame - keep stack 16-byte aligned */
419 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
421 /* calculate return address and move it onto the stack */
423 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
424 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
426 /* move pointer to java_objectheader onto stack */
428 #if defined(ENABLE_THREADS)
429 /* order reversed because of data segment layout */
431 (void) dseg_add_unique_address(cd, NULL); /* flcword */
432 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
433 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
435 M_LDA(REG_ITMP3, REG_PV, disp);
436 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
441 /* move machine code onto stack */
443 disp = dseg_add_s4(cd, mcode);
444 M_ILD(REG_ITMP3, REG_PV, disp);
445 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
447 /* move class/method/field reference onto stack */
449 disp = dseg_add_address(cd, pref->ref);
450 M_ALD(REG_ITMP3, REG_PV, disp);
451 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
453 /* move data segment displacement onto stack */
455 disp = dseg_add_s4(cd, pref->disp);
456 M_ILD(REG_ITMP3, REG_PV, disp);
457 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
459 /* move patcher function pointer onto stack */
461 disp = dseg_add_functionptr(cd, pref->patcher);
462 M_ALD(REG_ITMP3, REG_PV, disp);
463 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
465 if (targetdisp == 0) {
466 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
468 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
469 M_ALD(REG_ITMP3, REG_PV, disp);
474 disp = (((u4 *) cd->mcodebase) + targetdisp) -
475 (((u4 *) cd->mcodeptr) + 1);
482 /* emit_replacement_stubs ******************************************************
484 Generates the code for the replacement stubs.
486 *******************************************************************************/
488 void emit_replacement_stubs(jitdata *jd)
497 /* get required compiler data */
502 rplp = code->rplpoints;
504 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
505 /* check code segment size */
509 /* note start of stub code */
511 rplp->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
513 /* make machine code for patching */
515 savedmcodeptr = cd->mcodeptr;
516 cd->mcodeptr = (u1 *) &(rplp->mcode) + 1; /* big-endian */
518 disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
521 cd->mcodeptr = savedmcodeptr;
523 /* create stack frame - keep 16-byte aligned */
525 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
527 /* push address of `rplpoint` struct */
529 disp = dseg_add_address(cd, rplp);
530 M_ALD(REG_ITMP3, REG_PV, disp);
531 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
533 /* jump to replacement function */
535 disp = dseg_add_functionptr(cd, asm_replacement_out);
536 M_ALD(REG_ITMP3, REG_PV, disp);
543 /* emit_verbosecall_enter ******************************************************
545 Generates the code for the call trace.
547 *******************************************************************************/
550 void emit_verbosecall_enter(jitdata *jd)
560 /* get required compiler data */
568 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
570 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
571 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
572 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
574 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
575 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
576 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
577 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
579 /* in nativestubs no Place to save the LR (Link Register) would be needed */
580 /* but since the stack frame has to be aligned the 4 Bytes would have to */
581 /* be padded again */
583 #if defined(__DARWIN__)
584 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
589 /* mark trace code */
594 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
595 M_STWU(REG_SP, REG_SP, -stack_size);
597 M_CLR(REG_ITMP1); /* clear help register */
599 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
600 #if defined(__DARWIN__)
601 /* Copy Params starting from first to Stack */
602 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
606 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
607 /* integer argument regs */
608 /* all integer argument registers have to be saved */
609 for (p = 0; p < 8; p++) {
610 d = rd->argintregs[p];
611 /* save integer argument registers */
612 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
617 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
618 t = md->paramtypes[p].type;
619 if (IS_INT_LNG_TYPE(t)) {
620 if (!md->params[p].inmemory) { /* Param in Arg Reg */
621 if (IS_2_WORD_TYPE(t)) {
622 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
623 , REG_SP, stack_off);
624 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
625 , REG_SP, stack_off + 4);
627 M_IST(REG_ITMP1, REG_SP, stack_off);
628 M_IST(rd->argintregs[md->params[p].regoff]
629 , REG_SP, stack_off + 4);
631 } else { /* Param on Stack */
632 s1 = (md->params[p].regoff + cd->stackframesize) * 4
634 if (IS_2_WORD_TYPE(t)) {
635 M_ILD(REG_ITMP2, REG_SP, s1);
636 M_IST(REG_ITMP2, REG_SP, stack_off);
637 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
638 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
640 M_IST(REG_ITMP1, REG_SP, stack_off);
641 M_ILD(REG_ITMP2, REG_SP, s1);
642 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
645 } else { /* IS_FLT_DBL_TYPE(t) */
646 if (!md->params[p].inmemory) { /* in Arg Reg */
647 s1 = rd->argfltregs[md->params[p].regoff];
648 if (!IS_2_WORD_TYPE(t)) {
649 M_IST(REG_ITMP1, REG_SP, stack_off);
650 M_FST(s1, REG_SP, stack_off + 4);
652 M_DST(s1, REG_SP, stack_off);
654 } else { /* on Stack */
655 /* this should not happen */
660 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
661 #if defined(__DARWIN__)
662 for (p = 0; p < 8; p++) {
663 d = rd->argintregs[p];
664 M_ILD(d, REG_SP, LA_SIZE + p * 4);
668 /* Set integer and float argument registers vor trace_args call */
669 /* offset to saved integer argument registers */
670 stack_off = LA_SIZE + 4 * 8 + 4;
671 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
672 t = md->paramtypes[p].type;
673 if (IS_INT_LNG_TYPE(t)) {
674 /* "stretch" int types */
675 if (!IS_2_WORD_TYPE(t)) {
676 M_CLR(rd->argintregs[2 * p]);
677 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
680 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
681 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
684 } else { /* Float/Dbl */
685 if (!md->params[p].inmemory) { /* Param in Arg Reg */
686 /* use reserved Place on Stack (sp + 5 * 16) to copy */
687 /* float/double arg reg to int reg */
688 s1 = rd->argfltregs[md->params[p].regoff];
689 if (!IS_2_WORD_TYPE(t)) {
690 M_FST(s1, REG_SP, 5 * 16);
691 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
692 M_CLR(rd->argintregs[2 * p]);
694 M_DST(s1, REG_SP, 5 * 16);
695 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
696 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
703 /* put methodinfo pointer on Stackframe */
704 p = dseg_add_address(cd, m);
705 M_ALD(REG_ITMP1, REG_PV, p);
706 #if defined(__DARWIN__)
707 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
709 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
711 p = dseg_add_functionptr(cd, builtin_trace_args);
712 M_ALD(REG_ITMP2, REG_PV, p);
716 #if defined(__DARWIN__)
717 /* restore integer argument registers from the reserved stack space */
720 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
721 p++, stack_off += 8) {
722 t = md->paramtypes[p].type;
724 if (IS_INT_LNG_TYPE(t)) {
725 if (!md->params[p].inmemory) {
726 if (IS_2_WORD_TYPE(t)) {
727 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].vv.regoff)]
728 , REG_SP, stack_off);
729 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].vv.regoff)]
730 , REG_SP, stack_off + 4);
732 M_ILD(rd->argintregs[md->params[p].vv.regoff]
733 , REG_SP, stack_off + 4);
740 for (p = 0; p < 8; p++) {
741 d = rd->argintregs[p];
742 /* save integer argument registers */
743 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
747 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
749 M_LDA(REG_SP, REG_SP, stack_size);
751 /* mark trace code */
755 #endif /* !defined(NDEBUG) */
758 /* emit_verbosecall_exit *******************************************************
760 Generates the code for the call trace.
762 *******************************************************************************/
765 void emit_verbosecall_exit(jitdata *jd)
773 /* get required compiler data */
781 /* mark trace code */
786 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
787 M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
789 /* save return registers */
791 M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
792 M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
794 /* keep this order */
795 switch (md->returntype.type) {
798 #if defined(__DARWIN__)
799 M_MOV(REG_RESULT, rd->argintregs[2]);
800 M_CLR(rd->argintregs[1]);
802 M_MOV(REG_RESULT, rd->argintregs[3]);
803 M_CLR(rd->argintregs[2]);
808 #if defined(__DARWIN__)
809 M_MOV(REG_RESULT2, rd->argintregs[2]);
810 M_MOV(REG_RESULT, rd->argintregs[1]);
812 M_MOV(REG_RESULT2, rd->argintregs[3]);
813 M_MOV(REG_RESULT, rd->argintregs[2]);
818 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
819 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
821 disp = dseg_add_address(cd, m);
822 M_ALD(rd->argintregs[0], REG_PV, disp);
824 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
825 M_ALD(REG_ITMP2, REG_PV, disp);
829 /* restore return registers */
831 M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
832 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
834 M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
836 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
838 /* mark trace code */
842 #endif /* !defined(NDEBUG) */
846 * These are local overrides for various environment variables in Emacs.
847 * Please do not remove this and leave it at the end of the file, where
848 * Emacs will automagically detect them.
849 * ---------------------------------------------------------------------
852 * indent-tabs-mode: t
856 * vim:noexpandtab:sw=4:ts=4: