src/vm/jit/powerpc/emit.c

   1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: emit.c 8260 2007-08-06 12:19:01Z michi $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33 #include <stdint.h>
  34
  35 #include "vm/types.h"
  36
  37 #include "md-abi.h"
  38
  39 #include "vm/jit/powerpc/codegen.h"
  40
  41 #include "mm/memory.h"
  42
  43 #include "threads/lock-common.h"
  44
  45 #include "vm/builtin.h"
  46 #include "vm/exceptions.h"
  47
  48 #include "vm/jit/abi.h"
  49 #include "vm/jit/asmpart.h"
  50 #include "vm/jit/codegen-common.h"
  51 #include "vm/jit/dseg.h"
  52 #include "vm/jit/emit-common.h"
  53 #include "vm/jit/jit.h"
  54 #include "vm/jit/replace.h"
  55
  56 #include "vmcore/options.h"
  57
  58
  59 /* emit_load *******************************************************************
  60
  61    Emits a possible load of an operand.
  62
  63 *******************************************************************************/
  64
  65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  66 {
  67         codegendata *cd;
  68         s4           disp;
  69         s4           reg;
  70
  71         /* get required compiler data */
  72
  73         cd = jd->cd;
  74
  75         if (IS_INMEMORY(src->flags)) {
  76                 COUNT_SPILLS;
  77
  78                 disp = src->vv.regoff;
  79
  80                 switch (src->type) {
  81                 case TYPE_INT:
  82                 case TYPE_ADR:
  83                         M_ILD(tempreg, REG_SP, disp);
  84                         break;
  85                 case TYPE_LNG:
  86                         M_LLD(tempreg, REG_SP, disp);
  87                         break;
  88                 case TYPE_FLT:
  89                         M_FLD(tempreg, REG_SP, disp);
  90                         break;
  91                 case TYPE_DBL:
  92                         M_DLD(tempreg, REG_SP, disp);
  93                         break;
  94                 default:
  95                         vm_abort("emit_load: unknown type %d", src->type);
  96                 }
  97
  98                 reg = tempreg;
  99         }
 100         else
 101                 reg = src->vv.regoff;
 102
 103         return reg;
 104 }
 105
 106
 107 /* emit_load_low ***************************************************************
 108
 109    Emits a possible load of the low 32-bits of an operand.
 110
 111 *******************************************************************************/
 112
 113 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 114 {
 115         codegendata  *cd;
 116         s4            disp;
 117         s4            reg;
 118
 119         assert(src->type == TYPE_LNG);
 120
 121         /* get required compiler data */
 122
 123         cd = jd->cd;
 124
 125         if (IS_INMEMORY(src->flags)) {
 126                 COUNT_SPILLS;
 127
 128                 disp = src->vv.regoff;
 129
 130                 M_ILD(tempreg, REG_SP, disp + 4);
 131
 132                 reg = tempreg;
 133         }
 134         else
 135                 reg = GET_LOW_REG(src->vv.regoff);
 136
 137         return reg;
 138 }
 139
 140
 141 /* emit_load_high **************************************************************
 142
 143    Emits a possible load of the high 32-bits of an operand.
 144
 145 *******************************************************************************/
 146
 147 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 148 {
 149         codegendata  *cd;
 150         s4            disp;
 151         s4            reg;
 152
 153         assert(src->type == TYPE_LNG);
 154
 155         /* get required compiler data */
 156
 157         cd = jd->cd;
 158
 159         if (IS_INMEMORY(src->flags)) {
 160                 COUNT_SPILLS;
 161
 162                 disp = src->vv.regoff;
 163
 164                 M_ILD(tempreg, REG_SP, disp);
 165
 166                 reg = tempreg;
 167         }
 168         else
 169                 reg = GET_HIGH_REG(src->vv.regoff);
 170
 171         return reg;
 172 }
 173
 174
 175 /* emit_store ******************************************************************
 176
 177    Emit a possible store for the given variable.
 178
 179 *******************************************************************************/
 180
 181 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 182 {
 183         codegendata *cd;
 184         s4           disp;
 185
 186         /* get required compiler data */
 187
 188         cd = jd->cd;
 189
 190         if (IS_INMEMORY(dst->flags)) {
 191                 COUNT_SPILLS;
 192
 193                 disp = dst->vv.regoff;
 194
 195                 switch (dst->type) {
 196                 case TYPE_INT:
 197                 case TYPE_ADR:
 198                         M_IST(d, REG_SP, disp);
 199                         break;
 200                 case TYPE_LNG:
 201                         M_LST(d, REG_SP, disp);
 202                         break;
 203                 case TYPE_FLT:
 204                         M_FST(d, REG_SP, disp);
 205                         break;
 206                 case TYPE_DBL:
 207                         M_DST(d, REG_SP, disp);
 208                         break;
 209                 default:
 210                         vm_abort("emit_store: unknown type %d", dst->type);
 211                 }
 212         }
 213 }
 214
 215
 216 /* emit_copy *******************************************************************
 217
 218    Generates a register/memory to register/memory copy.
 219
 220 *******************************************************************************/
 221
 222 void emit_copy(jitdata *jd, instruction *iptr)
 223 {
 224         codegendata *cd;
 225         varinfo     *src;
 226         varinfo     *dst;
 227         s4           s1, d;
 228
 229         /* get required compiler data */
 230
 231         cd = jd->cd;
 232
 233         /* get source and destination variables */
 234
 235         src = VAROP(iptr->s1);
 236         dst = VAROP(iptr->dst);
 237
 238         if ((src->vv.regoff != dst->vv.regoff) ||
 239                 (IS_INMEMORY(src->flags ^ dst->flags))) {
 240
 241                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 242                         /* emit nothing, as the value won't be used anyway */
 243                         return;
 244                 }
 245
 246                 /* If one of the variables resides in memory, we can eliminate
 247                    the register move from/to the temporary register with the
 248                    order of getting the destination register and the load. */
 249
 250                 if (IS_INMEMORY(src->flags)) {
 251                         if (IS_LNG_TYPE(src->type))
 252                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 253                         else
 254                                 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 255
 256                         s1 = emit_load(jd, iptr, src, d);
 257                 }
 258                 else {
 259                         if (IS_LNG_TYPE(src->type))
 260                                 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
 261                         else
 262                                 s1 = emit_load(jd, iptr, src, REG_IFTMP);
 263
 264                         d = codegen_reg_of_var(iptr->opc, dst, s1);
 265                 }
 266
 267                 if (s1 != d) {
 268                         switch (src->type) {
 269                         case TYPE_INT:
 270                         case TYPE_ADR:
 271                                 M_MOV(s1, d);
 272                                 break;
 273                         case TYPE_LNG:
 274                                 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
 275                                 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 276                                 break;
 277                         case TYPE_FLT:
 278                         case TYPE_DBL:
 279                                 M_FMOV(s1, d);
 280                                 break;
 281                         default:
 282                                 vm_abort("emit_copy: unknown type %d", src->type);
 283                         }
 284                 }
 285
 286                 emit_store(jd, iptr, dst, d);
 287         }
 288 }
 289
 290
 291 /* emit_iconst *****************************************************************
 292
 293    XXX
 294
 295 *******************************************************************************/
 296
 297 void emit_iconst(codegendata *cd, s4 d, s4 value)
 298 {
 299         s4 disp;
 300
 301         if ((value >= -32768) && (value <= 32767))
 302                 M_LDA_INTERN(d, REG_ZERO, value);
 303         else {
 304                 disp = dseg_add_s4(cd, value);
 305                 M_ILD(d, REG_PV, disp);
 306         }
 307 }
 308
 309
 310 /* emit_branch *****************************************************************
 311
 312    Emits the code for conditional and unconditional branchs.
 313
 314 *******************************************************************************/
 315
 316 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 317 {
 318         s4 checkdisp;
 319         s4 branchdisp;
 320
 321         /* calculate the different displacements */
 322
 323         checkdisp  =  disp + 4;
 324         branchdisp = (disp - 4) >> 2;
 325
 326         /* check which branch to generate */
 327
 328         if (condition == BRANCH_UNCONDITIONAL) {
 329                 /* check displacement for overflow */
 330
 331                 if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
 332                         /* if the long-branches flag isn't set yet, do it */
 333
 334                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 335                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 336                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 337                         }
 338
 339                         vm_abort("emit_branch: emit unconditional long-branch code");
 340                 }
 341                 else {
 342                         M_BR(branchdisp);
 343                 }
 344         }
 345         else {
 346                 /* and displacement for overflow */
 347
 348                 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
 349                         /* if the long-branches flag isn't set yet, do it */
 350
 351                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 352                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 353                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 354                         }
 355
 356                         switch (condition) {
 357                         case BRANCH_EQ:
 358                                 M_BNE(1);
 359                                 M_BR(branchdisp);
 360                                 break;
 361                         case BRANCH_NE:
 362                                 M_BEQ(1);
 363                                 M_BR(branchdisp);
 364                                 break;
 365                         case BRANCH_LT:
 366                                 M_BGE(1);
 367                                 M_BR(branchdisp);
 368                                 break;
 369                         case BRANCH_GE:
 370                                 M_BLT(1);
 371                                 M_BR(branchdisp);
 372                                 break;
 373                         case BRANCH_GT:
 374                                 M_BLE(1);
 375                                 M_BR(branchdisp);
 376                                 break;
 377                         case BRANCH_LE:
 378                                 M_BGT(1);
 379                                 M_BR(branchdisp);
 380                                 break;
 381                         case BRANCH_NAN:
 382                                 vm_abort("emit_branch: long BRANCH_NAN");
 383                                 break;
 384                         default:
 385                                 vm_abort("emit_branch: unknown condition %d", condition);
 386                         }
 387                 }
 388                 else {
 389                         switch (condition) {
 390                         case BRANCH_EQ:
 391                                 M_BEQ(branchdisp);
 392                                 break;
 393                         case BRANCH_NE:
 394                                 M_BNE(branchdisp);
 395                                 break;
 396                         case BRANCH_LT:
 397                                 M_BLT(branchdisp);
 398                                 break;
 399                         case BRANCH_GE:
 400                                 M_BGE(branchdisp);
 401                                 break;
 402                         case BRANCH_GT:
 403                                 M_BGT(branchdisp);
 404                                 break;
 405                         case BRANCH_LE:
 406                                 M_BLE(branchdisp);
 407                                 break;
 408                         case BRANCH_NAN:
 409                                 M_BNAN(branchdisp);
 410                                 break;
 411                         default:
 412                                 vm_abort("emit_branch: unknown condition %d", condition);
 413                         }
 414                 }
 415         }
 416 }
 417
 418
 419 /* emit_arithmetic_check *******************************************************
 420
 421    Emit an ArithmeticException check.
 422
 423 *******************************************************************************/
 424
 425 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 426 {
 427         if (INSTRUCTION_MUST_CHECK(iptr)) {
 428                 M_TST(reg);
 429                 M_BNE(1);
 430                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
 431         }
 432 }
 433
 434
 435 /* emit_arrayindexoutofbounds_check ********************************************
 436
 437    Emit a ArrayIndexOutOfBoundsException check.
 438
 439 *******************************************************************************/
 440
 441 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 442 {
 443         if (INSTRUCTION_MUST_CHECK(iptr)) {
 444                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
 445                 M_TRAPGEU(s2, REG_ITMP3);
 446         }
 447 }
 448
 449
 450 /* emit_classcast_check ********************************************************
 451
 452    Emit a ClassCastException check.
 453
 454 *******************************************************************************/
 455
 456 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 457 {
 458         if (INSTRUCTION_MUST_CHECK(iptr)) {
 459                 switch (condition) {
 460                 case BRANCH_LE:
 461                         M_BGT(1);
 462                         break;
 463                 case BRANCH_EQ:
 464                         M_BNE(1);
 465                         break;
 466                 case BRANCH_GT:
 467                         M_BLE(1);
 468                         break;
 469                 default:
 470                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 471                 }
 472                 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
 473         }
 474 }
 475
 476
 477 /* emit_nullpointer_check ******************************************************
 478
 479    Emit a NullPointerException check.
 480
 481 *******************************************************************************/
 482
 483 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 484 {
 485         if (INSTRUCTION_MUST_CHECK(iptr)) {
 486                 M_TST(reg);
 487                 M_BNE(1);
 488                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
 489         }
 490 }
 491
 492
 493 /* emit_exception_check ********************************************************
 494
 495    Emit an Exception check.
 496
 497 *******************************************************************************/
 498
 499 void emit_exception_check(codegendata *cd, instruction *iptr)
 500 {
 501         if (INSTRUCTION_MUST_CHECK(iptr)) {
 502                 M_TST(REG_RESULT);
 503                 M_BNE(1);
 504                 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
 505         }
 506 }
 507
 508
 509 /* emit_trap *******************************************************************
 510
 511    Emit a trap instruction and return the original machine code.
 512
 513 *******************************************************************************/
 514
 515 uint32_t emit_trap(codegendata *cd)
 516 {
 517         uint32_t mcode;
 518
 519         /* Get machine code which is patched back in later. The
 520            trap is 1 instruction word long. */
 521
 522         mcode = *((u4 *) cd->mcodeptr);
 523
 524         M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
 525
 526         return mcode;
 527 }
 528
 529
 530 /* emit_verbosecall_enter ******************************************************
 531
 532    Generates the code for the call trace.
 533
 534 *******************************************************************************/
 535
 536 void emit_verbosecall_enter(jitdata *jd)
 537 {
 538 #if !defined(NDEBUG)
 539         methodinfo   *m;
 540         codegendata  *cd;
 541         registerdata *rd;
 542         methoddesc   *md;
 543         int32_t       disp;
 544         int32_t       i;
 545         int32_t       s, d;
 546         int32_t       x;
 547
 548         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 549                 return;
 550
 551         /* get required compiler data */
 552
 553         m  = jd->m;
 554         cd = jd->cd;
 555         rd = jd->rd;
 556
 557         md = m->parseddesc;
 558
 559         /* mark trace code */
 560
 561         M_NOP;
 562
 563         M_MFLR(REG_ZERO);
 564         M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 565         M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + ARG_CNT + TMP_CNT) * 8));
 566
 567         M_CLR(REG_ITMP1);                            /* prepare a "zero" register */
 568
 569         /* save argument registers */
 570
 571         for (i = 0; i < md->paramcount; i++) {
 572                 if (!md->params[i].inmemory) {
 573                         s = md->params[i].regoff;
 574                         d = LA_SIZE + (1 + i) * 8;
 575
 576                         switch (md->paramtypes[i].type) {
 577                         case TYPE_INT:
 578                         case TYPE_ADR:
 579                                 M_IST(REG_ITMP1, REG_SP, d);            /* high-bits are zero */
 580                                 M_IST(s, REG_SP, d + 4);
 581                                 break;
 582                         case TYPE_LNG:
 583                                 M_LST(s, REG_SP, d);
 584                                 break;
 585                         case TYPE_FLT:
 586                                 M_IST(REG_ITMP1, REG_SP, d);            /* high-bits are zero */
 587                                 M_FST(s, REG_SP, d + 4);
 588                                 break;
 589                         case TYPE_DBL:
 590                                 M_DST(s, REG_SP, d);
 591                                 break;
 592                         }
 593                 }
 594         }
 595
 596         /* load arguments as longs */
 597
 598         d = 0;
 599
 600         for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
 601                 s = LA_SIZE + (1 + i) * 8;
 602                 x = PACK_REGS(abi_registers_integer_argument[d + 1],
 603                                           abi_registers_integer_argument[d]);
 604
 605                 M_LLD(x, REG_SP, s);
 606
 607                 d += 2;
 608         }
 609
 610         /* put methodinfo pointer as last argument on the stack */
 611
 612         disp = dseg_add_address(cd, m);
 613         M_ALD(REG_ITMP1, REG_PV, disp);
 614 #if defined(__DARWIN__)
 615         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
 616 #else
 617         M_AST(REG_ITMP1, REG_SP, LA_SIZE);
 618 #endif
 619         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 620         M_ALD(REG_ITMP2, REG_PV, disp);
 621         M_MTCTR(REG_ITMP2);
 622         M_JSR;
 623
 624         /* restore argument registers */
 625
 626         for (i = 0; i < md->paramcount; i++) {
 627                 if (!md->params[i].inmemory) {
 628                         s = LA_SIZE + (1 + i) * 8;
 629                         d = md->params[i].regoff;
 630
 631                         switch (md->paramtypes[i].type) {
 632                         case TYPE_INT:
 633                         case TYPE_ADR:
 634                                 M_ILD(d, REG_SP, s + 4);                      /* get low-bits */
 635                                 break;
 636                         case TYPE_LNG:
 637                                 M_LLD(d, REG_SP, s);
 638                                 break;
 639                         case TYPE_FLT:
 640                                 M_FLD(d, REG_SP, s + 4);                      /* get low-bits */
 641                                 break;
 642                         case TYPE_DBL:
 643                                 M_DLD(d, REG_SP, s);
 644                                 break;
 645                         }
 646                 }
 647         }
 648
 649         M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + ARG_CNT + TMP_CNT) * 8 + LA_LR_OFFSET);
 650         M_MTLR(REG_ZERO);
 651         M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + ARG_CNT + TMP_CNT) * 8);
 652
 653         /* mark trace code */
 654
 655         M_NOP;
 656 #endif /* !defined(NDEBUG) */
 657 }
 658
 659
 660 /* emit_verbosecall_exit *******************************************************
 661
 662    Generates the code for the call trace.
 663
 664    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
 665
 666 *******************************************************************************/
 667
 668 void emit_verbosecall_exit(jitdata *jd)
 669 {
 670 #if !defined(NDEBUG)
 671         methodinfo   *m;
 672         codegendata  *cd;
 673         registerdata *rd;
 674         methoddesc   *md;
 675         s4            disp;
 676
 677         if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
 678                 return;
 679
 680         /* get required compiler data */
 681
 682         m  = jd->m;
 683         cd = jd->cd;
 684         rd = jd->rd;
 685
 686         md = m->parseddesc;
 687
 688         /* mark trace code */
 689
 690         M_NOP;
 691
 692         M_MFLR(REG_ZERO);
 693         M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 694         M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
 695
 696         /* save return registers */
 697
 698         M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
 699         M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
 700
 701         /* keep this order */
 702         switch (md->returntype.type) {
 703         case TYPE_INT:
 704         case TYPE_ADR:
 705                 M_INTMOVE(REG_RESULT, REG_A1);
 706                 M_CLR(REG_A0);
 707                 break;
 708
 709         case TYPE_LNG:
 710                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
 711                 break;
 712         }
 713
 714         M_FLTMOVE(REG_FRESULT, REG_FA0);
 715         M_FLTMOVE(REG_FRESULT, REG_FA1);
 716
 717         disp = dseg_add_address(cd, m);
 718         M_ALD(REG_A2, REG_PV, disp);
 719
 720         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 721         M_ALD(REG_ITMP2, REG_PV, disp);
 722         M_MTCTR(REG_ITMP2);
 723         M_JSR;
 724
 725         /* restore return registers */
 726
 727         M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
 728         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
 729
 730         M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
 731         M_MTLR(REG_ZERO);
 732         M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
 733
 734         /* mark trace code */
 735
 736         M_NOP;
 737 #endif /* !defined(NDEBUG) */
 738 }
 739
 740
 741 /*
 742  * These are local overrides for various environment variables in Emacs.
 743  * Please do not remove this and leave it at the end of the file, where
 744  * Emacs will automagically detect them.
 745  * ---------------------------------------------------------------------
 746  * Local variables:
 747  * mode: c
 748  * indent-tabs-mode: t
 749  * c-basic-offset: 4
 750  * tab-width: 4
 751  * End:
 752  * vim:noexpandtab:sw=4:ts=4:
 753  */