1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
44 #include "vm/jit/powerpc/codegen.h"
46 #include "vm/builtin.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
66 /* get required compiler data */
70 if (src->flags & INMEMORY) {
73 disp = src->regoff * 4;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
97 /* emit_load_low ***************************************************************
99 Emits a possible load of the low 32-bits of an operand.
101 *******************************************************************************/
103 s4 emit_load_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
109 assert(src->type == TYPE_LNG);
111 /* get required compiler data */
115 if (src->flags & INMEMORY) {
118 disp = src->regoff * 4;
120 M_ILD(tempreg, REG_SP, disp + 4);
125 reg = GET_LOW_REG(src->regoff);
131 /* emit_load_high **************************************************************
133 Emits a possible load of the high 32-bits of an operand.
135 *******************************************************************************/
137 s4 emit_load_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
143 assert(src->type == TYPE_LNG);
145 /* get required compiler data */
149 if (src->flags & INMEMORY) {
152 disp = src->regoff * 4;
154 M_ILD(tempreg, REG_SP, disp);
159 reg = GET_HIGH_REG(src->regoff);
165 /* emit_load_s1 ****************************************************************
167 Emits a possible load of the first source operand.
169 *******************************************************************************/
171 s4 emit_load_s1(jitdata *jd, instruction *iptr, s4 tempreg)
178 reg = emit_load(jd, iptr, src, tempreg);
184 /* emit_load_s2 ****************************************************************
186 Emits a possible load of the second source operand.
188 *******************************************************************************/
190 s4 emit_load_s2(jitdata *jd, instruction *iptr, s4 tempreg)
195 src = iptr->sx.s23.s2.var;
197 reg = emit_load(jd, iptr, src, tempreg);
203 /* emit_load_s3 ****************************************************************
205 Emits a possible load of the third source operand.
207 *******************************************************************************/
209 s4 emit_load_s3(jitdata *jd, instruction *iptr, s4 tempreg)
214 src = iptr->sx.s23.s3.var;
216 reg = emit_load(jd, iptr, src, tempreg);
222 /* emit_load_s1_low ************************************************************
224 Emits a possible load of the low 32-bits of the first long source
227 *******************************************************************************/
229 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, s4 tempreg)
236 reg = emit_load_low(jd, iptr, src, tempreg);
242 /* emit_load_s2_low ************************************************************
244 Emits a possible load of the low 32-bits of the second long source
247 *******************************************************************************/
249 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, s4 tempreg)
254 src = iptr->sx.s23.s2.var;
256 reg = emit_load_low(jd, iptr, src, tempreg);
262 /* emit_load_s3_low ************************************************************
264 Emits a possible load of the low 32-bits of the third long source
267 *******************************************************************************/
269 s4 emit_load_s3_low(jitdata *jd, instruction *iptr, s4 tempreg)
274 src = iptr->sx.s23.s3.var;
276 reg = emit_load_low(jd, iptr, src, tempreg);
282 /* emit_load_s1_high ***********************************************************
284 Emits a possible load of the high 32-bits of the first long source
287 *******************************************************************************/
289 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, s4 tempreg)
296 reg = emit_load_high(jd, iptr, src, tempreg);
302 /* emit_load_s2_high ***********************************************************
304 Emits a possible load of the high 32-bits of the second long source
307 *******************************************************************************/
309 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, s4 tempreg)
314 src = iptr->sx.s23.s2.var;
316 reg = emit_load_high(jd, iptr, src, tempreg);
322 /* emit_load_s3_high ***********************************************************
324 Emits a possible load of the high 32-bits of the third long source
327 *******************************************************************************/
329 s4 emit_load_s3_high(jitdata *jd, instruction *iptr, s4 tempreg)
334 src = iptr->sx.s23.s3.var;
336 reg = emit_load_high(jd, iptr, src, tempreg);
342 /* emit_store ******************************************************************
346 *******************************************************************************/
348 void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
352 /* get required compiler data */
356 if (dst->flags & INMEMORY) {
359 if (IS_FLT_DBL_TYPE(dst->type)) {
360 if (IS_2_WORD_TYPE(dst->type))
361 M_DST(d, REG_SP, dst->regoff * 4);
363 M_FST(d, REG_SP, dst->regoff * 4);
366 if (IS_2_WORD_TYPE(dst->type))
367 M_LST(d, REG_SP, dst->regoff * 4);
369 M_IST(d, REG_SP, dst->regoff * 4);
375 /* emit_store_dst **************************************************************
377 This function generates the code to store the result of an
378 operation back into a spilled pseudo-variable. If the
379 pseudo-variable has not been spilled in the first place, this
380 function will generate nothing.
382 *******************************************************************************/
384 void emit_store_dst(jitdata *jd, instruction *iptr, s4 d)
386 emit_store(jd, iptr, iptr->dst.var, d);
390 /* emit_copy *******************************************************************
394 *******************************************************************************/
396 void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
402 /* get required compiler data */
407 if (src->type == TYPE_LNG)
408 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
410 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_IFTMP);
412 if ((src->regoff != dst->regoff) ||
413 ((src->flags ^ dst->flags) & INMEMORY)) {
414 s1 = emit_load(jd, iptr, src, d);
417 if (IS_FLT_DBL_TYPE(src->type))
420 if (IS_2_WORD_TYPE(src->type)) {
421 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
422 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
429 emit_store(jd, iptr, dst, d);
434 /* emit_iconst *****************************************************************
438 *******************************************************************************/
440 void emit_iconst(codegendata *cd, s4 d, s4 value)
444 if ((value >= -32768) && (value <= 32767))
445 M_LDA_INTERN(d, REG_ZERO, value);
447 disp = dseg_add_s4(cd, value);
448 M_ILD(d, REG_PV, disp);
453 /* emit_exception_stubs ********************************************************
455 Generates the code for the exception stubs.
457 *******************************************************************************/
459 void emit_exception_stubs(jitdata *jd)
467 /* get required compiler data */
472 /* generate exception stubs */
476 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
477 gen_resolvebranch(cd->mcodebase + eref->branchpos,
478 eref->branchpos, cd->mcodeptr - cd->mcodebase);
482 /* Move the value register to a temporary register, if
483 there is the need for it. */
486 M_MOV(eref->reg, REG_ITMP1);
488 /* calcuate exception address */
490 M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
492 /* move function to call into REG_ITMP3 */
494 disp = dseg_add_functionptr(cd, eref->function);
495 M_ALD(REG_ITMP3, REG_PV, disp);
497 if (targetdisp == 0) {
498 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
500 if (jd->isleafmethod) {
502 M_AST(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
505 M_MOV(REG_PV, rd->argintregs[0]);
506 M_MOV(REG_SP, rd->argintregs[1]);
508 if (jd->isleafmethod)
509 M_MOV(REG_ZERO, rd->argintregs[2]);
511 M_ALD(rd->argintregs[2],
512 REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
514 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
515 M_MOV(REG_ITMP1, rd->argintregs[4]);
517 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
518 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
522 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
524 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
525 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
527 if (jd->isleafmethod) {
528 /* XXX FIXME: REG_ZERO can cause problems here! */
529 assert(cd->stackframesize * 4 <= 32767);
531 M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
535 disp = dseg_add_functionptr(cd, asm_handle_exception);
536 M_ALD(REG_ITMP3, REG_PV, disp);
541 disp = (((u4 *) cd->mcodebase) + targetdisp) -
542 (((u4 *) cd->mcodeptr) + 1);
549 /* emit_patcher_stubs **********************************************************
551 Generates the code for the patcher stubs.
553 *******************************************************************************/
555 void emit_patcher_stubs(jitdata *jd)
565 /* get required compiler data */
569 /* generate code patching stub call code */
573 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
574 /* check code segment size */
578 /* Get machine code which is patched back in later. The
579 call is 1 instruction word long. */
581 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
583 mcode = *((u4 *) tmpmcodeptr);
585 /* Patch in the call to call the following code (done at
588 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
589 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
591 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
594 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
596 /* create stack frame - keep stack 16-byte aligned */
598 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
600 /* calculate return address and move it onto the stack */
602 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
603 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
605 /* move pointer to java_objectheader onto stack */
607 #if defined(ENABLE_THREADS)
608 /* order reversed because of data segment layout */
610 (void) dseg_add_unique_address(cd, NULL); /* flcword */
611 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
612 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
614 M_LDA(REG_ITMP3, REG_PV, disp);
615 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
620 /* move machine code onto stack */
622 disp = dseg_add_s4(cd, mcode);
623 M_ILD(REG_ITMP3, REG_PV, disp);
624 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
626 /* move class/method/field reference onto stack */
628 disp = dseg_add_address(cd, pref->ref);
629 M_ALD(REG_ITMP3, REG_PV, disp);
630 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
632 /* move data segment displacement onto stack */
634 disp = dseg_add_s4(cd, pref->disp);
635 M_ILD(REG_ITMP3, REG_PV, disp);
636 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
638 /* move patcher function pointer onto stack */
640 disp = dseg_add_functionptr(cd, pref->patcher);
641 M_ALD(REG_ITMP3, REG_PV, disp);
642 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
644 if (targetdisp == 0) {
645 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
647 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
648 M_ALD(REG_ITMP3, REG_PV, disp);
653 disp = (((u4 *) cd->mcodebase) + targetdisp) -
654 (((u4 *) cd->mcodeptr) + 1);
661 /* emit_replacement_stubs ******************************************************
663 Generates the code for the replacement stubs.
665 *******************************************************************************/
667 void emit_replacement_stubs(jitdata *jd)
676 /* get required compiler data */
681 rplp = code->rplpoints;
683 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
684 /* check code segment size */
688 /* note start of stub code */
690 rplp->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
692 /* make machine code for patching */
694 savedmcodeptr = cd->mcodeptr;
695 cd->mcodeptr = (u1 *) &(rplp->mcode) + 1; /* big-endian */
697 disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
700 cd->mcodeptr = savedmcodeptr;
702 /* create stack frame - keep 16-byte aligned */
704 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
706 /* push address of `rplpoint` struct */
708 disp = dseg_add_address(cd, rplp);
709 M_ALD(REG_ITMP3, REG_PV, disp);
710 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
712 /* jump to replacement function */
714 disp = dseg_add_functionptr(cd, asm_replacement_out);
715 M_ALD(REG_ITMP3, REG_PV, disp);
722 /* emit_verbosecall_enter ******************************************************
724 Generates the code for the call trace.
726 *******************************************************************************/
728 void emit_verbosecall_enter(jitdata *jd)
738 /* get required compiler data */
746 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
748 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
749 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
750 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
752 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
753 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
754 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
755 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
757 /* in nativestubs no Place to save the LR (Link Register) would be needed */
758 /* but since the stack frame has to be aligned the 4 Bytes would have to */
759 /* be padded again */
761 #if defined(__DARWIN__)
762 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
767 /* mark trace code */
772 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
773 M_STWU(REG_SP, REG_SP, -stack_size);
775 M_CLR(REG_ITMP1); /* clear help register */
777 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
778 #if defined(__DARWIN__)
779 /* Copy Params starting from first to Stack */
780 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
784 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
785 /* integer argument regs */
786 /* all integer argument registers have to be saved */
787 for (p = 0; p < 8; p++) {
788 d = rd->argintregs[p];
789 /* save integer argument registers */
790 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
795 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
796 t = md->paramtypes[p].type;
797 if (IS_INT_LNG_TYPE(t)) {
798 if (!md->params[p].inmemory) { /* Param in Arg Reg */
799 if (IS_2_WORD_TYPE(t)) {
800 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
801 , REG_SP, stack_off);
802 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
803 , REG_SP, stack_off + 4);
805 M_IST(REG_ITMP1, REG_SP, stack_off);
806 M_IST(rd->argintregs[md->params[p].regoff]
807 , REG_SP, stack_off + 4);
809 } else { /* Param on Stack */
810 s1 = (md->params[p].regoff + cd->stackframesize) * 4
812 if (IS_2_WORD_TYPE(t)) {
813 M_ILD(REG_ITMP2, REG_SP, s1);
814 M_IST(REG_ITMP2, REG_SP, stack_off);
815 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
816 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
818 M_IST(REG_ITMP1, REG_SP, stack_off);
819 M_ILD(REG_ITMP2, REG_SP, s1);
820 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
823 } else { /* IS_FLT_DBL_TYPE(t) */
824 if (!md->params[p].inmemory) { /* in Arg Reg */
825 s1 = rd->argfltregs[md->params[p].regoff];
826 if (!IS_2_WORD_TYPE(t)) {
827 M_IST(REG_ITMP1, REG_SP, stack_off);
828 M_FST(s1, REG_SP, stack_off + 4);
830 M_DST(s1, REG_SP, stack_off);
832 } else { /* on Stack */
833 /* this should not happen */
838 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
839 #if defined(__DARWIN__)
840 for (p = 0; p < 8; p++) {
841 d = rd->argintregs[p];
842 M_ILD(d, REG_SP, LA_SIZE + p * 4);
846 /* Set integer and float argument registers vor trace_args call */
847 /* offset to saved integer argument registers */
848 stack_off = LA_SIZE + 4 * 8 + 4;
849 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
850 t = md->paramtypes[p].type;
851 if (IS_INT_LNG_TYPE(t)) {
852 /* "stretch" int types */
853 if (!IS_2_WORD_TYPE(t)) {
854 M_CLR(rd->argintregs[2 * p]);
855 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
858 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
859 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
862 } else { /* Float/Dbl */
863 if (!md->params[p].inmemory) { /* Param in Arg Reg */
864 /* use reserved Place on Stack (sp + 5 * 16) to copy */
865 /* float/double arg reg to int reg */
866 s1 = rd->argfltregs[md->params[p].regoff];
867 if (!IS_2_WORD_TYPE(t)) {
868 M_FST(s1, REG_SP, 5 * 16);
869 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
870 M_CLR(rd->argintregs[2 * p]);
872 M_DST(s1, REG_SP, 5 * 16);
873 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
874 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
881 /* put methodinfo pointer on Stackframe */
882 p = dseg_add_address(cd, m);
883 M_ALD(REG_ITMP1, REG_PV, p);
884 #if defined(__DARWIN__)
885 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
887 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
889 p = dseg_add_functionptr(cd, builtin_trace_args);
890 M_ALD(REG_ITMP2, REG_PV, p);
894 #if defined(__DARWIN__)
895 /* restore integer argument registers from the reserved stack space */
898 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
899 p++, stack_off += 8) {
900 t = md->paramtypes[p].type;
902 if (IS_INT_LNG_TYPE(t)) {
903 if (!md->params[p].inmemory) {
904 if (IS_2_WORD_TYPE(t)) {
905 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
906 , REG_SP, stack_off);
907 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
908 , REG_SP, stack_off + 4);
910 M_ILD(rd->argintregs[md->params[p].regoff]
911 , REG_SP, stack_off + 4);
918 for (p = 0; p < 8; p++) {
919 d = rd->argintregs[p];
920 /* save integer argument registers */
921 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
925 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
927 M_LDA(REG_SP, REG_SP, stack_size);
929 /* mark trace code */
935 /* emit_verbosecall_exit *******************************************************
937 Generates the code for the call trace.
939 *******************************************************************************/
941 void emit_verbosecall_exit(jitdata *jd)
949 /* get required compiler data */
957 /* mark trace code */
962 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
963 M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
965 /* save return registers */
967 M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
968 M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
970 /* keep this order */
971 switch (md->returntype.type) {
974 #if defined(__DARWIN__)
975 M_MOV(REG_RESULT, rd->argintregs[2]);
976 M_CLR(rd->argintregs[1]);
978 M_MOV(REG_RESULT, rd->argintregs[3]);
979 M_CLR(rd->argintregs[2]);
984 #if defined(__DARWIN__)
985 M_MOV(REG_RESULT2, rd->argintregs[2]);
986 M_MOV(REG_RESULT, rd->argintregs[1]);
988 M_MOV(REG_RESULT2, rd->argintregs[3]);
989 M_MOV(REG_RESULT, rd->argintregs[2]);
994 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
995 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
997 disp = dseg_add_address(cd, m);
998 M_ALD(rd->argintregs[0], REG_PV, disp);
1000 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
1001 M_ALD(REG_ITMP2, REG_PV, disp);
1005 /* restore return registers */
1007 M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
1008 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
1010 M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
1012 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
1014 /* mark trace code */
1021 * These are local overrides for various environment variables in Emacs.
1022 * Please do not remove this and leave it at the end of the file, where
1023 * Emacs will automagically detect them.
1024 * ---------------------------------------------------------------------
1027 * indent-tabs-mode: t
1031 * vim:noexpandtab:sw=4:ts=4: