1 /* src/vm/jit/powerpc/emit.c - PowerPC code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
42 #include "vm/jit/powerpc/codegen.h"
44 #include "mm/memory.h"
45 #include "vm/builtin.h"
46 #include "vm/options.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 /* get required compiler data */
70 if (IS_INMEMORY(src->flags)) {
73 disp = src->vv.regoff * 4;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 if (IS_2_WORD_TYPE(src->type))
83 M_LLD(tempreg, REG_SP, disp);
85 M_ILD(tempreg, REG_SP, disp);
97 /* emit_load_low ***************************************************************
99 Emits a possible load of the low 32-bits of an operand.
101 *******************************************************************************/
103 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
109 assert(src->type == TYPE_LNG);
111 /* get required compiler data */
115 if (IS_INMEMORY(src->flags)) {
118 disp = src->vv.regoff * 4;
120 M_ILD(tempreg, REG_SP, disp + 4);
125 reg = GET_LOW_REG(src->vv.regoff);
131 /* emit_load_high **************************************************************
133 Emits a possible load of the high 32-bits of an operand.
135 *******************************************************************************/
137 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
143 assert(src->type == TYPE_LNG);
145 /* get required compiler data */
149 if (IS_INMEMORY(src->flags)) {
152 disp = src->vv.regoff * 4;
154 M_ILD(tempreg, REG_SP, disp);
159 reg = GET_HIGH_REG(src->vv.regoff);
165 /* emit_store ******************************************************************
169 *******************************************************************************/
171 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
175 /* get required compiler data */
179 if (IS_INMEMORY(dst->flags)) {
182 if (IS_FLT_DBL_TYPE(dst->type)) {
183 if (IS_2_WORD_TYPE(dst->type))
184 M_DST(d, REG_SP, dst->vv.regoff * 4);
186 M_FST(d, REG_SP, dst->vv.regoff * 4);
189 if (IS_2_WORD_TYPE(dst->type))
190 M_LST(d, REG_SP, dst->vv.regoff * 4);
192 M_IST(d, REG_SP, dst->vv.regoff * 4);
198 /* emit_copy *******************************************************************
200 Generates a register/memory to register/memory copy.
202 *******************************************************************************/
204 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
209 /* get required compiler data */
213 if ((src->vv.regoff != dst->vv.regoff) ||
214 (IS_INMEMORY(src->flags ^ dst->flags))) {
216 /* If one of the variables resides in memory, we can eliminate
217 the register move from/to the temporary register with the
218 order of getting the destination register and the load. */
220 if (IS_INMEMORY(src->flags)) {
221 if (IS_LNG_TYPE(src->type))
222 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
224 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
226 s1 = emit_load(jd, iptr, src, d);
229 if (IS_LNG_TYPE(src->type))
230 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
232 s1 = emit_load(jd, iptr, src, REG_IFTMP);
234 d = codegen_reg_of_var(iptr->opc, dst, s1);
238 if (IS_FLT_DBL_TYPE(src->type))
241 if (IS_2_WORD_TYPE(src->type)) {
242 M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
243 M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
250 emit_store(jd, iptr, dst, d);
255 /* emit_iconst *****************************************************************
259 *******************************************************************************/
261 void emit_iconst(codegendata *cd, s4 d, s4 value)
265 if ((value >= -32768) && (value <= 32767))
266 M_LDA_INTERN(d, REG_ZERO, value);
268 disp = dseg_add_s4(cd, value);
269 M_ILD(d, REG_PV, disp);
274 /* emit_nullpointer_check ******************************************************
276 Emit a NullPointerException check.
278 *******************************************************************************/
280 void emit_nullpointer_check(codegendata *cd, s4 reg)
285 codegen_add_nullpointerexception_ref(cd);
290 /* emit_arrayindexoutofbounds_check ********************************************
292 Emit a ArrayIndexOutOfBoundsException check.
294 *******************************************************************************/
296 void emit_arrayindexoutofbounds_check(codegendata *cd, s4 s1, s4 s2)
299 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
300 M_CMPU(s2, REG_ITMP3);
302 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
307 /* emit_exception_stubs ********************************************************
309 Generates the code for the exception stubs.
311 *******************************************************************************/
313 void emit_exception_stubs(jitdata *jd)
323 /* get required compiler data */
328 /* generate exception stubs */
332 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
333 /* back-patch the branch to this exception code */
335 branchmpc = er->branchpos;
336 targetmpc = cd->mcodeptr - cd->mcodebase;
338 md_codegen_patch_branch(cd, branchmpc, targetmpc);
342 /* Move the value register to a temporary register, if
343 there is the need for it. */
346 M_MOV(er->reg, REG_ITMP1);
348 /* calcuate exception address */
350 M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
352 /* move function to call into REG_ITMP3 */
354 disp = dseg_add_functionptr(cd, er->function);
355 M_ALD(REG_ITMP3, REG_PV, disp);
357 if (targetdisp == 0) {
358 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
360 if (jd->isleafmethod) {
362 M_AST(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
365 M_MOV(REG_PV, rd->argintregs[0]);
366 M_MOV(REG_SP, rd->argintregs[1]);
368 if (jd->isleafmethod)
369 M_MOV(REG_ZERO, rd->argintregs[2]);
371 M_ALD(rd->argintregs[2],
372 REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
374 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
375 M_MOV(REG_ITMP1, rd->argintregs[4]);
377 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
378 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
382 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
384 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
385 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
387 if (jd->isleafmethod) {
388 /* XXX FIXME: REG_ZERO can cause problems here! */
389 assert(cd->stackframesize * 4 <= 32767);
391 M_ALD(REG_ZERO, REG_SP, cd->stackframesize * 4 + LA_LR_OFFSET);
395 disp = dseg_add_functionptr(cd, asm_handle_exception);
396 M_ALD(REG_ITMP3, REG_PV, disp);
401 disp = (((u4 *) cd->mcodebase) + targetdisp) -
402 (((u4 *) cd->mcodeptr) + 1);
409 /* emit_patcher_stubs **********************************************************
411 Generates the code for the patcher stubs.
413 *******************************************************************************/
415 void emit_patcher_stubs(jitdata *jd)
425 /* get required compiler data */
429 /* generate code patching stub call code */
433 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
434 /* check code segment size */
438 /* Get machine code which is patched back in later. The
439 call is 1 instruction word long. */
441 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
443 mcode = *((u4 *) tmpmcodeptr);
445 /* Patch in the call to call the following code (done at
448 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
449 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
451 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
454 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
456 /* create stack frame - keep stack 16-byte aligned */
458 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
460 /* calculate return address and move it onto the stack */
462 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
463 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
465 /* move pointer to java_objectheader onto stack */
467 #if defined(ENABLE_THREADS)
468 /* order reversed because of data segment layout */
470 (void) dseg_add_unique_address(cd, NULL); /* flcword */
471 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
472 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
474 M_LDA(REG_ITMP3, REG_PV, disp);
475 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
480 /* move machine code onto stack */
482 disp = dseg_add_s4(cd, mcode);
483 M_ILD(REG_ITMP3, REG_PV, disp);
484 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
486 /* move class/method/field reference onto stack */
488 disp = dseg_add_address(cd, pref->ref);
489 M_ALD(REG_ITMP3, REG_PV, disp);
490 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
492 /* move data segment displacement onto stack */
494 disp = dseg_add_s4(cd, pref->disp);
495 M_ILD(REG_ITMP3, REG_PV, disp);
496 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
498 /* move patcher function pointer onto stack */
500 disp = dseg_add_functionptr(cd, pref->patcher);
501 M_ALD(REG_ITMP3, REG_PV, disp);
502 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
504 if (targetdisp == 0) {
505 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
507 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
508 M_ALD(REG_ITMP3, REG_PV, disp);
513 disp = (((u4 *) cd->mcodebase) + targetdisp) -
514 (((u4 *) cd->mcodeptr) + 1);
521 /* emit_replacement_stubs ******************************************************
523 Generates the code for the replacement stubs.
525 *******************************************************************************/
527 void emit_replacement_stubs(jitdata *jd)
536 /* get required compiler data */
541 rplp = code->rplpoints;
543 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
544 /* check code segment size */
548 /* note start of stub code */
550 rplp->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
552 /* make machine code for patching */
554 savedmcodeptr = cd->mcodeptr;
555 cd->mcodeptr = (u1 *) &(rplp->mcode) + 1; /* big-endian */
557 disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
560 cd->mcodeptr = savedmcodeptr;
562 /* create stack frame - keep 16-byte aligned */
564 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
566 /* push address of `rplpoint` struct */
568 disp = dseg_add_address(cd, rplp);
569 M_ALD(REG_ITMP3, REG_PV, disp);
570 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
572 /* jump to replacement function */
574 disp = dseg_add_functionptr(cd, asm_replacement_out);
575 M_ALD(REG_ITMP3, REG_PV, disp);
582 /* emit_verbosecall_enter ******************************************************
584 Generates the code for the call trace.
586 *******************************************************************************/
589 void emit_verbosecall_enter(jitdata *jd)
599 /* get required compiler data */
607 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
609 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
610 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
611 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
613 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
614 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
615 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
616 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
618 /* in nativestubs no Place to save the LR (Link Register) would be needed */
619 /* but since the stack frame has to be aligned the 4 Bytes would have to */
620 /* be padded again */
622 #if defined(__DARWIN__)
623 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
628 /* mark trace code */
633 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
634 M_STWU(REG_SP, REG_SP, -stack_size);
636 M_CLR(REG_ITMP1); /* clear help register */
638 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
639 #if defined(__DARWIN__)
640 /* Copy Params starting from first to Stack */
641 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
645 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
646 /* integer argument regs */
647 /* all integer argument registers have to be saved */
648 for (p = 0; p < 8; p++) {
649 d = rd->argintregs[p];
650 /* save integer argument registers */
651 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
656 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
657 t = md->paramtypes[p].type;
658 if (IS_INT_LNG_TYPE(t)) {
659 if (!md->params[p].inmemory) { /* Param in Arg Reg */
660 if (IS_2_WORD_TYPE(t)) {
661 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
662 , REG_SP, stack_off);
663 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
664 , REG_SP, stack_off + 4);
666 M_IST(REG_ITMP1, REG_SP, stack_off);
667 M_IST(rd->argintregs[md->params[p].regoff]
668 , REG_SP, stack_off + 4);
670 } else { /* Param on Stack */
671 s1 = (md->params[p].regoff + cd->stackframesize) * 4
673 if (IS_2_WORD_TYPE(t)) {
674 M_ILD(REG_ITMP2, REG_SP, s1);
675 M_IST(REG_ITMP2, REG_SP, stack_off);
676 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
677 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
679 M_IST(REG_ITMP1, REG_SP, stack_off);
680 M_ILD(REG_ITMP2, REG_SP, s1);
681 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
684 } else { /* IS_FLT_DBL_TYPE(t) */
685 if (!md->params[p].inmemory) { /* in Arg Reg */
686 s1 = rd->argfltregs[md->params[p].regoff];
687 if (!IS_2_WORD_TYPE(t)) {
688 M_IST(REG_ITMP1, REG_SP, stack_off);
689 M_FST(s1, REG_SP, stack_off + 4);
691 M_DST(s1, REG_SP, stack_off);
693 } else { /* on Stack */
694 /* this should not happen */
699 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
700 #if defined(__DARWIN__)
701 for (p = 0; p < 8; p++) {
702 d = rd->argintregs[p];
703 M_ILD(d, REG_SP, LA_SIZE + p * 4);
707 /* Set integer and float argument registers vor trace_args call */
708 /* offset to saved integer argument registers */
709 stack_off = LA_SIZE + 4 * 8 + 4;
710 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
711 t = md->paramtypes[p].type;
712 if (IS_INT_LNG_TYPE(t)) {
713 /* "stretch" int types */
714 if (!IS_2_WORD_TYPE(t)) {
715 M_CLR(rd->argintregs[2 * p]);
716 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
719 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
720 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
723 } else { /* Float/Dbl */
724 if (!md->params[p].inmemory) { /* Param in Arg Reg */
725 /* use reserved Place on Stack (sp + 5 * 16) to copy */
726 /* float/double arg reg to int reg */
727 s1 = rd->argfltregs[md->params[p].regoff];
728 if (!IS_2_WORD_TYPE(t)) {
729 M_FST(s1, REG_SP, 5 * 16);
730 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
731 M_CLR(rd->argintregs[2 * p]);
733 M_DST(s1, REG_SP, 5 * 16);
734 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
735 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
742 /* put methodinfo pointer on Stackframe */
743 p = dseg_add_address(cd, m);
744 M_ALD(REG_ITMP1, REG_PV, p);
745 #if defined(__DARWIN__)
746 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
748 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
750 p = dseg_add_functionptr(cd, builtin_trace_args);
751 M_ALD(REG_ITMP2, REG_PV, p);
755 #if defined(__DARWIN__)
756 /* restore integer argument registers from the reserved stack space */
759 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
760 p++, stack_off += 8) {
761 t = md->paramtypes[p].type;
763 if (IS_INT_LNG_TYPE(t)) {
764 if (!md->params[p].inmemory) {
765 if (IS_2_WORD_TYPE(t)) {
766 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
767 , REG_SP, stack_off);
768 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
769 , REG_SP, stack_off + 4);
771 M_ILD(rd->argintregs[md->params[p].regoff]
772 , REG_SP, stack_off + 4);
779 for (p = 0; p < 8; p++) {
780 d = rd->argintregs[p];
781 /* save integer argument registers */
782 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
786 M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
788 M_LDA(REG_SP, REG_SP, stack_size);
790 /* mark trace code */
794 #endif /* !defined(NDEBUG) */
797 /* emit_verbosecall_exit *******************************************************
799 Generates the code for the call trace.
801 *******************************************************************************/
804 void emit_verbosecall_exit(jitdata *jd)
812 /* get required compiler data */
820 /* mark trace code */
825 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
826 M_STWU(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4));
828 /* save return registers */
830 M_LST(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
831 M_DST(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
833 /* keep this order */
834 switch (md->returntype.type) {
837 #if defined(__DARWIN__)
838 M_MOV(REG_RESULT, rd->argintregs[2]);
839 M_CLR(rd->argintregs[1]);
841 M_MOV(REG_RESULT, rd->argintregs[3]);
842 M_CLR(rd->argintregs[2]);
847 #if defined(__DARWIN__)
848 M_MOV(REG_RESULT2, rd->argintregs[2]);
849 M_MOV(REG_RESULT, rd->argintregs[1]);
851 M_MOV(REG_RESULT2, rd->argintregs[3]);
852 M_MOV(REG_RESULT, rd->argintregs[2]);
857 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
858 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
860 disp = dseg_add_address(cd, m);
861 M_ALD(rd->argintregs[0], REG_PV, disp);
863 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
864 M_ALD(REG_ITMP2, REG_PV, disp);
868 /* restore return registers */
870 M_LLD(REG_RESULT_PACKED, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 0) * 4);
871 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 2) * 4);
873 M_ALD(REG_ZERO, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4 + LA_LR_OFFSET);
875 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1 + 4) * 4);
877 /* mark trace code */
881 #endif /* !defined(NDEBUG) */
885 * These are local overrides for various environment variables in Emacs.
886 * Please do not remove this and leave it at the end of the file, where
887 * Emacs will automagically detect them.
888 * ---------------------------------------------------------------------
891 * indent-tabs-mode: t
895 * vim:noexpandtab:sw=4:ts=4: