1 /* src/vm/jit/powerpc/codegen.h - code generation macros and definitions for
4 Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
5 R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
6 C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
7 Institut f. Computersprachen - TU Wien
9 This file is part of CACAO.
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2, or (at
14 your option) any later version.
16 This program is distributed in the hope that it will be useful, but
17 WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
26 Contact: cacao@complang.tuwien.ac.at
28 Authors: Andreas Krall
31 Changes: Christian Thalinger
34 $Id: codegen.h 3703 2005-11-17 19:01:00Z twisti $
46 #include "vm/global.h"
47 #include "vm/jit/jit.h"
48 #include "vm/jit/reg.h"
51 /* additional functions and macros to generate code ***************************/
54 #if defined(STATISTICS)
55 #define COUNT_SPILLS count_spills++
61 /* gen_nullptr_check(objreg) */
63 #define gen_nullptr_check(objreg) \
67 codegen_addxnullrefs(cd, mcodeptr); \
70 #define gen_bound_check \
72 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
73 M_CMPU(s2, REG_ITMP3);\
75 codegen_addxboundrefs(cd, mcodeptr, s2); \
79 /* MCODECHECK(icnt) */
81 #define MCODECHECK(icnt) \
82 if ((mcodeptr + (icnt)) > cd->mcodeend) \
83 mcodeptr = codegen_increase(cd, (u1 *) mcodeptr)
87 generates an integer-move from register a to b.
88 if a and b are the same int-register, no code will be generated.
91 #define M_INTMOVE(a,b) if ((a) != (b)) { M_MOV(a, b); }
93 #define M_TINTMOVE(t,a,b) \
94 if ((t) == TYPE_LNG) { \
96 M_INTMOVE(GET_LOW_REG((a)), GET_LOW_REG((b))); \
97 M_INTMOVE(GET_HIGH_REG((a)), GET_HIGH_REG((b))); \
99 M_INTMOVE(GET_LOW_REG((a)), GET_LOW_REG((b))); \
101 M_INTMOVE((a), (b)); \
106 generates a floating-point-move from register a to b.
107 if a and b are the same float-register, no code will be generated
110 #define M_FLTMOVE(a,b) if ((a) != (b)) { M_FMOV(a, b); }
114 this function generates code to fetch data from a pseudo-register
115 into a real register.
116 If the pseudo-register has actually been assigned to a real
117 register, no code will be emitted, since following operations
118 can use this register directly.
120 v: pseudoregister to be fetched from
121 tempregnum: temporary register to be used if v is actually spilled to ram
123 return: the register number, where the operand can be found after
124 fetching (this wil be either tempregnum or the register
125 number allready given to v)
128 #define var_to_reg_int(regnr,v,tempnr) \
130 if ((v)->flags & INMEMORY) { \
132 if (IS_2_WORD_TYPE((v)->type)) { \
133 M_ILD(GET_HIGH_REG((tempnr)), REG_SP, (v)->regoff * 4); \
134 M_ILD(GET_LOW_REG((tempnr)), REG_SP, (v)->regoff * 4 + 4); \
136 M_ILD((tempnr), REG_SP, (v)->regoff * 4); \
139 regnr = (v)->regoff; \
144 /* fetch only the low part of v, regnr hast to be a single register */
146 #define var_to_reg_lng_low(regnr,v,tempnr) \
148 if ((v)->flags & INMEMORY) { \
150 M_ILD((tempnr), REG_SP, (v)->regoff * 4 + 4); \
153 regnr = GET_LOW_REG((v)->regoff); \
158 /* fetch only the high part of v, regnr hast to be a single register */
160 #define var_to_reg_lng_high(regnr,v,tempnr) \
162 if ((v)->flags & INMEMORY) { \
164 M_ILD((tempnr), REG_SP, (v)->regoff * 4); \
167 regnr = GET_HIGH_REG((v)->regoff); \
173 #define var_to_reg_flt(regnr,v,tempnr) \
175 if ((v)->flags & INMEMORY) { \
177 if ((v)->type == TYPE_DBL) \
178 M_DLD(tempnr, REG_SP, (v)->regoff * 4); \
180 M_FLD(tempnr, REG_SP, (v)->regoff * 4); \
183 regnr = (v)->regoff; \
188 /* store_reg_to_var_xxx:
189 This function generates the code to store the result of an operation
190 back into a spilled pseudo-variable.
191 If the pseudo-variable has not been spilled in the first place, this
192 function will generate nothing.
194 v ............ Pseudovariable
195 tempregnum ... Number of the temporary registers as returned by
198 #define store_reg_to_var_int0(sptr, tempregnum, a, b) { \
199 if ((sptr)->flags & INMEMORY) { \
201 if (a) M_IST(GET_HIGH_REG((tempregnum)), REG_SP, 4 * (sptr)->regoff); \
202 if ((b) && IS_2_WORD_TYPE((sptr)->type)) \
203 M_IST(GET_LOW_REG((tempregnum)), REG_SP, 4 * (sptr)->regoff + 4); \
207 #define store_reg_to_var_int(sptr, tempregnum) \
208 store_reg_to_var_int0(sptr, tempregnum, 1, 1)
210 #define store_reg_to_var_flt(sptr, tempregnum) { \
211 if ((sptr)->flags & INMEMORY) { \
213 if ((sptr)->type==TYPE_DBL) \
214 M_DST(tempregnum, REG_SP, 4 * (sptr)->regoff); \
216 M_FST(tempregnum, REG_SP, 4 * (sptr)->regoff); \
221 #define ICONST(reg,c) \
222 if (((c) >= 0 && (c) <= 32767) || ((c) >= -32768 && (c) < 0)) {\
223 M_LDA((reg), REG_ZERO, (c)); \
225 a = dseg_adds4(cd, c); \
226 M_ILD((reg), REG_PV, a); \
229 #define LCONST(reg,c) \
230 ICONST(GET_HIGH_REG((reg)), (s4) ((s8) (c) >> 32)); \
231 ICONST(GET_LOW_REG((reg)), (s4) ((s8) (c)));
234 #define M_COPY(from,to) \
235 d = reg_of_var(rd, to, REG_IFTMP); \
236 if ((from->regoff != to->regoff) || \
237 ((from->flags ^ to->flags) & INMEMORY)) { \
238 if (IS_FLT_DBL_TYPE(from->type)) { \
239 var_to_reg_flt(s1, from, d); \
241 store_reg_to_var_flt(to, d); \
244 var_to_reg_int(s1, from, d); \
245 M_TINTMOVE(from->type,s1,d); \
246 store_reg_to_var_int(to, d); \
251 #define ALIGNCODENOP \
252 if ((s4) ((ptrint) mcodeptr & 7)) { \
257 /* macros to create code ******************************************************/
259 #define M_OP3(opcode,y,oe,rc,d,a,b) \
260 *(mcodeptr++) = (((opcode) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((oe) << 10) | ((y) << 1) | (rc))
262 #define M_OP4(x,y,rc,d,a,b,c) \
263 *(mcodeptr++) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((b) << 11) | ((c) << 6) | ((y) << 1) | (rc))
265 #define M_OP2_IMM(x,d,a,i) \
266 *(mcodeptr++) = (((x) << 26) | ((d) << 21) | ((a) << 16) | ((i) & 0xffff))
268 #define M_BRMASK 0x0000fffc /* (((1 << 16) - 1) & ~3) */
269 #define M_BRAMASK 0x03fffffc /* (((1 << 26) - 1) & ~3) */
271 #define M_BRA(x,i,a,l) \
272 *(mcodeptr++) = (((x) << 26) | ((((i) * 4) + 4) & M_BRAMASK) | ((a) << 1) | (l))
274 #define M_BRAC(x,bo,bi,i,a,l) \
275 *(mcodeptr++) = (((x) << 26) | ((bo) << 21) | ((bi) << 16) | (((i) * 4 + 4) & M_BRMASK) | ((a) << 1) | (l))
278 /* instruction macros *********************************************************/
280 #define M_IADD(a,b,c) M_OP3(31, 266, 0, 0, c, a, b)
281 #define M_IADD_IMM(a,b,c) M_OP2_IMM(14, c, a, b)
282 #define M_ADDC(a,b,c) M_OP3(31, 10, 0, 0, c, a, b)
283 #define M_ADDIC(a,b,c) M_OP2_IMM(12, c, a, b)
284 #define M_ADDICTST(a,b,c) M_OP2_IMM(13, c, a, b)
285 #define M_ADDE(a,b,c) M_OP3(31, 138, 0, 0, c, a, b)
286 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
287 #define M_ADDME(a,b) M_OP3(31, 234, 0, 0, b, a, 0)
288 #define M_ISUB(a,b,c) M_OP3(31, 40, 0, 0, c, b, a)
289 #define M_ISUBTST(a,b,c) M_OP3(31, 40, 0, 1, c, b, a)
290 #define M_SUBC(a,b,c) M_OP3(31, 8, 0, 0, c, b, a)
291 #define M_SUBIC(a,b,c) M_OP2_IMM(8, c, b, a)
292 #define M_SUBE(a,b,c) M_OP3(31, 136, 0, 0, c, b, a)
293 #define M_SUBZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
294 #define M_SUBME(a,b) M_OP3(31, 232, 0, 0, b, a, 0)
296 #define M_AND(a,b,c) M_OP3(31, 28, 0, 0, a, c, b)
297 #define M_AND_IMM(a,b,c) M_OP2_IMM(28, a, c, b)
298 #define M_ANDIS(a,b,c) M_OP2_IMM(29, a, c, b)
299 #define M_OR(a,b,c) M_OP3(31, 444, 0, 0, a, c, b)
300 #define M_OR_TST(a,b,c) M_OP3(31, 444, 0, 1, a, c, b)
301 #define M_OR_IMM(a,b,c) M_OP2_IMM(24, a, c, b)
302 #define M_ORIS(a,b,c) M_OP2_IMM(25, a, c, b)
303 #define M_XOR(a,b,c) M_OP3(31, 316, 0, 0, a, c, b)
304 #define M_XOR_IMM(a,b,c) M_OP2_IMM(26, a, c, b)
305 #define M_XORIS(a,b,c) M_OP2_IMM(27, a, c, b)
307 #define M_SLL(a,b,c) M_OP3(31, 24, 0, 0, a, c, b)
308 #define M_SRL(a,b,c) M_OP3(31, 536, 0, 0, a, c, b)
309 #define M_SRA(a,b,c) M_OP3(31, 792, 0, 0, a, c, b)
310 #define M_SRA_IMM(a,b,c) M_OP3(31, 824, 0, 0, a, c, b)
312 #define M_IMUL(a,b,c) M_OP3(31, 235, 0, 0, c, a, b)
313 #define M_IMUL_IMM(a,b,c) M_OP2_IMM(7, c, a, b)
314 #define M_IDIV(a,b,c) M_OP3(31, 491, 0, 0, c, a, b)
316 #define M_NEG(a,b) M_OP3(31, 104, 0, 0, b, a, 0)
317 #define M_NOT(a,b) M_OP3(31, 124, 0, 0, a, b, a)
319 #define M_SUBFIC(a,b,c) M_OP2_IMM(8, c, a, b)
320 #define M_SUBFZE(a,b) M_OP3(31, 200, 0, 0, b, a, 0)
321 #define M_RLWINM(a,b,c,d,e) M_OP4(21, d, 0, a, e, b, c)
322 #define M_ADDZE(a,b) M_OP3(31, 202, 0, 0, b, a, 0)
323 #define M_SLL_IMM(a,b,c) M_RLWINM(a,b,0,31-(b),c)
324 #define M_SRL_IMM(a,b,c) M_RLWINM(a,32-(b),b,31,c)
325 #define M_ADDIS(a,b,c) M_OP2_IMM(15, c, a, b)
326 #define M_STFIWX(a,b,c) M_OP3(31, 983, 0, 0, a, b, c)
327 #define M_LWZX(a,b,c) M_OP3(31, 23, 0, 0, a, b, c)
328 #define M_LHZX(a,b,c) M_OP3(31, 279, 0, 0, a, b, c)
329 #define M_LHAX(a,b,c) M_OP3(31, 343, 0, 0, a, b, c)
330 #define M_LBZX(a,b,c) M_OP3(31, 87, 0, 0, a, b, c)
331 #define M_LFSX(a,b,c) M_OP3(31, 535, 0, 0, a, b, c)
332 #define M_LFDX(a,b,c) M_OP3(31, 599, 0, 0, a, b, c)
333 #define M_STWX(a,b,c) M_OP3(31, 151, 0, 0, a, b, c)
334 #define M_STHX(a,b,c) M_OP3(31, 407, 0, 0, a, b, c)
335 #define M_STBX(a,b,c) M_OP3(31, 215, 0, 0, a, b, c)
336 #define M_STFSX(a,b,c) M_OP3(31, 663, 0, 0, a, b, c)
337 #define M_STFDX(a,b,c) M_OP3(31, 727, 0, 0, a, b, c)
339 #define M_STWU_INTERN(a,b,disp) M_OP2_IMM(37,a,b,disp)
341 #define M_STWU(a,b,disp) \
343 s4 lo = (disp) & 0x0000ffff; \
344 s4 hi = ((disp) >> 16); \
345 if (((disp) >= -32678) && ((disp) <= 32767)) { \
346 M_STWU_INTERN(a,b,lo); \
348 M_ADDIS(REG_ZERO,hi,REG_ITMP3); \
349 M_OR_IMM(REG_ITMP3,lo,REG_ITMP3); \
350 M_STWUX(REG_SP,REG_SP,REG_ITMP3); \
354 #define M_STWUX(a,b,c) M_OP3(31,183,0,0,a,b,c)
356 #define M_LDAH(a,b,c) M_ADDIS(b, c, a)
357 #define M_TRAP M_OP3(31, 4, 0, 0, 31, 0, 0)
359 #define M_NOP M_OR_IMM(0, 0, 0)
360 #define M_MOV(a,b) M_OR(a, a, b)
361 #define M_TST(a) M_OP3(31, 444, 0, 1, a, a, a)
363 #define M_DADD(a,b,c) M_OP3(63, 21, 0, 0, c, a, b)
364 #define M_FADD(a,b,c) M_OP3(59, 21, 0, 0, c, a, b)
365 #define M_DSUB(a,b,c) M_OP3(63, 20, 0, 0, c, a, b)
366 #define M_FSUB(a,b,c) M_OP3(59, 20, 0, 0, c, a, b)
367 #define M_DMUL(a,b,c) M_OP4(63, 25, 0, c, a, 0, b)
368 #define M_FMUL(a,b,c) M_OP4(59, 25, 0, c, a, 0, b)
369 #define M_DDIV(a,b,c) M_OP3(63, 18, 0, 0, c, a, b)
370 #define M_FDIV(a,b,c) M_OP3(59, 18, 0, 0, c, a, b)
372 #define M_FABS(a,b) M_OP3(63, 264, 0, 0, b, 0, a)
373 #define M_CVTDL(a,b) M_OP3(63, 14, 0, 0, b, 0, a)
374 #define M_CVTDL_C(a,b) M_OP3(63, 15, 0, 0, b, 0, a)
375 #define M_CVTDF(a,b) M_OP3(63, 12, 0, 0, b, 0, a)
376 #define M_FMOV(a,b) M_OP3(63, 72, 0, 0, b, 0, a)
377 #define M_FMOVN(a,b) M_OP3(63, 40, 0, 0, b, 0, a)
378 #define M_DSQRT(a,b) M_OP3(63, 22, 0, 0, b, 0, a)
379 #define M_FSQRT(a,b) M_OP3(59, 22, 0, 0, b, 0, a)
381 #define M_FCMPU(a,b) M_OP3(63, 0, 0, 0, 0, a, b)
382 #define M_FCMPO(a,b) M_OP3(63, 32, 0, 0, 0, a, b)
384 #define M_BLDU(a,b,c) M_OP2_IMM(34, a, b, c)
385 #define M_SLDU(a,b,c) M_OP2_IMM(40, a, b, c)
387 #define M_ILD_INTERN(a,b,disp) M_OP2_IMM(32,a,b,disp)
389 #define M_ILD(a,b,disp) \
391 s4 lo = (short) (disp); \
392 s4 hi = (short) (((disp) - lo) >> 16); \
394 M_ILD_INTERN(a,b,lo); \
397 M_ILD_INTERN(a,a,lo); \
401 #define M_ALD_INTERN(a,b,disp) M_ILD_INTERN(a,b,disp)
402 #define M_ALD(a,b,disp) M_ILD(a,b,disp)
404 #define M_BST(a,b,c) M_OP2_IMM(38, a, b, c)
405 #define M_SST(a,b,c) M_OP2_IMM(44, a, b, c)
407 #define M_IST_INTERN(a,b,disp) M_OP2_IMM(36,a,b,disp)
409 /* Stores with displacement overflow should only happen with PUTFIELD or on */
410 /* the stack. The PUTFIELD instruction does not use REG_ITMP3 and a */
411 /* reg_of_var call should not use REG_ITMP3!!! */
413 #define M_IST(a,b,disp) \
415 s4 lo = (short) (disp); \
416 s4 hi = (short) (((disp) - lo) >> 16); \
418 M_IST_INTERN(a,b,lo); \
420 M_ADDIS(b,hi,REG_ITMP3); \
421 M_IST_INTERN(a,REG_ITMP3,lo); \
425 #define M_AST_INTERN(a,b,disp) M_IST_INTERN(a,b,disp)
426 #define M_AST(a,b,disp) M_IST(a,b,disp)
428 #define M_BSEXT(a,b) M_OP3(31, 954, 0, 0, a, b, 0)
429 #define M_SSEXT(a,b) M_OP3(31, 922, 0, 0, a, b, 0)
430 #define M_CZEXT(a,b) M_RLWINM(a,0,16,31,b)
432 #define M_BR(a) M_BRA(18, a, 0, 0)
433 #define M_BL(a) M_BRA(18, a, 0, 1)
434 #define M_RET M_OP3(19, 16, 0, 0, 20, 0, 0)
435 #define M_JSR M_OP3(19, 528, 0, 1, 20, 0, 0)
436 #define M_RTS M_OP3(19, 528, 0, 0, 20, 0, 0)
438 #define M_CMP(a,b) M_OP3(31, 0, 0, 0, 0, a, b)
439 #define M_CMPU(a,b) M_OP3(31, 32, 0, 0, 0, a, b)
440 #define M_CMPI(a,b) M_OP2_IMM(11, 0, a, b)
441 #define M_CMPUI(a,b) M_OP2_IMM(10, 0, a, b)
443 #define M_BLT(a) M_BRAC(16, 12, 0, a, 0, 0)
444 #define M_BLE(a) M_BRAC(16, 4, 1, a, 0, 0)
445 #define M_BGT(a) M_BRAC(16, 12, 1, a, 0, 0)
446 #define M_BGE(a) M_BRAC(16, 4, 0, a, 0, 0)
447 #define M_BEQ(a) M_BRAC(16, 12, 2, a, 0, 0)
448 #define M_BNE(a) M_BRAC(16, 4, 2, a, 0, 0)
449 #define M_BNAN(a) M_BRAC(16, 12, 3, a, 0, 0)
451 #define M_FLD_INTERN(a,b,disp) M_OP2_IMM(48,a,b,disp)
452 #define M_DLD_INTERN(a,b,disp) M_OP2_IMM(50,a,b,disp)
454 #define M_FLD(a,b,disp) \
456 s4 lo = (short) (disp); \
457 s4 hi = (short) (((disp) - lo) >> 16); \
459 M_FLD_INTERN(a,b,lo); \
461 M_ADDIS(b,hi,REG_ITMP3); \
462 M_FLD_INTERN(a,REG_ITMP3,lo); \
466 #define M_DLD(a,b,disp) \
468 s4 lo = (short) (disp); \
469 s4 hi = (short) (((disp) - lo) >> 16); \
471 M_DLD_INTERN(a,b,lo); \
473 M_ADDIS(b,hi,REG_ITMP3); \
474 M_DLD_INTERN(a,REG_ITMP3,lo); \
478 #define M_FST_INTERN(a,b,disp) M_OP2_IMM(52,a,b,disp)
479 #define M_DST_INTERN(a,b,disp) M_OP2_IMM(54,a,b,disp)
481 #define M_FST(a,b,disp) \
483 s4 lo = (short) (disp); \
484 s4 hi = (short) (((disp) - lo) >> 16); \
486 M_FST_INTERN(a,b,lo); \
488 M_ADDIS(b,hi,REG_ITMP3); \
489 M_FST_INTERN(a,REG_ITMP3,lo); \
493 #define M_DST(a,b,disp) \
495 s4 lo = (short) (disp); \
496 s4 hi = (short) (((disp) - lo) >> 16); \
498 M_DST_INTERN(a,b,lo); \
500 M_ADDIS(b,hi,REG_ITMP3); \
501 M_DST_INTERN(a,REG_ITMP3,lo); \
505 #define M_MFLR(a) M_OP3(31, 339, 0, 0, a, 8, 0)
506 #define M_MFXER(a) M_OP3(31, 339, 0, 0, a, 1, 0)
507 #define M_MFCTR(a) M_OP3(31, 339, 0, 0, a, 9, 0)
508 #define M_MTLR(a) M_OP3(31, 467, 0, 0, a, 8, 0)
509 #define M_MTXER(a) M_OP3(31, 467, 0, 0, a, 1, 0)
510 #define M_MTCTR(a) M_OP3(31, 467, 0, 0, a, 9, 0)
512 #define M_LDA_INTERN(a,b,c) M_IADD_IMM(b, c, a)
514 #define M_LDA(a,b,disp) \
516 s4 lo = (short) (disp); \
517 s4 hi = (short) (((disp) - lo) >> 16); \
519 M_LDA_INTERN(a,b,lo); \
522 M_LDA_INTERN(a,a,lo); \
527 #define M_LDATST(a,b,c) M_ADDICTST(b, c, a)
528 #define M_CLR(a) M_IADD_IMM(0, 0, a)
529 #define M_AADD_IMM(a,b,c) M_IADD_IMM(a, b, c)
532 /* function gen_resolvebranch **************************************************
534 parameters: ip ... pointer to instruction after branch (void*)
535 so ... offset of instruction after branch (s4)
536 to ... offset of branch target (s4)
538 *******************************************************************************/
540 #define gen_resolvebranch(ip,so,to) \
541 *((s4*)(ip)-1)=(*((s4*)(ip)-1) & ~M_BRMASK) | (((s4)((to)-(so))+4)&((((*((s4*)(ip)-1)>>26)&63)==18)?M_BRAMASK:M_BRMASK))
544 /* function prototypes */
546 void preregpass(methodinfo *m, registerdata *rd);
547 void docacheflush(u1 *p, long bytelen);
549 #endif /* _CODEGEN_H */
553 * These are local overrides for various environment variables in Emacs.
554 * Please do not remove this and leave it at the end of the file, where
555 * Emacs will automagically detect them.
556 * ---------------------------------------------------------------------
559 * indent-tabs-mode: t