src/vm/jit/powerpc/codegen.c

   1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32
  33    $Id: codegen.c 3751 2005-11-23 00:03:54Z twisti $
  34
  35 */
  36
  37
  38 #include <assert.h>
  39 #include <stdio.h>
  40 #include <signal.h>
  41
  42 #include "config.h"
  43 #include "vm/types.h"
  44
  45 #include "md-abi.h"
  46 #include "md-abi.inc"
  47
  48 #include "vm/jit/powerpc/arch.h"
  49 #include "vm/jit/powerpc/codegen.h"
  50
  51 #include "cacao/cacao.h"
  52 #include "native/native.h"
  53 #include "vm/builtin.h"
  54 #include "vm/global.h"
  55 #include "vm/loader.h"
  56 #include "vm/stringlocal.h"
  57 #include "vm/tables.h"
  58 #include "vm/jit/asmpart.h"
  59 #include "vm/jit/codegen.inc"
  60 #include "vm/jit/jit.h"
  61
  62 #if defined(LSRA)
  63 # include "vm/jit/lsra.inc"
  64 #endif
  65
  66 #include "vm/jit/parse.h"
  67 #include "vm/jit/patcher.h"
  68 #include "vm/jit/reg.h"
  69 #include "vm/jit/reg.inc"
  70
  71
  72 s4 *codegen_trace_args( methodinfo *m, codegendata *cd, registerdata *rd,
  73                                                 s4 *mcodeptr, s4 parentargs_base, bool nativestub);
  74
  75 /* codegen *********************************************************************
  76
  77    Generates machine code.
  78
  79 *******************************************************************************/
  80
  81 bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  82 {
  83         s4                  len, s1, s2, s3, d, disp;
  84         ptrint              a;
  85         s4                  parentargs_base;
  86         s4                 *mcodeptr;
  87         stackptr            src;
  88         varinfo            *var;
  89         basicblock         *bptr;
  90         instruction        *iptr;
  91         exceptiontable     *ex;
  92         u2                  currentline;
  93         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  94         builtintable_entry *bte;
  95         methoddesc         *md;
  96
  97         /* prevent compiler warnings */
  98
  99         d = 0;
 100         lm = NULL;
 101         bte = NULL;
 102
 103         {
 104         s4 i, p, t, l;
 105         s4 savedregs_num;
 106
 107         savedregs_num = 0;
 108
 109         /* space to save used callee saved registers */
 110
 111         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 112         savedregs_num += 2 * (FLT_SAV_CNT - rd->savfltreguse);
 113
 114         parentargs_base = rd->memuse + savedregs_num;
 115
 116 #if defined(USE_THREADS)
 117         /* space to save argument of monitor_enter and Return Values to survive */
 118     /* monitor_exit. The stack position for the argument can not be shared  */
 119         /* with place to save the return register on PPC, since both values     */
 120         /* reside in R3 */
 121         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 122                 /* reserve 2 slots for long/double return values for monitorexit */
 123
 124                 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
 125                         parentargs_base += 3;
 126                 else
 127                         parentargs_base += 2;
 128         }
 129
 130 #endif
 131
 132         /* create method header */
 133
 134         parentargs_base = (parentargs_base + 3) & ~3;
 135
 136         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 137         (void) dseg_adds4(cd, parentargs_base * 4);             /* FrameSize      */
 138
 139 #if defined(USE_THREADS)
 140         /* IsSync contains the offset relative to the stack pointer for the
 141            argument of monitor_exit used in the exception handler. Since the
 142            offset could be zero and give a wrong meaning of the flag it is
 143            offset by one.
 144         */
 145
 146         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 147                 (void) dseg_adds4(cd, (rd->memuse + 1) * 4);        /* IsSync         */
 148         else
 149 #endif
 150                 (void) dseg_adds4(cd, 0);                           /* IsSync         */
 151
 152         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 153         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);  /* IntSave        */
 154         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);  /* FltSave        */
 155
 156         dseg_addlinenumbertablesize(cd);
 157
 158         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 159
 160         /* create exception table */
 161
 162         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 163                 dseg_addtarget(cd, ex->start);
 164                 dseg_addtarget(cd, ex->end);
 165                 dseg_addtarget(cd, ex->handler);
 166                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 167         }
 168
 169         /* initialize mcode variables */
 170
 171         mcodeptr = (s4 *) cd->mcodebase;
 172         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 173         MCODECHECK(128 + m->paramcount);
 174
 175         /* create stack frame (if necessary) */
 176
 177         if (!m->isleafmethod) {
 178                 M_MFLR(REG_ZERO);
 179                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 180         }
 181
 182         if (parentargs_base) {
 183                 M_STWU(REG_SP, REG_SP, -parentargs_base * 4);
 184         }
 185
 186         /* save return address and used callee saved registers */
 187
 188         p = parentargs_base;
 189         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 190                 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
 191         }
 192         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 193                 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
 194         }
 195
 196         /* take arguments out of register or stack frame */
 197
 198         md = m->parseddesc;
 199
 200         for (p = 0, l = 0; p < md->paramcount; p++) {
 201                 t = md->paramtypes[p].type;
 202                 var = &(rd->locals[l][t]);
 203                 l++;
 204                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 205                         l++;
 206                 if (var->type < 0)
 207                         continue;
 208                 s1 = md->params[p].regoff;
 209                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 210                         if (IS_2_WORD_TYPE(t))
 211                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
 212                                                            rd->argintregs[GET_HIGH_REG(s1)]);
 213                         else
 214                                 s2 = rd->argintregs[s1];
 215                         if (!md->params[p].inmemory) {           /* register arguments    */
 216                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 217                                         M_TINTMOVE(t, s2, var->regoff);
 218
 219                                 } else {                             /* reg arg -> spilled    */
 220                                         if (IS_2_WORD_TYPE(t)) {
 221                                                 M_IST(GET_HIGH_REG(s2), REG_SP, var->regoff * 4);
 222                                                 M_IST(GET_LOW_REG(s2), REG_SP, var->regoff * 4 + 4);
 223                                         } else {
 224                                                 M_IST(s2, REG_SP, var->regoff * 4);
 225                                         }
 226                                 }
 227
 228                         } else {                                 /* stack arguments       */
 229                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 230                                         if (IS_2_WORD_TYPE(t)) {
 231                                                 M_ILD(GET_HIGH_REG(var->regoff), REG_SP,
 232                                                           (parentargs_base + s1) * 4);
 233                                                 M_ILD(GET_LOW_REG(var->regoff), REG_SP,
 234                                                           (parentargs_base + s1) * 4 + 4);
 235                                         } else {
 236                                                 M_ILD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 237                                         }
 238
 239                                 } else {                             /* stack arg -> spilled  */
 240 #if 1
 241                                         M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4);
 242                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
 243                                         if (IS_2_WORD_TYPE(t)) {
 244                                                 M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4 +4);
 245                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
 246                                         }
 247 #else
 248                                         /* Reuse Memory Position on Caller Stack */
 249                                         var->regoff = parentargs_base + s1;
 250 #endif
 251                                 }
 252                         }
 253
 254                 } else {                                     /* floating args         */
 255                         if (!md->params[p].inmemory) {           /* register arguments    */
 256                                 s2 = rd->argfltregs[s1];
 257                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 258                                         M_FLTMOVE(s2, var->regoff);
 259
 260                                 } else {                                         /* reg arg -> spilled    */
 261                                         if (IS_2_WORD_TYPE(t))
 262                                                 M_DST(s2, REG_SP, var->regoff * 4);
 263                                         else
 264                                                 M_FST(s2, REG_SP, var->regoff * 4);
 265                                 }
 266
 267                         } else {                                 /* stack arguments       */
 268                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 269                                         if (IS_2_WORD_TYPE(t))
 270                                                 M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 271
 272                                         else
 273                                                 M_FLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 274
 275                                 } else {                             /* stack-arg -> spilled  */
 276 #if 1
 277                                         if (IS_2_WORD_TYPE(t)) {
 278                                                 M_DLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 279                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
 280                                                 var->regoff = parentargs_base + s1;
 281
 282                                         } else {
 283                                                 M_FLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 284                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
 285                                         }
 286 #else
 287                                         /* Reuse Memory Position on Caller Stack */
 288                                         var->regoff = parentargs_base + s1;
 289 #endif
 290                                 }
 291                         }
 292                 }
 293         } /* end for */
 294
 295         /* save monitorenter argument */
 296
 297 #if defined(USE_THREADS)
 298         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 299                 /* stack offset for monitor argument */
 300
 301                 s1 = rd->memuse;
 302
 303 #if 0
 304                 if (runverbose) {
 305                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT * 4 + FLT_ARG_CNT * 8));
 306
 307                         for (p = 0; p < INT_ARG_CNT; p++)
 308                                 M_IST(rd->argintregs[p], REG_SP, p * 4);
 309
 310                         for (p = 0; p < FLT_ARG_CNT * 2; p += 2)
 311                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 312
 313                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 314                 }
 315 #endif
 316
 317                 /* decide which monitor enter function to call */
 318
 319                 if (m->flags & ACC_STATIC) {
 320                         p = dseg_addaddress(cd, m->class);
 321                         M_ALD(REG_ITMP1, REG_PV, p);
 322                         M_AST(REG_ITMP1, REG_SP, s1 * 4);
 323                         M_MOV(REG_ITMP1, rd->argintregs[0]);
 324                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 325                         M_ALD(REG_ITMP3, REG_PV, p);
 326                         M_MTCTR(REG_ITMP3);
 327                         M_JSR;
 328
 329                 } else {
 330                         M_TST(rd->argintregs[0]);
 331                         M_BEQ(0);
 332                         codegen_addxnullrefs(cd, mcodeptr);
 333                         M_AST(rd->argintregs[0], REG_SP, s1 * 4);
 334                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 335                         M_ALD(REG_ITMP3, REG_PV, p);
 336                         M_MTCTR(REG_ITMP3);
 337                         M_JSR;
 338                 }
 339
 340 #if 0
 341                 if (runverbose) {
 342                         for (p = 0; p < INT_ARG_CNT; p++)
 343                                 M_ILD(rd->argintregs[p], REG_SP, p * 4);
 344
 345                         for (p = 0; p < FLT_ARG_CNT; p++)
 346                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 347
 348
 349                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 350                 }
 351 #endif
 352         }
 353 #endif
 354
 355         /* call trace function */
 356
 357         if (runverbose) {
 358                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, parentargs_base, false);
 359
 360         } /* if (runverbose) */
 361         }
 362
 363         /* end of header generation */
 364
 365         /* walk through all basic blocks */
 366         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 367
 368                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 369
 370                 if (bptr->flags >= BBREACHED) {
 371
 372                 /* branch resolving */
 373
 374                 {
 375                 branchref *brefs;
 376                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 377                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 378                                           brefs->branchpos,
 379                                                           bptr->mpc);
 380                         }
 381                 }
 382
 383                 /* copy interface registers to their destination */
 384
 385                 src = bptr->instack;
 386                 len = bptr->indepth;
 387                 MCODECHECK(64+len);
 388
 389 #ifdef LSRA
 390                 if (opt_lsra) {
 391                         while (src != NULL) {
 392                                 len--;
 393                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 394                                         /* d = reg_of_var(m, src, REG_ITMP1); */
 395                                         if (!(src->flags & INMEMORY))
 396                                                 d= src->regoff;
 397                                         else
 398                                                 d=REG_ITMP1;
 399                                         M_INTMOVE(REG_ITMP1, d);
 400                                         store_reg_to_var_int(src, d);
 401                                 }
 402                                 src = src->prev;
 403                         }
 404                 } else {
 405 #endif
 406                 while (src != NULL) {
 407                         len--;
 408                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 409                                 d = reg_of_var(rd, src, REG_ITMP1);
 410                                 M_INTMOVE(REG_ITMP1, d);
 411                                 store_reg_to_var_int(src, d);
 412                         } else {
 413                                 if (src->type == TYPE_LNG)
 414                                         d = reg_of_var(rd, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 415                                 else
 416                                         d = reg_of_var(rd, src, REG_IFTMP);
 417                                 if ((src->varkind != STACKVAR)) {
 418                                         s2 = src->type;
 419                                         if (IS_FLT_DBL_TYPE(s2)) {
 420                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 421                                                         s1 = rd->interfaces[len][s2].regoff;
 422                                                         M_FLTMOVE(s1,d);
 423                                                 } else {
 424                                                         if (IS_2_WORD_TYPE(s2)) {
 425                                                                 M_DLD(d, REG_SP,
 426                                                                           4 * rd->interfaces[len][s2].regoff);
 427                                                         } else {
 428                                                                 M_FLD(d, REG_SP,
 429                                                                           4 * rd->interfaces[len][s2].regoff);
 430                                                         }
 431                                                 }
 432                                                 store_reg_to_var_flt(src, d);
 433                                         } else {
 434                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 435                                                         s1 = rd->interfaces[len][s2].regoff;
 436                                                         M_TINTMOVE(s2,s1,d);
 437                                                 } else {
 438                                                         if (IS_2_WORD_TYPE(s2)) {
 439                                                                 M_ILD(GET_HIGH_REG(d), REG_SP,
 440                                                                           4 * rd->interfaces[len][s2].regoff);
 441                                                                 M_ILD(GET_LOW_REG(d), REG_SP,
 442                                                                           4 * rd->interfaces[len][s2].regoff + 4);
 443                                                         } else {
 444                                                                 M_ILD(d, REG_SP,
 445                                                                           4 * rd->interfaces[len][s2].regoff);
 446                                                         }
 447                                                 }
 448                                                 store_reg_to_var_int(src, d);
 449                                         }
 450                                 }
 451                         }
 452                         src = src->prev;
 453                 }
 454
 455 #ifdef LSRA
 456                 }
 457 #endif
 458                 /* walk through all instructions */
 459
 460                 src = bptr->instack;
 461                 len = bptr->icount;
 462                 currentline = 0;
 463
 464                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 465                         if (iptr->line != currentline) {
 466                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 467                                 currentline = iptr->line;
 468                         }
 469
 470                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 471
 472                         switch (iptr->opc) {
 473                         case ICMD_NOP:    /* ...  ==> ...                                 */
 474                         case ICMD_INLINE_START:
 475                         case ICMD_INLINE_END:
 476                                 break;
 477
 478                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 479
 480                         var_to_reg_int(s1, src, REG_ITMP1);
 481                         M_TST(s1);
 482                         M_BEQ(0);
 483                         codegen_addxnullrefs(cd, mcodeptr);
 484                         break;
 485
 486                 /* constant operations ************************************************/
 487
 488                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 489                                       /* op1 = 0, val.i = constant                    */
 490
 491                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 492                         ICONST(d, iptr->val.i);
 493                         store_reg_to_var_int(iptr->dst, d);
 494                         break;
 495
 496                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 497                                       /* op1 = 0, val.l = constant                    */
 498
 499                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 500                         LCONST(d, iptr->val.l);
 501                         store_reg_to_var_int(iptr->dst, d);
 502                         break;
 503
 504                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 505                                       /* op1 = 0, val.f = constant                    */
 506
 507                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 508                         a = dseg_addfloat(cd, iptr->val.f);
 509                         M_FLD(d, REG_PV, a);
 510                         store_reg_to_var_flt(iptr->dst, d);
 511                         break;
 512
 513                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 514                                       /* op1 = 0, val.d = constant                    */
 515
 516                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 517                         a = dseg_adddouble(cd, iptr->val.d);
 518                         M_DLD(d, REG_PV, a);
 519                         store_reg_to_var_flt(iptr->dst, d);
 520                         break;
 521
 522                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 523                                       /* op1 = 0, val.a = constant                    */
 524
 525                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 526                         disp = dseg_addaddress(cd, iptr->val.a);
 527
 528                         if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
 529                                 codegen_addpatchref(cd, mcodeptr,
 530                                                                         PATCHER_aconst,
 531                                                                         (unresolved_class *) iptr->target, disp);
 532
 533                                 if (opt_showdisassemble)
 534                                         M_NOP;
 535                         }
 536
 537                         M_ALD(d, REG_PV, disp);
 538                         store_reg_to_var_int(iptr->dst, d);
 539                         break;
 540
 541
 542                 /* load/store operations **********************************************/
 543
 544                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 545                 case ICMD_ALOAD:      /* op1 = local variable                         */
 546
 547                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 548                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 549                         if ((iptr->dst->varkind == LOCALVAR) &&
 550                             (iptr->dst->varnum == iptr->op1))
 551                                 break;
 552                         if (var->flags & INMEMORY) {
 553                                 M_ILD(d, REG_SP, var->regoff * 4);
 554                         } else {
 555                                 M_TINTMOVE(var->type, var->regoff, d);
 556                         }
 557                         store_reg_to_var_int(iptr->dst, d);
 558                         break;
 559
 560                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 561                                       /* op1 = local variable                         */
 562
 563                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 564                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 565                         if ((iptr->dst->varkind == LOCALVAR) &&
 566                                 (iptr->dst->varnum == iptr->op1))
 567                                 break;
 568                         if (var->flags & INMEMORY) {
 569                                 M_ILD(GET_HIGH_REG(d), REG_SP, var->regoff * 4);
 570                                 M_ILD(GET_LOW_REG(d), REG_SP, var->regoff * 4 + 4);
 571                         } else {
 572                                 M_TINTMOVE(var->type, var->regoff, d);
 573                         }
 574                         store_reg_to_var_int(iptr->dst, d);
 575                         break;
 576
 577                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 578                 case ICMD_DLOAD:      /* op1 = local variable                         */
 579
 580                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 581                         if ((iptr->dst->varkind == LOCALVAR) &&
 582                                 (iptr->dst->varnum == iptr->op1))
 583                                 break;
 584                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 585                         if (var->flags & INMEMORY)
 586                                 if (IS_2_WORD_TYPE(var->type))
 587                                         M_DLD(d, REG_SP, var->regoff * 4);
 588                                 else
 589                                         M_FLD(d, REG_SP, var->regoff * 4);
 590                         else {
 591                                 M_FLTMOVE(var->regoff, d);
 592                         }
 593                         store_reg_to_var_flt(iptr->dst, d);
 594                         break;
 595
 596
 597                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 598                 case ICMD_ASTORE:     /* op1 = local variable                         */
 599
 600                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 601                                 break;
 602                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 603                         if (var->flags & INMEMORY) {
 604                                 var_to_reg_int(s1, src, REG_ITMP1);
 605                                 M_IST(s1, REG_SP, var->regoff * 4);
 606                         } else {
 607                                 var_to_reg_int(s1, src, var->regoff);
 608                                 M_TINTMOVE(var->type, s1, var->regoff);
 609                         }
 610                         break;
 611
 612                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 613                                       /* op1 = local variable                         */
 614
 615                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 616                                 break;
 617                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 618                         if (var->flags & INMEMORY) {
 619                                 var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 620                                 M_IST(GET_HIGH_REG(s1), REG_SP, var->regoff * 4);
 621                                 M_IST(GET_LOW_REG(s1), REG_SP, var->regoff * 4 + 4);
 622                         } else {
 623                                 var_to_reg_int(s1, src, var->regoff);
 624                                 M_TINTMOVE(var->type, s1, var->regoff);
 625                         }
 626                         break;
 627
 628                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 629                 case ICMD_DSTORE:     /* op1 = local variable                         */
 630
 631                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 632                                 break;
 633                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 634                         if (var->flags & INMEMORY) {
 635                                 var_to_reg_flt(s1, src, REG_FTMP1);
 636                                 if (var->type == TYPE_DBL)
 637                                         M_DST(s1, REG_SP, var->regoff * 4);
 638                                 else
 639                                         M_FST(s1, REG_SP, var->regoff * 4);
 640                         } else {
 641                                 var_to_reg_flt(s1, src, var->regoff);
 642                                 M_FLTMOVE(s1, var->regoff);
 643                         }
 644                         break;
 645
 646
 647                 /* pop/dup/swap operations ********************************************/
 648
 649                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 650
 651                 case ICMD_POP:        /* ..., value  ==> ...                          */
 652                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 653                         break;
 654
 655                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 656                         M_COPY(src, iptr->dst);
 657                         break;
 658
 659                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 660
 661                         M_COPY(src,       iptr->dst);
 662                         M_COPY(src->prev, iptr->dst->prev);
 663                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 664                         break;
 665
 666                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 667
 668                         M_COPY(src,             iptr->dst);
 669                         M_COPY(src->prev,       iptr->dst->prev);
 670                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 671                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 672                         break;
 673
 674                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 675
 676                         M_COPY(src,       iptr->dst);
 677                         M_COPY(src->prev, iptr->dst->prev);
 678                         break;
 679
 680                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 681
 682                         M_COPY(src,             iptr->dst);
 683                         M_COPY(src->prev,       iptr->dst->prev);
 684                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 685                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 686                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 687                         break;
 688
 689                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 690
 691                         M_COPY(src,                   iptr->dst);
 692                         M_COPY(src->prev,             iptr->dst->prev);
 693                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 694                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 695                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 696                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 697                         break;
 698
 699                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 700
 701                         M_COPY(src,       iptr->dst->prev);
 702                         M_COPY(src->prev, iptr->dst);
 703                         break;
 704
 705
 706                 /* integer operations *************************************************/
 707
 708                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 709
 710                         var_to_reg_int(s1, src, REG_ITMP1);
 711                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 712                         M_NEG(s1, d);
 713                         store_reg_to_var_int(iptr->dst, d);
 714                         break;
 715
 716                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 717
 718                         var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 719                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 720                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
 721                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 722                         store_reg_to_var_int(iptr->dst, d);
 723                         break;
 724
 725                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 726
 727                         var_to_reg_int(s1, src, REG_ITMP2);
 728                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 729                         M_INTMOVE(s1, GET_LOW_REG(d));
 730                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
 731                         store_reg_to_var_int(iptr->dst, d);
 732                         break;
 733
 734                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 735
 736                         var_to_reg_lng_low(s1, src, REG_ITMP2);
 737                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 738                         M_INTMOVE(s1, d);
 739                         store_reg_to_var_int(iptr->dst, d);
 740                         break;
 741
 742                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 743
 744                         var_to_reg_int(s1, src, REG_ITMP1);
 745                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 746                         M_BSEXT(s1, d);
 747                         store_reg_to_var_int(iptr->dst, d);
 748                         break;
 749
 750                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 754                         M_CZEXT(s1, d);
 755                         store_reg_to_var_int(iptr->dst, d);
 756                         break;
 757
 758                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 759
 760                         var_to_reg_int(s1, src, REG_ITMP1);
 761                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 762                         M_SSEXT(s1, d);
 763                         store_reg_to_var_int(iptr->dst, d);
 764                         break;
 765
 766
 767                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 768
 769                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 770                         var_to_reg_int(s2, src, REG_ITMP2);
 771                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 772                         M_IADD(s1, s2, d);
 773                         store_reg_to_var_int(iptr->dst, d);
 774                         break;
 775
 776                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 777                                       /* val.i = constant                             */
 778
 779                         var_to_reg_int(s1, src, REG_ITMP1);
 780                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 781                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 782                                 M_IADD_IMM(s1, iptr->val.i, d);
 783                         } else {
 784                                 ICONST(REG_ITMP2, iptr->val.i);
 785                                 M_IADD(s1, REG_ITMP2, d);
 786                         }
 787                         store_reg_to_var_int(iptr->dst, d);
 788                         break;
 789
 790                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 791
 792                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
 793                         var_to_reg_lng_low(s2, src, REG_ITMP2);
 794                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 795                         M_ADDC(s1, s2, GET_LOW_REG(d));
 796                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
 797                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 798                         M_ADDE(s1, s2, GET_HIGH_REG(d));
 799                         store_reg_to_var_int(iptr->dst, d);
 800                         break;
 801
 802                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 803                                       /* val.l = constant                             */
 804
 805                         s3 = iptr->val.l & 0xffffffff;
 806                         var_to_reg_lng_low(s1, src, REG_ITMP1);
 807                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 808                         if ((s3 >= -32768) && (s3 <= 32767)) {
 809                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 810                         } else {
 811                                 ICONST(REG_ITMP2, s3);
 812                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 813                         }
 814                         var_to_reg_lng_high(s1, src, REG_ITMP1);
 815                         s3 = iptr->val.l >> 32;
 816                         if (s3 == -1) {
 817                                 M_ADDME(s1, GET_HIGH_REG(d));
 818                         } else if (s3 == 0) {
 819                                 M_ADDZE(s1, GET_HIGH_REG(d));
 820                         } else {
 821                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 822                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 823                         }
 824                         store_reg_to_var_int(iptr->dst, d);
 825                         break;
 826
 827                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 828
 829                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 830                         var_to_reg_int(s2, src, REG_ITMP2);
 831                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 832                         M_ISUB(s1, s2, d);
 833                         store_reg_to_var_int(iptr->dst, d);
 834                         break;
 835
 836                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 837                                       /* val.i = constant                             */
 838
 839                         var_to_reg_int(s1, src, REG_ITMP1);
 840                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 841                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 842                                 M_IADD_IMM(s1, -iptr->val.i, d);
 843                         } else {
 844                                 ICONST(REG_ITMP2, -iptr->val.i);
 845                                 M_IADD(s1, REG_ITMP2, d);
 846                         }
 847                         store_reg_to_var_int(iptr->dst, d);
 848                         break;
 849
 850                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 851
 852                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
 853                         var_to_reg_lng_low(s2, src, REG_ITMP2);
 854                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 855                         M_SUBC(s1, s2, GET_LOW_REG(d));
 856                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
 857                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 858                         M_SUBE(s1, s2, GET_HIGH_REG(d));
 859                         store_reg_to_var_int(iptr->dst, d);
 860                         break;
 861
 862                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 863                                       /* val.l = constant                             */
 864
 865                         s3 = (-iptr->val.l) & 0xffffffff;
 866                         var_to_reg_lng_low(s1, src, REG_ITMP1);
 867                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 868                         if ((s3 >= -32768) && (s3 <= 32767)) {
 869                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 870                         } else {
 871                                 ICONST(REG_ITMP2, s3);
 872                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 873                         }
 874                         var_to_reg_lng_high(s1, src, REG_ITMP1);
 875                         s3 = (-iptr->val.l) >> 32;
 876                         if (s3 == -1)
 877                                 M_ADDME(s1, GET_HIGH_REG(d));
 878                         else if (s3 == 0)
 879                                 M_ADDZE(s1, GET_HIGH_REG(d));
 880                         else {
 881                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 882                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 883                         }
 884                         store_reg_to_var_int(iptr->dst, d);
 885                         break;
 886
 887                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 888
 889                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 890                         var_to_reg_int(s2, src, REG_ITMP2);
 891                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 892                         M_TST(s2);
 893                         M_BEQ(0);
 894                         codegen_addxdivrefs(cd, mcodeptr);
 895                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 896                         M_CMP(REG_ITMP3, s1);
 897                         M_BNE(3 + (s1 != d));
 898                         M_CMPI(s2, -1);
 899                         M_BNE(1 + (s1 != d));
 900                         M_INTMOVE(s1, d);
 901                         M_BR(1);
 902                         M_IDIV(s1, s2, d);
 903                         store_reg_to_var_int(iptr->dst, d);
 904                         break;
 905
 906                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 907
 908                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 909                         var_to_reg_int(s2, src, REG_ITMP2);
 910                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 911                         M_TST(s2);
 912                         M_BEQ(0);
 913                         codegen_addxdivrefs(cd, mcodeptr);
 914                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 915                         M_CMP(REG_ITMP3, s1);
 916                         M_BNE(4);
 917                         M_CMPI(s2, -1);
 918                         M_BNE(2);
 919                         M_CLR(d);
 920                         M_BR(3);
 921                         M_IDIV(s1, s2, REG_ITMP3);
 922                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
 923                         M_ISUB(s1, REG_ITMP3, d);
 924                         store_reg_to_var_int(iptr->dst, d);
 925                         break;
 926
 927                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 928                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 929
 930                         bte = iptr->val.a;
 931                         md = bte->md;
 932
 933                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 934                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
 935                         M_BEQ(0);
 936                         codegen_addxdivrefs(cd, mcodeptr);
 937
 938                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
 939                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
 940                         M_TINTMOVE(TYPE_LNG, s2, s3);
 941
 942                         var_to_reg_int(s1, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
 943                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
 944                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
 945                         M_TINTMOVE(TYPE_LNG, s1, s3);
 946
 947                         disp = dseg_addaddress(cd, bte->fp);
 948                         M_ALD(REG_ITMP1, REG_PV, disp);
 949                         M_MTCTR(REG_ITMP1);
 950                         M_JSR;
 951
 952                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
 953                         M_TINTMOVE(TYPE_LNG, PACK_REGS(REG_RESULT2, REG_RESULT), d);
 954                         store_reg_to_var_int(iptr->dst, d);
 955                         break;
 956
 957                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 958
 959                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 960                         var_to_reg_int(s2, src, REG_ITMP2);
 961                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 962                         M_IMUL(s1, s2, d);
 963                         store_reg_to_var_int(iptr->dst, d);
 964                         break;
 965
 966                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 967                                       /* val.i = constant                             */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 971                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 972                                 M_IMUL_IMM(s1, iptr->val.i, d);
 973                         } else {
 974                                 ICONST(REG_ITMP3, iptr->val.i);
 975                                 M_IMUL(s1, REG_ITMP3, d);
 976                         }
 977                         store_reg_to_var_int(iptr->dst, d);
 978                         break;
 979
 980                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 981
 982                         var_to_reg_int(s1, src, REG_ITMP1);
 983                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 984                         M_SRA_IMM(s1, iptr->val.i, d);
 985                         M_ADDZE(d, d);
 986                         store_reg_to_var_int(iptr->dst, d);
 987                         break;
 988
 989                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 990
 991                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 992                         var_to_reg_int(s2, src, REG_ITMP2);
 993                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 994                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 995                         M_SLL(s1, REG_ITMP3, d);
 996                         store_reg_to_var_int(iptr->dst, d);
 997                         break;
 998
 999                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1000                                       /* val.i = constant                             */
1001
1002                         var_to_reg_int(s1, src, REG_ITMP1);
1003                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1004                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1005                         store_reg_to_var_int(iptr->dst, d);
1006                         break;
1007
1008                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1009
1010                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1011                         var_to_reg_int(s2, src, REG_ITMP2);
1012                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1013                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1014                         M_SRA(s1, REG_ITMP3, d);
1015                         store_reg_to_var_int(iptr->dst, d);
1016                         break;
1017
1018                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1019                                       /* val.i = constant                             */
1020
1021                         var_to_reg_int(s1, src, REG_ITMP1);
1022                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1023                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1024                         store_reg_to_var_int(iptr->dst, d);
1025                         break;
1026
1027                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1028
1029                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1030                         var_to_reg_int(s2, src, REG_ITMP2);
1031                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1032                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1033                         M_SRL(s1, REG_ITMP2, d);
1034                         store_reg_to_var_int(iptr->dst, d);
1035                         break;
1036
1037                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1038                                       /* val.i = constant                             */
1039
1040                         var_to_reg_int(s1, src, REG_ITMP1);
1041                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1042                         if (iptr->val.i & 0x1f) {
1043                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1044                         } else {
1045                                 M_INTMOVE(s1, d);
1046                         }
1047                         store_reg_to_var_int(iptr->dst, d);
1048                         break;
1049
1050                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1051
1052                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1053                         var_to_reg_int(s2, src, REG_ITMP2);
1054                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1055                         M_AND(s1, s2, d);
1056                         store_reg_to_var_int(iptr->dst, d);
1057                         break;
1058
1059                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1060                                       /* val.i = constant                             */
1061
1062                         var_to_reg_int(s1, src, REG_ITMP1);
1063                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1064                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1065                                 M_AND_IMM(s1, iptr->val.i, d);
1066                                 }
1067                         /*
1068                         else if (iptr->val.i == 0xffffff) {
1069                                 M_RLWINM(s1, 0, 8, 31, d);
1070                                 }
1071                         */
1072                         else {
1073                                 ICONST(REG_ITMP3, iptr->val.i);
1074                                 M_AND(s1, REG_ITMP3, d);
1075                         }
1076                         store_reg_to_var_int(iptr->dst, d);
1077                         break;
1078
1079                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1080
1081                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1082                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1083                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1084                         M_AND(s1, s2, GET_LOW_REG(d));
1085                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1086                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1087                         M_AND(s1, s2, GET_HIGH_REG(d));
1088                         store_reg_to_var_int(iptr->dst, d);
1089                         break;
1090
1091                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1092                                       /* val.l = constant                             */
1093
1094                         s3 = iptr->val.l & 0xffffffff;
1095                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1096                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1097                         if ((s3 >= 0) && (s3 <= 65535)) {
1098                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1099                         } else {
1100                                 ICONST(REG_ITMP3, s3);
1101                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1102                         }
1103                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1104                         s3 = iptr->val.l >> 32;
1105                         if ((s3 >= 0) && (s3 <= 65535)) {
1106                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1107                         } else {
1108                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1109                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1110                         }
1111                         store_reg_to_var_int(iptr->dst, d);
1112                         break;
1113
1114                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1115                                       /* val.i = constant                             */
1116
1117                         var_to_reg_int(s1, src, REG_ITMP1);
1118                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1119                         M_MOV(s1, REG_ITMP2);
1120                         M_CMPI(s1, 0);
1121                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1122                         if (iptr->val.i >= 32768) {
1123                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1124                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1125                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1126                         } else {
1127                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1128                         }
1129                         {
1130                                 int b=0, m = iptr->val.i;
1131                                 while (m >>= 1)
1132                                         ++b;
1133                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1134                         }
1135                         M_ISUB(s1, REG_ITMP2, d);
1136                         store_reg_to_var_int(iptr->dst, d);
1137                         break;
1138
1139                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1140
1141                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1142                         var_to_reg_int(s2, src, REG_ITMP2);
1143                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1144                         M_OR(s1, s2, d);
1145                         store_reg_to_var_int(iptr->dst, d);
1146                         break;
1147
1148                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1149                                       /* val.i = constant                             */
1150
1151                         var_to_reg_int(s1, src, REG_ITMP1);
1152                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1153                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1154                                 M_OR_IMM(s1, iptr->val.i, d);
1155                         } else {
1156                                 ICONST(REG_ITMP3, iptr->val.i);
1157                                 M_OR(s1, REG_ITMP3, d);
1158                         }
1159                         store_reg_to_var_int(iptr->dst, d);
1160                         break;
1161
1162                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1163
1164                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1165                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1166                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1167                         M_OR(s1, s2, GET_LOW_REG(d));
1168                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1169                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1170                         M_OR(s1, s2, GET_HIGH_REG(d));
1171                         store_reg_to_var_int(iptr->dst, d);
1172                         break;
1173
1174                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1175                                       /* val.l = constant                             */
1176
1177                         s3 = iptr->val.l & 0xffffffff;
1178                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1179                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1180                         if ((s3 >= 0) && (s3 <= 65535)) {
1181                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1182                         } else {
1183                                 ICONST(REG_ITMP3, s3);
1184                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1185                         }
1186                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1187                         s3 = iptr->val.l >> 32;
1188                         if ((s3 >= 0) && (s3 <= 65535)) {
1189                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1190                         } else {
1191                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1192                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1193                         }
1194                         store_reg_to_var_int(iptr->dst, d);
1195                         break;
1196
1197                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1198
1199                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1200                         var_to_reg_int(s2, src, REG_ITMP2);
1201                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1202                         M_XOR(s1, s2, d);
1203                         store_reg_to_var_int(iptr->dst, d);
1204                         break;
1205
1206                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1207                                       /* val.i = constant                             */
1208
1209                         var_to_reg_int(s1, src, REG_ITMP1);
1210                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1211                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1212                                 M_XOR_IMM(s1, iptr->val.i, d);
1213                         } else {
1214                                 ICONST(REG_ITMP3, iptr->val.i);
1215                                 M_XOR(s1, REG_ITMP3, d);
1216                         }
1217                         store_reg_to_var_int(iptr->dst, d);
1218                         break;
1219
1220                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1221
1222                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1223                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1224                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1225                         M_XOR(s1, s2, GET_LOW_REG(d));
1226                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1227                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1228                         M_XOR(s1, s2, GET_HIGH_REG(d));
1229                         store_reg_to_var_int(iptr->dst, d);
1230                         break;
1231
1232                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1233                                       /* val.l = constant                             */
1234
1235                         s3 = iptr->val.l & 0xffffffff;
1236                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1237                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1238                         if ((s3 >= 0) && (s3 <= 65535)) {
1239                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1240                         } else {
1241                                 ICONST(REG_ITMP3, s3);
1242                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1243                         }
1244                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1245                         s3 = iptr->val.l >> 32;
1246                         if ((s3 >= 0) && (s3 <= 65535)) {
1247                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1248                         } else {
1249                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1250                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1251                         }
1252                         store_reg_to_var_int(iptr->dst, d);
1253                         break;
1254
1255                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1256                         /*******************************************************************
1257                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1258                         *******************************************************************/
1259                         var_to_reg_lng_high(s1, src->prev, REG_ITMP3);
1260                         var_to_reg_lng_high(s2, src, REG_ITMP2);
1261                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1262                         {
1263                                 int tempreg = false;
1264                                 int dreg;
1265                                 s4  *br1;
1266
1267                                 if (src->prev->flags & INMEMORY) {
1268                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1269                                 } else {
1270                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1271                                                         || (d == GET_LOW_REG(src->prev->regoff));
1272                                 }
1273                                 if (src->flags & INMEMORY) {
1274                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1275                                 } else {
1276                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1277                                  || (d == GET_LOW_REG(src->regoff));
1278                                 }
1279
1280                                 dreg = tempreg ? REG_ITMP1 : d;
1281                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1282                                 M_CMP(s1, s2);
1283                                 M_BGT(0);
1284                                 br1 = mcodeptr;
1285                                 M_BLT(0);
1286                                 var_to_reg_lng_low(s1, src->prev, REG_ITMP3);
1287                                 var_to_reg_lng_low(s2, src, REG_ITMP2);
1288                                 M_CMPU(s1, s2);
1289                                 M_BGT(3);
1290                                 M_BEQ(1);
1291                                 M_IADD_IMM(dreg, -1, dreg);
1292                                 M_IADD_IMM(dreg, -1, dreg);
1293                                 gen_resolvebranch(br1, (u1*) br1, (u1*) mcodeptr);
1294                                 gen_resolvebranch(br1+1, (u1*) (br1+1), (u1*) (mcodeptr-2));
1295                                 M_INTMOVE(dreg, d);
1296                         }
1297                         store_reg_to_var_int(iptr->dst, d);
1298                         break;
1299
1300                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1301                                       /* op1 = variable, val.i = constant             */
1302
1303                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1304                         if (var->flags & INMEMORY) {
1305                                 s1 = REG_ITMP1;
1306                                 M_ILD(s1, REG_SP, var->regoff * 4);
1307                         } else {
1308                                 s1 = var->regoff;
1309                         }
1310                         {
1311                                 u4 m = iptr->val.i;
1312                                 if (m & 0x8000)
1313                                         m += 65536;
1314                                 if (m & 0xffff0000)
1315                                         M_ADDIS(s1, m >> 16, s1);
1316                                 if (m & 0xffff)
1317                                         M_IADD_IMM(s1, m & 0xffff, s1);
1318                         }
1319                         if (var->flags & INMEMORY) {
1320                                 M_IST(s1, REG_SP, var->regoff * 4);
1321                         }
1322                         break;
1323
1324
1325                 /* floating operations ************************************************/
1326
1327                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1328
1329                         var_to_reg_flt(s1, src, REG_FTMP1);
1330                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1331                         M_FMOVN(s1, d);
1332                         store_reg_to_var_flt(iptr->dst, d);
1333                         break;
1334
1335                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1336
1337                         var_to_reg_flt(s1, src, REG_FTMP1);
1338                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1339                         M_FMOVN(s1, d);
1340                         store_reg_to_var_flt(iptr->dst, d);
1341                         break;
1342
1343                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1344
1345                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1346                         var_to_reg_flt(s2, src, REG_FTMP2);
1347                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1348                         M_FADD(s1, s2, d);
1349                         store_reg_to_var_flt(iptr->dst, d);
1350                         break;
1351
1352                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1353
1354                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1355                         var_to_reg_flt(s2, src, REG_FTMP2);
1356                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1357                         M_DADD(s1, s2, d);
1358                         store_reg_to_var_flt(iptr->dst, d);
1359                         break;
1360
1361                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1362
1363                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1364                         var_to_reg_flt(s2, src, REG_FTMP2);
1365                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1366                         M_FSUB(s1, s2, d);
1367                         store_reg_to_var_flt(iptr->dst, d);
1368                         break;
1369
1370                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1371
1372                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1373                         var_to_reg_flt(s2, src, REG_FTMP2);
1374                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1375                         M_DSUB(s1, s2, d);
1376                         store_reg_to_var_flt(iptr->dst, d);
1377                         break;
1378
1379                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1380
1381                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1382                         var_to_reg_flt(s2, src, REG_FTMP2);
1383                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1384                         M_FMUL(s1, s2, d);
1385                         store_reg_to_var_flt(iptr->dst, d);
1386                         break;
1387
1388                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1389
1390                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1391                         var_to_reg_flt(s2, src, REG_FTMP2);
1392                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1393                         M_DMUL(s1, s2, d);
1394                         store_reg_to_var_flt(iptr->dst, d);
1395                         break;
1396
1397                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1398
1399                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1400                         var_to_reg_flt(s2, src, REG_FTMP2);
1401                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1402                         M_FDIV(s1, s2, d);
1403                         store_reg_to_var_flt(iptr->dst, d);
1404                         break;
1405
1406                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1407
1408                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1409                         var_to_reg_flt(s2, src, REG_FTMP2);
1410                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1411                         M_DDIV(s1, s2, d);
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1416                 case ICMD_D2I:
1417                         var_to_reg_flt(s1, src, REG_FTMP1);
1418                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1419                         M_CLR(d);
1420                         disp = dseg_addfloat(cd, 0.0);
1421                         M_FLD(REG_FTMP2, REG_PV, disp);
1422                         M_FCMPU(s1, REG_FTMP2);
1423                         M_BNAN(4);
1424                         disp = dseg_adds4(cd, 0);
1425                         M_CVTDL_C(s1, REG_FTMP1);
1426                         M_LDA(REG_ITMP1, REG_PV, disp);
1427                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1428                         M_ILD(d, REG_PV, disp);
1429                         store_reg_to_var_int(iptr->dst, d);
1430                         break;
1431
1432                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1433
1434                         var_to_reg_flt(s1, src, REG_FTMP1);
1435                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1436                         M_FLTMOVE(s1, d);
1437                         store_reg_to_var_flt(iptr->dst, d);
1438                         break;
1439
1440                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1441
1442                         var_to_reg_flt(s1, src, REG_FTMP1);
1443                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1444                         M_CVTDF(s1, d);
1445                         store_reg_to_var_flt(iptr->dst, d);
1446                         break;
1447
1448                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1449                 case ICMD_DCMPL:
1450                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1451                         var_to_reg_flt(s2, src, REG_FTMP2);
1452                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1453                         M_FCMPU(s2, s1);
1454                         M_IADD_IMM(REG_ZERO, -1, d);
1455                         M_BNAN(4);
1456                         M_BGT(3);
1457                         M_IADD_IMM(REG_ZERO, 0, d);
1458                         M_BGE(1);
1459                         M_IADD_IMM(REG_ZERO, 1, d);
1460                         store_reg_to_var_int(iptr->dst, d);
1461                         break;
1462
1463                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1464                 case ICMD_DCMPG:
1465                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1466                         var_to_reg_flt(s2, src, REG_FTMP2);
1467                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1468                         M_FCMPU(s1, s2);
1469                         M_IADD_IMM(REG_ZERO, 1, d);
1470                         M_BNAN(4);
1471                         M_BGT(3);
1472                         M_IADD_IMM(REG_ZERO, 0, d);
1473                         M_BGE(1);
1474                         M_IADD_IMM(REG_ZERO, -1, d);
1475                         store_reg_to_var_int(iptr->dst, d);
1476                         break;
1477
1478
1479                 /* memory operations **************************************************/
1480
1481                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1482
1483                         var_to_reg_int(s1, src, REG_ITMP1);
1484                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1485                         gen_nullptr_check(s1);
1486                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1487                         store_reg_to_var_int(iptr->dst, d);
1488                         break;
1489
1490                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1491
1492                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1493                         var_to_reg_int(s2, src, REG_ITMP2);
1494                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1495                         if (iptr->op1 == 0) {
1496                                 gen_nullptr_check(s1);
1497                                 gen_bound_check;
1498                         }
1499                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1500                         M_LBZX(d, s1, REG_ITMP2);
1501                         M_BSEXT(d, d);
1502                         store_reg_to_var_int(iptr->dst, d);
1503                         break;
1504
1505                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1506
1507                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1508                         var_to_reg_int(s2, src, REG_ITMP2);
1509                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1510                         if (iptr->op1 == 0) {
1511                                 gen_nullptr_check(s1);
1512                                 gen_bound_check;
1513                         }
1514                         M_SLL_IMM(s2, 1, REG_ITMP2);
1515                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1516                         M_LHZX(d, s1, REG_ITMP2);
1517                         store_reg_to_var_int(iptr->dst, d);
1518                         break;
1519
1520                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1521
1522                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1523                         var_to_reg_int(s2, src, REG_ITMP2);
1524                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1525                         if (iptr->op1 == 0) {
1526                                 gen_nullptr_check(s1);
1527                                 gen_bound_check;
1528                         }
1529                         M_SLL_IMM(s2, 1, REG_ITMP2);
1530                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1531                         M_LHAX(d, s1, REG_ITMP2);
1532                         store_reg_to_var_int(iptr->dst, d);
1533                         break;
1534
1535                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1536
1537                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1538                         var_to_reg_int(s2, src, REG_ITMP2);
1539                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1540                         if (iptr->op1 == 0) {
1541                                 gen_nullptr_check(s1);
1542                                 gen_bound_check;
1543                         }
1544                         M_SLL_IMM(s2, 2, REG_ITMP2);
1545                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1546                         M_LWZX(d, s1, REG_ITMP2);
1547                         store_reg_to_var_int(iptr->dst, d);
1548                         break;
1549
1550                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1551
1552                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1553                         var_to_reg_int(s2, src, REG_ITMP2);
1554                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1555                         if (iptr->op1 == 0) {
1556                                 gen_nullptr_check(s1);
1557                                 gen_bound_check;
1558                         }
1559                         M_SLL_IMM(s2, 3, REG_ITMP2);
1560                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1561                         M_ILD(GET_HIGH_REG(d), REG_ITMP2, OFFSET(java_longarray, data[0]));
1562                         M_ILD(GET_LOW_REG(d), REG_ITMP2, OFFSET(java_longarray,
1563                                                                                                         data[0]) + 4);
1564                         store_reg_to_var_int(iptr->dst, d);
1565                         break;
1566
1567                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1568
1569                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1570                         var_to_reg_int(s2, src, REG_ITMP2);
1571                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1572                         if (iptr->op1 == 0) {
1573                                 gen_nullptr_check(s1);
1574                                 gen_bound_check;
1575                         }
1576                         M_SLL_IMM(s2, 2, REG_ITMP2);
1577                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1578                         M_LFSX(d, s1, REG_ITMP2);
1579                         store_reg_to_var_flt(iptr->dst, d);
1580                         break;
1581
1582                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1583
1584                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1585                         var_to_reg_int(s2, src, REG_ITMP2);
1586                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1587                         if (iptr->op1 == 0) {
1588                                 gen_nullptr_check(s1);
1589                                 gen_bound_check;
1590                         }
1591                         M_SLL_IMM(s2, 3, REG_ITMP2);
1592                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1593                         M_LFDX(d, s1, REG_ITMP2);
1594                         store_reg_to_var_flt(iptr->dst, d);
1595                         break;
1596
1597                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1598
1599                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1600                         var_to_reg_int(s2, src, REG_ITMP2);
1601                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1602                         if (iptr->op1 == 0) {
1603                                 gen_nullptr_check(s1);
1604                                 gen_bound_check;
1605                         }
1606                         M_SLL_IMM(s2, 2, REG_ITMP2);
1607                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1608                         M_LWZX(d, s1, REG_ITMP2);
1609                         store_reg_to_var_int(iptr->dst, d);
1610                         break;
1611
1612
1613                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1614
1615                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1616                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1617                         if (iptr->op1 == 0) {
1618                                 gen_nullptr_check(s1);
1619                                 gen_bound_check;
1620                         }
1621                         var_to_reg_int(s3, src, REG_ITMP3);
1622                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1623                         M_STBX(s3, s1, REG_ITMP2);
1624                         break;
1625
1626                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1627
1628                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1629                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1630                         if (iptr->op1 == 0) {
1631                                 gen_nullptr_check(s1);
1632                                 gen_bound_check;
1633                         }
1634                         var_to_reg_int(s3, src, REG_ITMP3);
1635                         M_SLL_IMM(s2, 1, REG_ITMP2);
1636                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1637                         M_STHX(s3, s1, REG_ITMP2);
1638                         break;
1639
1640                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1641
1642                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1643                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1644                         if (iptr->op1 == 0) {
1645                                 gen_nullptr_check(s1);
1646                                 gen_bound_check;
1647                         }
1648                         var_to_reg_int(s3, src, REG_ITMP3);
1649                         M_SLL_IMM(s2, 1, REG_ITMP2);
1650                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1651                         M_STHX(s3, s1, REG_ITMP2);
1652                         break;
1653
1654                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1655
1656                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1657                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1658                         if (iptr->op1 == 0) {
1659                                 gen_nullptr_check(s1);
1660                                 gen_bound_check;
1661                         }
1662                         var_to_reg_int(s3, src, REG_ITMP3);
1663                         M_SLL_IMM(s2, 2, REG_ITMP2);
1664                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1665                         M_STWX(s3, s1, REG_ITMP2);
1666                         break;
1667
1668                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1669
1670                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1671                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1672                         if (iptr->op1 == 0) {
1673                                 gen_nullptr_check(s1);
1674                                 gen_bound_check;
1675                         }
1676                         var_to_reg_lng_high(s3, src, REG_ITMP3);
1677                         M_SLL_IMM(s2, 3, REG_ITMP2);
1678                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1679                         M_STWX(s3, s1, REG_ITMP2);
1680                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1681                         var_to_reg_lng_low(s3, src, REG_ITMP3);
1682                         M_STWX(s3, s1, REG_ITMP2);
1683                         break;
1684
1685                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1686
1687                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1688                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1689                         if (iptr->op1 == 0) {
1690                                 gen_nullptr_check(s1);
1691                                 gen_bound_check;
1692                         }
1693                         var_to_reg_flt(s3, src, REG_FTMP3);
1694                         M_SLL_IMM(s2, 2, REG_ITMP2);
1695                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1696                         M_STFSX(s3, s1, REG_ITMP2);
1697                         break;
1698
1699                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1700
1701                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1702                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1703                         if (iptr->op1 == 0) {
1704                                 gen_nullptr_check(s1);
1705                                 gen_bound_check;
1706                         }
1707                         var_to_reg_flt(s3, src, REG_FTMP3);
1708                         M_SLL_IMM(s2, 3, REG_ITMP2);
1709                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1710                         M_STFDX(s3, s1, REG_ITMP2);
1711                         break;
1712
1713                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1714
1715                         var_to_reg_int(s1, src->prev->prev, rd->argintregs[0]);
1716                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1717                         if (iptr->op1 == 0) {
1718                                 gen_nullptr_check(s1);
1719                                 gen_bound_check;
1720                         }
1721                         var_to_reg_int(s3, src, rd->argintregs[1]);
1722
1723                         M_INTMOVE(s1, rd->argintregs[0]);
1724                         M_INTMOVE(s3, rd->argintregs[1]);
1725                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1726                         M_ALD(REG_ITMP1, REG_PV, disp);
1727                         M_MTCTR(REG_ITMP1);
1728                         M_JSR;
1729                         M_TST(REG_RESULT);
1730                         M_BEQ(0);
1731                         codegen_addxstorerefs(cd, mcodeptr);
1732
1733                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1734                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1735                         var_to_reg_int(s3, src, REG_ITMP3);
1736                         M_SLL_IMM(s2, 2, REG_ITMP2);
1737                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1738                         M_STWX(s3, s1, REG_ITMP2);
1739                         break;
1740
1741
1742                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1743                                       /* op1 = type, val.a = field address            */
1744
1745                         if (!iptr->val.a) {
1746                                 disp = dseg_addaddress(cd, NULL);
1747
1748                                 codegen_addpatchref(cd, mcodeptr,
1749                                                                         PATCHER_get_putstatic,
1750                                                                         (unresolved_field *) iptr->target, disp);
1751
1752                                 if (opt_showdisassemble)
1753                                         M_NOP;
1754
1755                         } else {
1756                                 fieldinfo *fi = iptr->val.a;
1757
1758                                 disp = dseg_addaddress(cd, &(fi->value));
1759
1760                                 if (!fi->class->initialized) {
1761                                         codegen_addpatchref(cd, mcodeptr,
1762                                                                                 PATCHER_clinit, fi->class, disp);
1763
1764                                         if (opt_showdisassemble)
1765                                                 M_NOP;
1766                                 }
1767                         }
1768
1769                         M_ALD(REG_ITMP1, REG_PV, disp);
1770                         switch (iptr->op1) {
1771                         case TYPE_INT:
1772                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1773                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1774                                 store_reg_to_var_int(iptr->dst, d);
1775                                 break;
1776                         case TYPE_LNG:
1777                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1778                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1779                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1780                                 store_reg_to_var_int(iptr->dst, d);
1781                                 break;
1782                         case TYPE_ADR:
1783                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1784                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1785                                 store_reg_to_var_int(iptr->dst, d);
1786                                 break;
1787                         case TYPE_FLT:
1788                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1789                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1790                                 store_reg_to_var_flt(iptr->dst, d);
1791                                 break;
1792                         case TYPE_DBL:
1793                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1794                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1795                                 store_reg_to_var_flt(iptr->dst, d);
1796                                 break;
1797                         }
1798                         break;
1799
1800                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1801                                       /* op1 = type, val.a = field address            */
1802
1803
1804                         if (!iptr->val.a) {
1805                                 disp = dseg_addaddress(cd, NULL);
1806
1807                                 codegen_addpatchref(cd, mcodeptr,
1808                                                                         PATCHER_get_putstatic,
1809                                                                         (unresolved_field *) iptr->target, disp);
1810
1811                                 if (opt_showdisassemble)
1812                                         M_NOP;
1813
1814                         } else {
1815                                 fieldinfo *fi = iptr->val.a;
1816
1817                                 disp = dseg_addaddress(cd, &(fi->value));
1818
1819                                 if (!fi->class->initialized) {
1820                                         codegen_addpatchref(cd, mcodeptr,
1821                                                                                 PATCHER_clinit, fi->class, disp);
1822
1823                                         if (opt_showdisassemble)
1824                                                 M_NOP;
1825                                 }
1826                         }
1827
1828                         M_ALD(REG_ITMP1, REG_PV, disp);
1829                         switch (iptr->op1) {
1830                         case TYPE_INT:
1831                                 var_to_reg_int(s2, src, REG_ITMP2);
1832                                 M_IST_INTERN(s2, REG_ITMP1, 0);
1833                                 break;
1834                         case TYPE_LNG:
1835                                 var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1836                                 M_IST_INTERN(GET_HIGH_REG(s2), REG_ITMP1, 0);
1837                                 M_IST_INTERN(GET_LOW_REG(s2), REG_ITMP1, 4);
1838                                 break;
1839                         case TYPE_ADR:
1840                                 var_to_reg_int(s2, src, REG_ITMP2);
1841                                 M_AST_INTERN(s2, REG_ITMP1, 0);
1842                                 break;
1843                         case TYPE_FLT:
1844                                 var_to_reg_flt(s2, src, REG_FTMP2);
1845                                 M_FST_INTERN(s2, REG_ITMP1, 0);
1846                                 break;
1847                         case TYPE_DBL:
1848                                 var_to_reg_flt(s2, src, REG_FTMP2);
1849                                 M_DST_INTERN(s2, REG_ITMP1, 0);
1850                                 break;
1851                         }
1852                         break;
1853
1854
1855                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1856                                       /* op1 = type, val.i = field offset             */
1857
1858                         var_to_reg_int(s1, src, REG_ITMP1);
1859                         gen_nullptr_check(s1);
1860
1861                         if (!iptr->val.a) {
1862                                 codegen_addpatchref(cd, mcodeptr,
1863                                                                         PATCHER_get_putfield,
1864                                                                         (unresolved_field *) iptr->target, 0);
1865
1866                                 if (opt_showdisassemble)
1867                                         M_NOP;
1868
1869                                 disp = 0;
1870
1871                         } else {
1872                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1873                         }
1874
1875                         switch (iptr->op1) {
1876                         case TYPE_INT:
1877                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1878                                 M_ILD(d, s1, disp);
1879                                 store_reg_to_var_int(iptr->dst, d);
1880                                 break;
1881                         case TYPE_LNG:
1882                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1883                                 M_ILD(GET_LOW_REG(d), s1, disp + 4);       /* keep this order */
1884                                 M_ILD(GET_HIGH_REG(d), s1, disp);          /* keep this order */
1885                                 store_reg_to_var_int(iptr->dst, d);
1886                                 break;
1887                         case TYPE_ADR:
1888                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1889                                 M_ALD(d, s1, disp);
1890                                 store_reg_to_var_int(iptr->dst, d);
1891                                 break;
1892                         case TYPE_FLT:
1893                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1894                                 M_FLD(d, s1, disp);
1895                                 store_reg_to_var_flt(iptr->dst, d);
1896                                 break;
1897                         case TYPE_DBL:
1898                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1899                                 M_DLD(d, s1, disp);
1900                                 store_reg_to_var_flt(iptr->dst, d);
1901                                 break;
1902                         }
1903                         break;
1904
1905                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1906                                       /* op1 = type, val.i = field offset             */
1907
1908                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1909                         gen_nullptr_check(s1);
1910
1911                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
1912                                 if (IS_2_WORD_TYPE(iptr->op1)) {
1913                                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1914                                 } else {
1915                                         var_to_reg_int(s2, src, REG_ITMP2);
1916                                 }
1917                         } else {
1918                                 var_to_reg_flt(s2, src, REG_FTMP2);
1919                         }
1920
1921                         if (!iptr->val.a) {
1922                                 codegen_addpatchref(cd, mcodeptr,
1923                                                                         PATCHER_get_putfield,
1924                                                                         (unresolved_field *) iptr->target, 0);
1925
1926                                 if (opt_showdisassemble)
1927                                         M_NOP;
1928
1929                                 disp = 0;
1930
1931                         } else {
1932                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1933                         }
1934
1935                         switch (iptr->op1) {
1936                         case TYPE_INT:
1937                                 M_IST(s2, s1, disp);
1938                                 break;
1939                         case TYPE_LNG:
1940                                 M_IST(GET_LOW_REG(s2), s1, disp + 4);      /* keep this order */
1941                                 M_IST(GET_HIGH_REG(s2), s1, disp);         /* keep this order */
1942                                 break;
1943                         case TYPE_ADR:
1944                                 M_AST(s2, s1, disp);
1945                                 break;
1946                         case TYPE_FLT:
1947                                 M_FST(s2, s1, disp);
1948                                 break;
1949                         case TYPE_DBL:
1950                                 M_DST(s2, s1, disp);
1951                                 break;
1952                         }
1953                         break;
1954
1955
1956                 /* branch operations **************************************************/
1957
1958                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1959
1960                         var_to_reg_int(s1, src, REG_ITMP1);
1961                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1962
1963                         if (iptr->val.a) {
1964                                 codegen_addpatchref(cd, mcodeptr,
1965                                                                         PATCHER_athrow_areturn,
1966                                                                         (unresolved_class *) iptr->val.a, 0);
1967
1968                                 if (opt_showdisassemble)
1969                                         M_NOP;
1970                         }
1971
1972                         disp = dseg_addaddress(cd, asm_handle_exception);
1973                         M_ALD(REG_ITMP2, REG_PV, disp);
1974                         M_MTCTR(REG_ITMP2);
1975
1976                         if (m->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
1977                         M_BL(0);                                        /* get current PC */
1978                         M_MFLR(REG_ITMP2_XPC);
1979                         if (m->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
1980                         M_RTS;                                          /* jump to CTR    */
1981
1982                         ALIGNCODENOP;
1983                         break;
1984
1985                 case ICMD_GOTO:         /* ... ==> ...                                */
1986                                         /* op1 = target JavaVM pc                     */
1987                         M_BR(0);
1988                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
1989                         ALIGNCODENOP;
1990                         break;
1991
1992                 case ICMD_JSR:          /* ... ==> ...                                */
1993                                         /* op1 = target JavaVM pc                     */
1994
1995                         if (m->isleafmethod) M_MFLR(REG_ITMP2);
1996                         M_BL(0);
1997                         M_MFLR(REG_ITMP1);
1998                         M_IADD_IMM(REG_ITMP1, m->isleafmethod ? 16 : 12, REG_ITMP1);
1999                         if (m->isleafmethod) M_MTLR(REG_ITMP2);
2000                         M_BR(0);
2001                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2002                         break;
2003
2004                 case ICMD_RET:          /* ... ==> ...                                */
2005                                         /* op1 = local variable                       */
2006
2007                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2008                         if (var->flags & INMEMORY) {
2009                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2010                                 M_MTCTR(REG_ITMP1);
2011                         } else {
2012                                 M_MTCTR(var->regoff);
2013                         }
2014                         M_RTS;
2015                         ALIGNCODENOP;
2016                         break;
2017
2018                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2019                                         /* op1 = target JavaVM pc                     */
2020
2021                         var_to_reg_int(s1, src, REG_ITMP1);
2022                         M_TST(s1);
2023                         M_BEQ(0);
2024                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2025                         break;
2026
2027                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2028                                         /* op1 = target JavaVM pc                     */
2029
2030                         var_to_reg_int(s1, src, REG_ITMP1);
2031                         M_TST(s1);
2032                         M_BNE(0);
2033                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2034                         break;
2035
2036                 case ICMD_IFLT:
2037                 case ICMD_IFLE:
2038                 case ICMD_IFNE:
2039                 case ICMD_IFGT:
2040                 case ICMD_IFGE:
2041                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2042                                         /* op1 = target JavaVM pc, val.i = constant   */
2043
2044                         var_to_reg_int(s1, src, REG_ITMP1);
2045                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2046                                 M_CMPI(s1, iptr->val.i);
2047                         } else {
2048                                 ICONST(REG_ITMP2, iptr->val.i);
2049                                 M_CMP(s1, REG_ITMP2);
2050                         }
2051                         switch (iptr->opc) {
2052                         case ICMD_IFLT:
2053                                 M_BLT(0);
2054                                 break;
2055                         case ICMD_IFLE:
2056                                 M_BLE(0);
2057                                 break;
2058                         case ICMD_IFNE:
2059                                 M_BNE(0);
2060                                 break;
2061                         case ICMD_IFGT:
2062                                 M_BGT(0);
2063                                 break;
2064                         case ICMD_IFGE:
2065                                 M_BGE(0);
2066                                 break;
2067                         case ICMD_IFEQ:
2068                                 M_BEQ(0);
2069                                 break;
2070                         }
2071                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2072                         break;
2073
2074
2075                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2076                                         /* op1 = target JavaVM pc, val.l = constant   */
2077
2078                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2079                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2080                         if (iptr->val.l == 0) {
2081                                 M_OR_TST(s1, s2, REG_ITMP3);
2082                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2083                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2084                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2085                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2086                         } else {
2087                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2088                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2089                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2090                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2091                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2092                         }
2093                         M_BEQ(0);
2094                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2095                         break;
2096
2097                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2098                                         /* op1 = target JavaVM pc, val.l = constant   */
2099                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2100                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2101                         if (iptr->val.l == 0) {
2102                                 /* if high word is less than zero, the whole long is too */
2103                                 M_CMPI(s2, 0);
2104                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2105                                 M_CMPI(s2, 0);
2106                                 M_BLT(0);
2107                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2108                                 M_BGT(2);
2109                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2110                         } else {
2111                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2112                                 M_CMP(s2, REG_ITMP3);
2113                                 M_BLT(0);
2114                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2115                                 M_BGT(3);
2116                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2117                                 M_CMPU(s1, REG_ITMP3);
2118                         }
2119                         M_BLT(0);
2120                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2121                         break;
2122
2123                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2124                                         /* op1 = target JavaVM pc, val.l = constant   */
2125
2126                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2127                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2128 /*                      if (iptr->val.l == 0) { */
2129 /*                              M_OR(s1, s2, REG_ITMP3); */
2130 /*                              M_CMPI(REG_ITMP3, 0); */
2131
2132 /*                      } else  */
2133                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2134                                 M_CMPI(s2, 0);
2135                                 M_BLT(0);
2136                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2137                                 M_BGT(2);
2138                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2139                         } else {
2140                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2141                                 M_CMP(s2, REG_ITMP3);
2142                                 M_BLT(0);
2143                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2144                                 M_BGT(3);
2145                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2146                                 M_CMPU(s1, REG_ITMP3);
2147                         }
2148                         M_BLE(0);
2149                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2150                         break;
2151
2152                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2153                                         /* op1 = target JavaVM pc, val.l = constant   */
2154
2155                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2156                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2157                         if (iptr->val.l == 0) {
2158                                 M_OR_TST(s1, s2, REG_ITMP3);
2159                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2160                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2161                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2162                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2163                         } else {
2164                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2165                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2166                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2167                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2168                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2169                         }
2170                         M_BNE(0);
2171                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2172                         break;
2173
2174                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2175                                         /* op1 = target JavaVM pc, val.l = constant   */
2176
2177                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2178                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2179 /*                      if (iptr->val.l == 0) { */
2180 /*                              M_OR(s1, s2, REG_ITMP3); */
2181 /*                              M_CMPI(REG_ITMP3, 0); */
2182
2183 /*                      } else  */
2184                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2185                                 M_CMPI(s2, 0);
2186                                 M_BGT(0);
2187                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2188                                 M_BLT(2);
2189                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2190                         } else {
2191                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2192                                 M_CMP(s2, REG_ITMP3);
2193                                 M_BGT(0);
2194                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2195                                 M_BLT(3);
2196                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2197                                 M_CMPU(s1, REG_ITMP3);
2198                         }
2199                         M_BGT(0);
2200                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2201                         break;
2202
2203                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2204                                         /* op1 = target JavaVM pc, val.l = constant   */
2205                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2206                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2207                         if (iptr->val.l == 0) {
2208                                 /* if high word is greater equal zero, the whole long is too */
2209                                 M_CMPI(s2, 0);
2210                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2211                                 M_CMPI(s2, 0);
2212                                 M_BGT(0);
2213                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2214                                 M_BLT(2);
2215                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2216                         } else {
2217                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2218                                 M_CMP(s2, REG_ITMP3);
2219                                 M_BGT(0);
2220                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2221                                 M_BLT(3);
2222                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2223                                 M_CMPU(s1, REG_ITMP3);
2224                         }
2225                         M_BGE(0);
2226                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2227                         break;
2228
2229                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2230                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
2231
2232                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2233                         var_to_reg_int(s2, src, REG_ITMP2);
2234                         M_CMP(s1, s2);
2235                         M_BEQ(0);
2236                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2237                         break;
2238
2239                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2240                                         /* op1 = target JavaVM pc                     */
2241
2242                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2243                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2244                         M_CMP(s1, s2);
2245                         /* load low-bits before the branch, so we know the distance */
2246                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2247                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2248                         M_BNE(2);
2249                         M_CMP(s1, s2);
2250                         M_BEQ(0);
2251                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2252                         break;
2253
2254                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2255                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
2256
2257                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2258                         var_to_reg_int(s2, src, REG_ITMP2);
2259                         M_CMP(s1, s2);
2260                         M_BNE(0);
2261                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2262                         break;
2263
2264                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
2265                                         /* op1 = target JavaVM pc                     */
2266
2267                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2268                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2269                         M_CMP(s1, s2);
2270                         M_BNE(0);
2271                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2272                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2273                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2274                         M_CMP(s1, s2);
2275                         M_BNE(0);
2276                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2277                         break;
2278
2279                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2280                                         /* op1 = target JavaVM pc                     */
2281
2282                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2283                         var_to_reg_int(s2, src, REG_ITMP2);
2284                         M_CMP(s1, s2);
2285                         M_BLT(0);
2286                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2287                         break;
2288
2289                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2290                                         /* op1 = target JavaVM pc                     */
2291
2292                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2293                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2294                         M_CMP(s1, s2);
2295                         M_BLT(0);
2296                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2297                         /* load low-bits before the branch, so we know the distance */
2298                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2299                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2300                         M_BGT(2);
2301                         M_CMPU(s1, s2);
2302                         M_BLT(0);
2303                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2304                         break;
2305
2306                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2307                                         /* op1 = target JavaVM pc                     */
2308
2309                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2310                         var_to_reg_int(s2, src, REG_ITMP2);
2311                         M_CMP(s1, s2);
2312                         M_BGT(0);
2313                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2314                         break;
2315
2316                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2317                                         /* op1 = target JavaVM pc                     */
2318
2319                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2320                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2321                         M_CMP(s1, s2);
2322                         M_BGT(0);
2323                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2324                         /* load low-bits before the branch, so we know the distance */
2325                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2326                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2327                         M_BLT(2);
2328                         M_CMPU(s1, s2);
2329                         M_BGT(0);
2330                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2331                         break;
2332
2333                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2334                                         /* op1 = target JavaVM pc                     */
2335
2336                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2337                         var_to_reg_int(s2, src, REG_ITMP2);
2338                         M_CMP(s1, s2);
2339                         M_BLE(0);
2340                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2341                         break;
2342
2343                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2344                                         /* op1 = target JavaVM pc                     */
2345
2346                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2347                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2348                         M_CMP(s1, s2);
2349                         M_BLT(0);
2350                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2351                         /* load low-bits before the branch, so we know the distance */
2352                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2353                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2354                         M_BGT(2);
2355                         M_CMPU(s1, s2);
2356                         M_BLE(0);
2357                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2358                         break;
2359
2360                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2361                                         /* op1 = target JavaVM pc                     */
2362
2363                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2364                         var_to_reg_int(s2, src, REG_ITMP2);
2365                         M_CMP(s1, s2);
2366                         M_BGE(0);
2367                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2368                         break;
2369
2370                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2371                                         /* op1 = target JavaVM pc                     */
2372
2373                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2374                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2375                         M_CMP(s1, s2);
2376                         M_BGT(0);
2377                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2378                         /* load low-bits before the branch, so we know the distance */
2379                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2380                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2381                         M_BLT(2);
2382                         M_CMPU(s1, s2);
2383                         M_BGE(0);
2384                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2385                         break;
2386
2387                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2388
2389                         var_to_reg_int(s1, src, REG_RESULT);
2390                         M_TINTMOVE(src->type, s1, REG_RESULT);
2391                         goto nowperformreturn;
2392
2393                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2394
2395                         var_to_reg_int(s1, src, REG_RESULT);
2396                         M_TINTMOVE(src->type, s1, REG_RESULT);
2397
2398                         if (iptr->val.a) {
2399                                 codegen_addpatchref(cd, mcodeptr,
2400                                                                         PATCHER_athrow_areturn,
2401                                                                         (unresolved_class *) iptr->val.a, 0);
2402
2403                                 if (opt_showdisassemble)
2404                                         M_NOP;
2405                         }
2406                         goto nowperformreturn;
2407
2408                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2409
2410                         var_to_reg_int(s1, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2411                         M_TINTMOVE(src->type, s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2412                         goto nowperformreturn;
2413
2414                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2415                 case ICMD_DRETURN:
2416
2417                         var_to_reg_flt(s1, src, REG_FRESULT);
2418                         M_FLTMOVE(s1, REG_FRESULT);
2419                         goto nowperformreturn;
2420
2421                 case ICMD_RETURN:      /* ...  ==> ...                                */
2422
2423 nowperformreturn:
2424                         {
2425                         s4 i, p;
2426
2427                         p = parentargs_base;
2428
2429                         /* call trace function */
2430
2431                         if (runverbose) {
2432                                 M_MFLR(REG_ZERO);
2433                                 M_LDA(REG_SP, REG_SP, -10 * 8);
2434                                 M_DST(REG_FRESULT, REG_SP, 48+0);
2435                                 M_IST(REG_RESULT, REG_SP, 48+8);
2436                                 M_AST(REG_ZERO, REG_SP, 48+12);
2437                                 M_IST(REG_RESULT2, REG_SP, 48+16);
2438
2439                                 /* keep this order */
2440                                 switch (iptr->opc) {
2441                                 case ICMD_IRETURN:
2442                                 case ICMD_ARETURN:
2443 #if defined(__DARWIN__)
2444                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2445                                         M_CLR(rd->argintregs[1]);
2446 #else
2447                                         M_MOV(REG_RESULT, rd->argintregs[3]);
2448                                         M_CLR(rd->argintregs[2]);
2449 #endif
2450                                         break;
2451
2452                                 case ICMD_LRETURN:
2453 #if defined(__DARWIN__)
2454                                         M_MOV(REG_RESULT2, rd->argintregs[2]);
2455                                         M_MOV(REG_RESULT, rd->argintregs[1]);
2456 #else
2457                                         M_MOV(REG_RESULT2, rd->argintregs[3]);
2458                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2459 #endif
2460                                         break;
2461                                 }
2462
2463                                 disp = dseg_addaddress(cd, m);
2464                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2465
2466                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2467                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2468                                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2469                                 M_ALD(REG_ITMP2, REG_PV, disp);
2470                                 M_MTCTR(REG_ITMP2);
2471                                 M_JSR;
2472
2473                                 M_DLD(REG_FRESULT, REG_SP, 48+0);
2474                                 M_ILD(REG_RESULT, REG_SP, 48+8);
2475                                 M_ALD(REG_ZERO, REG_SP, 48+12);
2476                                 M_ILD(REG_RESULT2, REG_SP, 48+16);
2477                                 M_LDA(REG_SP, REG_SP, 10 * 8);
2478                                 M_MTLR(REG_ZERO);
2479                         }
2480
2481 #if defined(USE_THREADS)
2482                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2483                                 /* we need to save the proper return value */
2484                                 switch (iptr->opc) {
2485                                 case ICMD_LRETURN:
2486                                         M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2487                                         /* fall through */
2488                                 case ICMD_IRETURN:
2489                                 case ICMD_ARETURN:
2490                                         M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2491                                         break;
2492                                 case ICMD_FRETURN:
2493                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2494                                         break;
2495                                 case ICMD_DRETURN:
2496                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2497                                         break;
2498                                 }
2499
2500                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2501                                 M_ALD(REG_ITMP3, REG_PV, disp);
2502                                 M_MTCTR(REG_ITMP3);
2503                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2504                                 M_JSR;
2505
2506                                 /* and now restore the proper return value */
2507                                 switch (iptr->opc) {
2508                                 case ICMD_LRETURN:
2509                                         M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2510                                         /* fall through */
2511                                 case ICMD_IRETURN:
2512                                 case ICMD_ARETURN:
2513                                         M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2514                                         break;
2515                                 case ICMD_FRETURN:
2516                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2517                                         break;
2518                                 case ICMD_DRETURN:
2519                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2520                                         break;
2521                                 }
2522                         }
2523 #endif
2524
2525                         /* restore return address                                         */
2526
2527                         if (!m->isleafmethod) {
2528                                 M_ALD(REG_ZERO, REG_SP, p * 4 + LA_LR_OFFSET);
2529                                 M_MTLR(REG_ZERO);
2530                         }
2531
2532                         /* restore saved registers                                        */
2533
2534                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2535                                 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2536                         }
2537                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2538                                 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2539                         }
2540
2541                         /* deallocate stack                                               */
2542
2543                         if (parentargs_base)
2544                                 M_LDA(REG_SP, REG_SP, parentargs_base * 4);
2545
2546                         M_RET;
2547                         ALIGNCODENOP;
2548                         }
2549                         break;
2550
2551
2552                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2553                         {
2554                         s4 i, l, *s4ptr;
2555                         void **tptr;
2556
2557                         tptr = (void **) iptr->target;
2558
2559                         s4ptr = iptr->val.a;
2560                         l = s4ptr[1];                          /* low     */
2561                         i = s4ptr[2];                          /* high    */
2562
2563                         var_to_reg_int(s1, src, REG_ITMP1);
2564                         if (l == 0) {
2565                                 M_INTMOVE(s1, REG_ITMP1);
2566                         } else if (l <= 32768) {
2567                                 M_LDA(REG_ITMP1, s1, -l);
2568                         } else {
2569                                 ICONST(REG_ITMP2, l);
2570                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2571                         }
2572                         i = i - l + 1;
2573
2574                         /* range check */
2575
2576                         M_CMPUI(REG_ITMP1, i - 1);
2577                         M_BGT(0);
2578                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2579
2580                         /* build jump table top down and use address of lowest entry */
2581
2582                         /* s4ptr += 3 + i; */
2583                         tptr += i;
2584
2585                         while (--i >= 0) {
2586                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2587                                 --tptr;
2588                         }
2589                         }
2590
2591                         /* length of dataseg after last dseg_addtarget is used by load */
2592
2593                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2594                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2595                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2596                         M_MTCTR(REG_ITMP2);
2597                         M_RTS;
2598                         ALIGNCODENOP;
2599                         break;
2600
2601
2602                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2603                         {
2604                         s4 i, l, val, *s4ptr;
2605                         void **tptr;
2606
2607                         tptr = (void **) iptr->target;
2608
2609                         s4ptr = iptr->val.a;
2610                         l = s4ptr[0];                          /* default  */
2611                         i = s4ptr[1];                          /* count    */
2612
2613                         MCODECHECK((i<<2)+8);
2614                         var_to_reg_int(s1, src, REG_ITMP1);
2615                         while (--i >= 0) {
2616                                 s4ptr += 2;
2617                                 ++tptr;
2618
2619                                 val = s4ptr[0];
2620                                 if ((val >= -32768) && (val <= 32767)) {
2621                                         M_CMPI(s1, val);
2622                                 } else {
2623                                         a = dseg_adds4(cd, val);
2624                                         M_ILD(REG_ITMP2, REG_PV, a);
2625                                         M_CMP(s1, REG_ITMP2);
2626                                 }
2627                                 M_BEQ(0);
2628                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2629                         }
2630
2631                         M_BR(0);
2632                         tptr = (void **) iptr->target;
2633                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2634
2635                         ALIGNCODENOP;
2636                         break;
2637                         }
2638
2639
2640                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2641                                         /* op1 = arg count val.a = builtintable entry */
2642
2643                         bte = iptr->val.a;
2644                         md = bte->md;
2645                         goto gen_method;
2646
2647                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2648                                         /* op1 = arg count, val.a = method pointer    */
2649
2650                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2651                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2652                 case ICMD_INVOKEINTERFACE:
2653
2654                         lm = iptr->val.a;
2655
2656                         if (lm == NULL) {
2657                                 unresolved_method *um = iptr->target;
2658                                 md = um->methodref->parseddesc.md;
2659                         } else {
2660                                 md = lm->parseddesc;
2661                         }
2662
2663 gen_method:
2664                         s3 = md->paramcount;
2665
2666                         MCODECHECK((s3 << 1) + 64);
2667
2668                         /* copy arguments to registers or stack location */
2669
2670                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2671                                 if (src->varkind == ARGVAR)
2672                                         continue;
2673                                 if (IS_INT_LNG_TYPE(src->type)) {
2674                                         if (!md->params[s3].inmemory) {
2675                                                 if (IS_2_WORD_TYPE(src->type)) {
2676                                                         s1 = PACK_REGS(
2677                                                    rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2678                                                    rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2679                                                 } else {
2680                                                         s1 = rd->argintregs[md->params[s3].regoff];
2681                                                 }
2682                                                 var_to_reg_int(d, src, s1);
2683                                                 M_TINTMOVE(src->type, d, s1);
2684                                         } else {
2685                                                 var_to_reg_int(d, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2686                                                 M_IST(GET_HIGH_REG(d), REG_SP,
2687                                                           md->params[s3].regoff * 4);
2688                                                 if (IS_2_WORD_TYPE(src->type)) {
2689                                                         M_IST(GET_LOW_REG(d),
2690                                                                   REG_SP, md->params[s3].regoff * 4 + 4);
2691                                                 }
2692                                         }
2693
2694                                 } else {
2695                                         if (!md->params[s3].inmemory) {
2696                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2697                                                 var_to_reg_flt(d, src, s1);
2698                                                 M_FLTMOVE(d, s1);
2699                                         } else {
2700                                                 var_to_reg_flt(d, src, REG_FTMP1);
2701                                                 if (IS_2_WORD_TYPE(src->type)) {
2702                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2703                                                 } else {
2704                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2705                                                 }
2706                                         }
2707                                 }
2708                         } /* end of for */
2709
2710                         switch (iptr->opc) {
2711                         case ICMD_BUILTIN:
2712                                 disp = dseg_addaddress(cd, bte->fp);
2713                                 d = md->returntype.type;
2714
2715                                 M_ALD(REG_PV, REG_PV, disp);  /* pointer to built-in-function */
2716                                 M_MTCTR(REG_PV);
2717                                 M_JSR;
2718                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2719                                 M_MFLR(REG_ITMP1);
2720                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2721
2722                                 /* if op1 == true, we need to check for an exception */
2723
2724                                 if (iptr->op1 == true) {
2725                                         M_CMPI(REG_RESULT, 0);
2726                                         M_BEQ(0);
2727                                         codegen_addxexceptionrefs(cd, mcodeptr);
2728                                 }
2729                                 break;
2730
2731                         case ICMD_INVOKESPECIAL:
2732                                 gen_nullptr_check(rd->argintregs[0]);
2733                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2734                                 /* fall through */
2735
2736                         case ICMD_INVOKESTATIC:
2737                                 if (lm == NULL) {
2738                                         unresolved_method *um = iptr->target;
2739
2740                                         disp = dseg_addaddress(cd, NULL);
2741
2742                                         codegen_addpatchref(cd, mcodeptr,
2743                                                                                 PATCHER_invokestatic_special, um, disp);
2744
2745                                         if (opt_showdisassemble)
2746                                                 M_NOP;
2747
2748                                         d = md->returntype.type;
2749
2750                                 } else {
2751                                         disp = dseg_addaddress(cd, lm->stubroutine);
2752                                         d = md->returntype.type;
2753                                 }
2754
2755                                 M_ALD(REG_PV, REG_PV, disp);
2756                                 M_MTCTR(REG_PV);
2757                                 M_JSR;
2758                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2759                                 M_MFLR(REG_ITMP1);
2760                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2761                                 break;
2762
2763                         case ICMD_INVOKEVIRTUAL:
2764                                 gen_nullptr_check(rd->argintregs[0]);
2765
2766                                 if (lm == NULL) {
2767                                         unresolved_method *um = iptr->target;
2768
2769                                         codegen_addpatchref(cd, mcodeptr,
2770                                                                                 PATCHER_invokevirtual, um, 0);
2771
2772                                         if (opt_showdisassemble)
2773                                                 M_NOP;
2774
2775                                         s1 = 0;
2776                                         d = md->returntype.type;
2777
2778                                 } else {
2779                                         s1 = OFFSET(vftbl_t, table[0]) +
2780                                                 sizeof(methodptr) * lm->vftblindex;
2781                                         d = md->returntype.type;
2782                                 }
2783
2784                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2785                                           OFFSET(java_objectheader, vftbl));
2786                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2787                                 M_MTCTR(REG_PV);
2788                                 M_JSR;
2789                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2790                                 M_MFLR(REG_ITMP1);
2791                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2792                                 break;
2793
2794                         case ICMD_INVOKEINTERFACE:
2795                                 gen_nullptr_check(rd->argintregs[0]);
2796
2797                                 if (lm == NULL) {
2798                                         unresolved_method *um = iptr->target;
2799
2800                                         codegen_addpatchref(cd, mcodeptr,
2801                                                                                 PATCHER_invokeinterface, um, 0);
2802
2803                                         if (opt_showdisassemble)
2804                                                 M_NOP;
2805
2806                                         s1 = 0;
2807                                         s2 = 0;
2808                                         d = md->returntype.type;
2809
2810                                 } else {
2811                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2812                                                 sizeof(methodptr*) * lm->class->index;
2813
2814                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2815
2816                                         d = md->returntype.type;
2817                                 }
2818
2819                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2820                                           OFFSET(java_objectheader, vftbl));
2821                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2822                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2823                                 M_MTCTR(REG_PV);
2824                                 M_JSR;
2825                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2826                                 M_MFLR(REG_ITMP1);
2827                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2828                                 break;
2829                         }
2830
2831                         /* d contains return type */
2832
2833                         if (d != TYPE_VOID) {
2834                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2835                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
2836                                                 s1 = reg_of_var(rd, iptr->dst,
2837                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT));
2838                                                 M_TINTMOVE(iptr->dst->type,
2839                                                                    PACK_REGS(REG_RESULT2, REG_RESULT), s1);
2840                                         } else {
2841                                                 s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
2842                                                 M_TINTMOVE(iptr->dst->type, REG_RESULT, s1);
2843                                         }
2844                                         store_reg_to_var_int(iptr->dst, s1);
2845
2846                                 } else {
2847                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
2848                                         M_FLTMOVE(REG_FRESULT, s1);
2849                                         store_reg_to_var_flt(iptr->dst, s1);
2850                                 }
2851                         }
2852                         break;
2853
2854
2855                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2856                                       /* op1:   0 == array, 1 == class                */
2857                                       /* val.a: (classinfo*) superclass               */
2858
2859                         /*  superclass is an interface:
2860                          *
2861                          *  OK if ((sub == NULL) ||
2862                          *         (sub->vftbl->interfacetablelength > super->index) &&
2863                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2864                          *
2865                          *  superclass is a class:
2866                          *
2867                          *  OK if ((sub == NULL) || (0
2868                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2869                          *         super->vftbl->diffvall));
2870                          */
2871
2872                         if (iptr->op1 == 1) {
2873                                 /* object type cast-check */
2874
2875                                 classinfo *super;
2876                                 vftbl_t   *supervftbl;
2877                                 s4         superindex;
2878
2879                                 super = (classinfo *) iptr->val.a;
2880
2881                                 if (!super) {
2882                                         superindex = 0;
2883                                         supervftbl = NULL;
2884
2885                                 } else {
2886                                         superindex = super->index;
2887                                         supervftbl = super->vftbl;
2888                                 }
2889
2890 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2891                                 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
2892 #endif
2893                                 var_to_reg_int(s1, src, REG_ITMP1);
2894
2895                                 /* calculate interface checkcast code size */
2896
2897                                 s2 = 7;
2898                                 if (!super)
2899                                         s2 += (opt_showdisassemble ? 1 : 0);
2900
2901                                 /* calculate class checkcast code size */
2902
2903                                 s3 = 8 + (s1 == REG_ITMP1);
2904                                 if (!super)
2905                                         s3 += (opt_showdisassemble ? 1 : 0);
2906
2907                                 /* if class is not resolved, check which code to call */
2908
2909                                 if (!super) {
2910                                         M_TST(s1);
2911                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2912
2913                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2914
2915                                         codegen_addpatchref(cd, mcodeptr,
2916                                                                                 PATCHER_checkcast_instanceof_flags,
2917                                                                                 (constant_classref *) iptr->target, disp);
2918
2919                                         if (opt_showdisassemble)
2920                                                 M_NOP;
2921
2922                                         M_ILD(REG_ITMP2, REG_PV, disp);
2923                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2924                                         M_BEQ(s2 + 1);
2925                                 }
2926
2927                                 /* interface checkcast code */
2928
2929                                 if (!super || (super->flags & ACC_INTERFACE)) {
2930                                         if (super) {
2931                                                 M_TST(s1);
2932                                                 M_BEQ(s2);
2933
2934                                         } else {
2935                                                 codegen_addpatchref(cd, mcodeptr,
2936                                                                                         PATCHER_checkcast_instanceof_interface,
2937                                                                                         (constant_classref *) iptr->target, 0);
2938
2939                                                 if (opt_showdisassemble)
2940                                                         M_NOP;
2941                                         }
2942
2943                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2944                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2945                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2946                                         M_BLE(0);
2947                                         codegen_addxcastrefs(cd, mcodeptr);
2948                                         M_ALD(REG_ITMP3, REG_ITMP2,
2949                                                   OFFSET(vftbl_t, interfacetable[0]) -
2950                                                   superindex * sizeof(methodptr*));
2951                                         M_TST(REG_ITMP3);
2952                                         M_BEQ(0);
2953                                         codegen_addxcastrefs(cd, mcodeptr);
2954
2955                                         if (!super)
2956                                                 M_BR(s3);
2957                                 }
2958
2959                                 /* class checkcast code */
2960
2961                                 if (!super || !(super->flags & ACC_INTERFACE)) {
2962                                         disp = dseg_addaddress(cd, supervftbl);
2963
2964                                         if (super) {
2965                                                 M_TST(s1);
2966                                                 M_BEQ(s3);
2967
2968                                         } else {
2969                                                 codegen_addpatchref(cd, mcodeptr,
2970                                                                                         PATCHER_checkcast_class,
2971                                                                                         (constant_classref *) iptr->target,
2972                                                                                         disp);
2973
2974                                                 if (opt_showdisassemble)
2975                                                         M_NOP;
2976                                         }
2977
2978                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2979 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2980                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
2981 #endif
2982                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2983                                         M_ALD(REG_ITMP2, REG_PV, disp);
2984                                         if (s1 != REG_ITMP1) {
2985                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
2986                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2987 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2988                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
2989 #endif
2990                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
2991                                         } else {
2992                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2993                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
2994                                                 M_ALD(REG_ITMP2, REG_PV, disp);
2995                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2996 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2997                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
2998 #endif
2999                                         }
3000                                         M_CMPU(REG_ITMP3, REG_ITMP2);
3001                                         M_BGT(0);
3002                                         codegen_addxcastrefs(cd, mcodeptr);
3003                                 }
3004                                 d = reg_of_var(rd, iptr->dst, s1);
3005
3006                         } else {
3007                                 /* array type cast-check */
3008
3009                                 var_to_reg_int(s1, src, rd->argintregs[0]);
3010                                 M_INTMOVE(s1, rd->argintregs[0]);
3011
3012                                 disp = dseg_addaddress(cd, iptr->val.a);
3013
3014                                 if (iptr->val.a == NULL) {
3015                                         codegen_addpatchref(cd, mcodeptr,
3016                                                                                 PATCHER_builtin_arraycheckcast,
3017                                                                                 (constant_classref *) iptr->target,
3018                                                                                 disp);
3019
3020                                         if (opt_showdisassemble)
3021                                                 M_NOP;
3022                                 }
3023
3024                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3025                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3026                                 M_ALD(REG_ITMP2, REG_PV, disp);
3027                                 M_MTCTR(REG_ITMP2);
3028                                 M_JSR;
3029                                 M_TST(REG_RESULT);
3030                                 M_BEQ(0);
3031                                 codegen_addxcastrefs(cd, mcodeptr);
3032
3033                                 var_to_reg_int(s1, src, REG_ITMP1);
3034                                 d = reg_of_var(rd, iptr->dst, s1);
3035                         }
3036                         M_INTMOVE(s1, d);
3037                         store_reg_to_var_int(iptr->dst, d);
3038                         break;
3039
3040                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3041                                       /* val.a: (classinfo*) superclass               */
3042
3043                         /*  superclass is an interface:
3044                          *
3045                          *  return (sub != NULL) &&
3046                          *         (sub->vftbl->interfacetablelength > super->index) &&
3047                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3048                          *
3049                          *  superclass is a class:
3050                          *
3051                          *  return ((sub != NULL) && (0
3052                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3053                          *          super->vftbl->diffvall));
3054                          */
3055
3056                         {
3057                         classinfo *super;
3058                         vftbl_t   *supervftbl;
3059                         s4         superindex;
3060
3061                         super = (classinfo *) iptr->val.a;
3062
3063                         if (!super) {
3064                                 superindex = 0;
3065                                 supervftbl = NULL;
3066
3067                         } else {
3068                                 superindex = super->index;
3069                                 supervftbl = super->vftbl;
3070                         }
3071
3072 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3073             codegen_threadcritrestart(cd, (u1*) mcodeptr - cd->mcodebase);
3074 #endif
3075                         var_to_reg_int(s1, src, REG_ITMP1);
3076                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3077                         if (s1 == d) {
3078                                 M_MOV(s1, REG_ITMP1);
3079                                 s1 = REG_ITMP1;
3080                         }
3081
3082                         /* calculate interface instanceof code size */
3083
3084                         s2 = 8;
3085                         if (!super)
3086                                 s2 += (opt_showdisassemble ? 1 : 0);
3087
3088                         /* calculate class instanceof code size */
3089
3090                         s3 = 10;
3091                         if (!super)
3092                                 s3 += (opt_showdisassemble ? 1 : 0);
3093
3094                         M_CLR(d);
3095
3096                         /* if class is not resolved, check which code to call */
3097
3098                         if (!super) {
3099                                 M_TST(s1);
3100                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3101
3102                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3103
3104                                 codegen_addpatchref(cd, mcodeptr,
3105                                                                         PATCHER_checkcast_instanceof_flags,
3106                                                                         (constant_classref *) iptr->target, disp);
3107
3108                                 if (opt_showdisassemble)
3109                                         M_NOP;
3110
3111                                 M_ILD(REG_ITMP3, REG_PV, disp);
3112                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3113                                 M_BEQ(s2 + 1);
3114                         }
3115
3116                         /* interface instanceof code */
3117
3118                         if (!super || (super->flags & ACC_INTERFACE)) {
3119                                 if (super) {
3120                                         M_TST(s1);
3121                                         M_BEQ(s2);
3122
3123                                 } else {
3124                                         codegen_addpatchref(cd, mcodeptr,
3125                                                                                 PATCHER_checkcast_instanceof_interface,
3126                                                                                 (constant_classref *) iptr->target, 0);
3127
3128                                         if (opt_showdisassemble)
3129                                                 M_NOP;
3130                                 }
3131
3132                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3133                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3134                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3135                                 M_BLE(4);
3136                                 M_ALD(REG_ITMP1, REG_ITMP1,
3137                                           OFFSET(vftbl_t, interfacetable[0]) -
3138                                           superindex * sizeof(methodptr*));
3139                                 M_TST(REG_ITMP1);
3140                                 M_BEQ(1);
3141                                 M_IADD_IMM(REG_ZERO, 1, d);
3142
3143                                 if (!super)
3144                                         M_BR(s3);
3145                         }
3146
3147                         /* class instanceof code */
3148
3149                         if (!super || !(super->flags & ACC_INTERFACE)) {
3150                                 disp = dseg_addaddress(cd, supervftbl);
3151
3152                                 if (super) {
3153                                         M_TST(s1);
3154                                         M_BEQ(s3);
3155
3156                                 } else {
3157                                         codegen_addpatchref(cd, mcodeptr,
3158                                                                                 PATCHER_instanceof_class,
3159                                                                                 (constant_classref *) iptr->target,
3160                                                                                 disp);
3161
3162                                         if (opt_showdisassemble) {
3163                                                 M_NOP;
3164                                         }
3165                                 }
3166
3167                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3168                                 M_ALD(REG_ITMP2, REG_PV, disp);
3169 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3170                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3171 #endif
3172                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3173                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3174                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3175 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3176                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3177 #endif
3178                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3179                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3180                                 M_CLR(d);
3181                                 M_BGT(1);
3182                                 M_IADD_IMM(REG_ZERO, 1, d);
3183                         }
3184                         store_reg_to_var_int(iptr->dst, d);
3185                         }
3186                         break;
3187
3188                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3189                                       /* op1 = dimension, val.a = array descriptor    */
3190
3191                         /* check for negative sizes and copy sizes to stack if necessary  */
3192
3193                         MCODECHECK((iptr->op1 << 1) + 64);
3194
3195                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3196                                 /* copy SAVEDVAR sizes to stack */
3197
3198                                 if (src->varkind != ARGVAR) {
3199                                         var_to_reg_int(s2, src, REG_ITMP1);
3200 #if defined(__DARWIN__)
3201                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3202 #else
3203                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3204 #endif
3205                                 }
3206                         }
3207
3208                         /* a0 = dimension count */
3209
3210                         ICONST(rd->argintregs[0], iptr->op1);
3211
3212                         /* is patcher function set? */
3213
3214                         if (iptr->target) {
3215                                 disp = dseg_addaddress(cd, NULL);
3216
3217                                 codegen_addpatchref(cd, mcodeptr,
3218                                                                         PATCHER_builtin_multianewarray,
3219                                                                         iptr->val.a, disp);
3220
3221                                 if (opt_showdisassemble)
3222                                         M_NOP;
3223
3224                         } else {
3225                                 disp = dseg_addaddress(cd, iptr->val.a);
3226                         }
3227
3228                         /* a1 = arraydescriptor */
3229
3230                         M_ALD(rd->argintregs[1], REG_PV, disp);
3231
3232                         /* a2 = pointer to dimensions = stack pointer */
3233
3234 #if defined(__DARWIN__)
3235                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3236 #else
3237                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3238 #endif
3239
3240                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3241                         M_ALD(REG_ITMP3, REG_PV, disp);
3242                         M_MTCTR(REG_ITMP3);
3243                         M_JSR;
3244
3245                         /* check for exception before result assignment */
3246
3247                         M_CMPI(REG_RESULT, 0);
3248                         M_BEQ(0);
3249                         codegen_addxexceptionrefs(cd, mcodeptr);
3250
3251                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3252                         M_INTMOVE(REG_RESULT, d);
3253                         store_reg_to_var_int(iptr->dst, d);
3254                         break;
3255
3256                 default:
3257                         *exceptionptr =
3258                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3259                         return false;
3260         } /* switch */
3261
3262         } /* for instruction */
3263
3264         /* copy values to interface registers */
3265
3266         src = bptr->outstack;
3267         len = bptr->outdepth;
3268         MCODECHECK(64 + len);
3269 #ifdef LSRA
3270         if (!opt_lsra)
3271 #endif
3272         while (src) {
3273                 len--;
3274                 if ((src->varkind != STACKVAR)) {
3275                         s2 = src->type;
3276                         if (IS_FLT_DBL_TYPE(s2)) {
3277                                 var_to_reg_flt(s1, src, REG_FTMP1);
3278                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3279                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3280
3281                                 } else {
3282                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3283                                 }
3284
3285                         } else {
3286                                 var_to_reg_int(s1, src, REG_ITMP1);
3287                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3288                                         M_TINTMOVE(s2, s1, rd->interfaces[len][s2].regoff);
3289
3290                                 } else {
3291                                         if (IS_2_WORD_TYPE(s2)) {
3292                                                 M_IST(GET_HIGH_REG(s1),
3293                                                           REG_SP, rd->interfaces[len][s2].regoff * 4);
3294                                                 M_IST(GET_LOW_REG(s1), REG_SP,
3295                                                           rd->interfaces[len][s2].regoff * 4 + 4);
3296                                         } else {
3297                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3298                                         }
3299
3300                                 }
3301                         }
3302                 }
3303                 src = src->prev;
3304         }
3305         } /* if (bptr -> flags >= BBREACHED) */
3306         } /* for basic block */
3307
3308         codegen_createlinenumbertable(cd);
3309
3310         {
3311
3312         s4        *xcodeptr;
3313         branchref *bref;
3314
3315         /* generate ArithemticException check stubs */
3316
3317         xcodeptr = NULL;
3318
3319         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3320                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3321                                   bref->branchpos,
3322                                                   (u1 *) mcodeptr - cd->mcodebase);
3323
3324                 MCODECHECK(100);
3325
3326                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3327
3328                 if (xcodeptr != NULL) {
3329                         disp = xcodeptr - mcodeptr - 1;
3330                         M_BR(disp);
3331
3332                 } else {
3333                         xcodeptr = mcodeptr;
3334
3335                         if (m->isleafmethod) {
3336                                 M_MFLR(REG_ZERO);
3337                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3338                         }
3339
3340                         M_MOV(REG_PV, rd->argintregs[0]);
3341                         M_MOV(REG_SP, rd->argintregs[1]);
3342
3343                         if (m->isleafmethod)
3344                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3345                         else
3346                                 M_ALD(rd->argintregs[2],
3347                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3348
3349                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3350
3351                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3352                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3353
3354                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3355                         M_ALD(REG_ITMP1, REG_PV, disp);
3356                         M_MTCTR(REG_ITMP1);
3357                         M_JSR;
3358                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3359
3360                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3361                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3362
3363                         if (m->isleafmethod) {
3364                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3365                                 M_MTLR(REG_ZERO);
3366                         }
3367
3368                         disp = dseg_addaddress(cd, asm_handle_exception);
3369                         M_ALD(REG_ITMP3, REG_PV, disp);
3370                         M_MTCTR(REG_ITMP3);
3371                         M_RTS;
3372                 }
3373         }
3374
3375         /* generate ArrayIndexOutOfBoundsException stubs */
3376
3377         xcodeptr = NULL;
3378
3379         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3380                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3381                                   bref->branchpos,
3382                                                   (u1 *) mcodeptr - cd->mcodebase);
3383
3384                 MCODECHECK(100);
3385
3386                 /* move index register into REG_ITMP1 */
3387
3388                 M_MOV(bref->reg, REG_ITMP1);
3389
3390                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3391
3392                 if (xcodeptr != NULL) {
3393                         disp = xcodeptr - mcodeptr - 1;
3394                         M_BR(disp);
3395
3396                 } else {
3397                         xcodeptr = mcodeptr;
3398
3399                         if (m->isleafmethod) {
3400                                 M_MFLR(REG_ZERO);
3401                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3402                         }
3403
3404                         M_MOV(REG_PV, rd->argintregs[0]);
3405                         M_MOV(REG_SP, rd->argintregs[1]);
3406
3407                         if (m->isleafmethod)
3408                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3409                         else
3410                                 M_ALD(rd->argintregs[2],
3411                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3412
3413                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3414                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3415
3416                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3417                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3418
3419                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3420                         M_ALD(REG_ITMP1, REG_PV, disp);
3421                         M_MTCTR(REG_ITMP1);
3422                         M_JSR;
3423                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3424
3425                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3426                         M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3427
3428                         if (m->isleafmethod) {
3429                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3430                                 M_MTLR(REG_ZERO);
3431                         }
3432
3433                         disp = dseg_addaddress(cd, asm_handle_exception);
3434                         M_ALD(REG_ITMP3, REG_PV, disp);
3435                         M_MTCTR(REG_ITMP3);
3436                         M_RTS;
3437                 }
3438         }
3439
3440         /* generate ArrayStoreException check stubs */
3441
3442         xcodeptr = NULL;
3443
3444         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3445                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3446                                   bref->branchpos,
3447                                                   (u1 *) mcodeptr - cd->mcodebase);
3448
3449                 MCODECHECK(100);
3450
3451                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3452
3453                 if (xcodeptr != NULL) {
3454                         disp = xcodeptr - mcodeptr - 1;
3455                         M_BR(disp);
3456
3457                 } else {
3458                         xcodeptr = mcodeptr;
3459
3460                         M_MOV(REG_PV, rd->argintregs[0]);
3461                         M_MOV(REG_SP, rd->argintregs[1]);
3462                         M_ALD(rd->argintregs[2],
3463                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3464                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3465
3466                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3467                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3468
3469                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3470                         M_ALD(REG_ITMP1, REG_PV, disp);
3471                         M_MTCTR(REG_ITMP1);
3472                         M_JSR;
3473                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3474
3475                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3476                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3477
3478                         disp = dseg_addaddress(cd, asm_handle_exception);
3479                         M_ALD(REG_ITMP3, REG_PV, disp);
3480                         M_MTCTR(REG_ITMP3);
3481                         M_RTS;
3482                 }
3483         }
3484
3485         /* generate ClassCastException stubs */
3486
3487         xcodeptr = NULL;
3488
3489         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3490                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3491                                   bref->branchpos,
3492                                                   (u1 *) mcodeptr - cd->mcodebase);
3493
3494                 MCODECHECK(100);
3495
3496                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3497
3498                 if (xcodeptr != NULL) {
3499                         disp = xcodeptr - mcodeptr - 1;
3500                         M_BR(disp);
3501
3502                 } else {
3503                         xcodeptr = mcodeptr;
3504
3505                         if (m->isleafmethod) {
3506                                 M_MFLR(REG_ZERO);
3507                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3508                         }
3509
3510                         M_MOV(REG_PV, rd->argintregs[0]);
3511                         M_MOV(REG_SP, rd->argintregs[1]);
3512
3513                         if (m->isleafmethod)
3514                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3515                         else
3516                                 M_ALD(rd->argintregs[2],
3517                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3518
3519                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3520
3521                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3522                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3523
3524                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3525                         M_ALD(REG_ITMP1, REG_PV, disp);
3526                         M_MTCTR(REG_ITMP1);
3527                         M_JSR;
3528                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3529
3530                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3531                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3532
3533                         if (m->isleafmethod) {
3534                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3535                                 M_MTLR(REG_ZERO);
3536                         }
3537
3538                         disp = dseg_addaddress(cd, asm_handle_exception);
3539                         M_ALD(REG_ITMP3, REG_PV, disp);
3540                         M_MTCTR(REG_ITMP3);
3541                         M_RTS;
3542                 }
3543         }
3544
3545         /* generate NullPointerException stubs */
3546
3547         xcodeptr = NULL;
3548
3549         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3550                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3551                                   bref->branchpos,
3552                                                   (u1 *) mcodeptr - cd->mcodebase);
3553
3554                 MCODECHECK(100);
3555
3556                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3557
3558                 if (xcodeptr != NULL) {
3559                         disp = xcodeptr - mcodeptr - 1;
3560                         M_BR(disp);
3561
3562                 } else {
3563                         xcodeptr = mcodeptr;
3564
3565                         if (m->isleafmethod) {
3566                                 M_MFLR(REG_ZERO);
3567                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3568                         }
3569
3570                         M_MOV(REG_PV, rd->argintregs[0]);
3571                         M_MOV(REG_SP, rd->argintregs[1]);
3572
3573                         if (m->isleafmethod)
3574                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3575                         else
3576                                 M_ALD(rd->argintregs[2],
3577                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3578
3579                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3580
3581                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3582                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3583
3584                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3585                         M_ALD(REG_ITMP1, REG_PV, disp);
3586                         M_MTCTR(REG_ITMP1);
3587                         M_JSR;
3588                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3589
3590                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3591                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3592
3593                         if (m->isleafmethod) {
3594                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3595                                 M_MTLR(REG_ZERO);
3596                         }
3597
3598                         disp = dseg_addaddress(cd, asm_handle_exception);
3599                         M_ALD(REG_ITMP3, REG_PV, disp);
3600                         M_MTCTR(REG_ITMP3);
3601                         M_RTS;
3602                 }
3603         }
3604
3605         /* generate exception check stubs */
3606
3607         xcodeptr = NULL;
3608
3609         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3610                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3611                                   bref->branchpos,
3612                                                   (u1 *) mcodeptr - cd->mcodebase);
3613
3614                 MCODECHECK(100);
3615
3616                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3617
3618                 if (xcodeptr != NULL) {
3619                         disp = xcodeptr - mcodeptr - 1;
3620                         M_BR(disp);
3621
3622                 } else {
3623                         xcodeptr = mcodeptr;
3624
3625                         M_MOV(REG_PV, rd->argintregs[0]);
3626                         M_MOV(REG_SP, rd->argintregs[1]);
3627                         M_ALD(rd->argintregs[2],
3628                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3629                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3630
3631                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3632                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3633
3634                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
3635                         M_ALD(REG_ITMP1, REG_PV, disp);
3636                         M_MTCTR(REG_ITMP1);
3637                         M_JSR;
3638                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3639
3640                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3641                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3642
3643                         disp = dseg_addaddress(cd, asm_handle_exception);
3644                         M_ALD(REG_ITMP3, REG_PV, disp);
3645                         M_MTCTR(REG_ITMP3);
3646                         M_RTS;
3647                 }
3648         }
3649
3650         /* generate patcher stub call code */
3651
3652         {
3653                 patchref *pref;
3654                 u4        mcode;
3655                 s4       *tmpmcodeptr;
3656
3657                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3658                         /* check code segment size */
3659
3660                         MCODECHECK(16);
3661
3662                         /* Get machine code which is patched back in later. The call is   */
3663                         /* 1 instruction word long.                                       */
3664
3665                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
3666                         mcode = *xcodeptr;
3667
3668                         /* patch in the call to call the following code (done at compile  */
3669                         /* time)                                                          */
3670
3671                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3672                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3673
3674                         M_BR(tmpmcodeptr - (xcodeptr + 1));
3675
3676                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3677
3678                         /* create stack frame - keep stack 16-byte aligned */
3679
3680                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3681
3682                         /* calculate return address and move it onto the stack */
3683
3684                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3685                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3686
3687                         /* move pointer to java_objectheader onto stack */
3688
3689 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3690                         /* order reversed because of data segment layout */
3691
3692                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
3693                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
3694
3695                         M_LDA(REG_ITMP3, REG_PV, disp);
3696                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3697 #else
3698                         /* do nothing */
3699 #endif
3700
3701                         /* move machine code onto stack */
3702
3703                         disp = dseg_adds4(cd, mcode);
3704                         M_ILD(REG_ITMP3, REG_PV, disp);
3705                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3706
3707                         /* move class/method/field reference onto stack */
3708
3709                         disp = dseg_addaddress(cd, pref->ref);
3710                         M_ALD(REG_ITMP3, REG_PV, disp);
3711                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3712
3713                         /* move data segment displacement onto stack */
3714
3715                         disp = dseg_addaddress(cd, pref->disp);
3716                         M_ILD(REG_ITMP3, REG_PV, disp);
3717                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3718
3719                         /* move patcher function pointer onto stack */
3720
3721                         disp = dseg_addaddress(cd, pref->patcher);
3722                         M_ALD(REG_ITMP3, REG_PV, disp);
3723                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3724
3725                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
3726                         M_ALD(REG_ITMP3, REG_PV, disp);
3727                         M_MTCTR(REG_ITMP3);
3728                         M_RTS;
3729                 }
3730         }
3731
3732         }
3733
3734         codegen_finish(m, cd, (ptrint) ((u1 *) mcodeptr - cd->mcodebase));
3735
3736         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
3737
3738         /* everything's ok */
3739
3740         return true;
3741 }
3742
3743
3744 /* createcompilerstub **********************************************************
3745
3746    Creates a stub routine which calls the compiler.
3747
3748 *******************************************************************************/
3749
3750 #define COMPSTUBSIZE 6
3751
3752 u1 *createcompilerstub(methodinfo *m)
3753 {
3754         s4 *s = CNEW(s4, COMPSTUBSIZE);     /* memory to hold the stub            */
3755         s4 *mcodeptr = s;                   /* code generation pointer            */
3756
3757         M_LDA(REG_ITMP1, REG_PV, 4 * 4);
3758         M_ALD_INTERN(REG_PV, REG_PV, 5 * 4);
3759         M_MTCTR(REG_PV);
3760         M_RTS;
3761
3762         s[4] = (s4) m;                      /* literals to be adressed            */
3763         s[5] = (s4) asm_call_jit_compiler;  /* jump directly via PV from above    */
3764
3765         asm_cacheflush((void *) s, (u1 *) mcodeptr - (u1 *) s);
3766
3767 #if defined(STATISTICS)
3768         if (opt_stat)
3769                 count_cstub_len += COMPSTUBSIZE * 4;
3770 #endif
3771
3772         return (u1 *) s;
3773 }
3774
3775
3776 /* createnativestub ************************************************************
3777
3778    Creates a stub routine which calls a native method.
3779
3780 *******************************************************************************/
3781
3782 u1 *createnativestub(functionptr f, methodinfo *m, codegendata *cd,
3783                                          registerdata *rd, methoddesc *nmd)
3784 {
3785         s4         *mcodeptr;               /* code generation pointer            */
3786         s4          stackframesize;         /* size of stackframe if needed       */
3787         methoddesc *md;
3788         s4          nativeparams;
3789         s4          i, j;                   /* count variables                    */
3790         s4          t;
3791         s4          s1, s2, disp;
3792         s4          funcdisp;
3793
3794         /* set some variables */
3795
3796         md = m->parseddesc;
3797         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3798
3799         /* calculate stackframe size */
3800
3801         stackframesize =
3802                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3803                 sizeof(localref_table) / SIZEOF_VOID_P +
3804                 4 +                             /* 4 stackframeinfo arguments (darwin)*/
3805                 nmd->paramcount * 2 +           /* assume all arguments are doubles   */
3806                 nmd->memuse;
3807
3808         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3809
3810
3811         /* create method header */
3812
3813         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
3814         (void) dseg_adds4(cd, stackframesize * 4);              /* FrameSize      */
3815         (void) dseg_adds4(cd, 0);                               /* IsSync         */
3816         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
3817         (void) dseg_adds4(cd, 0);                               /* IntSave        */
3818         (void) dseg_adds4(cd, 0);                               /* FltSave        */
3819         (void) dseg_addlinenumbertablesize(cd);
3820         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
3821
3822
3823         /* initialize mcode variables */
3824
3825         mcodeptr = (s4 *) cd->mcodebase;
3826         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
3827
3828
3829         /* generate code */
3830
3831         M_MFLR(REG_ZERO);
3832         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3833         M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3834
3835
3836         if (runverbose) {
3837                 /* parent_argbase == stackframesize * 4 */
3838                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, stackframesize * 4 ,
3839                                                                           true);
3840         }
3841
3842
3843         /* get function address (this must happen before the stackframeinfo) */
3844
3845         funcdisp = dseg_addaddress(cd, f);
3846
3847 #if !defined(ENABLE_STATICVM)
3848         if (f == NULL) {
3849                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
3850
3851                 if (opt_showdisassemble)
3852                         M_NOP;
3853         }
3854 #endif
3855
3856         /* save integer and float argument registers */
3857
3858         for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++) {
3859                 t = md->paramtypes[i].type;
3860
3861                 if (IS_INT_LNG_TYPE(t)) {
3862                         s1 = md->params[i].regoff;
3863                         if (IS_2_WORD_TYPE(t)) {
3864                                 M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3865                                 j++;
3866                                 M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3867                                 j++;
3868                         } else {
3869                                 M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3870                                 j++;
3871                         }
3872                 }
3873         }
3874
3875         for (i = 0; i < md->paramcount && j < FLT_ARG_CNT; i++) {
3876                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3877                         s1 = md->params[i].regoff;
3878                         M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3879                         j++;
3880                 }
3881         }
3882
3883         /* create native stack info */
3884
3885         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3886         M_MOV(REG_PV, rd->argintregs[1]);
3887         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3888         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3889         disp = dseg_addaddress(cd, codegen_start_native_call);
3890         M_ALD(REG_ITMP1, REG_PV, disp);
3891         M_MTCTR(REG_ITMP1);
3892         M_JSR;
3893
3894         /* restore integer and float argument registers */
3895
3896         for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++) {
3897                 t = md->paramtypes[i].type;
3898
3899                 if (IS_INT_LNG_TYPE(t)) {
3900                         s1 = md->params[i].regoff;
3901
3902                         if (IS_2_WORD_TYPE(t)) {
3903                                 M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3904                                 j++;
3905                                 M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3906                                 j++;
3907                         } else {
3908                                 M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3909                                 j++;
3910                         }
3911                 }
3912         }
3913
3914         for (i = 0; i < md->paramcount && j < FLT_ARG_CNT; i++) {
3915                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3916                         s1 = md->params[i].regoff;
3917                         M_DLD(rd->argfltregs[i], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3918                         j++;
3919                 }
3920         }
3921
3922         /* copy or spill arguments to new locations */
3923
3924         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3925                 t = md->paramtypes[i].type;
3926
3927                 if (IS_INT_LNG_TYPE(t)) {
3928                         if (!md->params[i].inmemory) {
3929                                 if (IS_2_WORD_TYPE(t))
3930                                         s1 = PACK_REGS(
3931                                                 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3932                                             rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3933                                 else
3934                                         s1 = rd->argintregs[md->params[i].regoff];
3935
3936                                 if (!nmd->params[j].inmemory) {
3937                                         if (IS_2_WORD_TYPE(t))
3938                                                 s2 = PACK_REGS(
3939                                                    rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3940                                                    rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3941                                         else
3942                                                 s2 = rd->argintregs[nmd->params[j].regoff];
3943                                         M_TINTMOVE(t, s1, s2);
3944
3945                                 } else {
3946                                         s2 = nmd->params[j].regoff;
3947                                         if (IS_2_WORD_TYPE(t)) {
3948                                                 M_IST(GET_HIGH_REG(s1), REG_SP, s2 * 4);
3949                                                 M_IST(GET_LOW_REG(s1), REG_SP, s2 * 4 + 4);
3950                                         } else {
3951                                                 M_IST(s1, REG_SP, s2 * 4);
3952                                         }
3953                                 }
3954
3955                         } else {
3956                                 s1 = md->params[i].regoff + stackframesize;
3957                                 s2 = nmd->params[j].regoff;
3958
3959                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3960                                 if (IS_2_WORD_TYPE(t)) {
3961                                         M_ILD(REG_ITMP2, REG_SP, s1 * 4 + 4);
3962                                 }
3963                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3964                                 if (IS_2_WORD_TYPE(t)) {
3965                                         M_IST(REG_ITMP2, REG_SP, s2 * 4 + 4);
3966                                 }
3967                         }
3968
3969                 } else {
3970                         /* We only copy spilled float arguments, as the float argument    */
3971                         /* registers keep unchanged.                                      */
3972
3973                         if (md->params[i].inmemory) {
3974                                 s1 = md->params[i].regoff + stackframesize;
3975                                 s2 = nmd->params[j].regoff;
3976
3977                                 if (IS_2_WORD_TYPE(t)) {
3978                                         M_DLD(REG_FTMP1, REG_SP, s1 * 4);
3979                                         M_DST(REG_FTMP1, REG_SP, s2 * 4);
3980
3981                                 } else {
3982                                         M_FLD(REG_FTMP1, REG_SP, s1 * 4);
3983                                         M_FST(REG_FTMP1, REG_SP, s2 * 4);
3984                                 }
3985                         }
3986                 }
3987         }
3988
3989         /* put class into second argument register */
3990
3991         if (m->flags & ACC_STATIC) {
3992                 disp = dseg_addaddress(cd, m->class);
3993                 M_ALD(rd->argintregs[1], REG_PV, disp);
3994         }
3995
3996         /* put env into first argument register */
3997
3998         disp = dseg_addaddress(cd, &env);
3999         M_ALD(rd->argintregs[0], REG_PV, disp);
4000
4001         /* generate the actual native call */
4002
4003         M_ALD(REG_ITMP3, REG_PV, funcdisp);
4004         M_MTCTR(REG_ITMP3);
4005         M_JSR;
4006
4007         /* save return value */
4008
4009         if (md->returntype.type != TYPE_VOID) {
4010                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4011                         if (IS_2_WORD_TYPE(md->returntype.type))
4012                                 M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4013                         M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4014                 } else {
4015                         if (IS_2_WORD_TYPE(md->returntype.type))
4016                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4017                         else
4018                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4019                 }
4020         }
4021
4022         /* remove native stackframe info */
4023
4024         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
4025         disp = dseg_addaddress(cd, codegen_finish_native_call);
4026         M_ALD(REG_ITMP1, REG_PV, disp);
4027         M_MTCTR(REG_ITMP1);
4028         M_JSR;
4029
4030         /* print call trace */
4031
4032         if (runverbose) {
4033                  /* just restore the value we need, don't care about the other */
4034
4035                 if (md->returntype.type != TYPE_VOID) {
4036                         if (IS_INT_LNG_TYPE(md->returntype.type)) {
4037                                 if (IS_2_WORD_TYPE(md->returntype.type))
4038                                         M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4039                                 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4040                         } else {
4041                                 if (IS_2_WORD_TYPE(md->returntype.type))
4042                                         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4043                                 else
4044                                         M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4045                         }
4046                 }
4047
4048                 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
4049
4050                 /* keep this order */
4051                 switch (md->returntype.type) {
4052                 case TYPE_INT:
4053                 case TYPE_ADR:
4054 #if defined(__DARWIN__)
4055                         M_MOV(REG_RESULT, rd->argintregs[2]);
4056                         M_CLR(rd->argintregs[1]);
4057 #else
4058                         M_MOV(REG_RESULT, rd->argintregs[3]);
4059                         M_CLR(rd->argintregs[2]);
4060 #endif
4061                         break;
4062
4063                 case TYPE_LNG:
4064 #if defined(__DARWIN__)
4065                         M_MOV(REG_RESULT2, rd->argintregs[2]);
4066                         M_MOV(REG_RESULT, rd->argintregs[1]);
4067 #else
4068                         M_MOV(REG_RESULT2, rd->argintregs[3]);
4069                         M_MOV(REG_RESULT, rd->argintregs[2]);
4070 #endif
4071                         break;
4072                 }
4073
4074                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
4075                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
4076                 disp = dseg_addaddress(cd, m);
4077                 M_ALD(rd->argintregs[0], REG_PV, disp);
4078
4079                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4080                 M_ALD(REG_ITMP2, REG_PV, disp);
4081                 M_MTCTR(REG_ITMP2);
4082                 M_JSR;
4083
4084                 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4085         }
4086
4087         /* check for exception */
4088
4089 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4090         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4091         M_ALD(REG_ITMP1, REG_PV, disp);
4092         M_MTCTR(REG_ITMP1);
4093         M_JSR;
4094         M_MOV(REG_RESULT, REG_ITMP2);
4095 #else
4096         disp = dseg_addaddress(cd, &_no_threads_exceptionptr);
4097         M_ALD(REG_ITMP2, REG_PV, disp);
4098 #endif
4099         M_ALD(REG_ITMP1_XPTR, REG_ITMP2, 0);/* load exception into reg. itmp1     */
4100
4101         /* restore return value */
4102
4103         if (md->returntype.type != TYPE_VOID) {
4104                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4105                         if (IS_2_WORD_TYPE(md->returntype.type))
4106                                 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4107                         M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4108                 } else {
4109                         if (IS_2_WORD_TYPE(md->returntype.type))
4110                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4111                         else
4112                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4113                 }
4114         }
4115
4116         M_TST(REG_ITMP1_XPTR);
4117         M_BNE(4);                           /* if no exception then return        */
4118
4119         M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4120         M_MTLR(REG_ZERO);
4121         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4122         M_RET;
4123
4124         /* handle exception */
4125
4126         M_CLR(REG_ITMP3);
4127         M_AST(REG_ITMP3, REG_ITMP2, 0);     /* store NULL into exceptionptr       */
4128
4129         M_ALD(REG_ITMP2, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4130         M_MTLR(REG_ITMP2);
4131
4132         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4133
4134         M_IADD_IMM(REG_ITMP2, -4, REG_ITMP2_XPC);  /* fault address               */
4135
4136         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4137         M_ALD(REG_ITMP3, REG_PV, disp);
4138         M_MTCTR(REG_ITMP3);
4139         M_RTS;
4140
4141         /* generate patcher stub call code */
4142
4143         {
4144                 patchref *pref;
4145                 s4       *xcodeptr;
4146                 s4        mcode;
4147                 s4       *tmpmcodeptr;
4148
4149                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4150                         /* Get machine code which is patched back in later. The call is   */
4151                         /* 1 instruction word long.                                       */
4152
4153                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4154                         mcode = (u4) *xcodeptr;
4155
4156                         /* patch in the call to call the following code (done at compile  */
4157                         /* time)                                                          */
4158
4159                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4160                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4161
4162                         M_BL(tmpmcodeptr - (xcodeptr + 1));
4163
4164                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4165
4166                         /* create stack frame - keep stack 16-byte aligned                */
4167
4168                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4169
4170                         /* move return address onto stack */
4171
4172                         M_MFLR(REG_ZERO);
4173                         M_AST(REG_ZERO, REG_SP, 5 * 4);
4174
4175                         /* move pointer to java_objectheader onto stack */
4176
4177 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4178                         /* order reversed because of data segment layout */
4179
4180                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4181                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4182
4183                         M_LDA(REG_ITMP3, REG_PV, disp);
4184                         M_AST(REG_ITMP3, REG_SP, 4 * 4);
4185 #else
4186                         /* do nothing */
4187 #endif
4188
4189                         /* move machine code onto stack */
4190
4191                         disp = dseg_adds4(cd, mcode);
4192                         M_ILD(REG_ITMP3, REG_PV, disp);
4193                         M_IST(REG_ITMP3, REG_SP, 3 * 4);
4194
4195                         /* move class/method/field reference onto stack */
4196
4197                         disp = dseg_addaddress(cd, pref->ref);
4198                         M_ALD(REG_ITMP3, REG_PV, disp);
4199                         M_AST(REG_ITMP3, REG_SP, 2 * 4);
4200
4201                         /* move data segment displacement onto stack */
4202
4203                         disp = dseg_addaddress(cd, pref->disp);
4204                         M_ILD(REG_ITMP3, REG_PV, disp);
4205                         M_IST(REG_ITMP3, REG_SP, 1 * 4);
4206
4207                         /* move patcher function pointer onto stack */
4208
4209                         disp = dseg_addaddress(cd, pref->patcher);
4210                         M_ALD(REG_ITMP3, REG_PV, disp);
4211                         M_AST(REG_ITMP3, REG_SP, 0 * 4);
4212
4213                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4214                         M_ALD(REG_ITMP3, REG_PV, disp);
4215                         M_MTCTR(REG_ITMP3);
4216                         M_RTS;
4217                 }
4218         }
4219
4220         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4221
4222         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
4223
4224         return m->entrypoint;
4225 }
4226
4227
4228 s4 *codegen_trace_args(methodinfo *m, codegendata *cd, registerdata *rd,
4229                                            s4 *mcodeptr, s4 parentargs_base, bool nativestub)
4230 {
4231         s4 s1, p, t, d;
4232         int stack_off;
4233         int stack_size;
4234         methoddesc *md;
4235
4236         md = m->parseddesc;
4237
4238         if (!nativestub)
4239                 M_MFLR(REG_ITMP3);
4240         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4241         /* For Darwin:                                                        */
4242         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
4243         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
4244         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
4245         /* For Linux:                                                         */
4246         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
4247         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4248         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
4249         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
4250
4251         /* in nativestubs no Place to save the LR (Link Register) would be needed */
4252         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
4253         /* be padded again */
4254
4255 #if defined(__DARWIN__)
4256         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4257 #else
4258         stack_size = 6 * 16;
4259 #endif
4260         M_LDA(REG_SP, REG_SP, -stack_size);
4261
4262         /* Save LR */
4263         if (!nativestub)
4264                 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4265
4266         M_CLR(REG_ITMP1);    /* clear help register */
4267
4268         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4269 #if defined(__DARWIN__)
4270         /* Copy Params starting from first to Stack                          */
4271         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */
4272         /* are saved                                                         */
4273         p = 0;
4274 #else
4275         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
4276         /* integer argument regs                                             */
4277         /* all integer argument registers have to be saved                   */
4278         for (p = 0; p < 8; p++) {
4279                 d = rd->argintregs[p];
4280                 /* save integer argument registers */
4281                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4282         }
4283         p = 4;
4284 #endif
4285         stack_off = LA_SIZE;
4286         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4287                 t = md->paramtypes[p].type;
4288                 if (IS_INT_LNG_TYPE(t)) {
4289                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4290                                 if (IS_2_WORD_TYPE(t)) {
4291                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4292                                                   , REG_SP, stack_off);
4293                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4294                                                   , REG_SP, stack_off + 4);
4295                                 } else {
4296                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4297                                         M_IST(rd->argintregs[md->params[p].regoff]
4298                                                   , REG_SP, stack_off + 4);
4299                                 }
4300                         } else { /* Param on Stack */
4301                                 s1 = (md->params[p].regoff + parentargs_base) * 4
4302                                         + stack_size;
4303                                 if (IS_2_WORD_TYPE(t)) {
4304                                         M_ILD(REG_ITMP2, REG_SP, s1);
4305                                         M_IST(REG_ITMP2, REG_SP, stack_off);
4306                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4307                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4308                                 } else {
4309                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4310                                         M_ILD(REG_ITMP2, REG_SP, s1);
4311                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4312                                 }
4313                         }
4314                 } else { /* IS_FLT_DBL_TYPE(t) */
4315                         if (!md->params[p].inmemory) { /* in Arg Reg */
4316                                 s1 = rd->argfltregs[md->params[p].regoff];
4317                                 if (!IS_2_WORD_TYPE(t)) {
4318                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4319                                         M_FST(s1, REG_SP, stack_off + 4);
4320                                 } else {
4321                                         M_DST(s1, REG_SP, stack_off);
4322                                 }
4323                         } else { /* on Stack */
4324                                 /* this should not happen */
4325                         }
4326                 }
4327         }
4328
4329         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4330 #if defined(__DARWIN__)
4331         for (p = 0; p < 8; p++) {
4332                 d = rd->argintregs[p];
4333                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4334         }
4335 #else
4336         /* LINUX */
4337         /* Set integer and float argument registers vor trace_args call */
4338         /* offset to saved integer argument registers                   */
4339         stack_off = LA_SIZE + 4 * 8 + 4;
4340         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4341                 t = md->paramtypes[p].type;
4342                 if (IS_INT_LNG_TYPE(t)) {
4343                         /* "stretch" int types */
4344                         if (!IS_2_WORD_TYPE(t)) {
4345                                 M_CLR(rd->argintregs[2 * p]);
4346                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4347                                 stack_off += 4;
4348                         } else {
4349                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4350                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4351                                 stack_off += 8;
4352                         }
4353                 } else { /* Float/Dbl */
4354                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4355                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
4356                                 /* float/double arg reg to int reg                    */
4357                                 s1 = rd->argfltregs[md->params[p].regoff];
4358                                 if (!IS_2_WORD_TYPE(t)) {
4359                                         M_FST(s1, REG_SP, 5 * 16);
4360                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4361                                         M_CLR(rd->argintregs[2 * p]);
4362                                 } else {
4363                                         M_DST(s1, REG_SP, 5 * 16);
4364                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
4365                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4366                                 }
4367                         }
4368                 }
4369         }
4370 #endif
4371
4372         /* put methodinfo pointer on Stackframe */
4373         p = dseg_addaddress(cd, m);
4374         M_ALD(REG_ITMP1, REG_PV, p);
4375 #if defined(__DARWIN__)
4376         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
4377 #else
4378         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4379 #endif
4380         p = dseg_addaddress(cd, builtin_trace_args);
4381         M_ALD(REG_ITMP2, REG_PV, p);
4382         M_MTCTR(REG_ITMP2);
4383         M_JSR;
4384
4385 #if defined(__DARWIN__)
4386         /* restore integer argument registers from the reserved stack space */
4387
4388         stack_off = LA_SIZE;
4389         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
4390                  p++, stack_off += 8) {
4391                 t = md->paramtypes[p].type;
4392
4393                 if (IS_INT_LNG_TYPE(t)) {
4394                         if (!md->params[p].inmemory) {
4395                                 if (IS_2_WORD_TYPE(t)) {
4396                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4397                                                   , REG_SP, stack_off);
4398                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4399                                                   , REG_SP, stack_off + 4);
4400                                 } else {
4401                                         M_ILD(rd->argintregs[md->params[p].regoff]
4402                                                   , REG_SP, stack_off + 4);
4403                                 }
4404                         }
4405                 }
4406         }
4407 #else
4408         /* LINUX */
4409         for (p = 0; p < 8; p++) {
4410                 d = rd->argintregs[p];
4411                 /* save integer argument registers */
4412                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4413         }
4414 #endif
4415
4416         if (!nativestub)
4417                 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4418
4419         M_LDA(REG_SP, REG_SP, stack_size);
4420         if (!nativestub)
4421                 M_MTLR(REG_ITMP3);
4422         return mcodeptr;
4423 }
4424
4425 /*
4426  * These are local overrides for various environment variables in Emacs.
4427  * Please do not remove this and leave it at the end of the file, where
4428  * Emacs will automagically detect them.
4429  * ---------------------------------------------------------------------
4430  * Local variables:
4431  * mode: c
4432  * indent-tabs-mode: t
4433  * c-basic-offset: 4
4434  * tab-width: 4
4435  * End:
4436  */