src/vm/jit/powerpc/codegen.c

   1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32
  33    $Id: codegen.c 3665 2005-11-11 14:42:26Z twisti $
  34
  35 */
  36
  37
  38 #include <assert.h>
  39 #include <stdio.h>
  40 #include <signal.h>
  41
  42 #include "config.h"
  43 #include "vm/types.h"
  44
  45 #include "md-abi.h"
  46 #include "md-abi.inc"
  47
  48 #include "vm/jit/powerpc/arch.h"
  49 #include "vm/jit/powerpc/codegen.h"
  50
  51 #include "cacao/cacao.h"
  52 #include "native/native.h"
  53 #include "vm/builtin.h"
  54 #include "vm/global.h"
  55 #include "vm/loader.h"
  56 #include "vm/stringlocal.h"
  57 #include "vm/tables.h"
  58 #include "vm/jit/asmpart.h"
  59 #include "vm/jit/codegen.inc"
  60 #include "vm/jit/jit.h"
  61
  62 #if defined(LSRA)
  63 # include "vm/jit/lsra.inc"
  64 #endif
  65
  66 #include "vm/jit/parse.h"
  67 #include "vm/jit/patcher.h"
  68 #include "vm/jit/reg.h"
  69 #include "vm/jit/reg.inc"
  70
  71
  72 s4 *codegen_trace_args( methodinfo *m, codegendata *cd, registerdata *rd,
  73                                                 s4 *mcodeptr, s4 parentargs_base, bool nativestub);
  74
  75 /* codegen *********************************************************************
  76
  77    Generates machine code.
  78
  79 *******************************************************************************/
  80
  81 bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  82 {
  83         s4                  len, s1, s2, s3, d, disp;
  84         ptrint              a;
  85         s4                  parentargs_base;
  86         s4                 *mcodeptr;
  87         stackptr            src;
  88         varinfo            *var;
  89         basicblock         *bptr;
  90         instruction        *iptr;
  91         exceptiontable     *ex;
  92         u2                  currentline;
  93         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  94         builtintable_entry *bte;
  95         methoddesc         *md;
  96
  97         /* prevent compiler warnings */
  98
  99         d = 0;
 100         lm = NULL;
 101         bte = NULL;
 102
 103         {
 104         s4 i, p, t, l;
 105         s4 savedregs_num;
 106
 107         savedregs_num = 0;
 108
 109         /* space to save used callee saved registers */
 110
 111         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 112         savedregs_num += 2 * (FLT_SAV_CNT - rd->savfltreguse);
 113
 114         parentargs_base = rd->memuse + savedregs_num;
 115
 116 #if defined(USE_THREADS)
 117         /* space to save argument of monitor_enter and Return Values to survive */
 118     /* monitor_exit. The stack position for the argument can not be shared  */
 119         /* with place to save the return register on PPC, since both values     */
 120         /* reside in R3 */
 121         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 122                 /* reserve 2 slots for long/double return values for monitorexit */
 123
 124                 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
 125                         parentargs_base += 3;
 126                 else
 127                         parentargs_base += 2;
 128         }
 129
 130 #endif
 131
 132         /* create method header */
 133
 134         parentargs_base = (parentargs_base + 3) & ~3;
 135
 136         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 137         (void) dseg_adds4(cd, parentargs_base * 4);             /* FrameSize      */
 138
 139 #if defined(USE_THREADS)
 140         /* IsSync contains the offset relative to the stack pointer for the
 141            argument of monitor_exit used in the exception handler. Since the
 142            offset could be zero and give a wrong meaning of the flag it is
 143            offset by one.
 144         */
 145
 146         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 147                 (void) dseg_adds4(cd, (rd->memuse + 1) * 4);        /* IsSync         */
 148         else
 149 #endif
 150                 (void) dseg_adds4(cd, 0);                           /* IsSync         */
 151
 152         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 153         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);  /* IntSave        */
 154         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);  /* FltSave        */
 155
 156         dseg_addlinenumbertablesize(cd);
 157
 158         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 159
 160         /* create exception table */
 161
 162         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 163                 dseg_addtarget(cd, ex->start);
 164                 dseg_addtarget(cd, ex->end);
 165                 dseg_addtarget(cd, ex->handler);
 166                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 167         }
 168
 169         /* initialize mcode variables */
 170
 171         mcodeptr = (s4 *) cd->mcodebase;
 172         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 173         MCODECHECK(128 + m->paramcount);
 174
 175         /* create stack frame (if necessary) */
 176
 177         if (!m->isleafmethod) {
 178                 M_MFLR(REG_ZERO);
 179                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 180         }
 181
 182         if (parentargs_base) {
 183                 M_STWU(REG_SP, REG_SP, -parentargs_base * 4);
 184         }
 185
 186         /* save return address and used callee saved registers */
 187
 188         p = parentargs_base;
 189         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 190                 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
 191         }
 192         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 193                 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
 194         }
 195
 196         /* take arguments out of register or stack frame */
 197
 198         md = m->parseddesc;
 199
 200         for (p = 0, l = 0; p < md->paramcount; p++) {
 201                 t = md->paramtypes[p].type;
 202                 var = &(rd->locals[l][t]);
 203                 l++;
 204                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 205                         l++;
 206                 if (var->type < 0)
 207                         continue;
 208                 s1 = md->params[p].regoff;
 209                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 210                         if (IS_2_WORD_TYPE(t))
 211                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
 212                                                            rd->argintregs[GET_HIGH_REG(s1)]);
 213                         else
 214                                 s2 = rd->argintregs[s1];
 215                         if (!md->params[p].inmemory) {           /* register arguments    */
 216                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 217                                         M_TINTMOVE(t, s2, var->regoff);
 218
 219                                 } else {                             /* reg arg -> spilled    */
 220                                         if (IS_2_WORD_TYPE(t)) {
 221                                                 M_IST(GET_HIGH_REG(s2), REG_SP, var->regoff * 4);
 222                                                 M_IST(GET_LOW_REG(s2), REG_SP, var->regoff * 4 + 4);
 223                                         } else {
 224                                                 M_IST(s2, REG_SP, var->regoff * 4);
 225                                         }
 226                                 }
 227
 228                         } else {                                 /* stack arguments       */
 229                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 230                                         if (IS_2_WORD_TYPE(t)) {
 231                                                 M_ILD(GET_HIGH_REG(var->regoff), REG_SP,
 232                                                           (parentargs_base + s1) * 4);
 233                                                 M_ILD(GET_LOW_REG(var->regoff), REG_SP,
 234                                                           (parentargs_base + s1) * 4 + 4);
 235                                         } else {
 236                                                 M_ILD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 237                                         }
 238
 239                                 } else {                             /* stack arg -> spilled  */
 240 #if 1
 241                                         M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4);
 242                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
 243                                         if (IS_2_WORD_TYPE(t)) {
 244                                                 M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4 +4);
 245                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
 246                                         }
 247 #else
 248                                         /* Reuse Memory Position on Caller Stack */
 249                                         var->regoff = parentargs_base + s1;
 250 #endif
 251                                 }
 252                         }
 253
 254                 } else {                                     /* floating args         */
 255                         if (!md->params[p].inmemory) {           /* register arguments    */
 256                                 s2 = rd->argfltregs[s1];
 257                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 258                                         M_FLTMOVE(s2, var->regoff);
 259
 260                                 } else {                                         /* reg arg -> spilled    */
 261                                         if (IS_2_WORD_TYPE(t))
 262                                                 M_DST(s2, REG_SP, var->regoff * 4);
 263                                         else
 264                                                 M_FST(s2, REG_SP, var->regoff * 4);
 265                                 }
 266
 267                         } else {                                 /* stack arguments       */
 268                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 269                                         if (IS_2_WORD_TYPE(t))
 270                                                 M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 271
 272                                         else
 273                                                 M_FLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 274
 275                                 } else {                             /* stack-arg -> spilled  */
 276 #if 1
 277                                         if (IS_2_WORD_TYPE(t)) {
 278                                                 M_DLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 279                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
 280                                                 var->regoff = parentargs_base + s1;
 281
 282                                         } else {
 283                                                 M_FLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 284                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
 285                                         }
 286 #else
 287                                         /* Reuse Memory Position on Caller Stack */
 288                                         var->regoff = parentargs_base + s1;
 289 #endif
 290                                 }
 291                         }
 292                 }
 293         } /* end for */
 294
 295         /* save monitorenter argument */
 296
 297 #if defined(USE_THREADS)
 298         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 299                 /* stack offset for monitor argument */
 300
 301                 s1 = rd->memuse;
 302
 303 #if 0
 304                 if (runverbose) {
 305                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT * 4 + FLT_ARG_CNT * 8));
 306
 307                         for (p = 0; p < INT_ARG_CNT; p++)
 308                                 M_IST(rd->argintregs[p], REG_SP, p * 4);
 309
 310                         for (p = 0; p < FLT_ARG_CNT * 2; p += 2)
 311                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 312
 313                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 314                 }
 315 #endif
 316
 317                 /* decide which monitor enter function to call */
 318
 319                 if (m->flags & ACC_STATIC) {
 320                         p = dseg_addaddress(cd, m->class);
 321                         M_ALD(REG_ITMP1, REG_PV, p);
 322                         M_AST(REG_ITMP1, REG_SP, s1 * 4);
 323                         M_MOV(REG_ITMP1, rd->argintregs[0]);
 324                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 325                         M_ALD(REG_ITMP3, REG_PV, p);
 326                         M_MTCTR(REG_ITMP3);
 327                         M_JSR;
 328
 329                 } else {
 330                         M_TST(rd->argintregs[0]);
 331                         M_BEQ(0);
 332                         codegen_addxnullrefs(cd, mcodeptr);
 333                         M_AST(rd->argintregs[0], REG_SP, s1 * 4);
 334                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 335                         M_ALD(REG_ITMP3, REG_PV, p);
 336                         M_MTCTR(REG_ITMP3);
 337                         M_JSR;
 338                 }
 339
 340 #if 0
 341                 if (runverbose) {
 342                         for (p = 0; p < INT_ARG_CNT; p++)
 343                                 M_ILD(rd->argintregs[p], REG_SP, p * 4);
 344
 345                         for (p = 0; p < FLT_ARG_CNT; p++)
 346                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 347
 348
 349                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 350                 }
 351 #endif
 352         }
 353 #endif
 354
 355         /* call trace function */
 356
 357         if (runverbose) {
 358                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, parentargs_base, false);
 359
 360         } /* if (runverbose) */
 361         }
 362
 363         /* end of header generation */
 364
 365         /* walk through all basic blocks */
 366         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 367
 368                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 369
 370                 if (bptr->flags >= BBREACHED) {
 371
 372                 /* branch resolving */
 373
 374                 {
 375                 branchref *brefs;
 376                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 377                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 378                                           brefs->branchpos,
 379                                                           bptr->mpc);
 380                         }
 381                 }
 382
 383                 /* copy interface registers to their destination */
 384
 385                 src = bptr->instack;
 386                 len = bptr->indepth;
 387                 MCODECHECK(64+len);
 388
 389 #ifdef LSRA
 390                 if (opt_lsra) {
 391                         while (src != NULL) {
 392                                 len--;
 393                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 394                                         /* d = reg_of_var(m, src, REG_ITMP1); */
 395                                         if (!(src->flags & INMEMORY))
 396                                                 d= src->regoff;
 397                                         else
 398                                                 d=REG_ITMP1;
 399                                         M_INTMOVE(REG_ITMP1, d);
 400                                         store_reg_to_var_int(src, d);
 401                                 }
 402                                 src = src->prev;
 403                         }
 404                 } else {
 405 #endif
 406                 while (src != NULL) {
 407                         len--;
 408                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 409                                 d = reg_of_var(rd, src, REG_ITMP1);
 410                                 M_INTMOVE(REG_ITMP1, d);
 411                                 store_reg_to_var_int(src, d);
 412                         } else {
 413                                 if (src->type == TYPE_LNG)
 414                                         d = reg_of_var(rd, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 415                                 else
 416                                         d = reg_of_var(rd, src, REG_IFTMP);
 417                                 if ((src->varkind != STACKVAR)) {
 418                                         s2 = src->type;
 419                                         if (IS_FLT_DBL_TYPE(s2)) {
 420                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 421                                                         s1 = rd->interfaces[len][s2].regoff;
 422                                                         M_FLTMOVE(s1,d);
 423                                                 } else {
 424                                                         if (IS_2_WORD_TYPE(s2)) {
 425                                                                 M_DLD(d, REG_SP,
 426                                                                           4 * rd->interfaces[len][s2].regoff);
 427                                                         } else {
 428                                                                 M_FLD(d, REG_SP,
 429                                                                           4 * rd->interfaces[len][s2].regoff);
 430                                                         }
 431                                                 }
 432                                                 store_reg_to_var_flt(src, d);
 433                                         } else {
 434                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 435                                                         s1 = rd->interfaces[len][s2].regoff;
 436                                                         M_TINTMOVE(s2,s1,d);
 437                                                 } else {
 438                                                         if (IS_2_WORD_TYPE(s2)) {
 439                                                                 M_ILD(GET_HIGH_REG(d), REG_SP,
 440                                                                           4 * rd->interfaces[len][s2].regoff);
 441                                                                 M_ILD(GET_LOW_REG(d), REG_SP,
 442                                                                           4 * rd->interfaces[len][s2].regoff + 4);
 443                                                         } else {
 444                                                                 M_ILD(d, REG_SP,
 445                                                                           4 * rd->interfaces[len][s2].regoff);
 446                                                         }
 447                                                 }
 448                                                 store_reg_to_var_int(src, d);
 449                                         }
 450                                 }
 451                         }
 452                         src = src->prev;
 453                 }
 454
 455 #ifdef LSRA
 456                 }
 457 #endif
 458                 /* walk through all instructions */
 459
 460                 src = bptr->instack;
 461                 len = bptr->icount;
 462                 currentline = 0;
 463
 464                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 465                         if (iptr->line != currentline) {
 466                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 467                                 currentline = iptr->line;
 468                         }
 469
 470                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 471
 472                         switch (iptr->opc) {
 473                         case ICMD_NOP:    /* ...  ==> ...                                 */
 474                         case ICMD_INLINE_START:
 475                         case ICMD_INLINE_END:
 476                                 break;
 477
 478                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 479
 480                         var_to_reg_int(s1, src, REG_ITMP1);
 481                         M_TST(s1);
 482                         M_BEQ(0);
 483                         codegen_addxnullrefs(cd, mcodeptr);
 484                         break;
 485
 486                 /* constant operations ************************************************/
 487
 488                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 489                                       /* op1 = 0, val.i = constant                    */
 490
 491                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 492                         ICONST(d, iptr->val.i);
 493                         store_reg_to_var_int(iptr->dst, d);
 494                         break;
 495
 496                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 497                                       /* op1 = 0, val.l = constant                    */
 498
 499                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 500                         LCONST(d, iptr->val.l);
 501                         store_reg_to_var_int(iptr->dst, d);
 502                         break;
 503
 504                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 505                                       /* op1 = 0, val.f = constant                    */
 506
 507                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 508                         a = dseg_addfloat(cd, iptr->val.f);
 509                         M_FLD(d, REG_PV, a);
 510                         store_reg_to_var_flt(iptr->dst, d);
 511                         break;
 512
 513                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 514                                       /* op1 = 0, val.d = constant                    */
 515
 516                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 517                         a = dseg_adddouble(cd, iptr->val.d);
 518                         M_DLD(d, REG_PV, a);
 519                         store_reg_to_var_flt(iptr->dst, d);
 520                         break;
 521
 522                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 523                                       /* op1 = 0, val.a = constant                    */
 524
 525                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 526                         disp = dseg_addaddress(cd, iptr->val.a);
 527
 528                         if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
 529                                 codegen_addpatchref(cd, mcodeptr,
 530                                                                         PATCHER_aconst,
 531                                                                         (unresolved_class *) iptr->target, disp);
 532
 533                                 if (opt_showdisassemble)
 534                                         M_NOP;
 535                         }
 536
 537                         M_ALD(d, REG_PV, disp);
 538                         store_reg_to_var_int(iptr->dst, d);
 539                         break;
 540
 541
 542                 /* load/store operations **********************************************/
 543
 544                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 545                 case ICMD_ALOAD:      /* op1 = local variable                         */
 546
 547                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 548                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 549                         if ((iptr->dst->varkind == LOCALVAR) &&
 550                             (iptr->dst->varnum == iptr->op1))
 551                                 break;
 552                         if (var->flags & INMEMORY) {
 553                                 M_ILD(d, REG_SP, var->regoff * 4);
 554                         } else {
 555                                 M_TINTMOVE(var->type, var->regoff, d);
 556                         }
 557                         store_reg_to_var_int(iptr->dst, d);
 558                         break;
 559
 560                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 561                                       /* op1 = local variable                         */
 562
 563                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 564                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 565                         if ((iptr->dst->varkind == LOCALVAR) &&
 566                                 (iptr->dst->varnum == iptr->op1))
 567                                 break;
 568                         if (var->flags & INMEMORY) {
 569                                 M_ILD(GET_HIGH_REG(d), REG_SP, var->regoff * 4);
 570                                 M_ILD(GET_LOW_REG(d), REG_SP, var->regoff * 4 + 4);
 571                         } else {
 572                                 M_TINTMOVE(var->type, var->regoff, d);
 573                         }
 574                         store_reg_to_var_int(iptr->dst, d);
 575                         break;
 576
 577                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 578                 case ICMD_DLOAD:      /* op1 = local variable                         */
 579
 580                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 581                         if ((iptr->dst->varkind == LOCALVAR) &&
 582                                 (iptr->dst->varnum == iptr->op1))
 583                                 break;
 584                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 585                         if (var->flags & INMEMORY)
 586                                 if (IS_2_WORD_TYPE(var->type))
 587                                         M_DLD(d, REG_SP, var->regoff * 4);
 588                                 else
 589                                         M_FLD(d, REG_SP, var->regoff * 4);
 590                         else {
 591                                 M_FLTMOVE(var->regoff, d);
 592                         }
 593                         store_reg_to_var_flt(iptr->dst, d);
 594                         break;
 595
 596
 597                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 598                 case ICMD_ASTORE:     /* op1 = local variable                         */
 599
 600                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 601                                 break;
 602                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 603                         if (var->flags & INMEMORY) {
 604                                 var_to_reg_int(s1, src, REG_ITMP1);
 605                                 M_IST(s1, REG_SP, var->regoff * 4);
 606                         } else {
 607                                 var_to_reg_int(s1, src, var->regoff);
 608                                 M_TINTMOVE(var->type, s1, var->regoff);
 609                         }
 610                         break;
 611
 612                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 613                                       /* op1 = local variable                         */
 614
 615                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 616                                 break;
 617                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 618                         if (var->flags & INMEMORY) {
 619                                 var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 620                                 M_IST(GET_HIGH_REG(s1), REG_SP, var->regoff * 4);
 621                                 M_IST(GET_LOW_REG(s1), REG_SP, var->regoff * 4 + 4);
 622                         } else {
 623                                 var_to_reg_int(s1, src, var->regoff);
 624                                 M_TINTMOVE(var->type, s1, var->regoff);
 625                         }
 626                         break;
 627
 628                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 629                 case ICMD_DSTORE:     /* op1 = local variable                         */
 630
 631                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 632                                 break;
 633                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 634                         if (var->flags & INMEMORY) {
 635                                 var_to_reg_flt(s1, src, REG_FTMP1);
 636                                 if (var->type == TYPE_DBL)
 637                                         M_DST(s1, REG_SP, var->regoff * 4);
 638                                 else
 639                                         M_FST(s1, REG_SP, var->regoff * 4);
 640                         } else {
 641                                 var_to_reg_flt(s1, src, var->regoff);
 642                                 M_FLTMOVE(s1, var->regoff);
 643                         }
 644                         break;
 645
 646
 647                 /* pop/dup/swap operations ********************************************/
 648
 649                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 650
 651                 case ICMD_POP:        /* ..., value  ==> ...                          */
 652                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 653                         break;
 654
 655                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 656                         M_COPY(src, iptr->dst);
 657                         break;
 658
 659                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 660
 661                         M_COPY(src,       iptr->dst);
 662                         M_COPY(src->prev, iptr->dst->prev);
 663                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 664                         break;
 665
 666                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 667
 668                         M_COPY(src,             iptr->dst);
 669                         M_COPY(src->prev,       iptr->dst->prev);
 670                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 671                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 672                         break;
 673
 674                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 675
 676                         M_COPY(src,       iptr->dst);
 677                         M_COPY(src->prev, iptr->dst->prev);
 678                         break;
 679
 680                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 681
 682                         M_COPY(src,             iptr->dst);
 683                         M_COPY(src->prev,       iptr->dst->prev);
 684                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 685                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 686                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 687                         break;
 688
 689                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 690
 691                         M_COPY(src,                   iptr->dst);
 692                         M_COPY(src->prev,             iptr->dst->prev);
 693                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 694                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 695                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 696                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 697                         break;
 698
 699                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 700
 701                         M_COPY(src,       iptr->dst->prev);
 702                         M_COPY(src->prev, iptr->dst);
 703                         break;
 704
 705
 706                 /* integer operations *************************************************/
 707
 708                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 709
 710                         var_to_reg_int(s1, src, REG_ITMP1);
 711                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 712                         M_NEG(s1, d);
 713                         store_reg_to_var_int(iptr->dst, d);
 714                         break;
 715
 716                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 717
 718                         var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 719                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 720                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
 721                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 722                         store_reg_to_var_int(iptr->dst, d);
 723                         break;
 724
 725                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 726
 727                         var_to_reg_int(s1, src, REG_ITMP2);
 728                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 729                         M_INTMOVE(s1, GET_LOW_REG(d));
 730                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
 731                         store_reg_to_var_int(iptr->dst, d);
 732                         break;
 733
 734                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 735
 736                         var_to_reg_int_low(s1, src, REG_ITMP2);
 737                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 738                         M_INTMOVE(s1, d);
 739                         store_reg_to_var_int(iptr->dst, d);
 740                         break;
 741
 742                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 743
 744                         var_to_reg_int(s1, src, REG_ITMP1);
 745                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 746                         M_BSEXT(s1, d);
 747                         store_reg_to_var_int(iptr->dst, d);
 748                         break;
 749
 750                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 754                         M_CZEXT(s1, d);
 755                         store_reg_to_var_int(iptr->dst, d);
 756                         break;
 757
 758                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 759
 760                         var_to_reg_int(s1, src, REG_ITMP1);
 761                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 762                         M_SSEXT(s1, d);
 763                         store_reg_to_var_int(iptr->dst, d);
 764                         break;
 765
 766
 767                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 768
 769                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 770                         var_to_reg_int(s2, src, REG_ITMP2);
 771                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 772                         M_IADD(s1, s2, d);
 773                         store_reg_to_var_int(iptr->dst, d);
 774                         break;
 775
 776                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 777                                       /* val.i = constant                             */
 778
 779                         var_to_reg_int(s1, src, REG_ITMP1);
 780                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 781                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 782                                 M_IADD_IMM(s1, iptr->val.i, d);
 783                         } else {
 784                                 ICONST(REG_ITMP2, iptr->val.i);
 785                                 M_IADD(s1, REG_ITMP2, d);
 786                         }
 787                         store_reg_to_var_int(iptr->dst, d);
 788                         break;
 789
 790                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 791
 792                         var_to_reg_int_low(s1, src->prev, REG_ITMP1);
 793                         var_to_reg_int_low(s2, src, REG_ITMP2);
 794                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 795                         M_ADDC(s1, s2, GET_LOW_REG(d));
 796                         var_to_reg_int_high(s1, src->prev, REG_ITMP1);
 797                         var_to_reg_int_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 798                         M_ADDE(s1, s2, GET_HIGH_REG(d));
 799                         store_reg_to_var_int(iptr->dst, d);
 800                         break;
 801
 802                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 803                                       /* val.l = constant                             */
 804
 805                         s3 = iptr->val.l & 0xffffffff;
 806                         var_to_reg_int_low(s1, src, REG_ITMP1);
 807                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 808                         if ((s3 >= -32768) && (s3 <= 32767)) {
 809                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 810                         } else {
 811                                 ICONST(REG_ITMP2, s3);
 812                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 813                         }
 814                         var_to_reg_int_high(s1, src, REG_ITMP1);
 815                         s3 = iptr->val.l >> 32;
 816                         if (s3 == -1) {
 817                                 M_ADDME(s1, GET_HIGH_REG(d));
 818                         } else if (s3 == 0) {
 819                                 M_ADDZE(s1, GET_HIGH_REG(d));
 820                         } else {
 821                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 822                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 823                         }
 824                         store_reg_to_var_int(iptr->dst, d);
 825                         break;
 826
 827                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 828
 829                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 830                         var_to_reg_int(s2, src, REG_ITMP2);
 831                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 832                         M_ISUB(s1, s2, d);
 833                         store_reg_to_var_int(iptr->dst, d);
 834                         break;
 835
 836                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 837                                       /* val.i = constant                             */
 838
 839                         var_to_reg_int(s1, src, REG_ITMP1);
 840                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 841                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 842                                 M_IADD_IMM(s1, -iptr->val.i, d);
 843                         } else {
 844                                 ICONST(REG_ITMP2, -iptr->val.i);
 845                                 M_IADD(s1, REG_ITMP2, d);
 846                         }
 847                         store_reg_to_var_int(iptr->dst, d);
 848                         break;
 849
 850                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 851
 852                         var_to_reg_int_low(s1, src->prev, REG_ITMP1);
 853                         var_to_reg_int_low(s2, src, REG_ITMP2);
 854                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 855                         M_SUBC(s1, s2, GET_LOW_REG(d));
 856                         var_to_reg_int_high(s1, src->prev, REG_ITMP1);
 857                         var_to_reg_int_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 858                         M_SUBE(s1, s2, GET_HIGH_REG(d));
 859                         store_reg_to_var_int(iptr->dst, d);
 860                         break;
 861
 862                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 863                                       /* val.l = constant                             */
 864
 865                         s3 = (-iptr->val.l) & 0xffffffff;
 866                         var_to_reg_int_low(s1, src, REG_ITMP1);
 867                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 868                         if ((s3 >= -32768) && (s3 <= 32767)) {
 869                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 870                         } else {
 871                                 ICONST(REG_ITMP2, s3);
 872                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 873                         }
 874                         var_to_reg_int_high(s1, src, REG_ITMP1);
 875                         s3 = (-iptr->val.l) >> 32;
 876                         if (s3 == -1)
 877                                 M_ADDME(s1, GET_HIGH_REG(d));
 878                         else if (s3 == 0)
 879                                 M_ADDZE(s1, GET_HIGH_REG(d));
 880                         else {
 881                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 882                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 883                         }
 884                         store_reg_to_var_int(iptr->dst, d);
 885                         break;
 886
 887                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 888
 889                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 890                         var_to_reg_int(s2, src, REG_ITMP2);
 891                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 892                         M_TST(s2);
 893                         M_BEQ(0);
 894                         codegen_addxdivrefs(cd, mcodeptr);
 895                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 896                         M_CMP(REG_ITMP3, s1);
 897                         M_BNE(3 + (s1 != d));
 898                         M_CMPI(s2, -1);
 899                         M_BNE(1 + (s1 != d));
 900                         M_INTMOVE(s1, d);
 901                         M_BR(1);
 902                         M_IDIV(s1, s2, d);
 903                         store_reg_to_var_int(iptr->dst, d);
 904                         break;
 905
 906                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 907
 908                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 909                         var_to_reg_int(s2, src, REG_ITMP2);
 910                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 911                         M_TST(s2);
 912                         M_BEQ(0);
 913                         codegen_addxdivrefs(cd, mcodeptr);
 914                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 915                         M_CMP(REG_ITMP3, s1);
 916                         M_BNE(4);
 917                         M_CMPI(s2, -1);
 918                         M_BNE(2);
 919                         M_CLR(d);
 920                         M_BR(3);
 921                         M_IDIV(s1, s2, REG_ITMP3);
 922                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
 923                         M_ISUB(s1, REG_ITMP3, d);
 924                         store_reg_to_var_int(iptr->dst, d);
 925                         break;
 926
 927                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 928                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 929
 930                         bte = iptr->val.a;
 931                         md = bte->md;
 932
 933                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 934                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
 935                         M_BEQ(0);
 936                         codegen_addxdivrefs(cd, mcodeptr);
 937
 938                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
 939                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
 940                         M_TINTMOVE(TYPE_LNG, s2, s3);
 941
 942                         var_to_reg_int(s1, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
 943                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
 944                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
 945                         M_TINTMOVE(TYPE_LNG, s1, s3);
 946
 947                         disp = dseg_addaddress(cd, bte->fp);
 948                         M_ALD(REG_ITMP1, REG_PV, disp);
 949                         M_MTCTR(REG_ITMP1);
 950                         M_JSR;
 951
 952                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
 953                         M_TINTMOVE(TYPE_LNG, PACK_REGS(REG_RESULT2, REG_RESULT), d);
 954                         store_reg_to_var_int(iptr->dst, d);
 955                         break;
 956
 957                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 958
 959                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 960                         var_to_reg_int(s2, src, REG_ITMP2);
 961                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 962                         M_IMUL(s1, s2, d);
 963                         store_reg_to_var_int(iptr->dst, d);
 964                         break;
 965
 966                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 967                                       /* val.i = constant                             */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 971                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 972                                 M_IMUL_IMM(s1, iptr->val.i, d);
 973                         } else {
 974                                 ICONST(REG_ITMP3, iptr->val.i);
 975                                 M_IMUL(s1, REG_ITMP3, d);
 976                         }
 977                         store_reg_to_var_int(iptr->dst, d);
 978                         break;
 979
 980                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 981
 982                         var_to_reg_int(s1, src, REG_ITMP1);
 983                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 984                         M_SRA_IMM(s1, iptr->val.i, d);
 985                         M_ADDZE(d, d);
 986                         store_reg_to_var_int(iptr->dst, d);
 987                         break;
 988
 989                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 990
 991                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 992                         var_to_reg_int(s2, src, REG_ITMP2);
 993                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 994                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 995                         M_SLL(s1, REG_ITMP3, d);
 996                         store_reg_to_var_int(iptr->dst, d);
 997                         break;
 998
 999                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1000                                       /* val.i = constant                             */
1001
1002                         var_to_reg_int(s1, src, REG_ITMP1);
1003                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1004                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1005                         store_reg_to_var_int(iptr->dst, d);
1006                         break;
1007
1008                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1009
1010                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1011                         var_to_reg_int(s2, src, REG_ITMP2);
1012                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1013                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1014                         M_SRA(s1, REG_ITMP3, d);
1015                         store_reg_to_var_int(iptr->dst, d);
1016                         break;
1017
1018                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1019                                       /* val.i = constant                             */
1020
1021                         var_to_reg_int(s1, src, REG_ITMP1);
1022                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1023                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1024                         store_reg_to_var_int(iptr->dst, d);
1025                         break;
1026
1027                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1028
1029                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1030                         var_to_reg_int(s2, src, REG_ITMP2);
1031                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1032                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1033                         M_SRL(s1, REG_ITMP2, d);
1034                         store_reg_to_var_int(iptr->dst, d);
1035                         break;
1036
1037                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1038                                       /* val.i = constant                             */
1039
1040                         var_to_reg_int(s1, src, REG_ITMP1);
1041                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1042                         if (iptr->val.i & 0x1f) {
1043                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1044                         } else {
1045                                 M_INTMOVE(s1, d);
1046                         }
1047                         store_reg_to_var_int(iptr->dst, d);
1048                         break;
1049
1050                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1051
1052                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1053                         var_to_reg_int(s2, src, REG_ITMP2);
1054                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1055                         M_AND(s1, s2, d);
1056                         store_reg_to_var_int(iptr->dst, d);
1057                         break;
1058
1059                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1060                                       /* val.i = constant                             */
1061
1062                         var_to_reg_int(s1, src, REG_ITMP1);
1063                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1064                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1065                                 M_AND_IMM(s1, iptr->val.i, d);
1066                                 }
1067                         /*
1068                         else if (iptr->val.i == 0xffffff) {
1069                                 M_RLWINM(s1, 0, 8, 31, d);
1070                                 }
1071                         */
1072                         else {
1073                                 ICONST(REG_ITMP3, iptr->val.i);
1074                                 M_AND(s1, REG_ITMP3, d);
1075                         }
1076                         store_reg_to_var_int(iptr->dst, d);
1077                         break;
1078
1079                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1080
1081                         var_to_reg_int_low(s1, src->prev, REG_ITMP1);
1082                         var_to_reg_int_low(s2, src, REG_ITMP2);
1083                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1084                         M_AND(s1, s2, GET_LOW_REG(d));
1085                         var_to_reg_int_high(s1, src->prev, REG_ITMP1);
1086                         var_to_reg_int_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1087                         M_AND(s1, s2, GET_HIGH_REG(d));
1088                         store_reg_to_var_int(iptr->dst, d);
1089                         break;
1090
1091                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1092                                       /* val.l = constant                             */
1093
1094                         s3 = iptr->val.l & 0xffffffff;
1095                         var_to_reg_int_low(s1, src, REG_ITMP1);
1096                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1097                         if ((s3 >= 0) && (s3 <= 65535)) {
1098                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1099                         } else {
1100                                 ICONST(REG_ITMP3, s3);
1101                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1102                         }
1103                         var_to_reg_int_high(s1, src, REG_ITMP1);
1104                         s3 = iptr->val.l >> 32;
1105                         if ((s3 >= 0) && (s3 <= 65535)) {
1106                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1107                         } else {
1108                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1109                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1110                         }
1111                         store_reg_to_var_int(iptr->dst, d);
1112                         break;
1113
1114                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1115                                       /* val.i = constant                             */
1116
1117                         var_to_reg_int(s1, src, REG_ITMP1);
1118                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1119                         M_MOV(s1, REG_ITMP2);
1120                         M_CMPI(s1, 0);
1121                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1122                         if (iptr->val.i >= 32768) {
1123                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1124                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1125                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1126                         } else {
1127                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1128                         }
1129                         {
1130                                 int b=0, m = iptr->val.i;
1131                                 while (m >>= 1)
1132                                         ++b;
1133                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1134                         }
1135                         M_ISUB(s1, REG_ITMP2, d);
1136                         store_reg_to_var_int(iptr->dst, d);
1137                         break;
1138
1139                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1140
1141                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1142                         var_to_reg_int(s2, src, REG_ITMP2);
1143                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1144                         M_OR(s1, s2, d);
1145                         store_reg_to_var_int(iptr->dst, d);
1146                         break;
1147
1148                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1149                                       /* val.i = constant                             */
1150
1151                         var_to_reg_int(s1, src, REG_ITMP1);
1152                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1153                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1154                                 M_OR_IMM(s1, iptr->val.i, d);
1155                         } else {
1156                                 ICONST(REG_ITMP3, iptr->val.i);
1157                                 M_OR(s1, REG_ITMP3, d);
1158                         }
1159                         store_reg_to_var_int(iptr->dst, d);
1160                         break;
1161
1162                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1163
1164                         var_to_reg_int_low(s1, src->prev, REG_ITMP1);
1165                         var_to_reg_int_low(s2, src, REG_ITMP2);
1166                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1167                         M_OR(s1, s2, GET_LOW_REG(d));
1168                         var_to_reg_int_high(s1, src->prev, REG_ITMP1);
1169                         var_to_reg_int_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1170                         M_OR(s1, s2, GET_HIGH_REG(d));
1171                         store_reg_to_var_int(iptr->dst, d);
1172                         break;
1173
1174                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1175                                       /* val.l = constant                             */
1176
1177                         s3 = iptr->val.l & 0xffffffff;
1178                         var_to_reg_int_low(s1, src, REG_ITMP1);
1179                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1180                         if ((s3 >= 0) && (s3 <= 65535)) {
1181                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1182                         } else {
1183                                 ICONST(REG_ITMP3, s3);
1184                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1185                         }
1186                         var_to_reg_int_high(s1, src, REG_ITMP1);
1187                         s3 = iptr->val.l >> 32;
1188                         if ((s3 >= 0) && (s3 <= 65535)) {
1189                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1190                         } else {
1191                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1192                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1193                         }
1194                         store_reg_to_var_int(iptr->dst, d);
1195                         break;
1196
1197                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1198
1199                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1200                         var_to_reg_int(s2, src, REG_ITMP2);
1201                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1202                         M_XOR(s1, s2, d);
1203                         store_reg_to_var_int(iptr->dst, d);
1204                         break;
1205
1206                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1207                                       /* val.i = constant                             */
1208
1209                         var_to_reg_int(s1, src, REG_ITMP1);
1210                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1211                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1212                                 M_XOR_IMM(s1, iptr->val.i, d);
1213                         } else {
1214                                 ICONST(REG_ITMP3, iptr->val.i);
1215                                 M_XOR(s1, REG_ITMP3, d);
1216                         }
1217                         store_reg_to_var_int(iptr->dst, d);
1218                         break;
1219
1220                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1221
1222                         var_to_reg_int_low(s1, src->prev, REG_ITMP1);
1223                         var_to_reg_int_low(s2, src, REG_ITMP2);
1224                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1225                         M_XOR(s1, s2, GET_LOW_REG(d));
1226                         var_to_reg_int_high(s1, src->prev, REG_ITMP1);
1227                         var_to_reg_int_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1228                         M_XOR(s1, s2, GET_HIGH_REG(d));
1229                         store_reg_to_var_int(iptr->dst, d);
1230                         break;
1231
1232                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1233                                       /* val.l = constant                             */
1234
1235                         s3 = iptr->val.l & 0xffffffff;
1236                         var_to_reg_int_low(s1, src, REG_ITMP1);
1237                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1238                         if ((s3 >= 0) && (s3 <= 65535)) {
1239                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1240                         } else {
1241                                 ICONST(REG_ITMP3, s3);
1242                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1243                         }
1244                         var_to_reg_int_high(s1, src, REG_ITMP1);
1245                         s3 = iptr->val.l >> 32;
1246                         if ((s3 >= 0) && (s3 <= 65535)) {
1247                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1248                         } else {
1249                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1250                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1251                         }
1252                         store_reg_to_var_int(iptr->dst, d);
1253                         break;
1254
1255                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1256                         /*******************************************************************
1257                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1258                         *******************************************************************/
1259                         var_to_reg_int_high(s1, src->prev, REG_ITMP3);
1260                         var_to_reg_int_high(s2, src, REG_ITMP2);
1261                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1262                         {
1263                                 int tempreg = false;
1264                                 int dreg;
1265                                 s4  *br1;
1266
1267                                 if (src->prev->flags & INMEMORY) {
1268                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1269                                 } else {
1270                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1271                                                         || (d == GET_LOW_REG(src->prev->regoff));
1272                                 }
1273                                 if (src->flags & INMEMORY) {
1274                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1275                                 } else {
1276                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1277                                  || (d == GET_LOW_REG(src->regoff));
1278                                 }
1279
1280                                 dreg = tempreg ? REG_ITMP1 : d;
1281                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1282                                 M_CMP(s1, s2);
1283                                 M_BGT(0);
1284                                 br1 = mcodeptr;
1285                                 M_BLT(0);
1286                                 var_to_reg_int_low(s1, src->prev, REG_ITMP3);
1287                                 var_to_reg_int_low(s2, src, REG_ITMP2);
1288                                 M_CMPU(s1, s2);
1289                                 M_BGT(3);
1290                                 M_BEQ(1);
1291                                 M_IADD_IMM(dreg, -1, dreg);
1292                                 M_IADD_IMM(dreg, -1, dreg);
1293                                 gen_resolvebranch(br1, (u1*) br1, (u1*) mcodeptr);
1294                                 gen_resolvebranch(br1+1, (u1*) (br1+1), (u1*) (mcodeptr-2));
1295                                 M_INTMOVE(dreg, d);
1296                         }
1297                         store_reg_to_var_int(iptr->dst, d);
1298                         break;
1299
1300                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1301                                       /* op1 = variable, val.i = constant             */
1302
1303                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1304                         if (var->flags & INMEMORY) {
1305                                 s1 = REG_ITMP1;
1306                                 M_ILD(s1, REG_SP, var->regoff * 4);
1307                         } else {
1308                                 s1 = var->regoff;
1309                         }
1310                         {
1311                                 u4 m = iptr->val.i;
1312                                 if (m & 0x8000)
1313                                         m += 65536;
1314                                 if (m & 0xffff0000)
1315                                         M_ADDIS(s1, m >> 16, s1);
1316                                 if (m & 0xffff)
1317                                         M_IADD_IMM(s1, m & 0xffff, s1);
1318                         }
1319                         if (var->flags & INMEMORY) {
1320                                 M_IST(s1, REG_SP, var->regoff * 4);
1321                         }
1322                         break;
1323
1324
1325                 /* floating operations ************************************************/
1326
1327                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1328
1329                         var_to_reg_flt(s1, src, REG_FTMP1);
1330                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1331                         M_FMOVN(s1, d);
1332                         store_reg_to_var_flt(iptr->dst, d);
1333                         break;
1334
1335                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1336
1337                         var_to_reg_flt(s1, src, REG_FTMP1);
1338                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1339                         M_FMOVN(s1, d);
1340                         store_reg_to_var_flt(iptr->dst, d);
1341                         break;
1342
1343                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1344
1345                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1346                         var_to_reg_flt(s2, src, REG_FTMP2);
1347                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1348                         M_FADD(s1, s2, d);
1349                         store_reg_to_var_flt(iptr->dst, d);
1350                         break;
1351
1352                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1353
1354                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1355                         var_to_reg_flt(s2, src, REG_FTMP2);
1356                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1357                         M_DADD(s1, s2, d);
1358                         store_reg_to_var_flt(iptr->dst, d);
1359                         break;
1360
1361                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1362
1363                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1364                         var_to_reg_flt(s2, src, REG_FTMP2);
1365                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1366                         M_FSUB(s1, s2, d);
1367                         store_reg_to_var_flt(iptr->dst, d);
1368                         break;
1369
1370                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1371
1372                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1373                         var_to_reg_flt(s2, src, REG_FTMP2);
1374                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1375                         M_DSUB(s1, s2, d);
1376                         store_reg_to_var_flt(iptr->dst, d);
1377                         break;
1378
1379                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1380
1381                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1382                         var_to_reg_flt(s2, src, REG_FTMP2);
1383                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1384                         M_FMUL(s1, s2, d);
1385                         store_reg_to_var_flt(iptr->dst, d);
1386                         break;
1387
1388                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1389
1390                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1391                         var_to_reg_flt(s2, src, REG_FTMP2);
1392                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1393                         M_DMUL(s1, s2, d);
1394                         store_reg_to_var_flt(iptr->dst, d);
1395                         break;
1396
1397                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1398
1399                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1400                         var_to_reg_flt(s2, src, REG_FTMP2);
1401                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1402                         M_FDIV(s1, s2, d);
1403                         store_reg_to_var_flt(iptr->dst, d);
1404                         break;
1405
1406                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1407
1408                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1409                         var_to_reg_flt(s2, src, REG_FTMP2);
1410                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1411                         M_DDIV(s1, s2, d);
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1416                 case ICMD_D2I:
1417                         var_to_reg_flt(s1, src, REG_FTMP1);
1418                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1419                         M_CLR(d);
1420                         disp = dseg_addfloat(cd, 0.0);
1421                         M_FLD(REG_FTMP2, REG_PV, disp);
1422                         M_FCMPU(s1, REG_FTMP2);
1423                         M_BNAN(4);
1424                         disp = dseg_adds4(cd, 0);
1425                         M_CVTDL_C(s1, REG_FTMP1);
1426                         M_LDA(REG_ITMP1, REG_PV, disp);
1427                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1428                         M_ILD(d, REG_PV, disp);
1429                         store_reg_to_var_int(iptr->dst, d);
1430                         break;
1431
1432                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1433
1434                         var_to_reg_flt(s1, src, REG_FTMP1);
1435                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1436                         M_FLTMOVE(s1, d);
1437                         store_reg_to_var_flt(iptr->dst, d);
1438                         break;
1439
1440                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1441
1442                         var_to_reg_flt(s1, src, REG_FTMP1);
1443                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1444                         M_CVTDF(s1, d);
1445                         store_reg_to_var_flt(iptr->dst, d);
1446                         break;
1447
1448                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1449                 case ICMD_DCMPL:
1450                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1451                         var_to_reg_flt(s2, src, REG_FTMP2);
1452                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1453                         M_FCMPU(s2, s1);
1454                         M_IADD_IMM(REG_ZERO, -1, d);
1455                         M_BNAN(4);
1456                         M_BGT(3);
1457                         M_IADD_IMM(REG_ZERO, 0, d);
1458                         M_BGE(1);
1459                         M_IADD_IMM(REG_ZERO, 1, d);
1460                         store_reg_to_var_int(iptr->dst, d);
1461                         break;
1462
1463                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1464                 case ICMD_DCMPG:
1465                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1466                         var_to_reg_flt(s2, src, REG_FTMP2);
1467                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1468                         M_FCMPU(s1, s2);
1469                         M_IADD_IMM(REG_ZERO, 1, d);
1470                         M_BNAN(4);
1471                         M_BGT(3);
1472                         M_IADD_IMM(REG_ZERO, 0, d);
1473                         M_BGE(1);
1474                         M_IADD_IMM(REG_ZERO, -1, d);
1475                         store_reg_to_var_int(iptr->dst, d);
1476                         break;
1477
1478
1479                 /* memory operations **************************************************/
1480
1481                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1482
1483                         var_to_reg_int(s1, src, REG_ITMP1);
1484                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1485                         gen_nullptr_check(s1);
1486                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1487                         store_reg_to_var_int(iptr->dst, d);
1488                         break;
1489
1490                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1491
1492                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1493                         var_to_reg_int(s2, src, REG_ITMP2);
1494                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1495                         if (iptr->op1 == 0) {
1496                                 gen_nullptr_check(s1);
1497                                 gen_bound_check;
1498                         }
1499                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1500                         M_LBZX(d, s1, REG_ITMP2);
1501                         M_BSEXT(d, d);
1502                         store_reg_to_var_int(iptr->dst, d);
1503                         break;
1504
1505                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1506
1507                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1508                         var_to_reg_int(s2, src, REG_ITMP2);
1509                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1510                         if (iptr->op1 == 0) {
1511                                 gen_nullptr_check(s1);
1512                                 gen_bound_check;
1513                         }
1514                         M_SLL_IMM(s2, 1, REG_ITMP2);
1515                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1516                         M_LHZX(d, s1, REG_ITMP2);
1517                         store_reg_to_var_int(iptr->dst, d);
1518                         break;
1519
1520                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1521
1522                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1523                         var_to_reg_int(s2, src, REG_ITMP2);
1524                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1525                         if (iptr->op1 == 0) {
1526                                 gen_nullptr_check(s1);
1527                                 gen_bound_check;
1528                         }
1529                         M_SLL_IMM(s2, 1, REG_ITMP2);
1530                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1531                         M_LHAX(d, s1, REG_ITMP2);
1532                         store_reg_to_var_int(iptr->dst, d);
1533                         break;
1534
1535                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1536
1537                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1538                         var_to_reg_int(s2, src, REG_ITMP2);
1539                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1540                         if (iptr->op1 == 0) {
1541                                 gen_nullptr_check(s1);
1542                                 gen_bound_check;
1543                         }
1544                         M_SLL_IMM(s2, 2, REG_ITMP2);
1545                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1546                         M_LWZX(d, s1, REG_ITMP2);
1547                         store_reg_to_var_int(iptr->dst, d);
1548                         break;
1549
1550                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1551
1552                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1553                         var_to_reg_int(s2, src, REG_ITMP2);
1554                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1555                         if (iptr->op1 == 0) {
1556                                 gen_nullptr_check(s1);
1557                                 gen_bound_check;
1558                         }
1559                         M_SLL_IMM(s2, 3, REG_ITMP2);
1560                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1561                         M_ILD(GET_HIGH_REG(d), REG_ITMP2, OFFSET(java_longarray, data[0]));
1562                         M_ILD(GET_LOW_REG(d), REG_ITMP2, OFFSET(java_longarray,
1563                                                                                                         data[0]) + 4);
1564                         store_reg_to_var_int(iptr->dst, d);
1565                         break;
1566
1567                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1568
1569                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1570                         var_to_reg_int(s2, src, REG_ITMP2);
1571                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1572                         if (iptr->op1 == 0) {
1573                                 gen_nullptr_check(s1);
1574                                 gen_bound_check;
1575                         }
1576                         M_SLL_IMM(s2, 2, REG_ITMP2);
1577                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1578                         M_LFSX(d, s1, REG_ITMP2);
1579                         store_reg_to_var_flt(iptr->dst, d);
1580                         break;
1581
1582                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1583
1584                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1585                         var_to_reg_int(s2, src, REG_ITMP2);
1586                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1587                         if (iptr->op1 == 0) {
1588                                 gen_nullptr_check(s1);
1589                                 gen_bound_check;
1590                         }
1591                         M_SLL_IMM(s2, 3, REG_ITMP2);
1592                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1593                         M_LFDX(d, s1, REG_ITMP2);
1594                         store_reg_to_var_flt(iptr->dst, d);
1595                         break;
1596
1597                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1598
1599                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1600                         var_to_reg_int(s2, src, REG_ITMP2);
1601                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1602                         if (iptr->op1 == 0) {
1603                                 gen_nullptr_check(s1);
1604                                 gen_bound_check;
1605                         }
1606                         M_SLL_IMM(s2, 2, REG_ITMP2);
1607                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1608                         M_LWZX(d, s1, REG_ITMP2);
1609                         store_reg_to_var_int(iptr->dst, d);
1610                         break;
1611
1612
1613                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1614
1615                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1616                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1617                         if (iptr->op1 == 0) {
1618                                 gen_nullptr_check(s1);
1619                                 gen_bound_check;
1620                         }
1621                         var_to_reg_int(s3, src, REG_ITMP3);
1622                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1623                         M_STBX(s3, s1, REG_ITMP2);
1624                         break;
1625
1626                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1627
1628                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1629                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1630                         if (iptr->op1 == 0) {
1631                                 gen_nullptr_check(s1);
1632                                 gen_bound_check;
1633                         }
1634                         var_to_reg_int(s3, src, REG_ITMP3);
1635                         M_SLL_IMM(s2, 1, REG_ITMP2);
1636                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1637                         M_STHX(s3, s1, REG_ITMP2);
1638                         break;
1639
1640                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1641
1642                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1643                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1644                         if (iptr->op1 == 0) {
1645                                 gen_nullptr_check(s1);
1646                                 gen_bound_check;
1647                         }
1648                         var_to_reg_int(s3, src, REG_ITMP3);
1649                         M_SLL_IMM(s2, 1, REG_ITMP2);
1650                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1651                         M_STHX(s3, s1, REG_ITMP2);
1652                         break;
1653
1654                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1655
1656                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1657                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1658                         if (iptr->op1 == 0) {
1659                                 gen_nullptr_check(s1);
1660                                 gen_bound_check;
1661                         }
1662                         var_to_reg_int(s3, src, REG_ITMP3);
1663                         M_SLL_IMM(s2, 2, REG_ITMP2);
1664                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1665                         M_STWX(s3, s1, REG_ITMP2);
1666                         break;
1667
1668                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1669
1670                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1671                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1672                         if (iptr->op1 == 0) {
1673                                 gen_nullptr_check(s1);
1674                                 gen_bound_check;
1675                         }
1676                         var_to_reg_int_high(s3, src, REG_ITMP3);
1677                         M_SLL_IMM(s2, 3, REG_ITMP2);
1678                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1679                         M_STWX(s3, s1, REG_ITMP2);
1680                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1681                         var_to_reg_int_low(s3, src, REG_ITMP3);
1682                         M_STWX(s3, s1, REG_ITMP2);
1683                         break;
1684
1685                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1686
1687                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1688                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1689                         if (iptr->op1 == 0) {
1690                                 gen_nullptr_check(s1);
1691                                 gen_bound_check;
1692                         }
1693                         var_to_reg_flt(s3, src, REG_FTMP3);
1694                         M_SLL_IMM(s2, 2, REG_ITMP2);
1695                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1696                         M_STFSX(s3, s1, REG_ITMP2);
1697                         break;
1698
1699                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1700
1701                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1702                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1703                         if (iptr->op1 == 0) {
1704                                 gen_nullptr_check(s1);
1705                                 gen_bound_check;
1706                         }
1707                         var_to_reg_flt(s3, src, REG_FTMP3);
1708                         M_SLL_IMM(s2, 3, REG_ITMP2);
1709                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1710                         M_STFDX(s3, s1, REG_ITMP2);
1711                         break;
1712
1713                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1714
1715                         var_to_reg_int(s1, src->prev->prev, rd->argintregs[0]);
1716                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1717                         if (iptr->op1 == 0) {
1718                                 gen_nullptr_check(s1);
1719                                 gen_bound_check;
1720                         }
1721                         var_to_reg_int(s3, src, rd->argintregs[1]);
1722
1723                         M_INTMOVE(s1, rd->argintregs[0]);
1724                         M_INTMOVE(s3, rd->argintregs[1]);
1725                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1726                         M_ALD(REG_ITMP1, REG_PV, disp);
1727                         M_MTCTR(REG_ITMP1);
1728                         M_JSR;
1729                         M_TST(REG_RESULT);
1730                         M_BEQ(0);
1731                         codegen_addxstorerefs(cd, mcodeptr);
1732
1733                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1734                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1735                         var_to_reg_int(s3, src, REG_ITMP3);
1736                         M_SLL_IMM(s2, 2, REG_ITMP2);
1737                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1738                         M_STWX(s3, s1, REG_ITMP2);
1739                         break;
1740
1741
1742                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1743                                       /* op1 = type, val.a = field address            */
1744
1745                         if (!iptr->val.a) {
1746                                 disp = dseg_addaddress(cd, NULL);
1747
1748                                 codegen_addpatchref(cd, mcodeptr,
1749                                                                         PATCHER_get_putstatic,
1750                                                                         (unresolved_field *) iptr->target, disp);
1751
1752                                 if (opt_showdisassemble)
1753                                         M_NOP;
1754
1755                         } else {
1756                                 fieldinfo *fi = iptr->val.a;
1757
1758                                 disp = dseg_addaddress(cd, &(fi->value));
1759
1760                                 if (!fi->class->initialized) {
1761                                         codegen_addpatchref(cd, mcodeptr,
1762                                                                                 PATCHER_clinit, fi->class, disp);
1763
1764                                         if (opt_showdisassemble)
1765                                                 M_NOP;
1766                                 }
1767                         }
1768
1769                         M_ALD(REG_ITMP1, REG_PV, disp);
1770                         switch (iptr->op1) {
1771                         case TYPE_INT:
1772                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1773                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1774                                 store_reg_to_var_int(iptr->dst, d);
1775                                 break;
1776                         case TYPE_LNG:
1777                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1778                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1779                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1780                                 store_reg_to_var_int(iptr->dst, d);
1781                                 break;
1782                         case TYPE_ADR:
1783                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1784                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1785                                 store_reg_to_var_int(iptr->dst, d);
1786                                 break;
1787                         case TYPE_FLT:
1788                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1789                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1790                                 store_reg_to_var_flt(iptr->dst, d);
1791                                 break;
1792                         case TYPE_DBL:
1793                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1794                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1795                                 store_reg_to_var_flt(iptr->dst, d);
1796                                 break;
1797                         }
1798                         break;
1799
1800                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1801                                       /* op1 = type, val.a = field address            */
1802
1803
1804                         if (!iptr->val.a) {
1805                                 disp = dseg_addaddress(cd, NULL);
1806
1807                                 codegen_addpatchref(cd, mcodeptr,
1808                                                                         PATCHER_get_putstatic,
1809                                                                         (unresolved_field *) iptr->target, disp);
1810
1811                                 if (opt_showdisassemble)
1812                                         M_NOP;
1813
1814                         } else {
1815                                 fieldinfo *fi = iptr->val.a;
1816
1817                                 disp = dseg_addaddress(cd, &(fi->value));
1818
1819                                 if (!fi->class->initialized) {
1820                                         codegen_addpatchref(cd, mcodeptr,
1821                                                                                 PATCHER_clinit, fi->class, disp);
1822
1823                                         if (opt_showdisassemble)
1824                                                 M_NOP;
1825                                 }
1826                         }
1827
1828                         M_ALD(REG_ITMP1, REG_PV, disp);
1829                         switch (iptr->op1) {
1830                         case TYPE_INT:
1831                                 var_to_reg_int(s2, src, REG_ITMP2);
1832                                 M_IST_INTERN(s2, REG_ITMP1, 0);
1833                                 break;
1834                         case TYPE_LNG:
1835                                 var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1836                                 M_IST_INTERN(GET_HIGH_REG(s2), REG_ITMP1, 0);
1837                                 M_IST_INTERN(GET_LOW_REG(s2), REG_ITMP1, 4);
1838                                 break;
1839                         case TYPE_ADR:
1840                                 var_to_reg_int(s2, src, REG_ITMP2);
1841                                 M_AST_INTERN(s2, REG_ITMP1, 0);
1842                                 break;
1843                         case TYPE_FLT:
1844                                 var_to_reg_flt(s2, src, REG_FTMP2);
1845                                 M_FST_INTERN(s2, REG_ITMP1, 0);
1846                                 break;
1847                         case TYPE_DBL:
1848                                 var_to_reg_flt(s2, src, REG_FTMP2);
1849                                 M_DST_INTERN(s2, REG_ITMP1, 0);
1850                                 break;
1851                         }
1852                         break;
1853
1854
1855                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1856                                       /* op1 = type, val.i = field offset             */
1857
1858                         var_to_reg_int(s1, src, REG_ITMP1);
1859                         gen_nullptr_check(s1);
1860
1861                         if (!iptr->val.a) {
1862                                 codegen_addpatchref(cd, mcodeptr,
1863                                                                         PATCHER_get_putfield,
1864                                                                         (unresolved_field *) iptr->target, 0);
1865
1866                                 if (opt_showdisassemble)
1867                                         M_NOP;
1868
1869                                 disp = 0;
1870
1871                         } else {
1872                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1873                         }
1874
1875                         switch (iptr->op1) {
1876                         case TYPE_INT:
1877                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1878                                 M_ILD(d, s1, disp);
1879                                 store_reg_to_var_int(iptr->dst, d);
1880                                 break;
1881                         case TYPE_LNG:
1882                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1883                                 M_ILD(GET_LOW_REG(d), s1, disp + 4);       /* keep this order */
1884                                 M_ILD(GET_HIGH_REG(d), s1, disp);          /* keep this order */
1885                                 store_reg_to_var_int(iptr->dst, d);
1886                                 break;
1887                         case TYPE_ADR:
1888                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1889                                 M_ALD(d, s1, disp);
1890                                 store_reg_to_var_int(iptr->dst, d);
1891                                 break;
1892                         case TYPE_FLT:
1893                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1894                                 M_FLD(d, s1, disp);
1895                                 store_reg_to_var_flt(iptr->dst, d);
1896                                 break;
1897                         case TYPE_DBL:
1898                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1899                                 M_DLD(d, s1, disp);
1900                                 store_reg_to_var_flt(iptr->dst, d);
1901                                 break;
1902                         }
1903                         break;
1904
1905                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1906                                       /* op1 = type, val.i = field offset             */
1907
1908                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1909                         gen_nullptr_check(s1);
1910
1911                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
1912                                 if (IS_2_WORD_TYPE(iptr->op1)) {
1913                                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1914                                 } else {
1915                                         var_to_reg_int(s2, src, REG_ITMP2);
1916                                 }
1917                         } else {
1918                                 var_to_reg_flt(s2, src, REG_FTMP2);
1919                         }
1920
1921                         if (!iptr->val.a) {
1922                                 codegen_addpatchref(cd, mcodeptr,
1923                                                                         PATCHER_get_putfield,
1924                                                                         (unresolved_field *) iptr->target, 0);
1925
1926                                 if (opt_showdisassemble)
1927                                         M_NOP;
1928
1929                                 disp = 0;
1930
1931                         } else {
1932                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1933                         }
1934
1935                         switch (iptr->op1) {
1936                         case TYPE_INT:
1937                                 M_IST(s2, s1, disp);
1938                                 break;
1939                         case TYPE_LNG:
1940                                 M_IST(GET_LOW_REG(s2), s1, disp + 4);      /* keep this order */
1941                                 M_IST(GET_HIGH_REG(s2), s1, disp);         /* keep this order */
1942                                 break;
1943                         case TYPE_ADR:
1944                                 M_AST(s2, s1, disp);
1945                                 break;
1946                         case TYPE_FLT:
1947                                 M_FST(s2, s1, disp);
1948                                 break;
1949                         case TYPE_DBL:
1950                                 M_DST(s2, s1, disp);
1951                                 break;
1952                         }
1953                         break;
1954
1955
1956                 /* branch operations **************************************************/
1957
1958                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1959
1960                         var_to_reg_int(s1, src, REG_ITMP1);
1961                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1962
1963                         if (iptr->val.a) {
1964                                 codegen_addpatchref(cd, mcodeptr,
1965                                                                         PATCHER_athrow_areturn,
1966                                                                         (unresolved_class *) iptr->val.a, 0);
1967
1968                                 if (opt_showdisassemble)
1969                                         M_NOP;
1970                         }
1971
1972                         disp = dseg_addaddress(cd, asm_handle_exception);
1973                         M_ALD(REG_ITMP2, REG_PV, disp);
1974                         M_MTCTR(REG_ITMP2);
1975
1976                         if (m->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
1977                         M_BL(0);                                        /* get current PC */
1978                         M_MFLR(REG_ITMP2_XPC);
1979                         if (m->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
1980                         M_RTS;                                          /* jump to CTR    */
1981
1982                         ALIGNCODENOP;
1983                         break;
1984
1985                 case ICMD_GOTO:         /* ... ==> ...                                */
1986                                         /* op1 = target JavaVM pc                     */
1987                         M_BR(0);
1988                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
1989                         ALIGNCODENOP;
1990                         break;
1991
1992                 case ICMD_JSR:          /* ... ==> ...                                */
1993                                         /* op1 = target JavaVM pc                     */
1994
1995                         if (m->isleafmethod) M_MFLR(REG_ITMP2);
1996                         M_BL(0);
1997                         M_MFLR(REG_ITMP1);
1998                         M_IADD_IMM(REG_ITMP1, m->isleafmethod ? 16 : 12, REG_ITMP1);
1999                         if (m->isleafmethod) M_MTLR(REG_ITMP2);
2000                         M_BR(0);
2001                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2002                         break;
2003
2004                 case ICMD_RET:          /* ... ==> ...                                */
2005                                         /* op1 = local variable                       */
2006
2007                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2008                         if (var->flags & INMEMORY) {
2009                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2010                                 M_MTCTR(REG_ITMP1);
2011                         } else {
2012                                 M_MTCTR(var->regoff);
2013                         }
2014                         M_RTS;
2015                         ALIGNCODENOP;
2016                         break;
2017
2018                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2019                                         /* op1 = target JavaVM pc                     */
2020
2021                         var_to_reg_int(s1, src, REG_ITMP1);
2022                         M_TST(s1);
2023                         M_BEQ(0);
2024                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2025                         break;
2026
2027                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2028                                         /* op1 = target JavaVM pc                     */
2029
2030                         var_to_reg_int(s1, src, REG_ITMP1);
2031                         M_TST(s1);
2032                         M_BNE(0);
2033                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2034                         break;
2035
2036                 case ICMD_IFLT:
2037                 case ICMD_IFLE:
2038                 case ICMD_IFNE:
2039                 case ICMD_IFGT:
2040                 case ICMD_IFGE:
2041                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2042                                         /* op1 = target JavaVM pc, val.i = constant   */
2043
2044                         var_to_reg_int(s1, src, REG_ITMP1);
2045                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2046                                 M_CMPI(s1, iptr->val.i);
2047                         } else {
2048                                 ICONST(REG_ITMP2, iptr->val.i);
2049                                 M_CMP(s1, REG_ITMP2);
2050                         }
2051                         switch (iptr->opc) {
2052                         case ICMD_IFLT:
2053                                 M_BLT(0);
2054                                 break;
2055                         case ICMD_IFLE:
2056                                 M_BLE(0);
2057                                 break;
2058                         case ICMD_IFNE:
2059                                 M_BNE(0);
2060                                 break;
2061                         case ICMD_IFGT:
2062                                 M_BGT(0);
2063                                 break;
2064                         case ICMD_IFGE:
2065                                 M_BGE(0);
2066                                 break;
2067                         case ICMD_IFEQ:
2068                                 M_BEQ(0);
2069                                 break;
2070                         }
2071                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2072                         break;
2073
2074
2075                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2076                                         /* op1 = target JavaVM pc, val.l = constant   */
2077
2078                         var_to_reg_int_low(s1, src, REG_ITMP1);
2079                         var_to_reg_int_high(s2, src, REG_ITMP2);
2080                         if (iptr->val.l == 0) {
2081                                 M_OR(s1, s2, REG_ITMP3);
2082                                 M_CMPI(REG_ITMP3, 0);
2083                         } else if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2084                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2085                                 M_BNE(2);
2086                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2087                         } else {
2088                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2089                                 M_CMP(s2, REG_ITMP3);
2090                                 M_BNE(3);
2091                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2092                                 M_CMP(s1, REG_ITMP3)
2093                         }
2094                         M_BEQ(0);
2095                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2096                         break;
2097
2098                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2099                                         /* op1 = target JavaVM pc, val.l = constant   */
2100                         var_to_reg_int_low(s1, src, REG_ITMP1);
2101                         var_to_reg_int_high(s2, src, REG_ITMP2);
2102 /*                      if (iptr->val.l == 0) { */
2103 /*                              M_OR(s1, s2, REG_ITMP3); */
2104 /*                              M_CMPI(REG_ITMP3, 0); */
2105
2106 /*                      } else  */
2107                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2108                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2109                                 M_BLT(0);
2110                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2111                                 M_BGT(2);
2112                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2113                         } else {
2114                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2115                                 M_CMP(s2, REG_ITMP3);
2116                                 M_BLT(0);
2117                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2118                                 M_BGT(3);
2119                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2120                                 M_CMP(s1, REG_ITMP3)
2121                         }
2122                         M_BLT(0);
2123                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2124                         break;
2125
2126                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2127                                         /* op1 = target JavaVM pc, val.l = constant   */
2128
2129                         var_to_reg_int_low(s1, src, REG_ITMP1);
2130                         var_to_reg_int_high(s2, src, REG_ITMP2);
2131 /*                      if (iptr->val.l == 0) { */
2132 /*                              M_OR(s1, s2, REG_ITMP3); */
2133 /*                              M_CMPI(REG_ITMP3, 0); */
2134
2135 /*                      } else  */
2136                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2137                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2138                                 M_BLT(0);
2139                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2140                                 M_BGT(2);
2141                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2142                         } else {
2143                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2144                                 M_CMP(s2, REG_ITMP3);
2145                                 M_BLT(0);
2146                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2147                                 M_BGT(3);
2148                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2149                                 M_CMP(s1, REG_ITMP3)
2150                         }
2151                         M_BLE(0);
2152                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2153                         break;
2154
2155                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2156                                         /* op1 = target JavaVM pc, val.l = constant   */
2157
2158                         var_to_reg_int_low(s1, src, REG_ITMP1);
2159                         var_to_reg_int_high(s2, src, REG_ITMP2);
2160                         if (iptr->val.l == 0) {
2161                                 M_OR(s1, s2, REG_ITMP3);
2162                                 M_CMPI(REG_ITMP3, 0);
2163                         } else if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2164                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2165                                 M_BEQ(2);
2166                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2167                         } else {
2168                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2169                                 M_CMP(s2, REG_ITMP3);
2170                                 M_BEQ(3);
2171                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2172                                 M_CMP(s1, REG_ITMP3)
2173                         }
2174                         M_BNE(0);
2175                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2176                         break;
2177
2178                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2179                                         /* op1 = target JavaVM pc, val.l = constant   */
2180
2181                         var_to_reg_int_low(s1, src, REG_ITMP1);
2182                         var_to_reg_int_high(s2, src, REG_ITMP2);
2183 /*                      if (iptr->val.l == 0) { */
2184 /*                              M_OR(s1, s2, REG_ITMP3); */
2185 /*                              M_CMPI(REG_ITMP3, 0); */
2186
2187 /*                      } else  */
2188                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2189                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2190                                 M_BGT(0);
2191                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2192                                 M_BLT(2);
2193                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2194                         } else {
2195                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2196                                 M_CMP(s2, REG_ITMP3);
2197                                 M_BGT(0);
2198                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2199                                 M_BLT(3);
2200                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2201                                 M_CMP(s1, REG_ITMP3)
2202                         }
2203                         M_BGT(0);
2204                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2205                         break;
2206
2207                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2208                                         /* op1 = target JavaVM pc, val.l = constant   */
2209                         var_to_reg_int_low(s1, src, REG_ITMP1);
2210                         var_to_reg_int_high(s2, src, REG_ITMP2);
2211 /*                      if (iptr->val.l == 0) { */
2212 /*                              M_OR(s1, s2, REG_ITMP3); */
2213 /*                              M_CMPI(REG_ITMP3, 0); */
2214
2215 /*                      } else  */
2216                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2217                                 M_CMPI(s2, (u4) (iptr->val.l >> 32));
2218                                 M_BGT(0);
2219                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2220                                 M_BLT(2);
2221                                 M_CMPI(s1, (u4) (iptr->val.l & 0xffffffff));
2222                         } else {
2223                                 ICONST(REG_ITMP3, (u4) (iptr->val.l >> 32));
2224                                 M_CMP(s2, REG_ITMP3);
2225                                 M_BGT(0);
2226                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2227                                 M_BLT(3);
2228                                 ICONST(REG_ITMP3, (u4) (iptr->val.l & 0xffffffff));
2229                                 M_CMP(s1, REG_ITMP3)
2230                         }
2231                         M_BGE(0);
2232                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2233                         break;
2234
2235                         /* CUT: alle _L */
2236                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2237                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2238                         /******************************************************************
2239             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2240                         *******************************************************************/
2241                 case ICMD_IF_ACMPEQ:
2242
2243                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2244                         var_to_reg_int(s2, src, REG_ITMP2);
2245                         M_CMP(s1, s2);
2246                         M_BEQ(0);
2247                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2248                         break;
2249
2250                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2251                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2252                         /******************************************************************
2253             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2254                         *******************************************************************/
2255                 case ICMD_IF_ACMPNE:
2256
2257                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2258                         var_to_reg_int(s2, src, REG_ITMP2);
2259                         M_CMP(s1, s2);
2260                         M_BNE(0);
2261                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2262                         break;
2263
2264                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2265                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2266                         /******************************************************************
2267             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2268                         *******************************************************************/
2269
2270                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2271                         var_to_reg_int(s2, src, REG_ITMP2);
2272                         M_CMP(s1, s2);
2273                         M_BLT(0);
2274                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2275                         break;
2276
2277                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2278                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2279                         /******************************************************************
2280             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2281                         *******************************************************************/
2282
2283                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2284                         var_to_reg_int(s2, src, REG_ITMP2);
2285                         M_CMP(s1, s2);
2286                         M_BGT(0);
2287                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2288                         break;
2289
2290                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2291                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2292                         /******************************************************************
2293             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2294                         *******************************************************************/
2295
2296                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2297                         var_to_reg_int(s2, src, REG_ITMP2);
2298                         M_CMP(s1, s2);
2299                         M_BLE(0);
2300                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2301                         break;
2302
2303                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2304                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2305                         /******************************************************************
2306             TODO: CMP UPPER 32 BIT OF LONGS, TOO!
2307                         *******************************************************************/
2308
2309                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2310                         var_to_reg_int(s2, src, REG_ITMP2);
2311                         M_CMP(s1, s2);
2312                         M_BGE(0);
2313                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2314                         break;
2315
2316                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2317
2318                         var_to_reg_int(s1, src, REG_RESULT);
2319                         M_TINTMOVE(src->type, s1, REG_RESULT);
2320                         goto nowperformreturn;
2321
2322                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2323
2324                         var_to_reg_int(s1, src, REG_RESULT);
2325                         M_TINTMOVE(src->type, s1, REG_RESULT);
2326
2327                         if (iptr->val.a) {
2328                                 codegen_addpatchref(cd, mcodeptr,
2329                                                                         PATCHER_athrow_areturn,
2330                                                                         (unresolved_class *) iptr->val.a, 0);
2331
2332                                 if (opt_showdisassemble)
2333                                         M_NOP;
2334                         }
2335                         goto nowperformreturn;
2336
2337                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2338
2339                         var_to_reg_int(s1, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2340                         M_TINTMOVE(src->type, s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2341                         goto nowperformreturn;
2342
2343                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2344                 case ICMD_DRETURN:
2345
2346                         var_to_reg_flt(s1, src, REG_FRESULT);
2347                         M_FLTMOVE(s1, REG_FRESULT);
2348                         goto nowperformreturn;
2349
2350                 case ICMD_RETURN:      /* ...  ==> ...                                */
2351
2352 nowperformreturn:
2353                         {
2354                         s4 i, p;
2355
2356                         p = parentargs_base;
2357
2358                         /* call trace function */
2359
2360                         if (runverbose) {
2361                                 M_MFLR(REG_ZERO);
2362                                 M_LDA(REG_SP, REG_SP, -10 * 8);
2363                                 M_DST(REG_FRESULT, REG_SP, 48+0);
2364                                 M_IST(REG_RESULT, REG_SP, 48+8);
2365                                 M_AST(REG_ZERO, REG_SP, 48+12);
2366                                 M_IST(REG_RESULT2, REG_SP, 48+16);
2367
2368                                 /* keep this order */
2369                                 switch (iptr->opc) {
2370                                 case ICMD_IRETURN:
2371                                 case ICMD_ARETURN:
2372 #if defined(__DARWIN__)
2373                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2374                                         M_CLR(rd->argintregs[1]);
2375 #else
2376                                         M_MOV(REG_RESULT, rd->argintregs[3]);
2377                                         M_CLR(rd->argintregs[2]);
2378 #endif
2379                                         break;
2380
2381                                 case ICMD_LRETURN:
2382 #if defined(__DARWIN__)
2383                                         M_MOV(REG_RESULT2, rd->argintregs[2]);
2384                                         M_MOV(REG_RESULT, rd->argintregs[1]);
2385 #else
2386                                         M_MOV(REG_RESULT2, rd->argintregs[3]);
2387                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2388 #endif
2389                                         break;
2390                                 }
2391
2392                                 disp = dseg_addaddress(cd, m);
2393                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2394
2395                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2396                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2397                                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2398                                 M_ALD(REG_ITMP2, REG_PV, disp);
2399                                 M_MTCTR(REG_ITMP2);
2400                                 M_JSR;
2401
2402                                 M_DLD(REG_FRESULT, REG_SP, 48+0);
2403                                 M_ILD(REG_RESULT, REG_SP, 48+8);
2404                                 M_ALD(REG_ZERO, REG_SP, 48+12);
2405                                 M_ILD(REG_RESULT2, REG_SP, 48+16);
2406                                 M_LDA(REG_SP, REG_SP, 10 * 8);
2407                                 M_MTLR(REG_ZERO);
2408                         }
2409
2410 #if defined(USE_THREADS)
2411                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2412                                 /* we need to save the proper return value */
2413                                 switch (iptr->opc) {
2414                                 case ICMD_LRETURN:
2415                                         M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2416                                         /* fall through */
2417                                 case ICMD_IRETURN:
2418                                 case ICMD_ARETURN:
2419                                         M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2420                                         break;
2421                                 case ICMD_FRETURN:
2422                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2423                                         break;
2424                                 case ICMD_DRETURN:
2425                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2426                                         break;
2427                                 }
2428
2429                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2430                                 M_ALD(REG_ITMP3, REG_PV, disp);
2431                                 M_MTCTR(REG_ITMP3);
2432                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2433                                 M_JSR;
2434
2435                                 /* and now restore the proper return value */
2436                                 switch (iptr->opc) {
2437                                 case ICMD_LRETURN:
2438                                         M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2439                                         /* fall through */
2440                                 case ICMD_IRETURN:
2441                                 case ICMD_ARETURN:
2442                                         M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2443                                         break;
2444                                 case ICMD_FRETURN:
2445                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2446                                         break;
2447                                 case ICMD_DRETURN:
2448                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2449                                         break;
2450                                 }
2451                         }
2452 #endif
2453
2454                         /* restore return address                                         */
2455
2456                         if (!m->isleafmethod) {
2457                                 M_ALD(REG_ZERO, REG_SP, p * 4 + LA_LR_OFFSET);
2458                                 M_MTLR(REG_ZERO);
2459                         }
2460
2461                         /* restore saved registers                                        */
2462
2463                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2464                                 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2465                         }
2466                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2467                                 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2468                         }
2469
2470                         /* deallocate stack                                               */
2471
2472                         if (parentargs_base)
2473                                 M_LDA(REG_SP, REG_SP, parentargs_base * 4);
2474
2475                         M_RET;
2476                         ALIGNCODENOP;
2477                         }
2478                         break;
2479
2480
2481                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2482                         {
2483                         s4 i, l, *s4ptr;
2484                         void **tptr;
2485
2486                         tptr = (void **) iptr->target;
2487
2488                         s4ptr = iptr->val.a;
2489                         l = s4ptr[1];                          /* low     */
2490                         i = s4ptr[2];                          /* high    */
2491
2492                         var_to_reg_int(s1, src, REG_ITMP1);
2493                         if (l == 0) {
2494                                 M_INTMOVE(s1, REG_ITMP1);
2495                         } else if (l <= 32768) {
2496                                 M_LDA(REG_ITMP1, s1, -l);
2497                         } else {
2498                                 ICONST(REG_ITMP2, l);
2499                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2500                         }
2501                         i = i - l + 1;
2502
2503                         /* range check */
2504
2505                         M_CMPUI(REG_ITMP1, i - 1);
2506                         M_BGT(0);
2507                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2508
2509                         /* build jump table top down and use address of lowest entry */
2510
2511                         /* s4ptr += 3 + i; */
2512                         tptr += i;
2513
2514                         while (--i >= 0) {
2515                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2516                                 --tptr;
2517                         }
2518                         }
2519
2520                         /* length of dataseg after last dseg_addtarget is used by load */
2521
2522                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2523                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2524                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2525                         M_MTCTR(REG_ITMP2);
2526                         M_RTS;
2527                         ALIGNCODENOP;
2528                         break;
2529
2530
2531                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2532                         {
2533                         s4 i, l, val, *s4ptr;
2534                         void **tptr;
2535
2536                         tptr = (void **) iptr->target;
2537
2538                         s4ptr = iptr->val.a;
2539                         l = s4ptr[0];                          /* default  */
2540                         i = s4ptr[1];                          /* count    */
2541
2542                         MCODECHECK((i<<2)+8);
2543                         var_to_reg_int(s1, src, REG_ITMP1);
2544                         while (--i >= 0) {
2545                                 s4ptr += 2;
2546                                 ++tptr;
2547
2548                                 val = s4ptr[0];
2549                                 if ((val >= -32768) && (val <= 32767)) {
2550                                         M_CMPI(s1, val);
2551                                 } else {
2552                                         a = dseg_adds4(cd, val);
2553                                         M_ILD(REG_ITMP2, REG_PV, a);
2554                                         M_CMP(s1, REG_ITMP2);
2555                                 }
2556                                 M_BEQ(0);
2557                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2558                         }
2559
2560                         M_BR(0);
2561                         tptr = (void **) iptr->target;
2562                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2563
2564                         ALIGNCODENOP;
2565                         break;
2566                         }
2567
2568
2569                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2570                                         /* op1 = arg count val.a = builtintable entry */
2571
2572                         bte = iptr->val.a;
2573                         md = bte->md;
2574                         goto gen_method;
2575
2576                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2577                                         /* op1 = arg count, val.a = method pointer    */
2578
2579                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2580                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2581                 case ICMD_INVOKEINTERFACE:
2582
2583                         lm = iptr->val.a;
2584
2585                         if (lm == NULL) {
2586                                 unresolved_method *um = iptr->target;
2587                                 md = um->methodref->parseddesc.md;
2588                         } else {
2589                                 md = lm->parseddesc;
2590                         }
2591
2592 gen_method:
2593                         s3 = md->paramcount;
2594
2595                         MCODECHECK((s3 << 1) + 64);
2596
2597                         /* copy arguments to registers or stack location */
2598
2599                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2600                                 if (src->varkind == ARGVAR)
2601                                         continue;
2602                                 if (IS_INT_LNG_TYPE(src->type)) {
2603                                         if (!md->params[s3].inmemory) {
2604                                                 if (IS_2_WORD_TYPE(src->type)) {
2605                                                         s1 = PACK_REGS(
2606                                                    rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2607                                                    rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2608                                                 } else {
2609                                                         s1 = rd->argintregs[md->params[s3].regoff];
2610                                                 }
2611                                                 var_to_reg_int(d, src, s1);
2612                                                 M_TINTMOVE(src->type, d, s1);
2613                                         } else {
2614                                                 var_to_reg_int(d, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2615                                                 M_IST(GET_HIGH_REG(d), REG_SP,
2616                                                           md->params[s3].regoff * 4);
2617                                                 if (IS_2_WORD_TYPE(src->type)) {
2618                                                         M_IST(GET_LOW_REG(d),
2619                                                                   REG_SP, md->params[s3].regoff * 4 + 4);
2620                                                 }
2621                                         }
2622
2623                                 } else {
2624                                         if (!md->params[s3].inmemory) {
2625                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2626                                                 var_to_reg_flt(d, src, s1);
2627                                                 M_FLTMOVE(d, s1);
2628                                         } else {
2629                                                 var_to_reg_flt(d, src, REG_FTMP1);
2630                                                 if (IS_2_WORD_TYPE(src->type)) {
2631                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2632                                                 } else {
2633                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2634                                                 }
2635                                         }
2636                                 }
2637                         } /* end of for */
2638
2639                         switch (iptr->opc) {
2640                         case ICMD_BUILTIN:
2641                                 disp = dseg_addaddress(cd, bte->fp);
2642                                 d = md->returntype.type;
2643
2644                                 M_ALD(REG_PV, REG_PV, disp);  /* pointer to built-in-function */
2645                                 M_MTCTR(REG_PV);
2646                                 M_JSR;
2647                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2648                                 M_MFLR(REG_ITMP1);
2649                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2650
2651                                 /* if op1 == true, we need to check for an exception */
2652
2653                                 if (iptr->op1 == true) {
2654                                         M_CMPI(REG_RESULT, 0);
2655                                         M_BEQ(0);
2656                                         codegen_addxexceptionrefs(cd, mcodeptr);
2657                                 }
2658                                 break;
2659
2660                         case ICMD_INVOKESPECIAL:
2661                                 gen_nullptr_check(rd->argintregs[0]);
2662                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2663                                 /* fall through */
2664
2665                         case ICMD_INVOKESTATIC:
2666                                 if (lm == NULL) {
2667                                         unresolved_method *um = iptr->target;
2668
2669                                         disp = dseg_addaddress(cd, NULL);
2670
2671                                         codegen_addpatchref(cd, mcodeptr,
2672                                                                                 PATCHER_invokestatic_special, um, disp);
2673
2674                                         if (opt_showdisassemble)
2675                                                 M_NOP;
2676
2677                                         d = md->returntype.type;
2678
2679                                 } else {
2680                                         disp = dseg_addaddress(cd, lm->stubroutine);
2681                                         d = md->returntype.type;
2682                                 }
2683
2684                                 M_ALD(REG_PV, REG_PV, disp);
2685                                 M_MTCTR(REG_PV);
2686                                 M_JSR;
2687                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2688                                 M_MFLR(REG_ITMP1);
2689                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2690                                 break;
2691
2692                         case ICMD_INVOKEVIRTUAL:
2693                                 gen_nullptr_check(rd->argintregs[0]);
2694
2695                                 if (lm == NULL) {
2696                                         unresolved_method *um = iptr->target;
2697
2698                                         codegen_addpatchref(cd, mcodeptr,
2699                                                                                 PATCHER_invokevirtual, um, 0);
2700
2701                                         if (opt_showdisassemble)
2702                                                 M_NOP;
2703
2704                                         s1 = 0;
2705                                         d = md->returntype.type;
2706
2707                                 } else {
2708                                         s1 = OFFSET(vftbl_t, table[0]) +
2709                                                 sizeof(methodptr) * lm->vftblindex;
2710                                         d = md->returntype.type;
2711                                 }
2712
2713                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2714                                           OFFSET(java_objectheader, vftbl));
2715                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2716                                 M_MTCTR(REG_PV);
2717                                 M_JSR;
2718                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2719                                 M_MFLR(REG_ITMP1);
2720                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2721                                 break;
2722
2723                         case ICMD_INVOKEINTERFACE:
2724                                 gen_nullptr_check(rd->argintregs[0]);
2725
2726                                 if (lm == NULL) {
2727                                         unresolved_method *um = iptr->target;
2728
2729                                         codegen_addpatchref(cd, mcodeptr,
2730                                                                                 PATCHER_invokeinterface, um, 0);
2731
2732                                         if (opt_showdisassemble)
2733                                                 M_NOP;
2734
2735                                         s1 = 0;
2736                                         s2 = 0;
2737                                         d = md->returntype.type;
2738
2739                                 } else {
2740                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2741                                                 sizeof(methodptr*) * lm->class->index;
2742
2743                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2744
2745                                         d = md->returntype.type;
2746                                 }
2747
2748                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2749                                           OFFSET(java_objectheader, vftbl));
2750                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2751                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2752                                 M_MTCTR(REG_PV);
2753                                 M_JSR;
2754                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2755                                 M_MFLR(REG_ITMP1);
2756                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2757                                 break;
2758                         }
2759
2760                         /* d contains return type */
2761
2762                         if (d != TYPE_VOID) {
2763                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2764                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
2765                                                 s1 = reg_of_var(rd, iptr->dst,
2766                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT));
2767                                                 M_TINTMOVE(iptr->dst->type,
2768                                                                    PACK_REGS(REG_RESULT2, REG_RESULT), s1);
2769                                         } else {
2770                                                 s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
2771                                                 M_TINTMOVE(iptr->dst->type, REG_RESULT, s1);
2772                                         }
2773                                         store_reg_to_var_int(iptr->dst, s1);
2774
2775                                 } else {
2776                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
2777                                         M_FLTMOVE(REG_FRESULT, s1);
2778                                         store_reg_to_var_flt(iptr->dst, s1);
2779                                 }
2780                         }
2781                         break;
2782
2783
2784                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2785                                       /* op1:   0 == array, 1 == class                */
2786                                       /* val.a: (classinfo*) superclass               */
2787
2788                         /*  superclass is an interface:
2789                          *
2790                          *  OK if ((sub == NULL) ||
2791                          *         (sub->vftbl->interfacetablelength > super->index) &&
2792                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2793                          *
2794                          *  superclass is a class:
2795                          *
2796                          *  OK if ((sub == NULL) || (0
2797                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2798                          *         super->vftbl->diffvall));
2799                          */
2800
2801                         if (iptr->op1 == 1) {
2802                                 /* object type cast-check */
2803
2804                                 classinfo *super;
2805                                 vftbl_t   *supervftbl;
2806                                 s4         superindex;
2807
2808                                 super = (classinfo *) iptr->val.a;
2809
2810                                 if (!super) {
2811                                         superindex = 0;
2812                                         supervftbl = NULL;
2813
2814                                 } else {
2815                                         superindex = super->index;
2816                                         supervftbl = super->vftbl;
2817                                 }
2818
2819 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2820                                 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
2821 #endif
2822                                 var_to_reg_int(s1, src, REG_ITMP1);
2823
2824                                 /* calculate interface checkcast code size */
2825
2826                                 s2 = 7;
2827                                 if (!super)
2828                                         s2 += (opt_showdisassemble ? 1 : 0);
2829
2830                                 /* calculate class checkcast code size */
2831
2832                                 s3 = 8 + (s1 == REG_ITMP1);
2833                                 if (!super)
2834                                         s3 += (opt_showdisassemble ? 1 : 0);
2835
2836                                 /* if class is not resolved, check which code to call */
2837
2838                                 if (!super) {
2839                                         M_TST(s1);
2840                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2841
2842                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2843
2844                                         codegen_addpatchref(cd, mcodeptr,
2845                                                                                 PATCHER_checkcast_instanceof_flags,
2846                                                                                 (constant_classref *) iptr->target, disp);
2847
2848                                         if (opt_showdisassemble)
2849                                                 M_NOP;
2850
2851                                         M_ILD(REG_ITMP2, REG_PV, disp);
2852                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2853                                         M_BEQ(s2 + 1);
2854                                 }
2855
2856                                 /* interface checkcast code */
2857
2858                                 if (!super || (super->flags & ACC_INTERFACE)) {
2859                                         if (super) {
2860                                                 M_TST(s1);
2861                                                 M_BEQ(s2);
2862
2863                                         } else {
2864                                                 codegen_addpatchref(cd, mcodeptr,
2865                                                                                         PATCHER_checkcast_instanceof_interface,
2866                                                                                         (constant_classref *) iptr->target, 0);
2867
2868                                                 if (opt_showdisassemble)
2869                                                         M_NOP;
2870                                         }
2871
2872                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2873                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2874                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2875                                         M_BLE(0);
2876                                         codegen_addxcastrefs(cd, mcodeptr);
2877                                         M_ALD(REG_ITMP3, REG_ITMP2,
2878                                                   OFFSET(vftbl_t, interfacetable[0]) -
2879                                                   superindex * sizeof(methodptr*));
2880                                         M_TST(REG_ITMP3);
2881                                         M_BEQ(0);
2882                                         codegen_addxcastrefs(cd, mcodeptr);
2883
2884                                         if (!super)
2885                                                 M_BR(s3);
2886                                 }
2887
2888                                 /* class checkcast code */
2889
2890                                 if (!super || !(super->flags & ACC_INTERFACE)) {
2891                                         disp = dseg_addaddress(cd, supervftbl);
2892
2893                                         if (super) {
2894                                                 M_TST(s1);
2895                                                 M_BEQ(s3);
2896
2897                                         } else {
2898                                                 codegen_addpatchref(cd, mcodeptr,
2899                                                                                         PATCHER_checkcast_class,
2900                                                                                         (constant_classref *) iptr->target,
2901                                                                                         disp);
2902
2903                                                 if (opt_showdisassemble)
2904                                                         M_NOP;
2905                                         }
2906
2907                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2908 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2909                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
2910 #endif
2911                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2912                                         M_ALD(REG_ITMP2, REG_PV, disp);
2913                                         if (s1 != REG_ITMP1) {
2914                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
2915                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2916 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2917                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
2918 #endif
2919                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
2920                                         } else {
2921                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2922                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
2923                                                 M_ALD(REG_ITMP2, REG_PV, disp);
2924                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2925 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2926                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
2927 #endif
2928                                         }
2929                                         M_CMPU(REG_ITMP3, REG_ITMP2);
2930                                         M_BGT(0);
2931                                         codegen_addxcastrefs(cd, mcodeptr);
2932                                 }
2933                                 d = reg_of_var(rd, iptr->dst, s1);
2934
2935                         } else {
2936                                 /* array type cast-check */
2937
2938                                 var_to_reg_int(s1, src, rd->argintregs[0]);
2939                                 M_INTMOVE(s1, rd->argintregs[0]);
2940
2941                                 disp = dseg_addaddress(cd, iptr->val.a);
2942
2943                                 if (iptr->val.a == NULL) {
2944                                         codegen_addpatchref(cd, mcodeptr,
2945                                                                                 PATCHER_builtin_arraycheckcast,
2946                                                                                 (constant_classref *) iptr->target,
2947                                                                                 disp);
2948
2949                                         if (opt_showdisassemble)
2950                                                 M_NOP;
2951                                 }
2952
2953                                 M_ALD(rd->argintregs[1], REG_PV, disp);
2954                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
2955                                 M_ALD(REG_ITMP2, REG_PV, disp);
2956                                 M_MTCTR(REG_ITMP2);
2957                                 M_JSR;
2958                                 M_TST(REG_RESULT);
2959                                 M_BEQ(0);
2960                                 codegen_addxcastrefs(cd, mcodeptr);
2961
2962                                 var_to_reg_int(s1, src, REG_ITMP1);
2963                                 d = reg_of_var(rd, iptr->dst, s1);
2964                         }
2965                         M_INTMOVE(s1, d);
2966                         store_reg_to_var_int(iptr->dst, d);
2967                         break;
2968
2969                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2970                                       /* val.a: (classinfo*) superclass               */
2971
2972                         /*  superclass is an interface:
2973                          *
2974                          *  return (sub != NULL) &&
2975                          *         (sub->vftbl->interfacetablelength > super->index) &&
2976                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
2977                          *
2978                          *  superclass is a class:
2979                          *
2980                          *  return ((sub != NULL) && (0
2981                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2982                          *          super->vftbl->diffvall));
2983                          */
2984
2985                         {
2986                         classinfo *super;
2987                         vftbl_t   *supervftbl;
2988                         s4         superindex;
2989
2990                         super = (classinfo *) iptr->val.a;
2991
2992                         if (!super) {
2993                                 superindex = 0;
2994                                 supervftbl = NULL;
2995
2996                         } else {
2997                                 superindex = super->index;
2998                                 supervftbl = super->vftbl;
2999                         }
3000
3001 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3002             codegen_threadcritrestart(cd, (u1*) mcodeptr - cd->mcodebase);
3003 #endif
3004                         var_to_reg_int(s1, src, REG_ITMP1);
3005                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3006                         if (s1 == d) {
3007                                 M_MOV(s1, REG_ITMP1);
3008                                 s1 = REG_ITMP1;
3009                         }
3010
3011                         /* calculate interface instanceof code size */
3012
3013                         s2 = 8;
3014                         if (!super)
3015                                 s2 += (opt_showdisassemble ? 1 : 0);
3016
3017                         /* calculate class instanceof code size */
3018
3019                         s3 = 10;
3020                         if (!super)
3021                                 s3 += (opt_showdisassemble ? 1 : 0);
3022
3023                         M_CLR(d);
3024
3025                         /* if class is not resolved, check which code to call */
3026
3027                         if (!super) {
3028                                 M_TST(s1);
3029                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3030
3031                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3032
3033                                 codegen_addpatchref(cd, mcodeptr,
3034                                                                         PATCHER_checkcast_instanceof_flags,
3035                                                                         (constant_classref *) iptr->target, disp);
3036
3037                                 if (opt_showdisassemble)
3038                                         M_NOP;
3039
3040                                 M_ILD(REG_ITMP3, REG_PV, disp);
3041                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3042                                 M_BEQ(s2 + 1);
3043                         }
3044
3045                         /* interface instanceof code */
3046
3047                         if (!super || (super->flags & ACC_INTERFACE)) {
3048                                 if (super) {
3049                                         M_TST(s1);
3050                                         M_BEQ(s2);
3051
3052                                 } else {
3053                                         codegen_addpatchref(cd, mcodeptr,
3054                                                                                 PATCHER_checkcast_instanceof_interface,
3055                                                                                 (constant_classref *) iptr->target, 0);
3056
3057                                         if (opt_showdisassemble)
3058                                                 M_NOP;
3059                                 }
3060
3061                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3062                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3063                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3064                                 M_BLE(4);
3065                                 M_ALD(REG_ITMP1, REG_ITMP1,
3066                                           OFFSET(vftbl_t, interfacetable[0]) -
3067                                           superindex * sizeof(methodptr*));
3068                                 M_TST(REG_ITMP1);
3069                                 M_BEQ(1);
3070                                 M_IADD_IMM(REG_ZERO, 1, d);
3071
3072                                 if (!super)
3073                                         M_BR(s3);
3074                         }
3075
3076                         /* class instanceof code */
3077
3078                         if (!super || !(super->flags & ACC_INTERFACE)) {
3079                                 disp = dseg_addaddress(cd, supervftbl);
3080
3081                                 if (super) {
3082                                         M_TST(s1);
3083                                         M_BEQ(s3);
3084
3085                                 } else {
3086                                         codegen_addpatchref(cd, mcodeptr,
3087                                                                                 PATCHER_instanceof_class,
3088                                                                                 (constant_classref *) iptr->target,
3089                                                                                 disp);
3090
3091                                         if (opt_showdisassemble) {
3092                                                 M_NOP;
3093                                         }
3094                                 }
3095
3096                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3097                                 M_ALD(REG_ITMP2, REG_PV, disp);
3098 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3099                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3100 #endif
3101                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3102                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3103                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3104 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3105                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3106 #endif
3107                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3108                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3109                                 M_CLR(d);
3110                                 M_BGT(1);
3111                                 M_IADD_IMM(REG_ZERO, 1, d);
3112                         }
3113                         store_reg_to_var_int(iptr->dst, d);
3114                         }
3115                         break;
3116
3117                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3118                                       /* op1 = dimension, val.a = array descriptor    */
3119
3120                         /* check for negative sizes and copy sizes to stack if necessary  */
3121
3122                         MCODECHECK((iptr->op1 << 1) + 64);
3123
3124                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3125                                 /* copy SAVEDVAR sizes to stack */
3126
3127                                 if (src->varkind != ARGVAR) {
3128                                         var_to_reg_int(s2, src, REG_ITMP1);
3129 #if defined(__DARWIN__)
3130                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3131 #else
3132                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3133 #endif
3134                                 }
3135                         }
3136
3137                         /* a0 = dimension count */
3138
3139                         ICONST(rd->argintregs[0], iptr->op1);
3140
3141                         /* is patcher function set? */
3142
3143                         if (iptr->target) {
3144                                 disp = dseg_addaddress(cd, NULL);
3145
3146                                 codegen_addpatchref(cd, mcodeptr,
3147                                                                         PATCHER_builtin_multianewarray,
3148                                                                         iptr->val.a, disp);
3149
3150                                 if (opt_showdisassemble)
3151                                         M_NOP;
3152
3153                         } else {
3154                                 disp = dseg_addaddress(cd, iptr->val.a);
3155                         }
3156
3157                         /* a1 = arraydescriptor */
3158
3159                         M_ALD(rd->argintregs[1], REG_PV, disp);
3160
3161                         /* a2 = pointer to dimensions = stack pointer */
3162
3163 #if defined(__DARWIN__)
3164                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3165 #else
3166                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3167 #endif
3168
3169                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3170                         M_ALD(REG_ITMP3, REG_PV, disp);
3171                         M_MTCTR(REG_ITMP3);
3172                         M_JSR;
3173
3174                         /* check for exception before result assignment */
3175
3176                         M_CMPI(REG_RESULT, 0);
3177                         M_BEQ(0);
3178                         codegen_addxexceptionrefs(cd, mcodeptr);
3179
3180                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3181                         M_INTMOVE(REG_RESULT, d);
3182                         store_reg_to_var_int(iptr->dst, d);
3183                         break;
3184
3185                 default:
3186                         *exceptionptr =
3187                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3188                         return false;
3189         } /* switch */
3190
3191         } /* for instruction */
3192
3193         /* copy values to interface registers */
3194
3195         src = bptr->outstack;
3196         len = bptr->outdepth;
3197         MCODECHECK(64 + len);
3198 #ifdef LSRA
3199         if (!opt_lsra)
3200 #endif
3201         while (src) {
3202                 len--;
3203                 if ((src->varkind != STACKVAR)) {
3204                         s2 = src->type;
3205                         if (IS_FLT_DBL_TYPE(s2)) {
3206                                 var_to_reg_flt(s1, src, REG_FTMP1);
3207                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3208                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3209
3210                                 } else {
3211                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3212                                 }
3213
3214                         } else {
3215                                 var_to_reg_int(s1, src, REG_ITMP1);
3216                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3217                                         M_TINTMOVE(s2, s1, rd->interfaces[len][s2].regoff);
3218
3219                                 } else {
3220                                         if (IS_2_WORD_TYPE(s2)) {
3221                                                 M_IST(GET_HIGH_REG(s1),
3222                                                           REG_SP, rd->interfaces[len][s2].regoff * 4);
3223                                                 M_IST(GET_LOW_REG(s1), REG_SP,
3224                                                           rd->interfaces[len][s2].regoff * 4 + 4);
3225                                         } else {
3226                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3227                                         }
3228
3229                                 }
3230                         }
3231                 }
3232                 src = src->prev;
3233         }
3234         } /* if (bptr -> flags >= BBREACHED) */
3235         } /* for basic block */
3236
3237         codegen_createlinenumbertable(cd);
3238
3239         {
3240
3241         s4        *xcodeptr;
3242         branchref *bref;
3243
3244         /* generate ArithemticException check stubs */
3245
3246         xcodeptr = NULL;
3247
3248         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3249                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3250                                   bref->branchpos,
3251                                                   (u1 *) mcodeptr - cd->mcodebase);
3252
3253                 MCODECHECK(100);
3254
3255                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3256
3257                 if (xcodeptr != NULL) {
3258                         disp = xcodeptr - mcodeptr - 1;
3259                         M_BR(disp);
3260
3261                 } else {
3262                         xcodeptr = mcodeptr;
3263
3264                         if (m->isleafmethod) {
3265                                 M_MFLR(REG_ZERO);
3266                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3267                         }
3268
3269                         M_MOV(REG_PV, rd->argintregs[0]);
3270                         M_MOV(REG_SP, rd->argintregs[1]);
3271
3272                         if (m->isleafmethod)
3273                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3274                         else
3275                                 M_ALD(rd->argintregs[2],
3276                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3277
3278                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3279
3280                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3281                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3282
3283                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3284                         M_ALD(REG_ITMP1, REG_PV, disp);
3285                         M_MTCTR(REG_ITMP1);
3286                         M_JSR;
3287                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3288
3289                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3290                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3291
3292                         if (m->isleafmethod) {
3293                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3294                                 M_MTLR(REG_ZERO);
3295                         }
3296
3297                         disp = dseg_addaddress(cd, asm_handle_exception);
3298                         M_ALD(REG_ITMP3, REG_PV, disp);
3299                         M_MTCTR(REG_ITMP3);
3300                         M_RTS;
3301                 }
3302         }
3303
3304         /* generate ArrayIndexOutOfBoundsException stubs */
3305
3306         xcodeptr = NULL;
3307
3308         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3309                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3310                                   bref->branchpos,
3311                                                   (u1 *) mcodeptr - cd->mcodebase);
3312
3313                 MCODECHECK(100);
3314
3315                 /* move index register into REG_ITMP1 */
3316
3317                 M_MOV(bref->reg, REG_ITMP1);
3318
3319                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3320
3321                 if (xcodeptr != NULL) {
3322                         disp = xcodeptr - mcodeptr - 1;
3323                         M_BR(disp);
3324
3325                 } else {
3326                         xcodeptr = mcodeptr;
3327
3328                         if (m->isleafmethod) {
3329                                 M_MFLR(REG_ZERO);
3330                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3331                         }
3332
3333                         M_MOV(REG_PV, rd->argintregs[0]);
3334                         M_MOV(REG_SP, rd->argintregs[1]);
3335
3336                         if (m->isleafmethod)
3337                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3338                         else
3339                                 M_ALD(rd->argintregs[2],
3340                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3341
3342                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3343                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3344
3345                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3346                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3347
3348                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3349                         M_ALD(REG_ITMP1, REG_PV, disp);
3350                         M_MTCTR(REG_ITMP1);
3351                         M_JSR;
3352                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3353
3354                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3355                         M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3356
3357                         if (m->isleafmethod) {
3358                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3359                                 M_MTLR(REG_ZERO);
3360                         }
3361
3362                         disp = dseg_addaddress(cd, asm_handle_exception);
3363                         M_ALD(REG_ITMP3, REG_PV, disp);
3364                         M_MTCTR(REG_ITMP3);
3365                         M_RTS;
3366                 }
3367         }
3368
3369         /* generate ArrayStoreException check stubs */
3370
3371         xcodeptr = NULL;
3372
3373         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3374                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3375                                   bref->branchpos,
3376                                                   (u1 *) mcodeptr - cd->mcodebase);
3377
3378                 MCODECHECK(100);
3379
3380                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3381
3382                 if (xcodeptr != NULL) {
3383                         disp = xcodeptr - mcodeptr - 1;
3384                         M_BR(disp);
3385
3386                 } else {
3387                         xcodeptr = mcodeptr;
3388
3389                         M_MOV(REG_PV, rd->argintregs[0]);
3390                         M_MOV(REG_SP, rd->argintregs[1]);
3391                         M_ALD(rd->argintregs[2],
3392                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3393                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3394
3395                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3396                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3397
3398                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3399                         M_ALD(REG_ITMP1, REG_PV, disp);
3400                         M_MTCTR(REG_ITMP1);
3401                         M_JSR;
3402                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3403
3404                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3405                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3406
3407                         disp = dseg_addaddress(cd, asm_handle_exception);
3408                         M_ALD(REG_ITMP3, REG_PV, disp);
3409                         M_MTCTR(REG_ITMP3);
3410                         M_RTS;
3411                 }
3412         }
3413
3414         /* generate ClassCastException stubs */
3415
3416         xcodeptr = NULL;
3417
3418         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3419                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3420                                   bref->branchpos,
3421                                                   (u1 *) mcodeptr - cd->mcodebase);
3422
3423                 MCODECHECK(100);
3424
3425                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3426
3427                 if (xcodeptr != NULL) {
3428                         disp = xcodeptr - mcodeptr - 1;
3429                         M_BR(disp);
3430
3431                 } else {
3432                         xcodeptr = mcodeptr;
3433
3434                         if (m->isleafmethod) {
3435                                 M_MFLR(REG_ZERO);
3436                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3437                         }
3438
3439                         M_MOV(REG_PV, rd->argintregs[0]);
3440                         M_MOV(REG_SP, rd->argintregs[1]);
3441
3442                         if (m->isleafmethod)
3443                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3444                         else
3445                                 M_ALD(rd->argintregs[2],
3446                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3447
3448                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3449
3450                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3451                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3452
3453                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3454                         M_ALD(REG_ITMP1, REG_PV, disp);
3455                         M_MTCTR(REG_ITMP1);
3456                         M_JSR;
3457                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3458
3459                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3460                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3461
3462                         if (m->isleafmethod) {
3463                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3464                                 M_MTLR(REG_ZERO);
3465                         }
3466
3467                         disp = dseg_addaddress(cd, asm_handle_exception);
3468                         M_ALD(REG_ITMP3, REG_PV, disp);
3469                         M_MTCTR(REG_ITMP3);
3470                         M_RTS;
3471                 }
3472         }
3473
3474         /* generate NullPointerException stubs */
3475
3476         xcodeptr = NULL;
3477
3478         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3479                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3480                                   bref->branchpos,
3481                                                   (u1 *) mcodeptr - cd->mcodebase);
3482
3483                 MCODECHECK(100);
3484
3485                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3486
3487                 if (xcodeptr != NULL) {
3488                         disp = xcodeptr - mcodeptr - 1;
3489                         M_BR(disp);
3490
3491                 } else {
3492                         xcodeptr = mcodeptr;
3493
3494                         if (m->isleafmethod) {
3495                                 M_MFLR(REG_ZERO);
3496                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3497                         }
3498
3499                         M_MOV(REG_PV, rd->argintregs[0]);
3500                         M_MOV(REG_SP, rd->argintregs[1]);
3501
3502                         if (m->isleafmethod)
3503                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3504                         else
3505                                 M_ALD(rd->argintregs[2],
3506                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3507
3508                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3509
3510                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3511                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3512
3513                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3514                         M_ALD(REG_ITMP1, REG_PV, disp);
3515                         M_MTCTR(REG_ITMP1);
3516                         M_JSR;
3517                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3518
3519                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3520                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3521
3522                         if (m->isleafmethod) {
3523                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3524                                 M_MTLR(REG_ZERO);
3525                         }
3526
3527                         disp = dseg_addaddress(cd, asm_handle_exception);
3528                         M_ALD(REG_ITMP3, REG_PV, disp);
3529                         M_MTCTR(REG_ITMP3);
3530                         M_RTS;
3531                 }
3532         }
3533
3534         /* generate exception check stubs */
3535
3536         xcodeptr = NULL;
3537
3538         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3539                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3540                                   bref->branchpos,
3541                                                   (u1 *) mcodeptr - cd->mcodebase);
3542
3543                 MCODECHECK(100);
3544
3545                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3546
3547                 if (xcodeptr != NULL) {
3548                         disp = xcodeptr - mcodeptr - 1;
3549                         M_BR(disp);
3550
3551                 } else {
3552                         xcodeptr = mcodeptr;
3553
3554                         M_MOV(REG_PV, rd->argintregs[0]);
3555                         M_MOV(REG_SP, rd->argintregs[1]);
3556                         M_ALD(rd->argintregs[2],
3557                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3558                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3559
3560                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3561                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3562
3563                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
3564                         M_ALD(REG_ITMP1, REG_PV, disp);
3565                         M_MTCTR(REG_ITMP1);
3566                         M_JSR;
3567                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3568
3569                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3570                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3571
3572                         disp = dseg_addaddress(cd, asm_handle_exception);
3573                         M_ALD(REG_ITMP3, REG_PV, disp);
3574                         M_MTCTR(REG_ITMP3);
3575                         M_RTS;
3576                 }
3577         }
3578
3579         /* generate patcher stub call code */
3580
3581         {
3582                 patchref *pref;
3583                 u4        mcode;
3584                 s4       *tmpmcodeptr;
3585
3586                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3587                         /* check code segment size */
3588
3589                         MCODECHECK(16);
3590
3591                         /* Get machine code which is patched back in later. The call is   */
3592                         /* 1 instruction word long.                                       */
3593
3594                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
3595                         mcode = *xcodeptr;
3596
3597                         /* patch in the call to call the following code (done at compile  */
3598                         /* time)                                                          */
3599
3600                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3601                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3602
3603                         M_BR(tmpmcodeptr - (xcodeptr + 1));
3604
3605                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3606
3607                         /* create stack frame - keep stack 16-byte aligned */
3608
3609                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3610
3611                         /* calculate return address and move it onto the stack */
3612
3613                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3614                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3615
3616                         /* move pointer to java_objectheader onto stack */
3617
3618 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3619                         /* order reversed because of data segment layout */
3620
3621                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
3622                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
3623
3624                         M_LDA(REG_ITMP3, REG_PV, disp);
3625                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3626 #else
3627                         /* do nothing */
3628 #endif
3629
3630                         /* move machine code onto stack */
3631
3632                         disp = dseg_adds4(cd, mcode);
3633                         M_ILD(REG_ITMP3, REG_PV, disp);
3634                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3635
3636                         /* move class/method/field reference onto stack */
3637
3638                         disp = dseg_addaddress(cd, pref->ref);
3639                         M_ALD(REG_ITMP3, REG_PV, disp);
3640                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3641
3642                         /* move data segment displacement onto stack */
3643
3644                         disp = dseg_addaddress(cd, pref->disp);
3645                         M_ILD(REG_ITMP3, REG_PV, disp);
3646                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3647
3648                         /* move patcher function pointer onto stack */
3649
3650                         disp = dseg_addaddress(cd, pref->patcher);
3651                         M_ALD(REG_ITMP3, REG_PV, disp);
3652                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3653
3654                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
3655                         M_ALD(REG_ITMP3, REG_PV, disp);
3656                         M_MTCTR(REG_ITMP3);
3657                         M_RTS;
3658                 }
3659         }
3660
3661         }
3662
3663         codegen_finish(m, cd, (ptrint) ((u1 *) mcodeptr - cd->mcodebase));
3664
3665         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
3666
3667         /* everything's ok */
3668
3669         return true;
3670 }
3671
3672
3673 /* createcompilerstub **********************************************************
3674
3675    Creates a stub routine which calls the compiler.
3676
3677 *******************************************************************************/
3678
3679 #define COMPSTUBSIZE 6
3680
3681 functionptr createcompilerstub(methodinfo *m)
3682 {
3683         s4 *s = CNEW(s4, COMPSTUBSIZE);     /* memory to hold the stub            */
3684         s4 *mcodeptr = s;                   /* code generation pointer            */
3685
3686         M_LDA(REG_ITMP1, REG_PV, 4 * 4);
3687         M_ALD_INTERN(REG_PV, REG_PV, 5 * 4);
3688         M_MTCTR(REG_PV);
3689         M_RTS;
3690
3691         s[4] = (s4) m;                      /* literals to be adressed            */
3692         s[5] = (s4) asm_call_jit_compiler;  /* jump directly via PV from above    */
3693
3694         asm_cacheflush((void *) s, (u1 *) mcodeptr - (u1 *) s);
3695
3696 #if defined(STATISTICS)
3697         if (opt_stat)
3698                 count_cstub_len += COMPSTUBSIZE * 4;
3699 #endif
3700
3701         return (functionptr) (ptrint) s;
3702 }
3703
3704
3705 /* createnativestub ************************************************************
3706
3707    Creates a stub routine which calls a native method.
3708
3709 *******************************************************************************/
3710
3711 functionptr createnativestub(functionptr f, methodinfo *m, codegendata *cd,
3712                                                          registerdata *rd, methoddesc *nmd)
3713 {
3714         s4         *mcodeptr;               /* code generation pointer            */
3715         s4          stackframesize;         /* size of stackframe if needed       */
3716         methoddesc *md;
3717         s4          nativeparams;
3718         s4          i, j;                   /* count variables                    */
3719         s4          t;
3720         s4          s1, s2, disp;
3721         s4          funcdisp;
3722
3723         /* set some variables */
3724
3725         md = m->parseddesc;
3726         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3727
3728         /* calculate stackframe size */
3729
3730         stackframesize =
3731                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3732                 sizeof(localref_table) / SIZEOF_VOID_P +
3733                 4 +                             /* 4 stackframeinfo arguments (darwin)*/
3734                 nmd->paramcount * 2 +           /* assume all arguments are doubles   */
3735                 nmd->memuse;
3736
3737         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3738
3739
3740         /* create method header */
3741
3742         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
3743         (void) dseg_adds4(cd, stackframesize * 4);              /* FrameSize      */
3744         (void) dseg_adds4(cd, 0);                               /* IsSync         */
3745         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
3746         (void) dseg_adds4(cd, 0);                               /* IntSave        */
3747         (void) dseg_adds4(cd, 0);                               /* FltSave        */
3748         (void) dseg_addlinenumbertablesize(cd);
3749         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
3750
3751
3752         /* initialize mcode variables */
3753
3754         mcodeptr = (s4 *) cd->mcodebase;
3755         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
3756
3757
3758         /* generate code */
3759
3760         M_MFLR(REG_ZERO);
3761         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3762         M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3763
3764
3765         if (runverbose) {
3766                 /* parent_argbase == stackframesize * 4 */
3767                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, stackframesize * 4 ,
3768                                                                           true);
3769         }
3770
3771
3772         /* get function address (this must happen before the stackframeinfo) */
3773
3774         funcdisp = dseg_addaddress(cd, f);
3775
3776 #if !defined(ENABLE_STATICVM)
3777         if (f == NULL) {
3778                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
3779
3780                 if (opt_showdisassemble)
3781                         M_NOP;
3782         }
3783 #endif
3784
3785         /* save integer and float argument registers */
3786
3787         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3788                 t = md->paramtypes[i].type;
3789
3790                 if (IS_INT_LNG_TYPE(t)) {
3791                         s1 = md->params[i].regoff;
3792                         if (IS_2_WORD_TYPE(t)) {
3793                                 M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3794                                 j++;
3795                                 M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3796                                 j++;
3797                         } else {
3798                                 M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3799                                 j++;
3800                         }
3801                 }
3802         }
3803
3804         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3805                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3806                         s1 = md->params[i].regoff;
3807                         M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3808                         j++;
3809                 }
3810         }
3811
3812         /* create native stack info */
3813
3814         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3815         M_MOV(REG_PV, rd->argintregs[1]);
3816         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3817         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3818         disp = dseg_addaddress(cd, codegen_start_native_call);
3819         M_ALD(REG_ITMP1, REG_PV, disp);
3820         M_MTCTR(REG_ITMP1);
3821         M_JSR;
3822
3823         /* restore integer and float argument registers */
3824
3825         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3826                 t = md->paramtypes[i].type;
3827
3828                 if (IS_INT_LNG_TYPE(t)) {
3829                         s1 = md->params[i].regoff;
3830
3831                         if (IS_2_WORD_TYPE(t)) {
3832                                 M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3833                                 j++;
3834                                 M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3835                                 j++;
3836                         } else {
3837                                 M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3838                                 j++;
3839                         }
3840                 }
3841         }
3842
3843         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3844                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3845                         s1 = md->params[i].regoff;
3846                         M_DLD(rd->argfltregs[i], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3847                         j++;
3848                 }
3849         }
3850
3851         /* copy or spill arguments to new locations */
3852
3853         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3854                 t = md->paramtypes[i].type;
3855
3856                 if (IS_INT_LNG_TYPE(t)) {
3857                         if (!md->params[i].inmemory) {
3858                                 if (IS_2_WORD_TYPE(t))
3859                                         s1 = PACK_REGS(
3860                                                 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3861                                             rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3862                                 else
3863                                         s1 = rd->argintregs[md->params[i].regoff];
3864
3865                                 if (!nmd->params[j].inmemory) {
3866                                         if (IS_2_WORD_TYPE(t))
3867                                                 s2 = PACK_REGS(
3868                                                    rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3869                                                    rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3870                                         else
3871                                                 s2 = rd->argintregs[nmd->params[j].regoff];
3872                                         M_TINTMOVE(t, s1, s2);
3873
3874                                 } else {
3875                                         s2 = nmd->params[j].regoff;
3876                                         if (IS_2_WORD_TYPE(t)) {
3877                                                 M_IST(GET_HIGH_REG(s1), REG_SP, s2 * 4);
3878                                                 M_IST(GET_LOW_REG(s1), REG_SP, s2 * 4 + 4);
3879                                         } else {
3880                                                 M_IST(s1, REG_SP, s2 * 4);
3881                                         }
3882                                 }
3883
3884                         } else {
3885                                 s1 = md->params[i].regoff + stackframesize;
3886                                 s2 = nmd->params[j].regoff;
3887
3888                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3889                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3890                                 if (IS_2_WORD_TYPE(t)) {
3891                                         M_ILD(REG_ITMP1, REG_SP, s1 * 4 + 4);
3892                                         M_IST(REG_ITMP1, REG_SP, s2 * 4 + 4);
3893                                 }
3894                         }
3895
3896                 } else {
3897                         /* We only copy spilled float arguments, as the float argument    */
3898                         /* registers keep unchanged.                                      */
3899
3900                         if (md->params[i].inmemory) {
3901                                 s1 = md->params[i].regoff + stackframesize;
3902                                 s2 = nmd->params[j].regoff;
3903
3904                                 if (IS_2_WORD_TYPE(t)) {
3905                                         M_DLD(REG_FTMP1, REG_SP, s1 * 4);
3906                                         M_DST(REG_FTMP1, REG_SP, s2 * 4);
3907
3908                                 } else {
3909                                         M_FLD(REG_FTMP1, REG_SP, s1 * 4);
3910                                         M_FST(REG_FTMP1, REG_SP, s2 * 4);
3911                                 }
3912                         }
3913                 }
3914         }
3915
3916         /* put class into second argument register */
3917
3918         if (m->flags & ACC_STATIC) {
3919                 disp = dseg_addaddress(cd, m->class);
3920                 M_ALD(rd->argintregs[1], REG_PV, disp);
3921         }
3922
3923         /* put env into first argument register */
3924
3925         disp = dseg_addaddress(cd, &env);
3926         M_ALD(rd->argintregs[0], REG_PV, disp);
3927
3928         /* generate the actual native call */
3929
3930         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3931         M_MTCTR(REG_ITMP3);
3932         M_JSR;
3933
3934         /* save return value */
3935
3936         if (IS_INT_LNG_TYPE(md->returntype.type)) {
3937                 if (IS_2_WORD_TYPE(md->returntype.type))
3938                         M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
3939                 M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
3940         } else {
3941                 if (IS_2_WORD_TYPE(md->returntype.type))
3942                         M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3943                 else
3944                         M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3945         }
3946
3947         /* remove native stackframe info */
3948
3949         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3950         disp = dseg_addaddress(cd, codegen_finish_native_call);
3951         M_ALD(REG_ITMP1, REG_PV, disp);
3952         M_MTCTR(REG_ITMP1);
3953         M_JSR;
3954
3955         /* print call trace */
3956
3957         if (runverbose) {
3958                  /* just restore the value we need, don't care about the other */
3959
3960                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3961                         if (IS_2_WORD_TYPE(md->returntype.type))
3962                                 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
3963                         M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
3964                 } else {
3965                         if (IS_2_WORD_TYPE(md->returntype.type))
3966                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3967                         else
3968                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3969                 }
3970
3971                 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
3972
3973                 /* keep this order */
3974                 switch (md->returntype.type) {
3975                 case TYPE_INT:
3976                 case TYPE_ADR:
3977 #if defined(__DARWIN__)
3978                         M_MOV(REG_RESULT, rd->argintregs[2]);
3979                         M_CLR(rd->argintregs[1]);
3980 #else
3981                         M_MOV(REG_RESULT, rd->argintregs[3]);
3982                         M_CLR(rd->argintregs[2]);
3983 #endif
3984                         break;
3985
3986                 case TYPE_LNG:
3987 #if defined(__DARWIN__)
3988                         M_MOV(REG_RESULT2, rd->argintregs[2]);
3989                         M_MOV(REG_RESULT, rd->argintregs[1]);
3990 #else
3991                         M_MOV(REG_RESULT2, rd->argintregs[3]);
3992                         M_MOV(REG_RESULT, rd->argintregs[2]);
3993 #endif
3994                         break;
3995                 }
3996
3997                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
3998                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
3999                 disp = dseg_addaddress(cd, m);
4000                 M_ALD(rd->argintregs[0], REG_PV, disp);
4001
4002                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4003                 M_ALD(REG_ITMP2, REG_PV, disp);
4004                 M_MTCTR(REG_ITMP2);
4005                 M_JSR;
4006
4007                 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4008         }
4009
4010         /* check for exception */
4011
4012 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4013         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4014         M_ALD(REG_ITMP1, REG_PV, disp);
4015         M_MTCTR(REG_ITMP1);
4016         M_JSR;
4017         M_MOV(REG_RESULT, REG_ITMP2);
4018 #else
4019         disp = dseg_addaddress(cd, &_no_threads_exceptionptr);
4020         M_ALD(REG_ITMP2, REG_PV, disp);
4021 #endif
4022         M_ALD(REG_ITMP1_XPTR, REG_ITMP2, 0);/* load exception into reg. itmp1     */
4023
4024         /* restore return value */
4025
4026         if (IS_INT_LNG_TYPE(md->returntype.type)) {
4027                 if (IS_2_WORD_TYPE(md->returntype.type))
4028                         M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4029                 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4030         } else {
4031                 if (IS_2_WORD_TYPE(md->returntype.type))
4032                         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4033                 else
4034                         M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4035         }
4036
4037         M_TST(REG_ITMP1_XPTR);
4038         M_BNE(4);                           /* if no exception then return        */
4039
4040         M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4041         M_MTLR(REG_ZERO);
4042         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4043
4044         M_RET;
4045
4046         /* handle exception */
4047
4048         M_CLR(REG_ITMP3);
4049         M_AST(REG_ITMP3, REG_ITMP2, 0);     /* store NULL into exceptionptr       */
4050
4051         M_ALD(REG_ITMP2, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4052         M_MTLR(REG_ITMP2);
4053
4054         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4055
4056         M_IADD_IMM(REG_ITMP2, -4, REG_ITMP2_XPC);  /* fault address               */
4057
4058         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4059         M_ALD(REG_ITMP3, REG_PV, disp);
4060         M_MTCTR(REG_ITMP3);
4061         M_RTS;
4062
4063         /* generate patcher stub call code */
4064
4065         {
4066                 patchref *pref;
4067                 s4       *xcodeptr;
4068                 s4        mcode;
4069                 s4       *tmpmcodeptr;
4070
4071                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4072                         /* Get machine code which is patched back in later. The call is   */
4073                         /* 1 instruction word long.                                       */
4074
4075                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4076                         mcode = (u4) *xcodeptr;
4077
4078                         /* patch in the call to call the following code (done at compile  */
4079                         /* time)                                                          */
4080
4081                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4082                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4083
4084                         M_BL(tmpmcodeptr - (xcodeptr + 1));
4085
4086                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4087
4088                         /* create stack frame - keep stack 16-byte aligned                */
4089
4090                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4091
4092                         /* move return address onto stack */
4093
4094                         M_MFLR(REG_ZERO);
4095                         M_AST(REG_ZERO, REG_SP, 5 * 4);
4096
4097                         /* move pointer to java_objectheader onto stack */
4098
4099 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4100                         /* order reversed because of data segment layout */
4101
4102                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4103                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4104
4105                         M_LDA(REG_ITMP3, REG_PV, disp);
4106                         M_AST(REG_ITMP3, REG_SP, 4 * 4);
4107 #else
4108                         /* do nothing */
4109 #endif
4110
4111                         /* move machine code onto stack */
4112
4113                         disp = dseg_adds4(cd, mcode);
4114                         M_ILD(REG_ITMP3, REG_PV, disp);
4115                         M_IST(REG_ITMP3, REG_SP, 3 * 4);
4116
4117                         /* move class/method/field reference onto stack */
4118
4119                         disp = dseg_addaddress(cd, pref->ref);
4120                         M_ALD(REG_ITMP3, REG_PV, disp);
4121                         M_AST(REG_ITMP3, REG_SP, 2 * 4);
4122
4123                         /* move data segment displacement onto stack */
4124
4125                         disp = dseg_addaddress(cd, pref->disp);
4126                         M_ILD(REG_ITMP3, REG_PV, disp);
4127                         M_IST(REG_ITMP3, REG_SP, 1 * 4);
4128
4129                         /* move patcher function pointer onto stack */
4130
4131                         disp = dseg_addaddress(cd, pref->patcher);
4132                         M_ALD(REG_ITMP3, REG_PV, disp);
4133                         M_AST(REG_ITMP3, REG_SP, 0 * 4);
4134
4135                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4136                         M_ALD(REG_ITMP3, REG_PV, disp);
4137                         M_MTCTR(REG_ITMP3);
4138                         M_RTS;
4139                 }
4140         }
4141
4142         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4143
4144         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
4145
4146         return m->entrypoint;
4147 }
4148
4149
4150 s4 *codegen_trace_args(methodinfo *m, codegendata *cd, registerdata *rd,
4151                                            s4 *mcodeptr, s4 parentargs_base, bool nativestub)
4152 {
4153         s4 s1, p, t, d;
4154         int stack_off;
4155         int stack_size;
4156         methoddesc *md;
4157
4158         md = m->parseddesc;
4159
4160         if (!nativestub)
4161                 M_MFLR(REG_ITMP3);
4162         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4163         /* For Darwin:                                                        */
4164         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
4165         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
4166         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
4167         /* For Linux:                                                         */
4168         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
4169         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4170         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
4171         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
4172
4173         /* in nativestubs no Place to save the LR (Link Register) would be needed */
4174         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
4175         /* be padded again */
4176
4177 #if defined(__DARWIN__)
4178         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4179 #else
4180         stack_size = 6 * 16;
4181 #endif
4182         M_LDA(REG_SP, REG_SP, -stack_size);
4183
4184         /* Save LR */
4185         if (!nativestub)
4186                 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4187
4188         M_CLR(REG_ITMP1);    /* clear help register */
4189
4190         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4191 #if defined(__DARWIN__)
4192         /* Copy Params starting from first to Stack                          */
4193         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */
4194         /* are saved                                                         */
4195         p = 0;
4196 #else
4197         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
4198         /* integer argument regs                                             */
4199         /* all integer argument registers have to be saved                   */
4200         for (p = 0; p < 8; p++) {
4201                 d = rd->argintregs[p];
4202                 /* save integer argument registers */
4203                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4204         }
4205         p = 4;
4206 #endif
4207         stack_off = LA_SIZE;
4208         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4209                 t = md->paramtypes[p].type;
4210                 if (IS_INT_LNG_TYPE(t)) {
4211                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4212                                 if (IS_2_WORD_TYPE(t)) {
4213                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4214                                                   , REG_SP, stack_off);
4215                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4216                                                   , REG_SP, stack_off + 4);
4217                                 } else {
4218                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4219                                         M_IST(rd->argintregs[md->params[p].regoff]
4220                                                   , REG_SP, stack_off + 4);
4221                                 }
4222                         } else { /* Param on Stack */
4223                                 s1 = (md->params[p].regoff + parentargs_base) * 4
4224                                         + stack_size;
4225                                 if (IS_2_WORD_TYPE(t)) {
4226                                         M_ILD(REG_ITMP2, REG_SP, s1);
4227                                         M_IST(REG_ITMP2, REG_SP, stack_off);
4228                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4229                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4230                                 } else {
4231                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4232                                         M_ILD(REG_ITMP2, REG_SP, s1);
4233                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4234                                 }
4235                         }
4236                 } else { /* IS_FLT_DBL_TYPE(t) */
4237                         if (!md->params[p].inmemory) { /* in Arg Reg */
4238                                 s1 = rd->argfltregs[md->params[p].regoff];
4239                                 if (!IS_2_WORD_TYPE(t)) {
4240                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4241                                         M_FST(s1, REG_SP, stack_off + 4);
4242                                 } else {
4243                                         M_DST(s1, REG_SP, stack_off);
4244                                 }
4245                         } else { /* on Stack */
4246                                 /* this should not happen */
4247                         }
4248                 }
4249         }
4250
4251         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4252 #if defined(__DARWIN__)
4253         for (p = 0; p < 8; p++) {
4254                 d = rd->argintregs[p];
4255                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4256         }
4257 #else
4258         /* LINUX */
4259         /* Set integer and float argument registers vor trace_args call */
4260         /* offset to saved integer argument registers                   */
4261         stack_off = LA_SIZE + 4 * 8 + 4;
4262         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4263                 t = md->paramtypes[p].type;
4264                 if (IS_INT_LNG_TYPE(t)) {
4265                         /* "stretch" int types */
4266                         if (!IS_2_WORD_TYPE(t)) {
4267                                 M_CLR(rd->argintregs[2 * p]);
4268                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4269                                 stack_off += 4;
4270                         } else {
4271                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4272                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4273                                 stack_off += 8;
4274                         }
4275                 } else { /* Float/Dbl */
4276                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4277                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
4278                                 /* float/double arg reg to int reg                    */
4279                                 s1 = rd->argfltregs[md->params[p].regoff];
4280                                 if (!IS_2_WORD_TYPE(t)) {
4281                                         M_FST(s1, REG_SP, 5 * 16);
4282                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4283                                         M_CLR(rd->argintregs[2 * p]);
4284                                 } else {
4285                                         M_DST(s1, REG_SP, 5 * 16);
4286                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
4287                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4288                                 }
4289                         }
4290                 }
4291         }
4292 #endif
4293
4294         /* put methodinfo pointer on Stackframe */
4295         p = dseg_addaddress(cd, m);
4296         M_ALD(REG_ITMP1, REG_PV, p);
4297 #if defined(__DARWIN__)
4298         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
4299 #else
4300         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4301 #endif
4302         p = dseg_addaddress(cd, builtin_trace_args);
4303         M_ALD(REG_ITMP2, REG_PV, p);
4304         M_MTCTR(REG_ITMP2);
4305         M_JSR;
4306
4307 #if defined(__DARWIN__)
4308         /* restore integer argument registers from the reserved stack space */
4309
4310         stack_off = LA_SIZE;
4311         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
4312                  p++, stack_off += 8) {
4313                 t = md->paramtypes[p].type;
4314
4315                 if (IS_INT_LNG_TYPE(t)) {
4316                         if (!md->params[p].inmemory) {
4317                                 if (IS_2_WORD_TYPE(t)) {
4318                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4319                                                   , REG_SP, stack_off);
4320                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4321                                                   , REG_SP, stack_off + 4);
4322                                 } else {
4323                                         M_ILD(rd->argintregs[md->params[p].regoff]
4324                                                   , REG_SP, stack_off + 4);
4325                                 }
4326                         }
4327                 }
4328         }
4329 #else
4330         /* LINUX */
4331         for (p = 0; p < 8; p++) {
4332                 d = rd->argintregs[p];
4333                 /* save integer argument registers */
4334                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4335         }
4336 #endif
4337
4338         if (!nativestub)
4339                 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4340
4341         M_LDA(REG_SP, REG_SP, stack_size);
4342         if (!nativestub)
4343                 M_MTLR(REG_ITMP3);
4344         return mcodeptr;
4345 }
4346
4347 /*
4348  * These are local overrides for various environment variables in Emacs.
4349  * Please do not remove this and leave it at the end of the file, where
4350  * Emacs will automagically detect them.
4351  * ---------------------------------------------------------------------
4352  * Local variables:
4353  * mode: c
4354  * indent-tabs-mode: t
4355  * c-basic-offset: 4
4356  * tab-width: 4
4357  * End:
4358  */