src/vm/jit/powerpc/codegen.c

   1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32
  33    $Id: codegen.c 4530 2006-02-21 09:11:53Z twisti $
  34
  35 */
  36
  37
  38 #include "config.h"
  39
  40 #include <assert.h>
  41 #include <stdio.h>
  42 #include <signal.h>
  43
  44 #include "vm/types.h"
  45
  46 #include "md-abi.h"
  47
  48 #include "vm/jit/powerpc/arch.h"
  49 #include "vm/jit/powerpc/codegen.h"
  50
  51 #include "native/native.h"
  52 #include "vm/builtin.h"
  53 #include "vm/exceptions.h"
  54 #include "vm/global.h"
  55 #include "vm/loader.h"
  56 #include "vm/options.h"
  57 #include "vm/stringlocal.h"
  58 #include "vm/vm.h"
  59 #include "vm/jit/asmpart.h"
  60 #include "vm/jit/codegen-common.h"
  61 #include "vm/jit/dseg.h"
  62 #include "vm/jit/jit.h"
  63 #include "vm/jit/parse.h"
  64 #include "vm/jit/patcher.h"
  65 #include "vm/jit/reg.h"
  66
  67 #if defined(ENABLE_LSRA)
  68 # include "vm/jit/allocator/lsra.h"
  69 #endif
  70
  71
  72
  73
  74 s4 *codegen_trace_args( methodinfo *m, codegendata *cd, registerdata *rd,
  75                                                 s4 *mcodeptr, s4 parentargs_base, bool nativestub);
  76
  77 /* codegen *********************************************************************
  78
  79    Generates machine code.
  80
  81 *******************************************************************************/
  82
  83 bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  84 {
  85         s4                  len, s1, s2, s3, d, disp;
  86         ptrint              a;
  87         s4                  parentargs_base;
  88         s4                 *mcodeptr;
  89         stackptr            src;
  90         varinfo            *var;
  91         basicblock         *bptr;
  92         instruction        *iptr;
  93         exceptiontable     *ex;
  94         u2                  currentline;
  95         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  96         builtintable_entry *bte;
  97         methoddesc         *md;
  98
  99         /* prevent compiler warnings */
 100
 101         d = 0;
 102         lm = NULL;
 103         bte = NULL;
 104
 105         {
 106         s4 i, p, t, l;
 107         s4 savedregs_num;
 108
 109         savedregs_num = 0;
 110
 111         /* space to save used callee saved registers */
 112
 113         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 114         savedregs_num += 2 * (FLT_SAV_CNT - rd->savfltreguse);
 115
 116         parentargs_base = rd->memuse + savedregs_num;
 117
 118 #if defined(USE_THREADS)
 119         /* space to save argument of monitor_enter and Return Values to survive */
 120     /* monitor_exit. The stack position for the argument can not be shared  */
 121         /* with place to save the return register on PPC, since both values     */
 122         /* reside in R3 */
 123         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 124                 /* reserve 2 slots for long/double return values for monitorexit */
 125
 126                 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
 127                         parentargs_base += 3;
 128                 else
 129                         parentargs_base += 2;
 130         }
 131
 132 #endif
 133
 134         /* create method header */
 135
 136         parentargs_base = (parentargs_base + 3) & ~3;
 137
 138         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 139         (void) dseg_adds4(cd, parentargs_base * 4);             /* FrameSize      */
 140
 141 #if defined(USE_THREADS)
 142         /* IsSync contains the offset relative to the stack pointer for the
 143            argument of monitor_exit used in the exception handler. Since the
 144            offset could be zero and give a wrong meaning of the flag it is
 145            offset by one.
 146         */
 147
 148         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 149                 (void) dseg_adds4(cd, (rd->memuse + 1) * 4);        /* IsSync         */
 150         else
 151 #endif
 152                 (void) dseg_adds4(cd, 0);                           /* IsSync         */
 153
 154         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 155         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);  /* IntSave        */
 156         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);  /* FltSave        */
 157
 158         dseg_addlinenumbertablesize(cd);
 159
 160         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 161
 162         /* create exception table */
 163
 164         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 165                 dseg_addtarget(cd, ex->start);
 166                 dseg_addtarget(cd, ex->end);
 167                 dseg_addtarget(cd, ex->handler);
 168                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 169         }
 170
 171         /* initialize mcode variables */
 172
 173         mcodeptr = (s4 *) cd->mcodeptr;
 174
 175         /* create stack frame (if necessary) */
 176
 177         if (!m->isleafmethod) {
 178                 M_MFLR(REG_ZERO);
 179                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 180         }
 181
 182         if (parentargs_base)
 183                 M_STWU(REG_SP, REG_SP, -parentargs_base * 4);
 184
 185         /* save return address and used callee saved registers */
 186
 187         p = parentargs_base;
 188         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 189                 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
 190         }
 191         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 192                 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
 193         }
 194
 195         /* take arguments out of register or stack frame */
 196
 197         md = m->parseddesc;
 198
 199         for (p = 0, l = 0; p < md->paramcount; p++) {
 200                 t = md->paramtypes[p].type;
 201                 var = &(rd->locals[l][t]);
 202                 l++;
 203                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 204                         l++;
 205                 if (var->type < 0)
 206                         continue;
 207                 s1 = md->params[p].regoff;
 208                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 209                         if (IS_2_WORD_TYPE(t))
 210                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
 211                                                            rd->argintregs[GET_HIGH_REG(s1)]);
 212                         else
 213                                 s2 = rd->argintregs[s1];
 214                         if (!md->params[p].inmemory) {           /* register arguments    */
 215                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 216                                         M_TINTMOVE(t, s2, var->regoff);
 217
 218                                 } else {                             /* reg arg -> spilled    */
 219                                         if (IS_2_WORD_TYPE(t)) {
 220                                                 M_IST(GET_HIGH_REG(s2), REG_SP, var->regoff * 4);
 221                                                 M_IST(GET_LOW_REG(s2), REG_SP, var->regoff * 4 + 4);
 222                                         } else {
 223                                                 M_IST(s2, REG_SP, var->regoff * 4);
 224                                         }
 225                                 }
 226
 227                         } else {                                 /* stack arguments       */
 228                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 229                                         if (IS_2_WORD_TYPE(t)) {
 230                                                 M_ILD(GET_HIGH_REG(var->regoff), REG_SP,
 231                                                           (parentargs_base + s1) * 4);
 232                                                 M_ILD(GET_LOW_REG(var->regoff), REG_SP,
 233                                                           (parentargs_base + s1) * 4 + 4);
 234                                         } else {
 235                                                 M_ILD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 236                                         }
 237
 238                                 } else {                             /* stack arg -> spilled  */
 239 #if 1
 240                                         M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4);
 241                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
 242                                         if (IS_2_WORD_TYPE(t)) {
 243                                                 M_ILD(REG_ITMP1, REG_SP, (parentargs_base + s1) * 4 +4);
 244                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
 245                                         }
 246 #else
 247                                         /* Reuse Memory Position on Caller Stack */
 248                                         var->regoff = parentargs_base + s1;
 249 #endif
 250                                 }
 251                         }
 252
 253                 } else {                                     /* floating args         */
 254                         if (!md->params[p].inmemory) {           /* register arguments    */
 255                                 s2 = rd->argfltregs[s1];
 256                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 257                                         M_FLTMOVE(s2, var->regoff);
 258
 259                                 } else {                                         /* reg arg -> spilled    */
 260                                         if (IS_2_WORD_TYPE(t))
 261                                                 M_DST(s2, REG_SP, var->regoff * 4);
 262                                         else
 263                                                 M_FST(s2, REG_SP, var->regoff * 4);
 264                                 }
 265
 266                         } else {                                 /* stack arguments       */
 267                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 268                                         if (IS_2_WORD_TYPE(t))
 269                                                 M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 270
 271                                         else
 272                                                 M_FLD(var->regoff, REG_SP, (parentargs_base + s1) * 4);
 273
 274                                 } else {                             /* stack-arg -> spilled  */
 275 #if 1
 276                                         if (IS_2_WORD_TYPE(t)) {
 277                                                 M_DLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 278                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
 279                                                 var->regoff = parentargs_base + s1;
 280
 281                                         } else {
 282                                                 M_FLD(REG_FTMP1, REG_SP, (parentargs_base + s1) * 4);
 283                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
 284                                         }
 285 #else
 286                                         /* Reuse Memory Position on Caller Stack */
 287                                         var->regoff = parentargs_base + s1;
 288 #endif
 289                                 }
 290                         }
 291                 }
 292         } /* end for */
 293
 294         /* save monitorenter argument */
 295
 296 #if defined(USE_THREADS)
 297         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 298                 /* stack offset for monitor argument */
 299
 300                 s1 = rd->memuse;
 301
 302 #if 0
 303                 if (runverbose) {
 304                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT * 4 + FLT_ARG_CNT * 8));
 305
 306                         for (p = 0; p < INT_ARG_CNT; p++)
 307                                 M_IST(rd->argintregs[p], REG_SP, p * 4);
 308
 309                         for (p = 0; p < FLT_ARG_CNT * 2; p += 2)
 310                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 311
 312                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 313                 }
 314 #endif
 315
 316                 /* decide which monitor enter function to call */
 317
 318                 if (m->flags & ACC_STATIC) {
 319                         p = dseg_addaddress(cd, m->class);
 320                         M_ALD(rd->argintregs[0], REG_PV, p);
 321                         M_AST(rd->argintregs[0], REG_SP, s1 * 4);
 322                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 323                         M_ALD(REG_ITMP3, REG_PV, p);
 324                         M_MTCTR(REG_ITMP3);
 325                         M_JSR;
 326
 327                 } else {
 328                         M_TST(rd->argintregs[0]);
 329                         M_BEQ(0);
 330                         codegen_addxnullrefs(cd, mcodeptr);
 331                         M_AST(rd->argintregs[0], REG_SP, s1 * 4);
 332                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 333                         M_ALD(REG_ITMP3, REG_PV, p);
 334                         M_MTCTR(REG_ITMP3);
 335                         M_JSR;
 336                 }
 337
 338 #if 0
 339                 if (runverbose) {
 340                         for (p = 0; p < INT_ARG_CNT; p++)
 341                                 M_ILD(rd->argintregs[p], REG_SP, p * 4);
 342
 343                         for (p = 0; p < FLT_ARG_CNT; p++)
 344                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 4);
 345
 346
 347                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 348                 }
 349 #endif
 350         }
 351 #endif
 352
 353         /* call trace function */
 354
 355         if (runverbose) {
 356                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, parentargs_base, false);
 357
 358         } /* if (runverbose) */
 359         }
 360
 361         /* end of header generation */
 362
 363         /* walk through all basic blocks */
 364         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 365
 366                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 367
 368                 if (bptr->flags >= BBREACHED) {
 369
 370                 /* branch resolving */
 371
 372                 {
 373                 branchref *brefs;
 374                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 375                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 376                                           brefs->branchpos,
 377                                                           bptr->mpc);
 378                         }
 379                 }
 380
 381                 /* copy interface registers to their destination */
 382
 383                 src = bptr->instack;
 384                 len = bptr->indepth;
 385                 MCODECHECK(64+len);
 386
 387 #if defined(ENABLE_LSRA)
 388                 if (opt_lsra) {
 389                         while (src != NULL) {
 390                                 len--;
 391                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 392                                         /* d = reg_of_var(m, src, REG_ITMP1); */
 393                                         if (!(src->flags & INMEMORY))
 394                                                 d = src->regoff;
 395                                         else
 396                                                 d = REG_ITMP1;
 397                                         M_INTMOVE(REG_ITMP1, d);
 398                                         store_reg_to_var_int(src, d);
 399                                 }
 400                                 src = src->prev;
 401                         }
 402                 } else {
 403 #endif
 404                 while (src != NULL) {
 405                         len--;
 406                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 407                                 d = reg_of_var(rd, src, REG_ITMP1);
 408                                 M_INTMOVE(REG_ITMP1, d);
 409                                 store_reg_to_var_int(src, d);
 410                         } else {
 411                                 if (src->type == TYPE_LNG)
 412                                         d = reg_of_var(rd, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 413                                 else
 414                                         d = reg_of_var(rd, src, REG_IFTMP);
 415                                 if ((src->varkind != STACKVAR)) {
 416                                         s2 = src->type;
 417                                         if (IS_FLT_DBL_TYPE(s2)) {
 418                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 419                                                         s1 = rd->interfaces[len][s2].regoff;
 420                                                         M_FLTMOVE(s1, d);
 421                                                 } else {
 422                                                         if (IS_2_WORD_TYPE(s2)) {
 423                                                                 M_DLD(d, REG_SP,
 424                                                                           rd->interfaces[len][s2].regoff * 4);
 425                                                         } else {
 426                                                                 M_FLD(d, REG_SP,
 427                                                                           rd->interfaces[len][s2].regoff * 4);
 428                                                         }
 429                                                 }
 430
 431                                                 if (IS_2_WORD_TYPE(s2)) {
 432                                                         store_reg_to_var_dbl(src, d);
 433                                                 } else {
 434                                                         store_reg_to_var_flt(src, d);
 435                                                 }
 436                                         } else {
 437                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 438                                                         s1 = rd->interfaces[len][s2].regoff;
 439                                                         M_TINTMOVE(s2, s1, d);
 440                                                 } else {
 441                                                         if (IS_2_WORD_TYPE(s2)) {
 442                                                                 M_ILD(GET_HIGH_REG(d), REG_SP,
 443                                                                           rd->interfaces[len][s2].regoff * 4);
 444                                                                 M_ILD(GET_LOW_REG(d), REG_SP,
 445                                                                           rd->interfaces[len][s2].regoff * 4 + 4);
 446                                                         } else {
 447                                                                 M_ILD(d, REG_SP,
 448                                                                           rd->interfaces[len][s2].regoff * 4);
 449                                                         }
 450                                                 }
 451
 452                                                 if (IS_2_WORD_TYPE(s2)) {
 453                                                         store_reg_to_var_lng(src, d);
 454                                                 } else {
 455                                                         store_reg_to_var_int(src, d);
 456                                                 }
 457                                         }
 458                                 }
 459                         }
 460                         src = src->prev;
 461                 }
 462
 463 #if defined(ENABLE_LSRA)
 464                 }
 465 #endif
 466                 /* walk through all instructions */
 467
 468                 src = bptr->instack;
 469                 len = bptr->icount;
 470                 currentline = 0;
 471
 472                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 473                         if (iptr->line != currentline) {
 474                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 475                                 currentline = iptr->line;
 476                         }
 477
 478                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 479
 480                         switch (iptr->opc) {
 481                         case ICMD_NOP:    /* ...  ==> ...                                 */
 482                         case ICMD_INLINE_START:
 483                         case ICMD_INLINE_END:
 484                                 break;
 485
 486                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 487
 488                         var_to_reg_int(s1, src, REG_ITMP1);
 489                         M_TST(s1);
 490                         M_BEQ(0);
 491                         codegen_addxnullrefs(cd, mcodeptr);
 492                         break;
 493
 494                 /* constant operations ************************************************/
 495
 496                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 497                                       /* op1 = 0, val.i = constant                    */
 498
 499                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 500                         ICONST(d, iptr->val.i);
 501                         store_reg_to_var_int(iptr->dst, d);
 502                         break;
 503
 504                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 505                                       /* op1 = 0, val.l = constant                    */
 506
 507                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 508                         LCONST(d, iptr->val.l);
 509                         store_reg_to_var_lng(iptr->dst, d);
 510                         break;
 511
 512                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 513                                       /* op1 = 0, val.f = constant                    */
 514
 515                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 516                         a = dseg_addfloat(cd, iptr->val.f);
 517                         M_FLD(d, REG_PV, a);
 518                         store_reg_to_var_flt(iptr->dst, d);
 519                         break;
 520
 521                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 522                                       /* op1 = 0, val.d = constant                    */
 523
 524                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 525                         a = dseg_adddouble(cd, iptr->val.d);
 526                         M_DLD(d, REG_PV, a);
 527                         store_reg_to_var_dbl(iptr->dst, d);
 528                         break;
 529
 530                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 531                                       /* op1 = 0, val.a = constant                    */
 532
 533                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 534                         disp = dseg_addaddress(cd, iptr->val.a);
 535
 536                         if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
 537                                 codegen_addpatchref(cd, mcodeptr,
 538                                                                         PATCHER_aconst,
 539                                                                         (unresolved_class *) iptr->target, disp);
 540
 541                                 if (opt_showdisassemble)
 542                                         M_NOP;
 543                         }
 544
 545                         M_ALD(d, REG_PV, disp);
 546                         store_reg_to_var_adr(iptr->dst, d);
 547                         break;
 548
 549
 550                 /* load/store operations **********************************************/
 551
 552                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 553                 case ICMD_ALOAD:      /* op1 = local variable                         */
 554
 555                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 556                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 557                         if ((iptr->dst->varkind == LOCALVAR) &&
 558                             (iptr->dst->varnum == iptr->op1))
 559                                 break;
 560                         if (var->flags & INMEMORY) {
 561                                 M_ILD(d, REG_SP, var->regoff * 4);
 562                         } else {
 563                                 M_TINTMOVE(var->type, var->regoff, d);
 564                         }
 565                         store_reg_to_var_int(iptr->dst, d);
 566                         break;
 567
 568                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 569                                       /* op1 = local variable                         */
 570
 571                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 572                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 573                         if ((iptr->dst->varkind == LOCALVAR) &&
 574                                 (iptr->dst->varnum == iptr->op1))
 575                                 break;
 576                         if (var->flags & INMEMORY) {
 577                                 M_ILD(GET_HIGH_REG(d), REG_SP, var->regoff * 4);
 578                                 M_ILD(GET_LOW_REG(d), REG_SP, var->regoff * 4 + 4);
 579                         } else {
 580                                 M_TINTMOVE(var->type, var->regoff, d);
 581                         }
 582                         store_reg_to_var_lng(iptr->dst, d);
 583                         break;
 584
 585                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 586                                       /* op1 = local variable                         */
 587
 588                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 589                         if ((iptr->dst->varkind == LOCALVAR) &&
 590                                 (iptr->dst->varnum == iptr->op1))
 591                                 break;
 592                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 593                         if (var->flags & INMEMORY) {
 594                                         M_FLD(d, REG_SP, var->regoff * 4);
 595                         } else {
 596                                 M_FLTMOVE(var->regoff, d);
 597                         }
 598                         store_reg_to_var_flt(iptr->dst, d);
 599                         break;
 600
 601                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 602                                       /* op1 = local variable                         */
 603
 604                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 605                         if ((iptr->dst->varkind == LOCALVAR) &&
 606                                 (iptr->dst->varnum == iptr->op1))
 607                                 break;
 608                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 609                         if (var->flags & INMEMORY) {
 610                                 M_DLD(d, REG_SP, var->regoff * 4);
 611                         } else {
 612                                 M_FLTMOVE(var->regoff, d);
 613                         }
 614                         store_reg_to_var_dbl(iptr->dst, d);
 615                         break;
 616
 617
 618                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 619                 case ICMD_ASTORE:     /* op1 = local variable                         */
 620
 621                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 622                                 break;
 623                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 624                         if (var->flags & INMEMORY) {
 625                                 var_to_reg_int(s1, src, REG_ITMP1);
 626                                 M_IST(s1, REG_SP, var->regoff * 4);
 627                         } else {
 628                                 var_to_reg_int(s1, src, var->regoff);
 629                                 M_TINTMOVE(var->type, s1, var->regoff);
 630                         }
 631                         break;
 632
 633                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 634                                       /* op1 = local variable                         */
 635
 636                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 637                                 break;
 638                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 639                         if (var->flags & INMEMORY) {
 640                                 var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 641                                 M_IST(GET_HIGH_REG(s1), REG_SP, var->regoff * 4);
 642                                 M_IST(GET_LOW_REG(s1), REG_SP, var->regoff * 4 + 4);
 643                         } else {
 644                                 var_to_reg_int(s1, src, var->regoff);
 645                                 M_TINTMOVE(var->type, s1, var->regoff);
 646                         }
 647                         break;
 648
 649                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 650                 case ICMD_DSTORE:     /* op1 = local variable                         */
 651
 652                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 653                                 break;
 654                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 655                         if (var->flags & INMEMORY) {
 656                                 var_to_reg_flt(s1, src, REG_FTMP1);
 657                                 if (var->type == TYPE_DBL)
 658                                         M_DST(s1, REG_SP, var->regoff * 4);
 659                                 else
 660                                         M_FST(s1, REG_SP, var->regoff * 4);
 661                         } else {
 662                                 var_to_reg_flt(s1, src, var->regoff);
 663                                 M_FLTMOVE(s1, var->regoff);
 664                         }
 665                         break;
 666
 667
 668                 /* pop/dup/swap operations ********************************************/
 669
 670                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 671
 672                 case ICMD_POP:        /* ..., value  ==> ...                          */
 673                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 674                         break;
 675
 676                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 677                         M_COPY(src, iptr->dst);
 678                         break;
 679
 680                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 681
 682                         M_COPY(src,       iptr->dst);
 683                         M_COPY(src->prev, iptr->dst->prev);
 684                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 685                         break;
 686
 687                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 688
 689                         M_COPY(src,             iptr->dst);
 690                         M_COPY(src->prev,       iptr->dst->prev);
 691                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 692                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 693                         break;
 694
 695                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 696
 697                         M_COPY(src,       iptr->dst);
 698                         M_COPY(src->prev, iptr->dst->prev);
 699                         break;
 700
 701                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 702
 703                         M_COPY(src,             iptr->dst);
 704                         M_COPY(src->prev,       iptr->dst->prev);
 705                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 706                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 707                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 708                         break;
 709
 710                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 711
 712                         M_COPY(src,                   iptr->dst);
 713                         M_COPY(src->prev,             iptr->dst->prev);
 714                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 715                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 716                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 717                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 718                         break;
 719
 720                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 721
 722                         M_COPY(src,       iptr->dst->prev);
 723                         M_COPY(src->prev, iptr->dst);
 724                         break;
 725
 726
 727                 /* integer operations *************************************************/
 728
 729                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 730
 731                         var_to_reg_int(s1, src, REG_ITMP1);
 732                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 733                         M_NEG(s1, d);
 734                         store_reg_to_var_int(iptr->dst, d);
 735                         break;
 736
 737                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 738
 739                         var_to_reg_int(s1, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 740                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 741                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
 742                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 743                         store_reg_to_var_lng(iptr->dst, d);
 744                         break;
 745
 746                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 747
 748                         var_to_reg_int(s1, src, REG_ITMP2);
 749                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 750                         M_INTMOVE(s1, GET_LOW_REG(d));
 751                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
 752                         store_reg_to_var_lng(iptr->dst, d);
 753                         break;
 754
 755                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 756
 757                         var_to_reg_lng_low(s1, src, REG_ITMP2);
 758                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 759                         M_INTMOVE(s1, d);
 760                         store_reg_to_var_int(iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 764
 765                         var_to_reg_int(s1, src, REG_ITMP1);
 766                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 767                         M_BSEXT(s1, d);
 768                         store_reg_to_var_int(iptr->dst, d);
 769                         break;
 770
 771                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 772
 773                         var_to_reg_int(s1, src, REG_ITMP1);
 774                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 775                         M_CZEXT(s1, d);
 776                         store_reg_to_var_int(iptr->dst, d);
 777                         break;
 778
 779                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 780
 781                         var_to_reg_int(s1, src, REG_ITMP1);
 782                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 783                         M_SSEXT(s1, d);
 784                         store_reg_to_var_int(iptr->dst, d);
 785                         break;
 786
 787
 788                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 789
 790                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 791                         var_to_reg_int(s2, src, REG_ITMP2);
 792                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 793                         M_IADD(s1, s2, d);
 794                         store_reg_to_var_int(iptr->dst, d);
 795                         break;
 796
 797                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 798                                       /* val.i = constant                             */
 799
 800                         var_to_reg_int(s1, src, REG_ITMP1);
 801                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 802                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 803                                 M_IADD_IMM(s1, iptr->val.i, d);
 804                         } else {
 805                                 ICONST(REG_ITMP2, iptr->val.i);
 806                                 M_IADD(s1, REG_ITMP2, d);
 807                         }
 808                         store_reg_to_var_int(iptr->dst, d);
 809                         break;
 810
 811                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 812
 813                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
 814                         var_to_reg_lng_low(s2, src, REG_ITMP2);
 815                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 816                         M_ADDC(s1, s2, GET_LOW_REG(d));
 817                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
 818                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 819                         M_ADDE(s1, s2, GET_HIGH_REG(d));
 820                         store_reg_to_var_lng(iptr->dst, d);
 821                         break;
 822
 823                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 824                                       /* val.l = constant                             */
 825
 826                         s3 = iptr->val.l & 0xffffffff;
 827                         var_to_reg_lng_low(s1, src, REG_ITMP1);
 828                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 829                         if ((s3 >= -32768) && (s3 <= 32767)) {
 830                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 831                         } else {
 832                                 ICONST(REG_ITMP2, s3);
 833                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 834                         }
 835                         var_to_reg_lng_high(s1, src, REG_ITMP1);
 836                         s3 = iptr->val.l >> 32;
 837                         if (s3 == -1) {
 838                                 M_ADDME(s1, GET_HIGH_REG(d));
 839                         } else if (s3 == 0) {
 840                                 M_ADDZE(s1, GET_HIGH_REG(d));
 841                         } else {
 842                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 843                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 844                         }
 845                         store_reg_to_var_lng(iptr->dst, d);
 846                         break;
 847
 848                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 849
 850                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 851                         var_to_reg_int(s2, src, REG_ITMP2);
 852                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 853                         M_ISUB(s1, s2, d);
 854                         store_reg_to_var_int(iptr->dst, d);
 855                         break;
 856
 857                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 858                                       /* val.i = constant                             */
 859
 860                         var_to_reg_int(s1, src, REG_ITMP1);
 861                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 862                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 863                                 M_IADD_IMM(s1, -iptr->val.i, d);
 864                         } else {
 865                                 ICONST(REG_ITMP2, -iptr->val.i);
 866                                 M_IADD(s1, REG_ITMP2, d);
 867                         }
 868                         store_reg_to_var_int(iptr->dst, d);
 869                         break;
 870
 871                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 872
 873                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
 874                         var_to_reg_lng_low(s2, src, REG_ITMP2);
 875                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 876                         M_SUBC(s1, s2, GET_LOW_REG(d));
 877                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
 878                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 879                         M_SUBE(s1, s2, GET_HIGH_REG(d));
 880                         store_reg_to_var_lng(iptr->dst, d);
 881                         break;
 882
 883                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 884                                       /* val.l = constant                             */
 885
 886                         s3 = (-iptr->val.l) & 0xffffffff;
 887                         var_to_reg_lng_low(s1, src, REG_ITMP1);
 888                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 889                         if ((s3 >= -32768) && (s3 <= 32767)) {
 890                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 891                         } else {
 892                                 ICONST(REG_ITMP2, s3);
 893                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 894                         }
 895                         var_to_reg_lng_high(s1, src, REG_ITMP1);
 896                         s3 = (-iptr->val.l) >> 32;
 897                         if (s3 == -1)
 898                                 M_ADDME(s1, GET_HIGH_REG(d));
 899                         else if (s3 == 0)
 900                                 M_ADDZE(s1, GET_HIGH_REG(d));
 901                         else {
 902                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 903                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 904                         }
 905                         store_reg_to_var_lng(iptr->dst, d);
 906                         break;
 907
 908                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 909
 910                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 911                         var_to_reg_int(s2, src, REG_ITMP2);
 912                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 913                         M_TST(s2);
 914                         M_BEQ(0);
 915                         codegen_addxdivrefs(cd, mcodeptr);
 916                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 917                         M_CMP(REG_ITMP3, s1);
 918                         M_BNE(3 + (s1 != d));
 919                         M_CMPI(s2, -1);
 920                         M_BNE(1 + (s1 != d));
 921                         M_INTMOVE(s1, d);
 922                         M_BR(1);
 923                         M_IDIV(s1, s2, d);
 924                         store_reg_to_var_int(iptr->dst, d);
 925                         break;
 926
 927                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 928
 929                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 930                         var_to_reg_int(s2, src, REG_ITMP2);
 931                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 932                         M_TST(s2);
 933                         M_BEQ(0);
 934                         codegen_addxdivrefs(cd, mcodeptr);
 935                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 936                         M_CMP(REG_ITMP3, s1);
 937                         M_BNE(4);
 938                         M_CMPI(s2, -1);
 939                         M_BNE(2);
 940                         M_CLR(d);
 941                         M_BR(3);
 942                         M_IDIV(s1, s2, REG_ITMP3);
 943                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
 944                         M_ISUB(s1, REG_ITMP3, d);
 945                         store_reg_to_var_int(iptr->dst, d);
 946                         break;
 947
 948                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 949                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 950
 951                         bte = iptr->val.a;
 952                         md = bte->md;
 953
 954                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 955                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
 956                         M_BEQ(0);
 957                         codegen_addxdivrefs(cd, mcodeptr);
 958
 959                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
 960                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
 961                         M_TINTMOVE(TYPE_LNG, s2, s3);
 962
 963                         var_to_reg_int(s1, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
 964                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
 965                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
 966                         M_TINTMOVE(TYPE_LNG, s1, s3);
 967
 968                         disp = dseg_addaddress(cd, bte->fp);
 969                         M_ALD(REG_ITMP1, REG_PV, disp);
 970                         M_MTCTR(REG_ITMP1);
 971                         M_JSR;
 972
 973                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
 974                         M_TINTMOVE(TYPE_LNG, PACK_REGS(REG_RESULT2, REG_RESULT), d);
 975                         store_reg_to_var_lng(iptr->dst, d);
 976                         break;
 977
 978                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 979
 980                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 981                         var_to_reg_int(s2, src, REG_ITMP2);
 982                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 983                         M_IMUL(s1, s2, d);
 984                         store_reg_to_var_int(iptr->dst, d);
 985                         break;
 986
 987                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 988                                       /* val.i = constant                             */
 989
 990                         var_to_reg_int(s1, src, REG_ITMP1);
 991                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 992                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 993                                 M_IMUL_IMM(s1, iptr->val.i, d);
 994                         } else {
 995                                 ICONST(REG_ITMP3, iptr->val.i);
 996                                 M_IMUL(s1, REG_ITMP3, d);
 997                         }
 998                         store_reg_to_var_int(iptr->dst, d);
 999                         break;
1000
1001                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1002
1003                         var_to_reg_int(s1, src, REG_ITMP1);
1004                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1005                         M_SRA_IMM(s1, iptr->val.i, d);
1006                         M_ADDZE(d, d);
1007                         store_reg_to_var_int(iptr->dst, d);
1008                         break;
1009
1010                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1011
1012                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1013                         var_to_reg_int(s2, src, REG_ITMP2);
1014                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1015                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1016                         M_SLL(s1, REG_ITMP3, d);
1017                         store_reg_to_var_int(iptr->dst, d);
1018                         break;
1019
1020                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1021                                       /* val.i = constant                             */
1022
1023                         var_to_reg_int(s1, src, REG_ITMP1);
1024                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1025                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1026                         store_reg_to_var_int(iptr->dst, d);
1027                         break;
1028
1029                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1030
1031                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1032                         var_to_reg_int(s2, src, REG_ITMP2);
1033                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1034                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1035                         M_SRA(s1, REG_ITMP3, d);
1036                         store_reg_to_var_int(iptr->dst, d);
1037                         break;
1038
1039                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1040                                       /* val.i = constant                             */
1041
1042                         var_to_reg_int(s1, src, REG_ITMP1);
1043                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1044                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1045                         store_reg_to_var_int(iptr->dst, d);
1046                         break;
1047
1048                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1049
1050                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1051                         var_to_reg_int(s2, src, REG_ITMP2);
1052                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1053                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1054                         M_SRL(s1, REG_ITMP2, d);
1055                         store_reg_to_var_int(iptr->dst, d);
1056                         break;
1057
1058                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1059                                       /* val.i = constant                             */
1060
1061                         var_to_reg_int(s1, src, REG_ITMP1);
1062                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1063                         if (iptr->val.i & 0x1f) {
1064                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1065                         } else {
1066                                 M_INTMOVE(s1, d);
1067                         }
1068                         store_reg_to_var_int(iptr->dst, d);
1069                         break;
1070
1071                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1072
1073                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1074                         var_to_reg_int(s2, src, REG_ITMP2);
1075                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1076                         M_AND(s1, s2, d);
1077                         store_reg_to_var_int(iptr->dst, d);
1078                         break;
1079
1080                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1081                                       /* val.i = constant                             */
1082
1083                         var_to_reg_int(s1, src, REG_ITMP1);
1084                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1085                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1086                                 M_AND_IMM(s1, iptr->val.i, d);
1087                                 }
1088                         /*
1089                         else if (iptr->val.i == 0xffffff) {
1090                                 M_RLWINM(s1, 0, 8, 31, d);
1091                                 }
1092                         */
1093                         else {
1094                                 ICONST(REG_ITMP3, iptr->val.i);
1095                                 M_AND(s1, REG_ITMP3, d);
1096                         }
1097                         store_reg_to_var_int(iptr->dst, d);
1098                         break;
1099
1100                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1101
1102                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1103                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1104                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1105                         M_AND(s1, s2, GET_LOW_REG(d));
1106                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1107                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1108                         M_AND(s1, s2, GET_HIGH_REG(d));
1109                         store_reg_to_var_lng(iptr->dst, d);
1110                         break;
1111
1112                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1113                                       /* val.l = constant                             */
1114
1115                         s3 = iptr->val.l & 0xffffffff;
1116                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1117                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1118                         if ((s3 >= 0) && (s3 <= 65535)) {
1119                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1120                         } else {
1121                                 ICONST(REG_ITMP3, s3);
1122                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1123                         }
1124                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1125                         s3 = iptr->val.l >> 32;
1126                         if ((s3 >= 0) && (s3 <= 65535)) {
1127                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1128                         } else {
1129                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1130                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1131                         }
1132                         store_reg_to_var_lng(iptr->dst, d);
1133                         break;
1134
1135                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1136                                       /* val.i = constant                             */
1137
1138                         var_to_reg_int(s1, src, REG_ITMP1);
1139                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1140                         M_MOV(s1, REG_ITMP2);
1141                         M_CMPI(s1, 0);
1142                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1143                         if (iptr->val.i >= 32768) {
1144                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1145                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1146                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1147                         } else {
1148                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1149                         }
1150                         {
1151                                 int b=0, m = iptr->val.i;
1152                                 while (m >>= 1)
1153                                         ++b;
1154                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1155                         }
1156                         M_ISUB(s1, REG_ITMP2, d);
1157                         store_reg_to_var_int(iptr->dst, d);
1158                         break;
1159
1160                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1161
1162                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1163                         var_to_reg_int(s2, src, REG_ITMP2);
1164                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1165                         M_OR(s1, s2, d);
1166                         store_reg_to_var_int(iptr->dst, d);
1167                         break;
1168
1169                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1170                                       /* val.i = constant                             */
1171
1172                         var_to_reg_int(s1, src, REG_ITMP1);
1173                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1174                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1175                                 M_OR_IMM(s1, iptr->val.i, d);
1176                         } else {
1177                                 ICONST(REG_ITMP3, iptr->val.i);
1178                                 M_OR(s1, REG_ITMP3, d);
1179                         }
1180                         store_reg_to_var_int(iptr->dst, d);
1181                         break;
1182
1183                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1184
1185                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1186                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1187                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1188                         M_OR(s1, s2, GET_LOW_REG(d));
1189                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1190                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1191                         M_OR(s1, s2, GET_HIGH_REG(d));
1192                         store_reg_to_var_lng(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1196                                       /* val.l = constant                             */
1197
1198                         s3 = iptr->val.l & 0xffffffff;
1199                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1200                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1201                         if ((s3 >= 0) && (s3 <= 65535)) {
1202                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1203                         } else {
1204                                 ICONST(REG_ITMP3, s3);
1205                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1206                         }
1207                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1208                         s3 = iptr->val.l >> 32;
1209                         if ((s3 >= 0) && (s3 <= 65535)) {
1210                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1211                         } else {
1212                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1213                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1214                         }
1215                         store_reg_to_var_lng(iptr->dst, d);
1216                         break;
1217
1218                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1219
1220                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1221                         var_to_reg_int(s2, src, REG_ITMP2);
1222                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1223                         M_XOR(s1, s2, d);
1224                         store_reg_to_var_int(iptr->dst, d);
1225                         break;
1226
1227                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1228                                       /* val.i = constant                             */
1229
1230                         var_to_reg_int(s1, src, REG_ITMP1);
1231                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1232                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1233                                 M_XOR_IMM(s1, iptr->val.i, d);
1234                         } else {
1235                                 ICONST(REG_ITMP3, iptr->val.i);
1236                                 M_XOR(s1, REG_ITMP3, d);
1237                         }
1238                         store_reg_to_var_int(iptr->dst, d);
1239                         break;
1240
1241                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1242
1243                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
1244                         var_to_reg_lng_low(s2, src, REG_ITMP2);
1245                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1246                         M_XOR(s1, s2, GET_LOW_REG(d));
1247                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
1248                         var_to_reg_lng_high(s2, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1249                         M_XOR(s1, s2, GET_HIGH_REG(d));
1250                         store_reg_to_var_lng(iptr->dst, d);
1251                         break;
1252
1253                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1254                                       /* val.l = constant                             */
1255
1256                         s3 = iptr->val.l & 0xffffffff;
1257                         var_to_reg_lng_low(s1, src, REG_ITMP1);
1258                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1259                         if ((s3 >= 0) && (s3 <= 65535)) {
1260                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1261                         } else {
1262                                 ICONST(REG_ITMP3, s3);
1263                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1264                         }
1265                         var_to_reg_lng_high(s1, src, REG_ITMP1);
1266                         s3 = iptr->val.l >> 32;
1267                         if ((s3 >= 0) && (s3 <= 65535)) {
1268                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1269                         } else {
1270                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1271                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1272                         }
1273                         store_reg_to_var_lng(iptr->dst, d);
1274                         break;
1275
1276                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1277                         /*******************************************************************
1278                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1279                         *******************************************************************/
1280                         var_to_reg_lng_high(s1, src->prev, REG_ITMP3);
1281                         var_to_reg_lng_high(s2, src, REG_ITMP2);
1282                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1283                         {
1284                                 int tempreg = false;
1285                                 int dreg;
1286                                 s4  *br1;
1287
1288                                 if (src->prev->flags & INMEMORY) {
1289                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1290                                 } else {
1291                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1292                                                         || (d == GET_LOW_REG(src->prev->regoff));
1293                                 }
1294                                 if (src->flags & INMEMORY) {
1295                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1296                                 } else {
1297                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1298                                  || (d == GET_LOW_REG(src->regoff));
1299                                 }
1300
1301                                 dreg = tempreg ? REG_ITMP1 : d;
1302                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1303                                 M_CMP(s1, s2);
1304                                 M_BGT(0);
1305                                 br1 = mcodeptr;
1306                                 M_BLT(0);
1307                                 var_to_reg_lng_low(s1, src->prev, REG_ITMP3);
1308                                 var_to_reg_lng_low(s2, src, REG_ITMP2);
1309                                 M_CMPU(s1, s2);
1310                                 M_BGT(3);
1311                                 M_BEQ(1);
1312                                 M_IADD_IMM(dreg, -1, dreg);
1313                                 M_IADD_IMM(dreg, -1, dreg);
1314                                 gen_resolvebranch(br1, (u1*) br1, (u1*) mcodeptr);
1315                                 gen_resolvebranch(br1+1, (u1*) (br1+1), (u1*) (mcodeptr-2));
1316                                 M_INTMOVE(dreg, d);
1317                         }
1318                         store_reg_to_var_lng(iptr->dst, d);
1319                         break;
1320
1321                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1322                                       /* op1 = variable, val.i = constant             */
1323
1324                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1325                         if (var->flags & INMEMORY) {
1326                                 s1 = REG_ITMP1;
1327                                 M_ILD(s1, REG_SP, var->regoff * 4);
1328                         } else {
1329                                 s1 = var->regoff;
1330                         }
1331                         {
1332                                 u4 m = iptr->val.i;
1333                                 if (m & 0x8000)
1334                                         m += 65536;
1335                                 if (m & 0xffff0000)
1336                                         M_ADDIS(s1, m >> 16, s1);
1337                                 if (m & 0xffff)
1338                                         M_IADD_IMM(s1, m & 0xffff, s1);
1339                         }
1340                         if (var->flags & INMEMORY) {
1341                                 M_IST(s1, REG_SP, var->regoff * 4);
1342                         }
1343                         break;
1344
1345
1346                 /* floating operations ************************************************/
1347
1348                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1349
1350                         var_to_reg_flt(s1, src, REG_FTMP1);
1351                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1352                         M_FMOVN(s1, d);
1353                         store_reg_to_var_flt(iptr->dst, d);
1354                         break;
1355
1356                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1357
1358                         var_to_reg_flt(s1, src, REG_FTMP1);
1359                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1360                         M_FMOVN(s1, d);
1361                         store_reg_to_var_dbl(iptr->dst, d);
1362                         break;
1363
1364                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1365
1366                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1367                         var_to_reg_flt(s2, src, REG_FTMP2);
1368                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1369                         M_FADD(s1, s2, d);
1370                         store_reg_to_var_flt(iptr->dst, d);
1371                         break;
1372
1373                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1374
1375                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1376                         var_to_reg_flt(s2, src, REG_FTMP2);
1377                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1378                         M_DADD(s1, s2, d);
1379                         store_reg_to_var_dbl(iptr->dst, d);
1380                         break;
1381
1382                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1383
1384                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1385                         var_to_reg_flt(s2, src, REG_FTMP2);
1386                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1387                         M_FSUB(s1, s2, d);
1388                         store_reg_to_var_flt(iptr->dst, d);
1389                         break;
1390
1391                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1392
1393                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1394                         var_to_reg_flt(s2, src, REG_FTMP2);
1395                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1396                         M_DSUB(s1, s2, d);
1397                         store_reg_to_var_dbl(iptr->dst, d);
1398                         break;
1399
1400                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1401
1402                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1403                         var_to_reg_flt(s2, src, REG_FTMP2);
1404                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1405                         M_FMUL(s1, s2, d);
1406                         store_reg_to_var_flt(iptr->dst, d);
1407                         break;
1408
1409                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1410
1411                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1412                         var_to_reg_flt(s2, src, REG_FTMP2);
1413                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1414                         M_DMUL(s1, s2, d);
1415                         store_reg_to_var_dbl(iptr->dst, d);
1416                         break;
1417
1418                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1419
1420                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1421                         var_to_reg_flt(s2, src, REG_FTMP2);
1422                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1423                         M_FDIV(s1, s2, d);
1424                         store_reg_to_var_flt(iptr->dst, d);
1425                         break;
1426
1427                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1428
1429                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1430                         var_to_reg_flt(s2, src, REG_FTMP2);
1431                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1432                         M_DDIV(s1, s2, d);
1433                         store_reg_to_var_dbl(iptr->dst, d);
1434                         break;
1435
1436                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1437                 case ICMD_D2I:
1438
1439                         var_to_reg_flt(s1, src, REG_FTMP1);
1440                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1441                         M_CLR(d);
1442                         disp = dseg_addfloat(cd, 0.0);
1443                         M_FLD(REG_FTMP2, REG_PV, disp);
1444                         M_FCMPU(s1, REG_FTMP2);
1445                         M_BNAN(4);
1446                         disp = dseg_adds4(cd, 0);
1447                         M_CVTDL_C(s1, REG_FTMP1);
1448                         M_LDA(REG_ITMP1, REG_PV, disp);
1449                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1450                         M_ILD(d, REG_PV, disp);
1451                         store_reg_to_var_int(iptr->dst, d);
1452                         break;
1453
1454                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1455
1456                         var_to_reg_flt(s1, src, REG_FTMP1);
1457                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1458                         M_FLTMOVE(s1, d);
1459                         store_reg_to_var_dbl(iptr->dst, d);
1460                         break;
1461
1462                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1463
1464                         var_to_reg_flt(s1, src, REG_FTMP1);
1465                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1466                         M_CVTDF(s1, d);
1467                         store_reg_to_var_flt(iptr->dst, d);
1468                         break;
1469
1470                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1471                 case ICMD_DCMPL:
1472
1473                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1474                         var_to_reg_flt(s2, src, REG_FTMP2);
1475                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1476                         M_FCMPU(s2, s1);
1477                         M_IADD_IMM(REG_ZERO, -1, d);
1478                         M_BNAN(4);
1479                         M_BGT(3);
1480                         M_IADD_IMM(REG_ZERO, 0, d);
1481                         M_BGE(1);
1482                         M_IADD_IMM(REG_ZERO, 1, d);
1483                         store_reg_to_var_int(iptr->dst, d);
1484                         break;
1485
1486                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1487                 case ICMD_DCMPG:
1488
1489                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1490                         var_to_reg_flt(s2, src, REG_FTMP2);
1491                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
1492                         M_FCMPU(s1, s2);
1493                         M_IADD_IMM(REG_ZERO, 1, d);
1494                         M_BNAN(4);
1495                         M_BGT(3);
1496                         M_IADD_IMM(REG_ZERO, 0, d);
1497                         M_BGE(1);
1498                         M_IADD_IMM(REG_ZERO, -1, d);
1499                         store_reg_to_var_int(iptr->dst, d);
1500                         break;
1501
1502
1503                 /* memory operations **************************************************/
1504
1505                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1506
1507                         var_to_reg_int(s1, src, REG_ITMP1);
1508                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1509                         gen_nullptr_check(s1);
1510                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1511                         store_reg_to_var_int(iptr->dst, d);
1512                         break;
1513
1514                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1515
1516                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1517                         var_to_reg_int(s2, src, REG_ITMP2);
1518                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1519                         if (iptr->op1 == 0) {
1520                                 gen_nullptr_check(s1);
1521                                 gen_bound_check;
1522                         }
1523                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1524                         M_LBZX(d, s1, REG_ITMP2);
1525                         M_BSEXT(d, d);
1526                         store_reg_to_var_int(iptr->dst, d);
1527                         break;
1528
1529                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1530
1531                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1532                         var_to_reg_int(s2, src, REG_ITMP2);
1533                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1534                         if (iptr->op1 == 0) {
1535                                 gen_nullptr_check(s1);
1536                                 gen_bound_check;
1537                         }
1538                         M_SLL_IMM(s2, 1, REG_ITMP2);
1539                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1540                         M_LHZX(d, s1, REG_ITMP2);
1541                         store_reg_to_var_int(iptr->dst, d);
1542                         break;
1543
1544                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1545
1546                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1547                         var_to_reg_int(s2, src, REG_ITMP2);
1548                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1549                         if (iptr->op1 == 0) {
1550                                 gen_nullptr_check(s1);
1551                                 gen_bound_check;
1552                         }
1553                         M_SLL_IMM(s2, 1, REG_ITMP2);
1554                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1555                         M_LHAX(d, s1, REG_ITMP2);
1556                         store_reg_to_var_int(iptr->dst, d);
1557                         break;
1558
1559                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1560
1561                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1562                         var_to_reg_int(s2, src, REG_ITMP2);
1563                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1564                         if (iptr->op1 == 0) {
1565                                 gen_nullptr_check(s1);
1566                                 gen_bound_check;
1567                         }
1568                         M_SLL_IMM(s2, 2, REG_ITMP2);
1569                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1570                         M_LWZX(d, s1, REG_ITMP2);
1571                         store_reg_to_var_int(iptr->dst, d);
1572                         break;
1573
1574                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1575
1576                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1577                         var_to_reg_int(s2, src, REG_ITMP2);
1578                         d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1579                         if (iptr->op1 == 0) {
1580                                 gen_nullptr_check(s1);
1581                                 gen_bound_check;
1582                         }
1583                         M_SLL_IMM(s2, 3, REG_ITMP2);
1584                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1585                         M_ILD(GET_HIGH_REG(d), REG_ITMP2, OFFSET(java_longarray, data[0]));
1586                         M_ILD(GET_LOW_REG(d), REG_ITMP2, OFFSET(java_longarray,
1587                                                                                                         data[0]) + 4);
1588                         store_reg_to_var_lng(iptr->dst, d);
1589                         break;
1590
1591                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1592
1593                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1594                         var_to_reg_int(s2, src, REG_ITMP2);
1595                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1596                         if (iptr->op1 == 0) {
1597                                 gen_nullptr_check(s1);
1598                                 gen_bound_check;
1599                         }
1600                         M_SLL_IMM(s2, 2, REG_ITMP2);
1601                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1602                         M_LFSX(d, s1, REG_ITMP2);
1603                         store_reg_to_var_flt(iptr->dst, d);
1604                         break;
1605
1606                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1607
1608                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1609                         var_to_reg_int(s2, src, REG_ITMP2);
1610                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1611                         if (iptr->op1 == 0) {
1612                                 gen_nullptr_check(s1);
1613                                 gen_bound_check;
1614                         }
1615                         M_SLL_IMM(s2, 3, REG_ITMP2);
1616                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1617                         M_LFDX(d, s1, REG_ITMP2);
1618                         store_reg_to_var_dbl(iptr->dst, d);
1619                         break;
1620
1621                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1622
1623                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1624                         var_to_reg_int(s2, src, REG_ITMP2);
1625                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1626                         if (iptr->op1 == 0) {
1627                                 gen_nullptr_check(s1);
1628                                 gen_bound_check;
1629                         }
1630                         M_SLL_IMM(s2, 2, REG_ITMP2);
1631                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1632                         M_LWZX(d, s1, REG_ITMP2);
1633                         store_reg_to_var_adr(iptr->dst, d);
1634                         break;
1635
1636
1637                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1638
1639                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1640                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1641                         if (iptr->op1 == 0) {
1642                                 gen_nullptr_check(s1);
1643                                 gen_bound_check;
1644                         }
1645                         var_to_reg_int(s3, src, REG_ITMP3);
1646                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1647                         M_STBX(s3, s1, REG_ITMP2);
1648                         break;
1649
1650                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1651
1652                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1653                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1654                         if (iptr->op1 == 0) {
1655                                 gen_nullptr_check(s1);
1656                                 gen_bound_check;
1657                         }
1658                         var_to_reg_int(s3, src, REG_ITMP3);
1659                         M_SLL_IMM(s2, 1, REG_ITMP2);
1660                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1661                         M_STHX(s3, s1, REG_ITMP2);
1662                         break;
1663
1664                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1665
1666                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1667                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1668                         if (iptr->op1 == 0) {
1669                                 gen_nullptr_check(s1);
1670                                 gen_bound_check;
1671                         }
1672                         var_to_reg_int(s3, src, REG_ITMP3);
1673                         M_SLL_IMM(s2, 1, REG_ITMP2);
1674                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1675                         M_STHX(s3, s1, REG_ITMP2);
1676                         break;
1677
1678                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1679
1680                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1681                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1682                         if (iptr->op1 == 0) {
1683                                 gen_nullptr_check(s1);
1684                                 gen_bound_check;
1685                         }
1686                         var_to_reg_int(s3, src, REG_ITMP3);
1687                         M_SLL_IMM(s2, 2, REG_ITMP2);
1688                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1689                         M_STWX(s3, s1, REG_ITMP2);
1690                         break;
1691
1692                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1693
1694                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1695                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1696                         if (iptr->op1 == 0) {
1697                                 gen_nullptr_check(s1);
1698                                 gen_bound_check;
1699                         }
1700                         var_to_reg_lng_high(s3, src, REG_ITMP3);
1701                         M_SLL_IMM(s2, 3, REG_ITMP2);
1702                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1703                         M_STWX(s3, s1, REG_ITMP2);
1704                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1705                         var_to_reg_lng_low(s3, src, REG_ITMP3);
1706                         M_STWX(s3, s1, REG_ITMP2);
1707                         break;
1708
1709                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1710
1711                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1712                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1713                         if (iptr->op1 == 0) {
1714                                 gen_nullptr_check(s1);
1715                                 gen_bound_check;
1716                         }
1717                         var_to_reg_flt(s3, src, REG_FTMP3);
1718                         M_SLL_IMM(s2, 2, REG_ITMP2);
1719                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1720                         M_STFSX(s3, s1, REG_ITMP2);
1721                         break;
1722
1723                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1724
1725                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1726                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1727                         if (iptr->op1 == 0) {
1728                                 gen_nullptr_check(s1);
1729                                 gen_bound_check;
1730                         }
1731                         var_to_reg_flt(s3, src, REG_FTMP3);
1732                         M_SLL_IMM(s2, 3, REG_ITMP2);
1733                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1734                         M_STFDX(s3, s1, REG_ITMP2);
1735                         break;
1736
1737                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1738
1739                         var_to_reg_int(s1, src->prev->prev, rd->argintregs[0]);
1740                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1741                         if (iptr->op1 == 0) {
1742                                 gen_nullptr_check(s1);
1743                                 gen_bound_check;
1744                         }
1745                         var_to_reg_int(s3, src, rd->argintregs[1]);
1746
1747                         M_INTMOVE(s1, rd->argintregs[0]);
1748                         M_INTMOVE(s3, rd->argintregs[1]);
1749                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1750                         M_ALD(REG_ITMP1, REG_PV, disp);
1751                         M_MTCTR(REG_ITMP1);
1752                         M_JSR;
1753                         M_TST(REG_RESULT);
1754                         M_BEQ(0);
1755                         codegen_addxstorerefs(cd, mcodeptr);
1756
1757                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1758                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1759                         var_to_reg_int(s3, src, REG_ITMP3);
1760                         M_SLL_IMM(s2, 2, REG_ITMP2);
1761                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1762                         M_STWX(s3, s1, REG_ITMP2);
1763                         break;
1764
1765
1766                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1767                                       /* op1 = type, val.a = field address            */
1768
1769                         if (iptr->val.a == NULL) {
1770                                 disp = dseg_addaddress(cd, NULL);
1771
1772                                 codegen_addpatchref(cd, mcodeptr,
1773                                                                         PATCHER_get_putstatic,
1774                                                                         (unresolved_field *) iptr->target, disp);
1775
1776                                 if (opt_showdisassemble)
1777                                         M_NOP;
1778
1779                         } else {
1780                                 fieldinfo *fi = iptr->val.a;
1781
1782                                 disp = dseg_addaddress(cd, &(fi->value));
1783
1784                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1785                                         codegen_addpatchref(cd, mcodeptr,
1786                                                                                 PATCHER_clinit, fi->class, disp);
1787
1788                                         if (opt_showdisassemble)
1789                                                 M_NOP;
1790                                 }
1791                         }
1792
1793                         M_ALD(REG_ITMP1, REG_PV, disp);
1794                         switch (iptr->op1) {
1795                         case TYPE_INT:
1796                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1797                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1798                                 store_reg_to_var_int(iptr->dst, d);
1799                                 break;
1800                         case TYPE_LNG:
1801                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1802                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1803                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1804                                 store_reg_to_var_lng(iptr->dst, d);
1805                                 break;
1806                         case TYPE_ADR:
1807                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1808                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1809                                 store_reg_to_var_adr(iptr->dst, d);
1810                                 break;
1811                         case TYPE_FLT:
1812                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1813                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1814                                 store_reg_to_var_flt(iptr->dst, d);
1815                                 break;
1816                         case TYPE_DBL:
1817                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1818                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1819                                 store_reg_to_var_dbl(iptr->dst, d);
1820                                 break;
1821                         }
1822                         break;
1823
1824                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1825                                       /* op1 = type, val.a = field address            */
1826
1827
1828                         if (iptr->val.a == NULL) {
1829                                 disp = dseg_addaddress(cd, NULL);
1830
1831                                 codegen_addpatchref(cd, mcodeptr,
1832                                                                         PATCHER_get_putstatic,
1833                                                                         (unresolved_field *) iptr->target, disp);
1834
1835                                 if (opt_showdisassemble)
1836                                         M_NOP;
1837
1838                         } else {
1839                                 fieldinfo *fi = iptr->val.a;
1840
1841                                 disp = dseg_addaddress(cd, &(fi->value));
1842
1843                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1844                                         codegen_addpatchref(cd, mcodeptr,
1845                                                                                 PATCHER_clinit, fi->class, disp);
1846
1847                                         if (opt_showdisassemble)
1848                                                 M_NOP;
1849                                 }
1850                         }
1851
1852                         M_ALD(REG_ITMP1, REG_PV, disp);
1853                         switch (iptr->op1) {
1854                         case TYPE_INT:
1855                                 var_to_reg_int(s2, src, REG_ITMP2);
1856                                 M_IST_INTERN(s2, REG_ITMP1, 0);
1857                                 break;
1858                         case TYPE_LNG:
1859                                 var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1860                                 M_IST_INTERN(GET_HIGH_REG(s2), REG_ITMP1, 0);
1861                                 M_IST_INTERN(GET_LOW_REG(s2), REG_ITMP1, 4);
1862                                 break;
1863                         case TYPE_ADR:
1864                                 var_to_reg_int(s2, src, REG_ITMP2);
1865                                 M_AST_INTERN(s2, REG_ITMP1, 0);
1866                                 break;
1867                         case TYPE_FLT:
1868                                 var_to_reg_flt(s2, src, REG_FTMP2);
1869                                 M_FST_INTERN(s2, REG_ITMP1, 0);
1870                                 break;
1871                         case TYPE_DBL:
1872                                 var_to_reg_flt(s2, src, REG_FTMP2);
1873                                 M_DST_INTERN(s2, REG_ITMP1, 0);
1874                                 break;
1875                         }
1876                         break;
1877
1878
1879                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
1880                                       /* op1 = type, val.i = field offset             */
1881
1882                         var_to_reg_int(s1, src, REG_ITMP1);
1883                         gen_nullptr_check(s1);
1884
1885                         if (iptr->val.a == NULL) {
1886                                 codegen_addpatchref(cd, mcodeptr,
1887                                                                         PATCHER_get_putfield,
1888                                                                         (unresolved_field *) iptr->target, 0);
1889
1890                                 if (opt_showdisassemble)
1891                                         M_NOP;
1892
1893                                 disp = 0;
1894
1895                         } else {
1896                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1897                         }
1898
1899                         switch (iptr->op1) {
1900                         case TYPE_INT:
1901                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1902                                 M_ILD(d, s1, disp);
1903                                 store_reg_to_var_int(iptr->dst, d);
1904                                 break;
1905                         case TYPE_LNG:
1906                                 d = reg_of_var(rd, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1907                                 if (GET_HIGH_REG(d) == s1) {
1908                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
1909                                         M_ILD(GET_HIGH_REG(d), s1, disp);
1910                                 } else {
1911                                         M_ILD(GET_HIGH_REG(d), s1, disp);
1912                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
1913                                 }
1914                                 store_reg_to_var_lng(iptr->dst, d);
1915                                 break;
1916                         case TYPE_ADR:
1917                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1918                                 M_ALD(d, s1, disp);
1919                                 store_reg_to_var_adr(iptr->dst, d);
1920                                 break;
1921                         case TYPE_FLT:
1922                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1923                                 M_FLD(d, s1, disp);
1924                                 store_reg_to_var_flt(iptr->dst, d);
1925                                 break;
1926                         case TYPE_DBL:
1927                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
1928                                 M_DLD(d, s1, disp);
1929                                 store_reg_to_var_dbl(iptr->dst, d);
1930                                 break;
1931                         }
1932                         break;
1933
1934                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1935                                       /* op1 = type, val.i = field offset             */
1936
1937                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1938                         gen_nullptr_check(s1);
1939
1940                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
1941                                 if (IS_2_WORD_TYPE(iptr->op1)) {
1942                                         var_to_reg_int(s2, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1943                                 } else {
1944                                         var_to_reg_int(s2, src, REG_ITMP2);
1945                                 }
1946                         } else {
1947                                 var_to_reg_flt(s2, src, REG_FTMP2);
1948                         }
1949
1950                         if (iptr->val.a == NULL) {
1951                                 codegen_addpatchref(cd, mcodeptr,
1952                                                                         PATCHER_get_putfield,
1953                                                                         (unresolved_field *) iptr->target, 0);
1954
1955                                 if (opt_showdisassemble)
1956                                         M_NOP;
1957
1958                                 disp = 0;
1959
1960                         } else {
1961                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
1962                         }
1963
1964                         switch (iptr->op1) {
1965                         case TYPE_INT:
1966                                 M_IST(s2, s1, disp);
1967                                 break;
1968                         case TYPE_LNG:
1969                                 M_IST(GET_LOW_REG(s2), s1, disp + 4);      /* keep this order */
1970                                 M_IST(GET_HIGH_REG(s2), s1, disp);         /* keep this order */
1971                                 break;
1972                         case TYPE_ADR:
1973                                 M_AST(s2, s1, disp);
1974                                 break;
1975                         case TYPE_FLT:
1976                                 M_FST(s2, s1, disp);
1977                                 break;
1978                         case TYPE_DBL:
1979                                 M_DST(s2, s1, disp);
1980                                 break;
1981                         }
1982                         break;
1983
1984
1985                 /* branch operations **************************************************/
1986
1987                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1988
1989                         var_to_reg_int(s1, src, REG_ITMP1);
1990                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1991
1992 #ifdef ENABLE_VERIFIER
1993                         if (iptr->val.a) {
1994                                 codegen_addpatchref(cd, mcodeptr,
1995                                                                         PATCHER_athrow_areturn,
1996                                                                         (unresolved_class *) iptr->val.a, 0);
1997
1998                                 if (opt_showdisassemble)
1999                                         M_NOP;
2000                         }
2001 #endif /* ENABLE_VERIFIER */
2002
2003                         disp = dseg_addaddress(cd, asm_handle_exception);
2004                         M_ALD(REG_ITMP2, REG_PV, disp);
2005                         M_MTCTR(REG_ITMP2);
2006
2007                         if (m->isleafmethod) M_MFLR(REG_ITMP3);         /* save LR        */
2008                         M_BL(0);                                        /* get current PC */
2009                         M_MFLR(REG_ITMP2_XPC);
2010                         if (m->isleafmethod) M_MTLR(REG_ITMP3);         /* restore LR     */
2011                         M_RTS;                                          /* jump to CTR    */
2012
2013                         ALIGNCODENOP;
2014                         break;
2015
2016                 case ICMD_GOTO:         /* ... ==> ...                                */
2017                                         /* op1 = target JavaVM pc                     */
2018                         M_BR(0);
2019                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2020                         ALIGNCODENOP;
2021                         break;
2022
2023                 case ICMD_JSR:          /* ... ==> ...                                */
2024                                         /* op1 = target JavaVM pc                     */
2025
2026                         if (m->isleafmethod) M_MFLR(REG_ITMP2);
2027                         M_BL(0);
2028                         M_MFLR(REG_ITMP1);
2029                         M_IADD_IMM(REG_ITMP1, m->isleafmethod ? 16 : 12, REG_ITMP1);
2030                         if (m->isleafmethod) M_MTLR(REG_ITMP2);
2031                         M_BR(0);
2032                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2033                         break;
2034
2035                 case ICMD_RET:          /* ... ==> ...                                */
2036                                         /* op1 = local variable                       */
2037
2038                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2039                         if (var->flags & INMEMORY) {
2040                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2041                                 M_MTCTR(REG_ITMP1);
2042                         } else {
2043                                 M_MTCTR(var->regoff);
2044                         }
2045                         M_RTS;
2046                         ALIGNCODENOP;
2047                         break;
2048
2049                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2050                                         /* op1 = target JavaVM pc                     */
2051
2052                         var_to_reg_int(s1, src, REG_ITMP1);
2053                         M_TST(s1);
2054                         M_BEQ(0);
2055                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2056                         break;
2057
2058                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2059                                         /* op1 = target JavaVM pc                     */
2060
2061                         var_to_reg_int(s1, src, REG_ITMP1);
2062                         M_TST(s1);
2063                         M_BNE(0);
2064                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2065                         break;
2066
2067                 case ICMD_IFLT:
2068                 case ICMD_IFLE:
2069                 case ICMD_IFNE:
2070                 case ICMD_IFGT:
2071                 case ICMD_IFGE:
2072                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2073                                         /* op1 = target JavaVM pc, val.i = constant   */
2074
2075                         var_to_reg_int(s1, src, REG_ITMP1);
2076                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2077                                 M_CMPI(s1, iptr->val.i);
2078                         } else {
2079                                 ICONST(REG_ITMP2, iptr->val.i);
2080                                 M_CMP(s1, REG_ITMP2);
2081                         }
2082                         switch (iptr->opc) {
2083                         case ICMD_IFLT:
2084                                 M_BLT(0);
2085                                 break;
2086                         case ICMD_IFLE:
2087                                 M_BLE(0);
2088                                 break;
2089                         case ICMD_IFNE:
2090                                 M_BNE(0);
2091                                 break;
2092                         case ICMD_IFGT:
2093                                 M_BGT(0);
2094                                 break;
2095                         case ICMD_IFGE:
2096                                 M_BGE(0);
2097                                 break;
2098                         case ICMD_IFEQ:
2099                                 M_BEQ(0);
2100                                 break;
2101                         }
2102                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2103                         break;
2104
2105
2106                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2107                                         /* op1 = target JavaVM pc, val.l = constant   */
2108
2109                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2110                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2111                         if (iptr->val.l == 0) {
2112                                 M_OR_TST(s1, s2, REG_ITMP3);
2113                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2114                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2115                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2116                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2117                         } else {
2118                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2119                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2120                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2121                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2122                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2123                         }
2124                         M_BEQ(0);
2125                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2126                         break;
2127
2128                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2129                                         /* op1 = target JavaVM pc, val.l = constant   */
2130                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2131                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2132                         if (iptr->val.l == 0) {
2133                                 /* if high word is less than zero, the whole long is too */
2134                                 M_CMPI(s2, 0);
2135                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2136                                 M_CMPI(s2, 0);
2137                                 M_BLT(0);
2138                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2139                                 M_BGT(2);
2140                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2141                         } else {
2142                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2143                                 M_CMP(s2, REG_ITMP3);
2144                                 M_BLT(0);
2145                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2146                                 M_BGT(3);
2147                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2148                                 M_CMPU(s1, REG_ITMP3);
2149                         }
2150                         M_BLT(0);
2151                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2152                         break;
2153
2154                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2155                                         /* op1 = target JavaVM pc, val.l = constant   */
2156
2157                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2158                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2159 /*                      if (iptr->val.l == 0) { */
2160 /*                              M_OR(s1, s2, REG_ITMP3); */
2161 /*                              M_CMPI(REG_ITMP3, 0); */
2162
2163 /*                      } else  */
2164                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2165                                 M_CMPI(s2, 0);
2166                                 M_BLT(0);
2167                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2168                                 M_BGT(2);
2169                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2170                         } else {
2171                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2172                                 M_CMP(s2, REG_ITMP3);
2173                                 M_BLT(0);
2174                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2175                                 M_BGT(3);
2176                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2177                                 M_CMPU(s1, REG_ITMP3);
2178                         }
2179                         M_BLE(0);
2180                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2181                         break;
2182
2183                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2184                                         /* op1 = target JavaVM pc, val.l = constant   */
2185
2186                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2187                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2188                         if (iptr->val.l == 0) {
2189                                 M_OR_TST(s1, s2, REG_ITMP3);
2190                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2191                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2192                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2193                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2194                         } else {
2195                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2196                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2197                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2198                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2199                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2200                         }
2201                         M_BNE(0);
2202                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2203                         break;
2204
2205                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2206                                         /* op1 = target JavaVM pc, val.l = constant   */
2207
2208                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2209                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2210 /*                      if (iptr->val.l == 0) { */
2211 /*                              M_OR(s1, s2, REG_ITMP3); */
2212 /*                              M_CMPI(REG_ITMP3, 0); */
2213
2214 /*                      } else  */
2215                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2216                                 M_CMPI(s2, 0);
2217                                 M_BGT(0);
2218                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2219                                 M_BLT(2);
2220                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2221                         } else {
2222                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2223                                 M_CMP(s2, REG_ITMP3);
2224                                 M_BGT(0);
2225                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2226                                 M_BLT(3);
2227                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2228                                 M_CMPU(s1, REG_ITMP3);
2229                         }
2230                         M_BGT(0);
2231                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2232                         break;
2233
2234                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2235                                         /* op1 = target JavaVM pc, val.l = constant   */
2236                         var_to_reg_lng_low(s1, src, REG_ITMP1);
2237                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2238                         if (iptr->val.l == 0) {
2239                                 /* if high word is greater equal zero, the whole long is too */
2240                                 M_CMPI(s2, 0);
2241                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2242                                 M_CMPI(s2, 0);
2243                                 M_BGT(0);
2244                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2245                                 M_BLT(2);
2246                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2247                         } else {
2248                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2249                                 M_CMP(s2, REG_ITMP3);
2250                                 M_BGT(0);
2251                                 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2252                                 M_BLT(3);
2253                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2254                                 M_CMPU(s1, REG_ITMP3);
2255                         }
2256                         M_BGE(0);
2257                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2258                         break;
2259
2260                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2261                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
2262
2263                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2264                         var_to_reg_int(s2, src, REG_ITMP2);
2265                         M_CMP(s1, s2);
2266                         M_BEQ(0);
2267                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2268                         break;
2269
2270                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2271                                         /* op1 = target JavaVM pc                     */
2272
2273                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2274                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2275                         M_CMP(s1, s2);
2276                         /* load low-bits before the branch, so we know the distance */
2277                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2278                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2279                         M_BNE(2);
2280                         M_CMP(s1, s2);
2281                         M_BEQ(0);
2282                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2283                         break;
2284
2285                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2286                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
2287
2288                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2289                         var_to_reg_int(s2, src, REG_ITMP2);
2290                         M_CMP(s1, s2);
2291                         M_BNE(0);
2292                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2293                         break;
2294
2295                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
2296                                         /* op1 = target JavaVM pc                     */
2297
2298                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2299                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2300                         M_CMP(s1, s2);
2301                         M_BNE(0);
2302                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2303                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2304                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2305                         M_CMP(s1, s2);
2306                         M_BNE(0);
2307                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2308                         break;
2309
2310                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2311                                         /* op1 = target JavaVM pc                     */
2312
2313                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2314                         var_to_reg_int(s2, src, REG_ITMP2);
2315                         M_CMP(s1, s2);
2316                         M_BLT(0);
2317                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2318                         break;
2319
2320                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2321                                         /* op1 = target JavaVM pc                     */
2322
2323                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2324                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2325                         M_CMP(s1, s2);
2326                         M_BLT(0);
2327                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2328                         /* load low-bits before the branch, so we know the distance */
2329                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2330                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2331                         M_BGT(2);
2332                         M_CMPU(s1, s2);
2333                         M_BLT(0);
2334                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2335                         break;
2336
2337                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2338                                         /* op1 = target JavaVM pc                     */
2339
2340                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2341                         var_to_reg_int(s2, src, REG_ITMP2);
2342                         M_CMP(s1, s2);
2343                         M_BGT(0);
2344                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2345                         break;
2346
2347                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2348                                         /* op1 = target JavaVM pc                     */
2349
2350                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2351                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2352                         M_CMP(s1, s2);
2353                         M_BGT(0);
2354                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2355                         /* load low-bits before the branch, so we know the distance */
2356                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2357                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2358                         M_BLT(2);
2359                         M_CMPU(s1, s2);
2360                         M_BGT(0);
2361                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2362                         break;
2363
2364                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2365                                         /* op1 = target JavaVM pc                     */
2366
2367                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2368                         var_to_reg_int(s2, src, REG_ITMP2);
2369                         M_CMP(s1, s2);
2370                         M_BLE(0);
2371                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2372                         break;
2373
2374                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2375                                         /* op1 = target JavaVM pc                     */
2376
2377                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2378                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2379                         M_CMP(s1, s2);
2380                         M_BLT(0);
2381                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2382                         /* load low-bits before the branch, so we know the distance */
2383                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2384                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2385                         M_BGT(2);
2386                         M_CMPU(s1, s2);
2387                         M_BLE(0);
2388                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2389                         break;
2390
2391                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2392                                         /* op1 = target JavaVM pc                     */
2393
2394                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2395                         var_to_reg_int(s2, src, REG_ITMP2);
2396                         M_CMP(s1, s2);
2397                         M_BGE(0);
2398                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2399                         break;
2400
2401                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2402                                         /* op1 = target JavaVM pc                     */
2403
2404                         var_to_reg_lng_high(s1, src->prev, REG_ITMP1);
2405                         var_to_reg_lng_high(s2, src, REG_ITMP2);
2406                         M_CMP(s1, s2);
2407                         M_BGT(0);
2408                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2409                         /* load low-bits before the branch, so we know the distance */
2410                         var_to_reg_lng_low(s1, src->prev, REG_ITMP1);
2411                         var_to_reg_lng_low(s2, src, REG_ITMP2);
2412                         M_BLT(2);
2413                         M_CMPU(s1, s2);
2414                         M_BGE(0);
2415                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2416                         break;
2417
2418                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2419
2420                         var_to_reg_int(s1, src, REG_RESULT);
2421                         M_TINTMOVE(src->type, s1, REG_RESULT);
2422                         goto nowperformreturn;
2423
2424                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2425
2426                         var_to_reg_int(s1, src, REG_RESULT);
2427                         M_TINTMOVE(src->type, s1, REG_RESULT);
2428
2429 #ifdef ENABLE_VERIFIER
2430                         if (iptr->val.a) {
2431                                 codegen_addpatchref(cd, mcodeptr,
2432                                                                         PATCHER_athrow_areturn,
2433                                                                         (unresolved_class *) iptr->val.a, 0);
2434
2435                                 if (opt_showdisassemble)
2436                                         M_NOP;
2437                         }
2438 #endif /* ENABLE_VERIFIER */
2439                         goto nowperformreturn;
2440
2441                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2442
2443                         var_to_reg_int(s1, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2444                         M_TINTMOVE(src->type, s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2445                         goto nowperformreturn;
2446
2447                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2448                 case ICMD_DRETURN:
2449
2450                         var_to_reg_flt(s1, src, REG_FRESULT);
2451                         M_FLTMOVE(s1, REG_FRESULT);
2452                         goto nowperformreturn;
2453
2454                 case ICMD_RETURN:      /* ...  ==> ...                                */
2455
2456 nowperformreturn:
2457                         {
2458                         s4 i, p;
2459
2460                         p = parentargs_base;
2461
2462                         /* call trace function */
2463
2464                         if (runverbose) {
2465                                 M_MFLR(REG_ZERO);
2466                                 M_LDA(REG_SP, REG_SP, -10 * 8);
2467                                 M_DST(REG_FRESULT, REG_SP, 48+0);
2468                                 M_IST(REG_RESULT, REG_SP, 48+8);
2469                                 M_AST(REG_ZERO, REG_SP, 48+12);
2470                                 M_IST(REG_RESULT2, REG_SP, 48+16);
2471
2472                                 /* keep this order */
2473                                 switch (iptr->opc) {
2474                                 case ICMD_IRETURN:
2475                                 case ICMD_ARETURN:
2476 #if defined(__DARWIN__)
2477                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2478                                         M_CLR(rd->argintregs[1]);
2479 #else
2480                                         M_MOV(REG_RESULT, rd->argintregs[3]);
2481                                         M_CLR(rd->argintregs[2]);
2482 #endif
2483                                         break;
2484
2485                                 case ICMD_LRETURN:
2486 #if defined(__DARWIN__)
2487                                         M_MOV(REG_RESULT2, rd->argintregs[2]);
2488                                         M_MOV(REG_RESULT, rd->argintregs[1]);
2489 #else
2490                                         M_MOV(REG_RESULT2, rd->argintregs[3]);
2491                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2492 #endif
2493                                         break;
2494                                 }
2495
2496                                 disp = dseg_addaddress(cd, m);
2497                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2498
2499                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2500                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2501                                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2502                                 M_ALD(REG_ITMP2, REG_PV, disp);
2503                                 M_MTCTR(REG_ITMP2);
2504                                 M_JSR;
2505
2506                                 M_DLD(REG_FRESULT, REG_SP, 48+0);
2507                                 M_ILD(REG_RESULT, REG_SP, 48+8);
2508                                 M_ALD(REG_ZERO, REG_SP, 48+12);
2509                                 M_ILD(REG_RESULT2, REG_SP, 48+16);
2510                                 M_LDA(REG_SP, REG_SP, 10 * 8);
2511                                 M_MTLR(REG_ZERO);
2512                         }
2513
2514 #if defined(USE_THREADS)
2515                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2516                                 /* we need to save the proper return value */
2517                                 switch (iptr->opc) {
2518                                 case ICMD_LRETURN:
2519                                         M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2520                                         /* fall through */
2521                                 case ICMD_IRETURN:
2522                                 case ICMD_ARETURN:
2523                                         M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2524                                         break;
2525                                 case ICMD_FRETURN:
2526                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2527                                         break;
2528                                 case ICMD_DRETURN:
2529                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2530                                         break;
2531                                 }
2532
2533                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2534                                 M_ALD(REG_ITMP3, REG_PV, disp);
2535                                 M_MTCTR(REG_ITMP3);
2536                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2537                                 M_JSR;
2538
2539                                 /* and now restore the proper return value */
2540                                 switch (iptr->opc) {
2541                                 case ICMD_LRETURN:
2542                                         M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2543                                         /* fall through */
2544                                 case ICMD_IRETURN:
2545                                 case ICMD_ARETURN:
2546                                         M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2547                                         break;
2548                                 case ICMD_FRETURN:
2549                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2550                                         break;
2551                                 case ICMD_DRETURN:
2552                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2553                                         break;
2554                                 }
2555                         }
2556 #endif
2557
2558                         /* restore return address                                         */
2559
2560                         if (!m->isleafmethod) {
2561                                 M_ALD(REG_ZERO, REG_SP, p * 4 + LA_LR_OFFSET);
2562                                 M_MTLR(REG_ZERO);
2563                         }
2564
2565                         /* restore saved registers                                        */
2566
2567                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2568                                 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2569                         }
2570                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2571                                 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2572                         }
2573
2574                         /* deallocate stack                                               */
2575
2576                         if (parentargs_base)
2577                                 M_LDA(REG_SP, REG_SP, parentargs_base * 4);
2578
2579                         M_RET;
2580                         ALIGNCODENOP;
2581                         }
2582                         break;
2583
2584
2585                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2586                         {
2587                         s4 i, l, *s4ptr;
2588                         void **tptr;
2589
2590                         tptr = (void **) iptr->target;
2591
2592                         s4ptr = iptr->val.a;
2593                         l = s4ptr[1];                          /* low     */
2594                         i = s4ptr[2];                          /* high    */
2595
2596                         var_to_reg_int(s1, src, REG_ITMP1);
2597                         if (l == 0) {
2598                                 M_INTMOVE(s1, REG_ITMP1);
2599                         } else if (l <= 32768) {
2600                                 M_LDA(REG_ITMP1, s1, -l);
2601                         } else {
2602                                 ICONST(REG_ITMP2, l);
2603                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2604                         }
2605                         i = i - l + 1;
2606
2607                         /* range check */
2608
2609                         M_CMPUI(REG_ITMP1, i - 1);
2610                         M_BGT(0);
2611                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2612
2613                         /* build jump table top down and use address of lowest entry */
2614
2615                         /* s4ptr += 3 + i; */
2616                         tptr += i;
2617
2618                         while (--i >= 0) {
2619                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2620                                 --tptr;
2621                         }
2622                         }
2623
2624                         /* length of dataseg after last dseg_addtarget is used by load */
2625
2626                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2627                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2628                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2629                         M_MTCTR(REG_ITMP2);
2630                         M_RTS;
2631                         ALIGNCODENOP;
2632                         break;
2633
2634
2635                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2636                         {
2637                         s4 i, l, val, *s4ptr;
2638                         void **tptr;
2639
2640                         tptr = (void **) iptr->target;
2641
2642                         s4ptr = iptr->val.a;
2643                         l = s4ptr[0];                          /* default  */
2644                         i = s4ptr[1];                          /* count    */
2645
2646                         MCODECHECK((i<<2)+8);
2647                         var_to_reg_int(s1, src, REG_ITMP1);
2648                         while (--i >= 0) {
2649                                 s4ptr += 2;
2650                                 ++tptr;
2651
2652                                 val = s4ptr[0];
2653                                 if ((val >= -32768) && (val <= 32767)) {
2654                                         M_CMPI(s1, val);
2655                                 } else {
2656                                         a = dseg_adds4(cd, val);
2657                                         M_ILD(REG_ITMP2, REG_PV, a);
2658                                         M_CMP(s1, REG_ITMP2);
2659                                 }
2660                                 M_BEQ(0);
2661                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2662                         }
2663
2664                         M_BR(0);
2665                         tptr = (void **) iptr->target;
2666                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
2667
2668                         ALIGNCODENOP;
2669                         break;
2670                         }
2671
2672
2673                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2674                                         /* op1 = arg count val.a = builtintable entry */
2675
2676                         bte = iptr->val.a;
2677                         md = bte->md;
2678                         goto gen_method;
2679
2680                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2681                                         /* op1 = arg count, val.a = method pointer    */
2682
2683                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2684                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2685                 case ICMD_INVOKEINTERFACE:
2686
2687                         lm = iptr->val.a;
2688
2689                         if (lm == NULL) {
2690                                 unresolved_method *um = iptr->target;
2691                                 md = um->methodref->parseddesc.md;
2692                         } else {
2693                                 md = lm->parseddesc;
2694                         }
2695
2696 gen_method:
2697                         s3 = md->paramcount;
2698
2699                         MCODECHECK((s3 << 1) + 64);
2700
2701                         /* copy arguments to registers or stack location */
2702
2703                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2704                                 if (src->varkind == ARGVAR)
2705                                         continue;
2706                                 if (IS_INT_LNG_TYPE(src->type)) {
2707                                         if (!md->params[s3].inmemory) {
2708                                                 if (IS_2_WORD_TYPE(src->type)) {
2709                                                         s1 = PACK_REGS(
2710                                                    rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2711                                                    rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2712                                                 } else {
2713                                                         s1 = rd->argintregs[md->params[s3].regoff];
2714                                                 }
2715                                                 var_to_reg_int(d, src, s1);
2716                                                 M_TINTMOVE(src->type, d, s1);
2717                                         } else {
2718                                                 if (IS_2_WORD_TYPE(src->type)) {
2719                                                         var_to_reg_int(d, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2720                                                         M_IST(GET_HIGH_REG(d), REG_SP,
2721                                                                   md->params[s3].regoff * 4);
2722                                                         M_IST(GET_LOW_REG(d), REG_SP,
2723                                                                   md->params[s3].regoff * 4 + 4);
2724                                                 } else {
2725                                                         var_to_reg_int(d, src, REG_ITMP1);
2726                                                         M_IST(d, REG_SP, md->params[s3].regoff * 4);
2727                                                 }
2728                                         }
2729
2730                                 } else {
2731                                         if (!md->params[s3].inmemory) {
2732                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2733                                                 var_to_reg_flt(d, src, s1);
2734                                                 M_FLTMOVE(d, s1);
2735                                         } else {
2736                                                 var_to_reg_flt(d, src, REG_FTMP1);
2737                                                 if (IS_2_WORD_TYPE(src->type)) {
2738                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2739                                                 } else {
2740                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2741                                                 }
2742                                         }
2743                                 }
2744                         } /* end of for */
2745
2746                         switch (iptr->opc) {
2747                         case ICMD_BUILTIN:
2748                                 disp = dseg_addaddress(cd, bte->fp);
2749                                 d = md->returntype.type;
2750
2751                                 M_ALD(REG_PV, REG_PV, disp);  /* pointer to built-in-function */
2752                                 M_MTCTR(REG_PV);
2753                                 M_JSR;
2754                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2755                                 M_MFLR(REG_ITMP1);
2756                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2757
2758                                 /* if op1 == true, we need to check for an exception */
2759
2760                                 if (iptr->op1 == true) {
2761                                         M_CMPI(REG_RESULT, 0);
2762                                         M_BEQ(0);
2763                                         codegen_addxexceptionrefs(cd, mcodeptr);
2764                                 }
2765                                 break;
2766
2767                         case ICMD_INVOKESPECIAL:
2768                                 gen_nullptr_check(rd->argintregs[0]);
2769                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2770                                 /* fall through */
2771
2772                         case ICMD_INVOKESTATIC:
2773                                 if (lm == NULL) {
2774                                         unresolved_method *um = iptr->target;
2775
2776                                         disp = dseg_addaddress(cd, NULL);
2777
2778                                         codegen_addpatchref(cd, mcodeptr,
2779                                                                                 PATCHER_invokestatic_special, um, disp);
2780
2781                                         if (opt_showdisassemble)
2782                                                 M_NOP;
2783
2784                                         d = md->returntype.type;
2785
2786                                 } else {
2787                                         disp = dseg_addaddress(cd, lm->stubroutine);
2788                                         d = md->returntype.type;
2789                                 }
2790
2791                                 M_ALD(REG_PV, REG_PV, disp);
2792                                 M_MTCTR(REG_PV);
2793                                 M_JSR;
2794                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2795                                 M_MFLR(REG_ITMP1);
2796                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2797                                 break;
2798
2799                         case ICMD_INVOKEVIRTUAL:
2800                                 gen_nullptr_check(rd->argintregs[0]);
2801
2802                                 if (lm == NULL) {
2803                                         unresolved_method *um = iptr->target;
2804
2805                                         codegen_addpatchref(cd, mcodeptr,
2806                                                                                 PATCHER_invokevirtual, um, 0);
2807
2808                                         if (opt_showdisassemble)
2809                                                 M_NOP;
2810
2811                                         s1 = 0;
2812                                         d = md->returntype.type;
2813
2814                                 } else {
2815                                         s1 = OFFSET(vftbl_t, table[0]) +
2816                                                 sizeof(methodptr) * lm->vftblindex;
2817                                         d = md->returntype.type;
2818                                 }
2819
2820                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2821                                           OFFSET(java_objectheader, vftbl));
2822                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2823                                 M_MTCTR(REG_PV);
2824                                 M_JSR;
2825                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2826                                 M_MFLR(REG_ITMP1);
2827                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2828                                 break;
2829
2830                         case ICMD_INVOKEINTERFACE:
2831                                 gen_nullptr_check(rd->argintregs[0]);
2832
2833                                 if (lm == NULL) {
2834                                         unresolved_method *um = iptr->target;
2835
2836                                         codegen_addpatchref(cd, mcodeptr,
2837                                                                                 PATCHER_invokeinterface, um, 0);
2838
2839                                         if (opt_showdisassemble)
2840                                                 M_NOP;
2841
2842                                         s1 = 0;
2843                                         s2 = 0;
2844                                         d = md->returntype.type;
2845
2846                                 } else {
2847                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2848                                                 sizeof(methodptr*) * lm->class->index;
2849
2850                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2851
2852                                         d = md->returntype.type;
2853                                 }
2854
2855                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2856                                           OFFSET(java_objectheader, vftbl));
2857                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2858                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2859                                 M_MTCTR(REG_PV);
2860                                 M_JSR;
2861                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2862                                 M_MFLR(REG_ITMP1);
2863                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2864                                 break;
2865                         }
2866
2867                         /* d contains return type */
2868
2869                         if (d != TYPE_VOID) {
2870                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2871                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
2872                                                 s1 = reg_of_var(rd, iptr->dst,
2873                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT));
2874                                                 M_TINTMOVE(iptr->dst->type,
2875                                                                    PACK_REGS(REG_RESULT2, REG_RESULT), s1);
2876                                                 store_reg_to_var_lng(iptr->dst, s1);
2877                                         } else {
2878                                                 s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
2879                                                 M_TINTMOVE(iptr->dst->type, REG_RESULT, s1);
2880                                                 store_reg_to_var_int(iptr->dst, s1);
2881                                         }
2882                                 } else {
2883                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
2884                                         M_FLTMOVE(REG_FRESULT, s1);
2885                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
2886                                                 store_reg_to_var_dbl(iptr->dst, s1);
2887                                         } else {
2888                                                 store_reg_to_var_flt(iptr->dst, s1);
2889                                         }
2890                                 }
2891                         }
2892                         break;
2893
2894
2895                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2896                                       /* op1:   0 == array, 1 == class                */
2897                                       /* val.a: (classinfo*) superclass               */
2898
2899                         /*  superclass is an interface:
2900                          *
2901                          *  OK if ((sub == NULL) ||
2902                          *         (sub->vftbl->interfacetablelength > super->index) &&
2903                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2904                          *
2905                          *  superclass is a class:
2906                          *
2907                          *  OK if ((sub == NULL) || (0
2908                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2909                          *         super->vftbl->diffvall));
2910                          */
2911
2912                         if (iptr->op1 == 1) {
2913                                 /* object type cast-check */
2914
2915                                 classinfo *super;
2916                                 vftbl_t   *supervftbl;
2917                                 s4         superindex;
2918
2919                                 super = (classinfo *) iptr->val.a;
2920
2921                                 if (!super) {
2922                                         superindex = 0;
2923                                         supervftbl = NULL;
2924
2925                                 } else {
2926                                         superindex = super->index;
2927                                         supervftbl = super->vftbl;
2928                                 }
2929
2930 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2931                                 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
2932 #endif
2933                                 var_to_reg_int(s1, src, REG_ITMP1);
2934
2935                                 /* calculate interface checkcast code size */
2936
2937                                 s2 = 7;
2938                                 if (!super)
2939                                         s2 += (opt_showdisassemble ? 1 : 0);
2940
2941                                 /* calculate class checkcast code size */
2942
2943                                 s3 = 8 + (s1 == REG_ITMP1);
2944                                 if (!super)
2945                                         s3 += (opt_showdisassemble ? 1 : 0);
2946
2947                                 /* if class is not resolved, check which code to call */
2948
2949                                 if (!super) {
2950                                         M_TST(s1);
2951                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2952
2953                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
2954
2955                                         codegen_addpatchref(cd, mcodeptr,
2956                                                                                 PATCHER_checkcast_instanceof_flags,
2957                                                                                 (constant_classref *) iptr->target, disp);
2958
2959                                         if (opt_showdisassemble)
2960                                                 M_NOP;
2961
2962                                         M_ILD(REG_ITMP2, REG_PV, disp);
2963                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
2964                                         M_BEQ(s2 + 1);
2965                                 }
2966
2967                                 /* interface checkcast code */
2968
2969                                 if (!super || (super->flags & ACC_INTERFACE)) {
2970                                         if (super) {
2971                                                 M_TST(s1);
2972                                                 M_BEQ(s2);
2973
2974                                         } else {
2975                                                 codegen_addpatchref(cd, mcodeptr,
2976                                                                                         PATCHER_checkcast_instanceof_interface,
2977                                                                                         (constant_classref *) iptr->target, 0);
2978
2979                                                 if (opt_showdisassemble)
2980                                                         M_NOP;
2981                                         }
2982
2983                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2984                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2985                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
2986                                         M_BLE(0);
2987                                         codegen_addxcastrefs(cd, mcodeptr);
2988                                         M_ALD(REG_ITMP3, REG_ITMP2,
2989                                                   OFFSET(vftbl_t, interfacetable[0]) -
2990                                                   superindex * sizeof(methodptr*));
2991                                         M_TST(REG_ITMP3);
2992                                         M_BEQ(0);
2993                                         codegen_addxcastrefs(cd, mcodeptr);
2994
2995                                         if (!super)
2996                                                 M_BR(s3);
2997                                 }
2998
2999                                 /* class checkcast code */
3000
3001                                 if (!super || !(super->flags & ACC_INTERFACE)) {
3002                                         disp = dseg_addaddress(cd, supervftbl);
3003
3004                                         if (super) {
3005                                                 M_TST(s1);
3006                                                 M_BEQ(s3);
3007
3008                                         } else {
3009                                                 codegen_addpatchref(cd, mcodeptr,
3010                                                                                         PATCHER_checkcast_class,
3011                                                                                         (constant_classref *) iptr->target,
3012                                                                                         disp);
3013
3014                                                 if (opt_showdisassemble)
3015                                                         M_NOP;
3016                                         }
3017
3018                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3019 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3020                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3021 #endif
3022                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3023                                         M_ALD(REG_ITMP2, REG_PV, disp);
3024                                         if (s1 != REG_ITMP1) {
3025                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
3026                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3027 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3028                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3029 #endif
3030                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
3031                                         } else {
3032                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3033                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3034                                                 M_ALD(REG_ITMP2, REG_PV, disp);
3035                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3036 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3037                                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3038 #endif
3039                                         }
3040                                         M_CMPU(REG_ITMP3, REG_ITMP2);
3041                                         M_BGT(0);
3042                                         codegen_addxcastrefs(cd, mcodeptr);
3043                                 }
3044                                 d = reg_of_var(rd, iptr->dst, s1);
3045
3046                         } else {
3047                                 /* array type cast-check */
3048
3049                                 var_to_reg_int(s1, src, rd->argintregs[0]);
3050                                 M_INTMOVE(s1, rd->argintregs[0]);
3051
3052                                 disp = dseg_addaddress(cd, iptr->val.a);
3053
3054                                 if (iptr->val.a == NULL) {
3055                                         codegen_addpatchref(cd, mcodeptr,
3056                                                                                 PATCHER_builtin_arraycheckcast,
3057                                                                                 (constant_classref *) iptr->target,
3058                                                                                 disp);
3059
3060                                         if (opt_showdisassemble)
3061                                                 M_NOP;
3062                                 }
3063
3064                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3065                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3066                                 M_ALD(REG_ITMP2, REG_PV, disp);
3067                                 M_MTCTR(REG_ITMP2);
3068                                 M_JSR;
3069                                 M_TST(REG_RESULT);
3070                                 M_BEQ(0);
3071                                 codegen_addxcastrefs(cd, mcodeptr);
3072
3073                                 var_to_reg_int(s1, src, REG_ITMP1);
3074                                 d = reg_of_var(rd, iptr->dst, s1);
3075                         }
3076                         M_INTMOVE(s1, d);
3077                         store_reg_to_var_adr(iptr->dst, d);
3078                         break;
3079
3080                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3081                                       /* val.a: (classinfo*) superclass               */
3082
3083                         /*  superclass is an interface:
3084                          *
3085                          *  return (sub != NULL) &&
3086                          *         (sub->vftbl->interfacetablelength > super->index) &&
3087                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3088                          *
3089                          *  superclass is a class:
3090                          *
3091                          *  return ((sub != NULL) && (0
3092                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3093                          *          super->vftbl->diffvall));
3094                          */
3095
3096                         {
3097                         classinfo *super;
3098                         vftbl_t   *supervftbl;
3099                         s4         superindex;
3100
3101                         super = (classinfo *) iptr->val.a;
3102
3103                         if (!super) {
3104                                 superindex = 0;
3105                                 supervftbl = NULL;
3106
3107                         } else {
3108                                 superindex = super->index;
3109                                 supervftbl = super->vftbl;
3110                         }
3111
3112 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3113             codegen_threadcritrestart(cd, (u1*) mcodeptr - cd->mcodebase);
3114 #endif
3115                         var_to_reg_int(s1, src, REG_ITMP1);
3116                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3117                         if (s1 == d) {
3118                                 M_MOV(s1, REG_ITMP1);
3119                                 s1 = REG_ITMP1;
3120                         }
3121
3122                         /* calculate interface instanceof code size */
3123
3124                         s2 = 8;
3125                         if (!super)
3126                                 s2 += (opt_showdisassemble ? 1 : 0);
3127
3128                         /* calculate class instanceof code size */
3129
3130                         s3 = 10;
3131                         if (!super)
3132                                 s3 += (opt_showdisassemble ? 1 : 0);
3133
3134                         M_CLR(d);
3135
3136                         /* if class is not resolved, check which code to call */
3137
3138                         if (!super) {
3139                                 M_TST(s1);
3140                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3141
3142                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3143
3144                                 codegen_addpatchref(cd, mcodeptr,
3145                                                                         PATCHER_checkcast_instanceof_flags,
3146                                                                         (constant_classref *) iptr->target, disp);
3147
3148                                 if (opt_showdisassemble)
3149                                         M_NOP;
3150
3151                                 M_ILD(REG_ITMP3, REG_PV, disp);
3152                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3153                                 M_BEQ(s2 + 1);
3154                         }
3155
3156                         /* interface instanceof code */
3157
3158                         if (!super || (super->flags & ACC_INTERFACE)) {
3159                                 if (super) {
3160                                         M_TST(s1);
3161                                         M_BEQ(s2);
3162
3163                                 } else {
3164                                         codegen_addpatchref(cd, mcodeptr,
3165                                                                                 PATCHER_checkcast_instanceof_interface,
3166                                                                                 (constant_classref *) iptr->target, 0);
3167
3168                                         if (opt_showdisassemble)
3169                                                 M_NOP;
3170                                 }
3171
3172                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3173                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3174                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3175                                 M_BLE(4);
3176                                 M_ALD(REG_ITMP1, REG_ITMP1,
3177                                           OFFSET(vftbl_t, interfacetable[0]) -
3178                                           superindex * sizeof(methodptr*));
3179                                 M_TST(REG_ITMP1);
3180                                 M_BEQ(1);
3181                                 M_IADD_IMM(REG_ZERO, 1, d);
3182
3183                                 if (!super)
3184                                         M_BR(s3);
3185                         }
3186
3187                         /* class instanceof code */
3188
3189                         if (!super || !(super->flags & ACC_INTERFACE)) {
3190                                 disp = dseg_addaddress(cd, supervftbl);
3191
3192                                 if (super) {
3193                                         M_TST(s1);
3194                                         M_BEQ(s3);
3195
3196                                 } else {
3197                                         codegen_addpatchref(cd, mcodeptr,
3198                                                                                 PATCHER_instanceof_class,
3199                                                                                 (constant_classref *) iptr->target,
3200                                                                                 disp);
3201
3202                                         if (opt_showdisassemble) {
3203                                                 M_NOP;
3204                                         }
3205                                 }
3206
3207                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3208                                 M_ALD(REG_ITMP2, REG_PV, disp);
3209 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3210                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3211 #endif
3212                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3213                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3214                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3215 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3216                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3217 #endif
3218                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3219                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3220                                 M_CLR(d);
3221                                 M_BGT(1);
3222                                 M_IADD_IMM(REG_ZERO, 1, d);
3223                         }
3224                         store_reg_to_var_int(iptr->dst, d);
3225                         }
3226                         break;
3227
3228                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3229                                       /* op1 = dimension, val.a = class               */
3230
3231                         /* check for negative sizes and copy sizes to stack if necessary  */
3232
3233                         MCODECHECK((iptr->op1 << 1) + 64);
3234
3235                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3236                                 /* copy SAVEDVAR sizes to stack */
3237
3238                                 if (src->varkind != ARGVAR) {
3239                                         var_to_reg_int(s2, src, REG_ITMP1);
3240 #if defined(__DARWIN__)
3241                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3242 #else
3243                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3244 #endif
3245                                 }
3246                         }
3247
3248                         /* a0 = dimension count */
3249
3250                         ICONST(rd->argintregs[0], iptr->op1);
3251
3252                         /* is patcher function set? */
3253
3254                         if (iptr->val.a == NULL) {
3255                                 disp = dseg_addaddress(cd, NULL);
3256
3257                                 codegen_addpatchref(cd, mcodeptr,
3258                                                                         PATCHER_builtin_multianewarray,
3259                                                                         (constant_classref *) iptr->target,
3260                                                                         disp);
3261
3262                                 if (opt_showdisassemble)
3263                                         M_NOP;
3264
3265                         } else {
3266                                 disp = dseg_addaddress(cd, iptr->val.a);
3267                         }
3268
3269                         /* a1 = arraydescriptor */
3270
3271                         M_ALD(rd->argintregs[1], REG_PV, disp);
3272
3273                         /* a2 = pointer to dimensions = stack pointer */
3274
3275 #if defined(__DARWIN__)
3276                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3277 #else
3278                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3279 #endif
3280
3281                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3282                         M_ALD(REG_ITMP3, REG_PV, disp);
3283                         M_MTCTR(REG_ITMP3);
3284                         M_JSR;
3285
3286                         /* check for exception before result assignment */
3287
3288                         M_CMPI(REG_RESULT, 0);
3289                         M_BEQ(0);
3290                         codegen_addxexceptionrefs(cd, mcodeptr);
3291
3292                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3293                         M_INTMOVE(REG_RESULT, d);
3294                         store_reg_to_var_adr(iptr->dst, d);
3295                         break;
3296
3297                 default:
3298                         *exceptionptr =
3299                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3300                         return false;
3301         } /* switch */
3302
3303         } /* for instruction */
3304
3305         /* copy values to interface registers */
3306
3307         src = bptr->outstack;
3308         len = bptr->outdepth;
3309         MCODECHECK(64 + len);
3310 #if defined(ENABLE_LSRA)
3311         if (!opt_lsra)
3312 #endif
3313         while (src) {
3314                 len--;
3315                 if ((src->varkind != STACKVAR)) {
3316                         s2 = src->type;
3317                         if (IS_FLT_DBL_TYPE(s2)) {
3318                                 var_to_reg_flt(s1, src, REG_FTMP1);
3319                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3320                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3321
3322                                 } else {
3323                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3324                                 }
3325
3326                         } else {
3327                                 var_to_reg_int(s1, src, REG_ITMP1);
3328                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3329                                         M_TINTMOVE(s2, s1, rd->interfaces[len][s2].regoff);
3330
3331                                 } else {
3332                                         if (IS_2_WORD_TYPE(s2)) {
3333                                                 M_IST(GET_HIGH_REG(s1),
3334                                                           REG_SP, rd->interfaces[len][s2].regoff * 4);
3335                                                 M_IST(GET_LOW_REG(s1), REG_SP,
3336                                                           rd->interfaces[len][s2].regoff * 4 + 4);
3337                                         } else {
3338                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3339                                         }
3340
3341                                 }
3342                         }
3343                 }
3344                 src = src->prev;
3345         }
3346         } /* if (bptr -> flags >= BBREACHED) */
3347         } /* for basic block */
3348
3349         dseg_createlinenumbertable(cd);
3350
3351         {
3352
3353         s4        *xcodeptr;
3354         branchref *bref;
3355
3356         /* generate ArithemticException check stubs */
3357
3358         xcodeptr = NULL;
3359
3360         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3361                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3362                                   bref->branchpos,
3363                                                   (u1 *) mcodeptr - cd->mcodebase);
3364
3365                 MCODECHECK(100);
3366
3367                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3368
3369                 if (xcodeptr != NULL) {
3370                         disp = xcodeptr - mcodeptr - 1;
3371                         M_BR(disp);
3372
3373                 } else {
3374                         xcodeptr = mcodeptr;
3375
3376                         if (m->isleafmethod) {
3377                                 M_MFLR(REG_ZERO);
3378                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3379                         }
3380
3381                         M_MOV(REG_PV, rd->argintregs[0]);
3382                         M_MOV(REG_SP, rd->argintregs[1]);
3383
3384                         if (m->isleafmethod)
3385                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3386                         else
3387                                 M_ALD(rd->argintregs[2],
3388                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3389
3390                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3391
3392                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3393                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3394
3395                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3396                         M_ALD(REG_ITMP1, REG_PV, disp);
3397                         M_MTCTR(REG_ITMP1);
3398                         M_JSR;
3399                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3400
3401                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3402                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3403
3404                         if (m->isleafmethod) {
3405                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3406                                 M_MTLR(REG_ZERO);
3407                         }
3408
3409                         disp = dseg_addaddress(cd, asm_handle_exception);
3410                         M_ALD(REG_ITMP3, REG_PV, disp);
3411                         M_MTCTR(REG_ITMP3);
3412                         M_RTS;
3413                 }
3414         }
3415
3416         /* generate ArrayIndexOutOfBoundsException stubs */
3417
3418         xcodeptr = NULL;
3419
3420         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3421                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3422                                   bref->branchpos,
3423                                                   (u1 *) mcodeptr - cd->mcodebase);
3424
3425                 MCODECHECK(100);
3426
3427                 /* move index register into REG_ITMP1 */
3428
3429                 M_MOV(bref->reg, REG_ITMP1);
3430
3431                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3432
3433                 if (xcodeptr != NULL) {
3434                         disp = xcodeptr - mcodeptr - 1;
3435                         M_BR(disp);
3436
3437                 } else {
3438                         xcodeptr = mcodeptr;
3439
3440                         if (m->isleafmethod) {
3441                                 M_MFLR(REG_ZERO);
3442                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3443                         }
3444
3445                         M_MOV(REG_PV, rd->argintregs[0]);
3446                         M_MOV(REG_SP, rd->argintregs[1]);
3447
3448                         if (m->isleafmethod)
3449                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3450                         else
3451                                 M_ALD(rd->argintregs[2],
3452                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3453
3454                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3455                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3456
3457                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3458                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3459
3460                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3461                         M_ALD(REG_ITMP1, REG_PV, disp);
3462                         M_MTCTR(REG_ITMP1);
3463                         M_JSR;
3464                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3465
3466                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3467                         M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3468
3469                         if (m->isleafmethod) {
3470                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3471                                 M_MTLR(REG_ZERO);
3472                         }
3473
3474                         disp = dseg_addaddress(cd, asm_handle_exception);
3475                         M_ALD(REG_ITMP3, REG_PV, disp);
3476                         M_MTCTR(REG_ITMP3);
3477                         M_RTS;
3478                 }
3479         }
3480
3481         /* generate ArrayStoreException check stubs */
3482
3483         xcodeptr = NULL;
3484
3485         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3486                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3487                                   bref->branchpos,
3488                                                   (u1 *) mcodeptr - cd->mcodebase);
3489
3490                 MCODECHECK(100);
3491
3492                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3493
3494                 if (xcodeptr != NULL) {
3495                         disp = xcodeptr - mcodeptr - 1;
3496                         M_BR(disp);
3497
3498                 } else {
3499                         xcodeptr = mcodeptr;
3500
3501                         M_MOV(REG_PV, rd->argintregs[0]);
3502                         M_MOV(REG_SP, rd->argintregs[1]);
3503                         M_ALD(rd->argintregs[2],
3504                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3505                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3506
3507                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3508                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3509
3510                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3511                         M_ALD(REG_ITMP1, REG_PV, disp);
3512                         M_MTCTR(REG_ITMP1);
3513                         M_JSR;
3514                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3515
3516                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3517                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3518
3519                         disp = dseg_addaddress(cd, asm_handle_exception);
3520                         M_ALD(REG_ITMP3, REG_PV, disp);
3521                         M_MTCTR(REG_ITMP3);
3522                         M_RTS;
3523                 }
3524         }
3525
3526         /* generate ClassCastException stubs */
3527
3528         xcodeptr = NULL;
3529
3530         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3531                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3532                                   bref->branchpos,
3533                                                   (u1 *) mcodeptr - cd->mcodebase);
3534
3535                 MCODECHECK(100);
3536
3537                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3538
3539                 if (xcodeptr != NULL) {
3540                         disp = xcodeptr - mcodeptr - 1;
3541                         M_BR(disp);
3542
3543                 } else {
3544                         xcodeptr = mcodeptr;
3545
3546                         if (m->isleafmethod) {
3547                                 M_MFLR(REG_ZERO);
3548                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3549                         }
3550
3551                         M_MOV(REG_PV, rd->argintregs[0]);
3552                         M_MOV(REG_SP, rd->argintregs[1]);
3553
3554                         if (m->isleafmethod)
3555                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3556                         else
3557                                 M_ALD(rd->argintregs[2],
3558                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3559
3560                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3561
3562                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3563                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3564
3565                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3566                         M_ALD(REG_ITMP1, REG_PV, disp);
3567                         M_MTCTR(REG_ITMP1);
3568                         M_JSR;
3569                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3570
3571                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3572                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3573
3574                         if (m->isleafmethod) {
3575                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3576                                 M_MTLR(REG_ZERO);
3577                         }
3578
3579                         disp = dseg_addaddress(cd, asm_handle_exception);
3580                         M_ALD(REG_ITMP3, REG_PV, disp);
3581                         M_MTCTR(REG_ITMP3);
3582                         M_RTS;
3583                 }
3584         }
3585
3586         /* generate NullPointerException stubs */
3587
3588         xcodeptr = NULL;
3589
3590         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3591                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3592                                   bref->branchpos,
3593                                                   (u1 *) mcodeptr - cd->mcodebase);
3594
3595                 MCODECHECK(100);
3596
3597                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3598
3599                 if (xcodeptr != NULL) {
3600                         disp = xcodeptr - mcodeptr - 1;
3601                         M_BR(disp);
3602
3603                 } else {
3604                         xcodeptr = mcodeptr;
3605
3606                         if (m->isleafmethod) {
3607                                 M_MFLR(REG_ZERO);
3608                                 M_AST(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3609                         }
3610
3611                         M_MOV(REG_PV, rd->argintregs[0]);
3612                         M_MOV(REG_SP, rd->argintregs[1]);
3613
3614                         if (m->isleafmethod)
3615                                 M_MOV(REG_ZERO, rd->argintregs[2]);
3616                         else
3617                                 M_ALD(rd->argintregs[2],
3618                                           REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3619
3620                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3621
3622                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3623                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3624
3625                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3626                         M_ALD(REG_ITMP1, REG_PV, disp);
3627                         M_MTCTR(REG_ITMP1);
3628                         M_JSR;
3629                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3630
3631                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3632                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3633
3634                         if (m->isleafmethod) {
3635                                 M_ALD(REG_ZERO, REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3636                                 M_MTLR(REG_ZERO);
3637                         }
3638
3639                         disp = dseg_addaddress(cd, asm_handle_exception);
3640                         M_ALD(REG_ITMP3, REG_PV, disp);
3641                         M_MTCTR(REG_ITMP3);
3642                         M_RTS;
3643                 }
3644         }
3645
3646         /* generate exception check stubs */
3647
3648         xcodeptr = NULL;
3649
3650         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3651                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3652                                   bref->branchpos,
3653                                                   (u1 *) mcodeptr - cd->mcodebase);
3654
3655                 MCODECHECK(100);
3656
3657                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3658
3659                 if (xcodeptr != NULL) {
3660                         disp = xcodeptr - mcodeptr - 1;
3661                         M_BR(disp);
3662
3663                 } else {
3664                         xcodeptr = mcodeptr;
3665
3666                         M_MOV(REG_PV, rd->argintregs[0]);
3667                         M_MOV(REG_SP, rd->argintregs[1]);
3668                         M_ALD(rd->argintregs[2],
3669                                   REG_SP, parentargs_base * 4 + LA_LR_OFFSET);
3670                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3671
3672                         M_STWU(REG_SP, REG_SP, -(LA_SIZE + 5 * 4));
3673                         M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3674
3675                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
3676                         M_ALD(REG_ITMP1, REG_PV, disp);
3677                         M_MTCTR(REG_ITMP1);
3678                         M_JSR;
3679                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3680
3681                         M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 4 * 4);
3682                         M_IADD_IMM(REG_SP, LA_SIZE + 5 * 4, REG_SP);
3683
3684                         disp = dseg_addaddress(cd, asm_handle_exception);
3685                         M_ALD(REG_ITMP3, REG_PV, disp);
3686                         M_MTCTR(REG_ITMP3);
3687                         M_RTS;
3688                 }
3689         }
3690
3691         /* generate patcher stub call code */
3692
3693         {
3694                 patchref *pref;
3695                 u4        mcode;
3696                 s4       *tmpmcodeptr;
3697
3698                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3699                         /* check code segment size */
3700
3701                         MCODECHECK(16);
3702
3703                         /* Get machine code which is patched back in later. The call is   */
3704                         /* 1 instruction word long.                                       */
3705
3706                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
3707                         mcode = *xcodeptr;
3708
3709                         /* patch in the call to call the following code (done at compile  */
3710                         /* time)                                                          */
3711
3712                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3713                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3714
3715                         M_BR(tmpmcodeptr - (xcodeptr + 1));
3716
3717                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3718
3719                         /* create stack frame - keep stack 16-byte aligned */
3720
3721                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3722
3723                         /* calculate return address and move it onto the stack */
3724
3725                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3726                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3727
3728                         /* move pointer to java_objectheader onto stack */
3729
3730 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3731                         /* order reversed because of data segment layout */
3732
3733                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
3734                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
3735
3736                         M_LDA(REG_ITMP3, REG_PV, disp);
3737                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3738 #else
3739                         /* do nothing */
3740 #endif
3741
3742                         /* move machine code onto stack */
3743
3744                         disp = dseg_adds4(cd, mcode);
3745                         M_ILD(REG_ITMP3, REG_PV, disp);
3746                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3747
3748                         /* move class/method/field reference onto stack */
3749
3750                         disp = dseg_addaddress(cd, pref->ref);
3751                         M_ALD(REG_ITMP3, REG_PV, disp);
3752                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3753
3754                         /* move data segment displacement onto stack */
3755
3756                         disp = dseg_addaddress(cd, pref->disp);
3757                         M_ILD(REG_ITMP3, REG_PV, disp);
3758                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3759
3760                         /* move patcher function pointer onto stack */
3761
3762                         disp = dseg_addaddress(cd, pref->patcher);
3763                         M_ALD(REG_ITMP3, REG_PV, disp);
3764                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3765
3766                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
3767                         M_ALD(REG_ITMP3, REG_PV, disp);
3768                         M_MTCTR(REG_ITMP3);
3769                         M_RTS;
3770                 }
3771         }
3772
3773         }
3774
3775         codegen_finish(m, cd, (ptrint) ((u1 *) mcodeptr - cd->mcodebase));
3776
3777         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
3778
3779         /* everything's ok */
3780
3781         return true;
3782 }
3783
3784
3785 /* createcompilerstub **********************************************************
3786
3787    Creates a stub routine which calls the compiler.
3788
3789 *******************************************************************************/
3790
3791 #define COMPILERSTUB_DATASIZE    2 * SIZEOF_VOID_P
3792 #define COMPILERSTUB_CODESIZE    4 * 4
3793
3794 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3795
3796
3797 u1 *createcompilerstub(methodinfo *m)
3798 {
3799         u1     *s;                          /* memory to hold the stub            */
3800         ptrint *d;
3801         s4     *mcodeptr;                   /* code generation pointer            */
3802
3803         s = CNEW(u1, COMPILERSTUB_SIZE);
3804
3805         /* set data pointer and code pointer */
3806
3807         d = (ptrint *) s;
3808         s = s + COMPILERSTUB_DATASIZE;
3809
3810         mcodeptr = (s4 *) s;
3811
3812         /* Store the methodinfo* in the same place as in the methodheader
3813            for compiled methods. */
3814
3815         d[0] = (ptrint) asm_call_jit_compiler;
3816         d[1] = (ptrint) m;
3817
3818         M_ALD_INTERN(REG_ITMP1, REG_PV, -1 * SIZEOF_VOID_P);
3819         M_ALD_INTERN(REG_PV, REG_PV, -2 * SIZEOF_VOID_P);
3820         M_MTCTR(REG_PV);
3821         M_RTS;
3822
3823         asm_cacheflush((void *) d, COMPILERSTUB_SIZE);
3824
3825 #if defined(ENABLE_STATISTICS)
3826         if (opt_stat)
3827                 count_cstub_len += COMPILERSTUB_SIZE;
3828 #endif
3829
3830         return s;
3831 }
3832
3833
3834 /* createnativestub ************************************************************
3835
3836    Creates a stub routine which calls a native method.
3837
3838 *******************************************************************************/
3839
3840 u1 *createnativestub(functionptr f, methodinfo *m, codegendata *cd,
3841                                          registerdata *rd, methoddesc *nmd)
3842 {
3843         s4         *mcodeptr;               /* code generation pointer            */
3844         s4          stackframesize;         /* size of stackframe if needed       */
3845         methoddesc *md;
3846         s4          nativeparams;
3847         s4          i, j;                   /* count variables                    */
3848         s4          t;
3849         s4          s1, s2, disp;
3850         s4          funcdisp;
3851
3852         /* set some variables */
3853
3854         md = m->parseddesc;
3855         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3856
3857         /* calculate stackframe size */
3858
3859         stackframesize =
3860                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3861                 sizeof(localref_table) / SIZEOF_VOID_P +
3862                 4 +                             /* 4 stackframeinfo arguments (darwin)*/
3863                 nmd->paramcount * 2 +           /* assume all arguments are doubles   */
3864                 nmd->memuse;
3865
3866         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3867
3868
3869         /* create method header */
3870
3871         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
3872         (void) dseg_adds4(cd, stackframesize * 4);              /* FrameSize      */
3873         (void) dseg_adds4(cd, 0);                               /* IsSync         */
3874         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
3875         (void) dseg_adds4(cd, 0);                               /* IntSave        */
3876         (void) dseg_adds4(cd, 0);                               /* FltSave        */
3877         (void) dseg_addlinenumbertablesize(cd);
3878         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
3879
3880
3881         /* initialize mcode variables */
3882
3883         mcodeptr = (s4 *) cd->mcodebase;
3884
3885
3886         /* generate code */
3887
3888         M_MFLR(REG_ZERO);
3889         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3890         M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3891
3892
3893         if (runverbose) {
3894                 /* parent_argbase == stackframesize * 4 */
3895                 mcodeptr = codegen_trace_args(m, cd, rd, mcodeptr, stackframesize * 4 ,
3896                                                                           true);
3897         }
3898
3899
3900         /* get function address (this must happen before the stackframeinfo) */
3901
3902         funcdisp = dseg_addaddress(cd, f);
3903
3904 #if !defined(WITH_STATIC_CLASSPATH)
3905         if (f == NULL) {
3906                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
3907
3908                 if (opt_showdisassemble)
3909                         M_NOP;
3910         }
3911 #endif
3912
3913         /* save integer and float argument registers */
3914
3915         for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++) {
3916                 t = md->paramtypes[i].type;
3917
3918                 if (IS_INT_LNG_TYPE(t)) {
3919                         s1 = md->params[i].regoff;
3920                         if (IS_2_WORD_TYPE(t)) {
3921                                 M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3922                                 j++;
3923                                 M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3924                                 j++;
3925                         } else {
3926                                 M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3927                                 j++;
3928                         }
3929                 }
3930         }
3931
3932         for (i = 0; i < md->paramcount && j < FLT_ARG_CNT; i++) {
3933                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3934                         s1 = md->params[i].regoff;
3935                         M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3936                         j++;
3937                 }
3938         }
3939
3940         /* create native stack info */
3941
3942         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3943         M_MOV(REG_PV, rd->argintregs[1]);
3944         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3945         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3946         disp = dseg_addaddress(cd, codegen_start_native_call);
3947         M_ALD(REG_ITMP1, REG_PV, disp);
3948         M_MTCTR(REG_ITMP1);
3949         M_JSR;
3950
3951         /* restore integer and float argument registers */
3952
3953         for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++) {
3954                 t = md->paramtypes[i].type;
3955
3956                 if (IS_INT_LNG_TYPE(t)) {
3957                         s1 = md->params[i].regoff;
3958
3959                         if (IS_2_WORD_TYPE(t)) {
3960                                 M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3961                                 j++;
3962                                 M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3963                                 j++;
3964                         } else {
3965                                 M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3966                                 j++;
3967                         }
3968                 }
3969         }
3970
3971         for (i = 0; i < md->paramcount && j < FLT_ARG_CNT; i++) {
3972                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3973                         s1 = md->params[i].regoff;
3974                         M_DLD(rd->argfltregs[i], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3975                         j++;
3976                 }
3977         }
3978
3979         /* copy or spill arguments to new locations */
3980
3981         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3982                 t = md->paramtypes[i].type;
3983
3984                 if (IS_INT_LNG_TYPE(t)) {
3985                         if (!md->params[i].inmemory) {
3986                                 if (IS_2_WORD_TYPE(t))
3987                                         s1 = PACK_REGS(
3988                                                 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3989                                             rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3990                                 else
3991                                         s1 = rd->argintregs[md->params[i].regoff];
3992
3993                                 if (!nmd->params[j].inmemory) {
3994                                         if (IS_2_WORD_TYPE(t))
3995                                                 s2 = PACK_REGS(
3996                                                    rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3997                                                    rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3998                                         else
3999                                                 s2 = rd->argintregs[nmd->params[j].regoff];
4000                                         M_TINTMOVE(t, s1, s2);
4001
4002                                 } else {
4003                                         s2 = nmd->params[j].regoff;
4004                                         if (IS_2_WORD_TYPE(t)) {
4005                                                 M_IST(GET_HIGH_REG(s1), REG_SP, s2 * 4);
4006                                                 M_IST(GET_LOW_REG(s1), REG_SP, s2 * 4 + 4);
4007                                         } else {
4008                                                 M_IST(s1, REG_SP, s2 * 4);
4009                                         }
4010                                 }
4011
4012                         } else {
4013                                 s1 = md->params[i].regoff + stackframesize;
4014                                 s2 = nmd->params[j].regoff;
4015
4016                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
4017                                 if (IS_2_WORD_TYPE(t)) {
4018                                         M_ILD(REG_ITMP2, REG_SP, s1 * 4 + 4);
4019                                 }
4020                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
4021                                 if (IS_2_WORD_TYPE(t)) {
4022                                         M_IST(REG_ITMP2, REG_SP, s2 * 4 + 4);
4023                                 }
4024                         }
4025
4026                 } else {
4027                         /* We only copy spilled float arguments, as the float argument    */
4028                         /* registers keep unchanged.                                      */
4029
4030                         if (md->params[i].inmemory) {
4031                                 s1 = md->params[i].regoff + stackframesize;
4032                                 s2 = nmd->params[j].regoff;
4033
4034                                 if (IS_2_WORD_TYPE(t)) {
4035                                         M_DLD(REG_FTMP1, REG_SP, s1 * 4);
4036                                         M_DST(REG_FTMP1, REG_SP, s2 * 4);
4037
4038                                 } else {
4039                                         M_FLD(REG_FTMP1, REG_SP, s1 * 4);
4040                                         M_FST(REG_FTMP1, REG_SP, s2 * 4);
4041                                 }
4042                         }
4043                 }
4044         }
4045
4046         /* put class into second argument register */
4047
4048         if (m->flags & ACC_STATIC) {
4049                 disp = dseg_addaddress(cd, m->class);
4050                 M_ALD(rd->argintregs[1], REG_PV, disp);
4051         }
4052
4053         /* put env into first argument register */
4054
4055         disp = dseg_addaddress(cd, _Jv_env);
4056         M_ALD(rd->argintregs[0], REG_PV, disp);
4057
4058         /* generate the actual native call */
4059
4060         M_ALD(REG_ITMP3, REG_PV, funcdisp);
4061         M_MTCTR(REG_ITMP3);
4062         M_JSR;
4063
4064         /* save return value */
4065
4066         if (md->returntype.type != TYPE_VOID) {
4067                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4068                         if (IS_2_WORD_TYPE(md->returntype.type))
4069                                 M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4070                         M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4071                 } else {
4072                         if (IS_2_WORD_TYPE(md->returntype.type))
4073                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4074                         else
4075                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4076                 }
4077         }
4078
4079         /* remove native stackframe info */
4080
4081         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
4082         disp = dseg_addaddress(cd, codegen_finish_native_call);
4083         M_ALD(REG_ITMP1, REG_PV, disp);
4084         M_MTCTR(REG_ITMP1);
4085         M_JSR;
4086
4087         /* print call trace */
4088
4089         if (runverbose) {
4090                  /* just restore the value we need, don't care about the other */
4091
4092                 if (md->returntype.type != TYPE_VOID) {
4093                         if (IS_INT_LNG_TYPE(md->returntype.type)) {
4094                                 if (IS_2_WORD_TYPE(md->returntype.type))
4095                                         M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4096                                 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4097                         } else {
4098                                 if (IS_2_WORD_TYPE(md->returntype.type))
4099                                         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4100                                 else
4101                                         M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4102                         }
4103                 }
4104
4105                 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
4106
4107                 /* keep this order */
4108                 switch (md->returntype.type) {
4109                 case TYPE_INT:
4110                 case TYPE_ADR:
4111 #if defined(__DARWIN__)
4112                         M_MOV(REG_RESULT, rd->argintregs[2]);
4113                         M_CLR(rd->argintregs[1]);
4114 #else
4115                         M_MOV(REG_RESULT, rd->argintregs[3]);
4116                         M_CLR(rd->argintregs[2]);
4117 #endif
4118                         break;
4119
4120                 case TYPE_LNG:
4121 #if defined(__DARWIN__)
4122                         M_MOV(REG_RESULT2, rd->argintregs[2]);
4123                         M_MOV(REG_RESULT, rd->argintregs[1]);
4124 #else
4125                         M_MOV(REG_RESULT2, rd->argintregs[3]);
4126                         M_MOV(REG_RESULT, rd->argintregs[2]);
4127 #endif
4128                         break;
4129                 }
4130
4131                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
4132                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
4133                 disp = dseg_addaddress(cd, m);
4134                 M_ALD(rd->argintregs[0], REG_PV, disp);
4135
4136                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4137                 M_ALD(REG_ITMP2, REG_PV, disp);
4138                 M_MTCTR(REG_ITMP2);
4139                 M_JSR;
4140
4141                 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4142         }
4143
4144         /* check for exception */
4145
4146 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4147         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4148         M_ALD(REG_ITMP1, REG_PV, disp);
4149         M_MTCTR(REG_ITMP1);
4150         M_JSR;
4151         M_MOV(REG_RESULT, REG_ITMP2);
4152 #else
4153         disp = dseg_addaddress(cd, &_no_threads_exceptionptr);
4154         M_ALD(REG_ITMP2, REG_PV, disp);
4155 #endif
4156         M_ALD(REG_ITMP1_XPTR, REG_ITMP2, 0);/* load exception into reg. itmp1     */
4157
4158         /* restore return value */
4159
4160         if (md->returntype.type != TYPE_VOID) {
4161                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4162                         if (IS_2_WORD_TYPE(md->returntype.type))
4163                                 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4164                         M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4165                 } else {
4166                         if (IS_2_WORD_TYPE(md->returntype.type))
4167                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4168                         else
4169                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4170                 }
4171         }
4172
4173         M_TST(REG_ITMP1_XPTR);
4174         M_BNE(4);                           /* if no exception then return        */
4175
4176         M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4177         M_MTLR(REG_ZERO);
4178         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4179         M_RET;
4180
4181         /* handle exception */
4182
4183         M_CLR(REG_ITMP3);
4184         M_AST(REG_ITMP3, REG_ITMP2, 0);     /* store NULL into exceptionptr       */
4185
4186         M_ALD(REG_ITMP2, REG_SP, stackframesize * 4 + LA_LR_OFFSET); /* load ra   */
4187         M_MTLR(REG_ITMP2);
4188
4189         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4190
4191         M_IADD_IMM(REG_ITMP2, -4, REG_ITMP2_XPC);  /* fault address               */
4192
4193         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4194         M_ALD(REG_ITMP3, REG_PV, disp);
4195         M_MTCTR(REG_ITMP3);
4196         M_RTS;
4197
4198         /* generate patcher stub call code */
4199
4200         {
4201                 patchref *pref;
4202                 s4       *xcodeptr;
4203                 s4        mcode;
4204                 s4       *tmpmcodeptr;
4205
4206                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4207                         /* Get machine code which is patched back in later. The call is   */
4208                         /* 1 instruction word long.                                       */
4209
4210                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4211                         mcode = (u4) *xcodeptr;
4212
4213                         /* patch in the call to call the following code (done at compile  */
4214                         /* time)                                                          */
4215
4216                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4217                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4218
4219                         M_BL(tmpmcodeptr - (xcodeptr + 1));
4220
4221                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4222
4223                         /* create stack frame - keep stack 16-byte aligned                */
4224
4225                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4226
4227                         /* move return address onto stack */
4228
4229                         M_MFLR(REG_ZERO);
4230                         M_AST(REG_ZERO, REG_SP, 5 * 4);
4231
4232                         /* move pointer to java_objectheader onto stack */
4233
4234 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4235                         /* order reversed because of data segment layout */
4236
4237                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4238                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4239
4240                         M_LDA(REG_ITMP3, REG_PV, disp);
4241                         M_AST(REG_ITMP3, REG_SP, 4 * 4);
4242 #else
4243                         /* do nothing */
4244 #endif
4245
4246                         /* move machine code onto stack */
4247
4248                         disp = dseg_adds4(cd, mcode);
4249                         M_ILD(REG_ITMP3, REG_PV, disp);
4250                         M_IST(REG_ITMP3, REG_SP, 3 * 4);
4251
4252                         /* move class/method/field reference onto stack */
4253
4254                         disp = dseg_addaddress(cd, pref->ref);
4255                         M_ALD(REG_ITMP3, REG_PV, disp);
4256                         M_AST(REG_ITMP3, REG_SP, 2 * 4);
4257
4258                         /* move data segment displacement onto stack */
4259
4260                         disp = dseg_addaddress(cd, pref->disp);
4261                         M_ILD(REG_ITMP3, REG_PV, disp);
4262                         M_IST(REG_ITMP3, REG_SP, 1 * 4);
4263
4264                         /* move patcher function pointer onto stack */
4265
4266                         disp = dseg_addaddress(cd, pref->patcher);
4267                         M_ALD(REG_ITMP3, REG_PV, disp);
4268                         M_AST(REG_ITMP3, REG_SP, 0 * 4);
4269
4270                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4271                         M_ALD(REG_ITMP3, REG_PV, disp);
4272                         M_MTCTR(REG_ITMP3);
4273                         M_RTS;
4274                 }
4275         }
4276
4277         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4278
4279         asm_cacheflush((void *) (ptrint) m->entrypoint, ((u1 *) mcodeptr - cd->mcodebase));
4280
4281         return m->entrypoint;
4282 }
4283
4284
4285 s4 *codegen_trace_args(methodinfo *m, codegendata *cd, registerdata *rd,
4286                                            s4 *mcodeptr, s4 parentargs_base, bool nativestub)
4287 {
4288         s4 s1, p, t, d;
4289         int stack_off;
4290         int stack_size;
4291         methoddesc *md;
4292
4293         md = m->parseddesc;
4294
4295         if (!nativestub)
4296                 M_MFLR(REG_ITMP3);
4297         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4298         /* For Darwin:                                                        */
4299         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
4300         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
4301         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
4302         /* For Linux:                                                         */
4303         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
4304         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4305         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
4306         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
4307
4308         /* in nativestubs no Place to save the LR (Link Register) would be needed */
4309         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
4310         /* be padded again */
4311
4312 #if defined(__DARWIN__)
4313         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4314 #else
4315         stack_size = 6 * 16;
4316 #endif
4317         M_LDA(REG_SP, REG_SP, -stack_size);
4318
4319         /* Save LR */
4320         if (!nativestub)
4321                 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4322
4323         M_CLR(REG_ITMP1);    /* clear help register */
4324
4325         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4326 #if defined(__DARWIN__)
4327         /* Copy Params starting from first to Stack                          */
4328         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */
4329         /* are saved                                                         */
4330         p = 0;
4331 #else
4332         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
4333         /* integer argument regs                                             */
4334         /* all integer argument registers have to be saved                   */
4335         for (p = 0; p < 8; p++) {
4336                 d = rd->argintregs[p];
4337                 /* save integer argument registers */
4338                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4339         }
4340         p = 4;
4341 #endif
4342         stack_off = LA_SIZE;
4343         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4344                 t = md->paramtypes[p].type;
4345                 if (IS_INT_LNG_TYPE(t)) {
4346                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4347                                 if (IS_2_WORD_TYPE(t)) {
4348                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4349                                                   , REG_SP, stack_off);
4350                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4351                                                   , REG_SP, stack_off + 4);
4352                                 } else {
4353                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4354                                         M_IST(rd->argintregs[md->params[p].regoff]
4355                                                   , REG_SP, stack_off + 4);
4356                                 }
4357                         } else { /* Param on Stack */
4358                                 s1 = (md->params[p].regoff + parentargs_base) * 4
4359                                         + stack_size;
4360                                 if (IS_2_WORD_TYPE(t)) {
4361                                         M_ILD(REG_ITMP2, REG_SP, s1);
4362                                         M_IST(REG_ITMP2, REG_SP, stack_off);
4363                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4364                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4365                                 } else {
4366                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4367                                         M_ILD(REG_ITMP2, REG_SP, s1);
4368                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4369                                 }
4370                         }
4371                 } else { /* IS_FLT_DBL_TYPE(t) */
4372                         if (!md->params[p].inmemory) { /* in Arg Reg */
4373                                 s1 = rd->argfltregs[md->params[p].regoff];
4374                                 if (!IS_2_WORD_TYPE(t)) {
4375                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4376                                         M_FST(s1, REG_SP, stack_off + 4);
4377                                 } else {
4378                                         M_DST(s1, REG_SP, stack_off);
4379                                 }
4380                         } else { /* on Stack */
4381                                 /* this should not happen */
4382                         }
4383                 }
4384         }
4385
4386         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4387 #if defined(__DARWIN__)
4388         for (p = 0; p < 8; p++) {
4389                 d = rd->argintregs[p];
4390                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4391         }
4392 #else
4393         /* LINUX */
4394         /* Set integer and float argument registers vor trace_args call */
4395         /* offset to saved integer argument registers                   */
4396         stack_off = LA_SIZE + 4 * 8 + 4;
4397         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4398                 t = md->paramtypes[p].type;
4399                 if (IS_INT_LNG_TYPE(t)) {
4400                         /* "stretch" int types */
4401                         if (!IS_2_WORD_TYPE(t)) {
4402                                 M_CLR(rd->argintregs[2 * p]);
4403                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4404                                 stack_off += 4;
4405                         } else {
4406                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4407                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4408                                 stack_off += 8;
4409                         }
4410                 } else { /* Float/Dbl */
4411                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4412                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
4413                                 /* float/double arg reg to int reg                    */
4414                                 s1 = rd->argfltregs[md->params[p].regoff];
4415                                 if (!IS_2_WORD_TYPE(t)) {
4416                                         M_FST(s1, REG_SP, 5 * 16);
4417                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4418                                         M_CLR(rd->argintregs[2 * p]);
4419                                 } else {
4420                                         M_DST(s1, REG_SP, 5 * 16);
4421                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
4422                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4423                                 }
4424                         }
4425                 }
4426         }
4427 #endif
4428
4429         /* put methodinfo pointer on Stackframe */
4430         p = dseg_addaddress(cd, m);
4431         M_ALD(REG_ITMP1, REG_PV, p);
4432 #if defined(__DARWIN__)
4433         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
4434 #else
4435         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4436 #endif
4437         p = dseg_addaddress(cd, builtin_trace_args);
4438         M_ALD(REG_ITMP2, REG_PV, p);
4439         M_MTCTR(REG_ITMP2);
4440         M_JSR;
4441
4442 #if defined(__DARWIN__)
4443         /* restore integer argument registers from the reserved stack space */
4444
4445         stack_off = LA_SIZE;
4446         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
4447                  p++, stack_off += 8) {
4448                 t = md->paramtypes[p].type;
4449
4450                 if (IS_INT_LNG_TYPE(t)) {
4451                         if (!md->params[p].inmemory) {
4452                                 if (IS_2_WORD_TYPE(t)) {
4453                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4454                                                   , REG_SP, stack_off);
4455                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4456                                                   , REG_SP, stack_off + 4);
4457                                 } else {
4458                                         M_ILD(rd->argintregs[md->params[p].regoff]
4459                                                   , REG_SP, stack_off + 4);
4460                                 }
4461                         }
4462                 }
4463         }
4464 #else
4465         /* LINUX */
4466         for (p = 0; p < 8; p++) {
4467                 d = rd->argintregs[p];
4468                 /* save integer argument registers */
4469                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4470         }
4471 #endif
4472
4473         if (!nativestub)
4474                 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4475
4476         M_LDA(REG_SP, REG_SP, stack_size);
4477         if (!nativestub)
4478                 M_MTLR(REG_ITMP3);
4479         return mcodeptr;
4480 }
4481
4482 /*
4483  * These are local overrides for various environment variables in Emacs.
4484  * Please do not remove this and leave it at the end of the file, where
4485  * Emacs will automagically detect them.
4486  * ---------------------------------------------------------------------
4487  * Local variables:
4488  * mode: c
4489  * indent-tabs-mode: t
4490  * c-basic-offset: 4
4491  * tab-width: 4
4492  * End:
4493  */