60268dc15cda7ebec35a8ee4fd16a9d641d77780
[cacao.git] / src / vm / jit / powerpc / codegen.c
1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
2
3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6    J. Wenninger, Institut f. Computersprachen - TU Wien
7
8    This file is part of CACAO.
9
10    This program is free software; you can redistribute it and/or
11    modify it under the terms of the GNU General Public License as
12    published by the Free Software Foundation; either version 2, or (at
13    your option) any later version.
14
15    This program is distributed in the hope that it will be useful, but
16    WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    General Public License for more details.
19
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23    02110-1301, USA.
24
25    Contact: cacao@cacaojvm.org
26
27    Authors: Andreas Krall
28             Stefan Ring
29
30    Changes: Christian Thalinger
31             Christian Ullrich
32             Edwin Steiner
33
34    $Id: codegen.c 5079 2006-07-06 11:36:01Z twisti $
35
36 */
37
38
39 #include "config.h"
40
41 #include <assert.h>
42 #include <stdio.h>
43 #include <signal.h>
44
45 #include "vm/types.h"
46
47 #include "md-abi.h"
48
49 #include "vm/jit/powerpc/arch.h"
50 #include "vm/jit/powerpc/codegen.h"
51
52 #include "mm/memory.h"
53 #include "native/native.h"
54 #include "vm/builtin.h"
55 #include "vm/exceptions.h"
56 #include "vm/global.h"
57 #include "vm/loader.h"
58 #include "vm/options.h"
59 #include "vm/stringlocal.h"
60 #include "vm/vm.h"
61 #include "vm/jit/asmpart.h"
62 #include "vm/jit/codegen-common.h"
63 #include "vm/jit/dseg.h"
64 #include "vm/jit/emit.h"
65 #include "vm/jit/jit.h"
66 #include "vm/jit/methodheader.h"
67 #include "vm/jit/parse.h"
68 #include "vm/jit/patcher.h"
69 #include "vm/jit/reg.h"
70 #include "vm/jit/replace.h"
71
72 #if defined(ENABLE_LSRA)
73 # include "vm/jit/allocator/lsra.h"
74 #endif
75
76
77 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub);
78
79 /* codegen *********************************************************************
80
81    Generates machine code.
82
83 *******************************************************************************/
84
85 bool codegen(jitdata *jd)
86 {
87         methodinfo         *m;
88         codeinfo           *code;
89         codegendata        *cd;
90         registerdata       *rd;
91         s4                  len, s1, s2, s3, d, disp;
92         ptrint              a;
93         s4                  stackframesize;
94         stackptr            src;
95         varinfo            *var;
96         basicblock         *bptr;
97         instruction        *iptr;
98         exceptiontable     *ex;
99         u2                  currentline;
100         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
101         builtintable_entry *bte;
102         methoddesc         *md;
103         rplpoint           *replacementpoint;
104
105         /* get required compiler data */
106
107         m    = jd->m;
108         code = jd->code;
109         cd   = jd->cd;
110         rd   = jd->rd;
111
112         /* prevent compiler warnings */
113
114         d = 0;
115         lm = NULL;
116         bte = NULL;
117
118         {
119         s4 i, p, t, l;
120         s4 savedregs_num;
121
122         savedregs_num = 0;
123
124         /* space to save used callee saved registers */
125
126         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
127         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse) * 2;
128
129         stackframesize = rd->memuse + savedregs_num;
130
131 #if defined(ENABLE_THREADS)
132         /* space to save argument of monitor_enter and Return Values to survive */
133     /* monitor_exit. The stack position for the argument can not be shared  */
134         /* with place to save the return register on PPC, since both values     */
135         /* reside in R3 */
136         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
137                 /* reserve 2 slots for long/double return values for monitorexit */
138
139                 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
140                         stackframesize += 3;
141                 else
142                         stackframesize += 2;
143         }
144
145 #endif
146
147         /* create method header */
148
149         /* align stack to 16-bytes */
150
151 /*      if (!code->isleafmethod || opt_verbosecall) */
152                 stackframesize = (stackframesize + 3) & ~3;
153
154 /*      else if (code->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
155 /*              stackframesize = 0; */
156
157         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
158         (void) dseg_adds4(cd, stackframesize * 4);             /* FrameSize       */
159
160 #if defined(ENABLE_THREADS)
161         /* IsSync contains the offset relative to the stack pointer for the
162            argument of monitor_exit used in the exception handler. Since the
163            offset could be zero and give a wrong meaning of the flag it is
164            offset by one.
165         */
166
167         if (checksync && (m->flags & ACC_SYNCHRONIZED))
168                 (void) dseg_adds4(cd, (rd->memuse + 1) * 4);       /* IsSync          */
169         else
170 #endif
171                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
172                                                
173         (void) dseg_adds4(cd, code->isleafmethod);             /* IsLeaf          */
174         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
175         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
176
177         dseg_addlinenumbertablesize(cd);
178
179         (void) dseg_adds4(cd, cd->exceptiontablelength);       /* ExTableSize     */
180
181         /* create exception table */
182
183         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
184                 dseg_addtarget(cd, ex->start);
185                 dseg_addtarget(cd, ex->end);
186                 dseg_addtarget(cd, ex->handler);
187                 (void) dseg_addaddress(cd, ex->catchtype.cls);
188         }
189         
190         /* generate method profiling code */
191
192         if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
193                 /* count frequency */
194
195                 M_ALD(REG_ITMP1, REG_PV, CodeinfoPointer);
196                 M_ALD(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
197                 M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
198                 M_AST(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
199
200 /*              PROFILE_CYCLE_START; */
201         }
202
203         /* create stack frame (if necessary) */
204
205         if (!code->isleafmethod) {
206                 M_MFLR(REG_ZERO);
207                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
208         }
209
210         if (stackframesize)
211                 M_STWU(REG_SP, REG_SP, -stackframesize * 4);
212
213         /* save return address and used callee saved registers */
214
215         p = stackframesize;
216         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
217                 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
218         }
219         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
220                 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
221         }
222
223         /* take arguments out of register or stack frame */
224
225         md = m->parseddesc;
226
227         for (p = 0, l = 0; p < md->paramcount; p++) {
228                 t = md->paramtypes[p].type;
229                 var = &(rd->locals[l][t]);
230                 l++;
231                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
232                         l++;
233                 if (var->type < 0)
234                         continue;
235                 s1 = md->params[p].regoff;
236                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
237                         if (IS_2_WORD_TYPE(t))
238                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
239                                                            rd->argintregs[GET_HIGH_REG(s1)]);
240                         else
241                                 s2 = rd->argintregs[s1];
242                         if (!md->params[p].inmemory) {           /* register arguments    */
243                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
244                                         if (IS_2_WORD_TYPE(t))
245                                                 M_LNGMOVE(s2, var->regoff);
246                                         else
247                                                 M_INTMOVE(s2, var->regoff);
248
249                                 } else {                             /* reg arg -> spilled    */
250                                         if (IS_2_WORD_TYPE(t))
251                                                 M_LST(s2, REG_SP, var->regoff * 4);
252                                         else
253                                                 M_IST(s2, REG_SP, var->regoff * 4);
254                                 }
255
256                         } else {                                 /* stack arguments       */
257                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
258                                         if (IS_2_WORD_TYPE(t))
259                                                 M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
260                                         else
261                                                 M_ILD(var->regoff, REG_SP, (stackframesize + s1) * 4);
262
263                                 } else {                             /* stack arg -> spilled  */
264 #if 1
265                                         M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4);
266                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
267                                         if (IS_2_WORD_TYPE(t)) {
268                                                 M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4 +4);
269                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
270                                         }
271 #else
272                                         /* Reuse Memory Position on Caller Stack */
273                                         var->regoff = stackframesize + s1;
274 #endif
275                                 }
276                         }
277
278                 } else {                                     /* floating args         */
279                         if (!md->params[p].inmemory) {           /* register arguments    */
280                                 s2 = rd->argfltregs[s1];
281                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
282                                         M_FLTMOVE(s2, var->regoff);
283
284                                 } else {                                         /* reg arg -> spilled    */
285                                         if (IS_2_WORD_TYPE(t))
286                                                 M_DST(s2, REG_SP, var->regoff * 4);
287                                         else
288                                                 M_FST(s2, REG_SP, var->regoff * 4);
289                                 }
290
291                         } else {                                 /* stack arguments       */
292                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
293                                         if (IS_2_WORD_TYPE(t))
294                                                 M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
295
296                                         else
297                                                 M_FLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
298
299                                 } else {                             /* stack-arg -> spilled  */
300 #if 1
301                                         if (IS_2_WORD_TYPE(t)) {
302                                                 M_DLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
303                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
304                                                 var->regoff = stackframesize + s1;
305
306                                         } else {
307                                                 M_FLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
308                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
309                                         }
310 #else
311                                         /* Reuse Memory Position on Caller Stack */
312                                         var->regoff = stackframesize + s1;
313 #endif
314                                 }
315                         }
316                 }
317         } /* end for */
318
319         /* save monitorenter argument */
320
321 #if defined(ENABLE_THREADS)
322         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
323                 p = dseg_addaddress(cd, BUILTIN_monitorenter);
324                 M_ALD(REG_ITMP3, REG_PV, p);
325                 M_MTCTR(REG_ITMP3);
326
327                 /* get or test the lock object */
328
329                 if (m->flags & ACC_STATIC) {
330                         p = dseg_addaddress(cd, &m->class->object.header);
331                         M_ALD(rd->argintregs[0], REG_PV, p);
332                 }
333                 else {
334                         M_TST(rd->argintregs[0]);
335                         M_BEQ(0);
336                         codegen_add_nullpointerexception_ref(cd);
337                 }
338
339                 M_AST(rd->argintregs[0], REG_SP, rd->memuse * 4);
340                 M_JSR;
341         }
342 #endif
343
344         /* call trace function */
345
346         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
347                 codegen_trace_args(jd, stackframesize, false);
348         }
349
350         /* end of header generation */
351
352         replacementpoint = code->rplpoints;
353
354         /* walk through all basic blocks */
355
356         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
357
358                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
359
360                 if (bptr->flags >= BBREACHED) {
361
362                 /* branch resolving */
363
364                 {
365                 branchref *brefs;
366                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
367                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos, 
368                                           brefs->branchpos,
369                                                           bptr->mpc);
370                         }
371                 }
372
373                 /* handle replacement points */
374
375                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
376                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
377                         
378                         replacementpoint++;
379                 }
380
381                 /* generate basicblock profiling code */
382
383                 if (JITDATA_HAS_FLAG_INSTRUMENT(jd) && 0) {
384                         /* count frequency */
385
386                         disp = dseg_addaddress(cd, code->bbfrequency);
387                         M_ALD(REG_ITMP2, REG_PV, disp);
388                         M_ALD(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
389                         M_IADD_IMM(REG_ITMP3, 1, REG_ITMP3);
390                         M_AST(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
391
392                         /* if this is an exception handler, start profiling again */
393
394 /*                      if (bptr->type == BBTYPE_EXH) */
395 /*                              PROFILE_CYCLE_START; */
396                 }
397
398                 /* copy interface registers to their destination */
399
400                 src = bptr->instack;
401                 len = bptr->indepth;
402                 MCODECHECK(64+len);
403
404 #if defined(ENABLE_LSRA)
405                 if (opt_lsra) {
406                         while (src != NULL) {
407                                 len--;
408                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
409                                         /* d = reg_of_var(m, src, REG_ITMP1); */
410                                         if (!(src->flags & INMEMORY))
411                                                 d = src->regoff;
412                                         else
413                                                 d = REG_ITMP1;
414                                         M_INTMOVE(REG_ITMP1, d);
415                                         emit_store(jd, NULL, src, d);
416                                 }
417                                 src = src->prev;
418                         }
419                 } else {
420 #endif
421                 while (src != NULL) {
422                         len--;
423                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
424                                 d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
425                                 M_INTMOVE(REG_ITMP1, d);
426                                 emit_store(jd, NULL, src, d);
427                         }
428                         else {
429                                 if (src->type == TYPE_LNG)
430                                         d = codegen_reg_of_var(rd, 0, src, REG_ITMP12_PACKED);
431                                 else
432                                         d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
433                                 if ((src->varkind != STACKVAR)) {
434                                         s2 = src->type;
435                                         if (IS_FLT_DBL_TYPE(s2)) {
436                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
437                                                         s1 = rd->interfaces[len][s2].regoff;
438                                                         M_FLTMOVE(s1, d);
439                                                 }
440                                                 else {
441                                                         if (IS_2_WORD_TYPE(s2)) {
442                                                                 M_DLD(d, REG_SP,
443                                                                           rd->interfaces[len][s2].regoff * 4);
444                                                         }
445                                                         else {
446                                                                 M_FLD(d, REG_SP,
447                                                                           rd->interfaces[len][s2].regoff * 4);
448                                                         }       
449                                                 }
450                                                 emit_store(jd, NULL, src, d);
451                                         }
452                                         else {
453                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
454                                                         s1 = rd->interfaces[len][s2].regoff;
455                                                         if (IS_2_WORD_TYPE(s2))
456                                                                 M_LNGMOVE(s1, d);
457                                                         else
458                                                                 M_INTMOVE(s1, d);
459                                                 } 
460                                                 else {
461                                                         if (IS_2_WORD_TYPE(s2))
462                                                                 M_LLD(d, REG_SP,
463                                                                           rd->interfaces[len][s2].regoff * 4);
464                                                         else
465                                                                 M_ILD(d, REG_SP,
466                                                                           rd->interfaces[len][s2].regoff * 4);
467                                                 }
468                                                 emit_store(jd, NULL, src, d);
469                                         }
470                                 }
471                         }
472                         src = src->prev;
473                 }
474
475 #if defined(ENABLE_LSRA)
476                 }
477 #endif
478                 /* walk through all instructions */
479                 
480                 src = bptr->instack;
481                 len = bptr->icount;
482                 currentline = 0;
483
484                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
485                         if (iptr->line != currentline) {
486                                 dseg_addlinenumber(cd, iptr->line);
487                                 currentline = iptr->line;
488                         }
489
490                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
491
492                         switch (iptr->opc) {
493                         case ICMD_NOP:    /* ...  ==> ...                                 */
494                         case ICMD_INLINE_START:
495                         case ICMD_INLINE_END:
496                                 break;
497
498                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
499
500                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
501                         M_TST(s1);
502                         M_BEQ(0);
503                         codegen_add_nullpointerexception_ref(cd);
504                         break;
505
506                 /* constant operations ************************************************/
507
508                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
509                                       /* op1 = 0, val.i = constant                    */
510
511                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
512                         ICONST(d, iptr->val.i);
513                         emit_store(jd, iptr, iptr->dst, d);
514                         break;
515
516                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
517                                       /* op1 = 0, val.l = constant                    */
518
519                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
520                         LCONST(d, iptr->val.l);
521                         emit_store(jd, iptr, iptr->dst, d);
522                         break;
523
524                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
525                                       /* op1 = 0, val.f = constant                    */
526
527                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
528                         a = dseg_addfloat(cd, iptr->val.f);
529                         M_FLD(d, REG_PV, a);
530                         emit_store(jd, iptr, iptr->dst, d);
531                         break;
532                         
533                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
534                                       /* op1 = 0, val.d = constant                    */
535
536                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
537                         a = dseg_adddouble(cd, iptr->val.d);
538                         M_DLD(d, REG_PV, a);
539                         emit_store(jd, iptr, iptr->dst, d);
540                         break;
541
542                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
543                                       /* op1 = 0, val.a = constant                    */
544
545                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
546                         disp = dseg_addaddress(cd, iptr->val.a);
547
548                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
549                                 codegen_addpatchref(cd, PATCHER_aconst,
550                                                                         ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
551                                                                     disp);
552
553                                 if (opt_showdisassemble)
554                                         M_NOP;
555                         }
556
557                         M_ALD(d, REG_PV, disp);
558                         emit_store(jd, iptr, iptr->dst, d);
559                         break;
560
561
562                 /* load/store operations **********************************************/
563
564                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
565                 case ICMD_ALOAD:      /* op1 = local variable                         */
566
567                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
568                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
569                         if ((iptr->dst->varkind == LOCALVAR) &&
570                             (iptr->dst->varnum == iptr->op1))
571                                 break;
572                         if (var->flags & INMEMORY)
573                                 M_ILD(d, REG_SP, var->regoff * 4);
574                         else
575                                 M_INTMOVE(var->regoff, d);
576                         emit_store(jd, iptr, iptr->dst, d);
577                         break;
578
579                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
580                                       /* op1 = local variable                         */
581
582                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
583                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
584                         if ((iptr->dst->varkind == LOCALVAR) &&
585                                 (iptr->dst->varnum == iptr->op1))
586                                 break;
587                         if (var->flags & INMEMORY)
588                                 M_LLD(d, REG_SP, var->regoff * 4);
589                         else
590                                 M_LNGMOVE(var->regoff, d);
591                         emit_store(jd, iptr, iptr->dst, d);
592                         break;
593
594                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
595                                       /* op1 = local variable                         */
596
597                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
598                         if ((iptr->dst->varkind == LOCALVAR) &&
599                                 (iptr->dst->varnum == iptr->op1))
600                                 break;
601                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
602                         if (var->flags & INMEMORY)
603                                 M_FLD(d, REG_SP, var->regoff * 4);
604                         else
605                                 M_FLTMOVE(var->regoff, d);
606                         emit_store(jd, iptr, iptr->dst, d);
607                         break;
608
609                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
610                                       /* op1 = local variable                         */
611
612                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
613                         if ((iptr->dst->varkind == LOCALVAR) &&
614                                 (iptr->dst->varnum == iptr->op1))
615                                 break;
616                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
617                         if (var->flags & INMEMORY)
618                                 M_DLD(d, REG_SP, var->regoff * 4);
619                         else
620                                 M_FLTMOVE(var->regoff, d);
621                         emit_store(jd, iptr, iptr->dst, d);
622                         break;
623
624
625                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
626                 case ICMD_ASTORE:     /* op1 = local variable                         */
627
628                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
629                                 break;
630                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
631                         if (var->flags & INMEMORY) {
632                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
633                                 M_IST(s1, REG_SP, var->regoff * 4);
634                         } else {
635                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
636                                 M_INTMOVE(s1, var->regoff);
637                         }
638                         break;
639
640                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
641                                       /* op1 = local variable                         */
642
643                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
644                                 break;
645                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
646                         if (var->flags & INMEMORY) {
647                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
648                                 M_LST(s1, REG_SP, var->regoff * 4);
649                         } else {
650                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
651                                 M_LNGMOVE(s1, var->regoff);
652                         }
653                         break;
654
655                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
656                                       /* op1 = local variable                         */
657
658                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
659                                 break;
660                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
661                         if (var->flags & INMEMORY) {
662                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
663                                 M_FST(s1, REG_SP, var->regoff * 4);
664                         } else {
665                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
666                                 M_FLTMOVE(s1, var->regoff);
667                         }
668                         break;
669
670                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
671                                       /* op1 = local variable                         */
672
673                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
674                                 break;
675                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
676                         if (var->flags & INMEMORY) {
677                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
678                                 M_DST(s1, REG_SP, var->regoff * 4);
679                         } else {
680                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
681                                 M_FLTMOVE(s1, var->regoff);
682                         }
683                         break;
684
685
686                 /* pop/dup/swap operations ********************************************/
687
688                 /* attention: double and longs are only one entry in CACAO ICMDs      */
689
690                 case ICMD_POP:        /* ..., value  ==> ...                          */
691                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
692                         break;
693
694                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
695                         M_COPY(src, iptr->dst);
696                         break;
697
698                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
699
700                         M_COPY(src,       iptr->dst);
701                         M_COPY(src->prev, iptr->dst->prev);
702                         M_COPY(iptr->dst, iptr->dst->prev->prev);
703                         break;
704
705                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
706
707                         M_COPY(src,             iptr->dst);
708                         M_COPY(src->prev,       iptr->dst->prev);
709                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
710                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
711                         break;
712
713                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
714
715                         M_COPY(src,       iptr->dst);
716                         M_COPY(src->prev, iptr->dst->prev);
717                         break;
718
719                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
720
721                         M_COPY(src,             iptr->dst);
722                         M_COPY(src->prev,       iptr->dst->prev);
723                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
724                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
725                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
726                         break;
727
728                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
729
730                         M_COPY(src,                   iptr->dst);
731                         M_COPY(src->prev,             iptr->dst->prev);
732                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
733                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
734                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
735                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
736                         break;
737
738                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
739
740                         M_COPY(src,       iptr->dst->prev);
741                         M_COPY(src->prev, iptr->dst);
742                         break;
743
744
745                 /* integer operations *************************************************/
746
747                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
748
749                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1); 
750                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
751                         M_NEG(s1, d);
752                         emit_store(jd, iptr, iptr->dst, d);
753                         break;
754
755                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
756
757                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
758                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
759                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
760                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
761                         emit_store(jd, iptr, iptr->dst, d);
762                         break;
763
764                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
765
766                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
767                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
768                         M_INTMOVE(s1, GET_LOW_REG(d));
769                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
770                         emit_store(jd, iptr, iptr->dst, d);
771                         break;
772
773                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
774
775                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP2);
776                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
777                         M_INTMOVE(s1, d);
778                         emit_store(jd, iptr, iptr->dst, d);
779                         break;
780
781                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
782
783                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
784                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
785                         M_BSEXT(s1, d);
786                         emit_store(jd, iptr, iptr->dst, d);
787                         break;
788
789                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
790
791                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
792                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
793                         M_CZEXT(s1, d);
794                         emit_store(jd, iptr, iptr->dst, d);
795                         break;
796
797                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
798
799                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
800                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
801                         M_SSEXT(s1, d);
802                         emit_store(jd, iptr, iptr->dst, d);
803                         break;
804
805
806                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
807
808                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
809                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
810                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
811                         M_IADD(s1, s2, d);
812                         emit_store(jd, iptr, iptr->dst, d);
813                         break;
814
815                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
816                                       /* val.i = constant                             */
817
818                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
819                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
820                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
821                                 M_IADD_IMM(s1, iptr->val.i, d);
822                         } else {
823                                 ICONST(REG_ITMP2, iptr->val.i);
824                                 M_IADD(s1, REG_ITMP2, d);
825                         }
826                         emit_store(jd, iptr, iptr->dst, d);
827                         break;
828
829                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
830
831                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
832                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
833                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
834                         M_ADDC(s1, s2, GET_LOW_REG(d));
835                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
836                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
837                         M_ADDE(s1, s2, GET_HIGH_REG(d));
838                         emit_store(jd, iptr, iptr->dst, d);
839                         break;
840
841                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
842                                       /* val.l = constant                             */
843
844                         s3 = iptr->val.l & 0xffffffff;
845                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
846                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
847                         if ((s3 >= -32768) && (s3 <= 32767)) {
848                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
849                         } else {
850                                 ICONST(REG_ITMP2, s3);
851                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
852                         }
853                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
854                         s3 = iptr->val.l >> 32;
855                         if (s3 == -1) {
856                                 M_ADDME(s1, GET_HIGH_REG(d));
857                         } else if (s3 == 0) {
858                                 M_ADDZE(s1, GET_HIGH_REG(d));
859                         } else {
860                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
861                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
862                         }
863                         emit_store(jd, iptr, iptr->dst, d);
864                         break;
865
866                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
867
868                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
869                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
870                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
871                         M_ISUB(s1, s2, d);
872                         emit_store(jd, iptr, iptr->dst, d);
873                         break;
874
875                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
876                                       /* val.i = constant                             */
877
878                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
879                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
880                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
881                                 M_IADD_IMM(s1, -iptr->val.i, d);
882                         } else {
883                                 ICONST(REG_ITMP2, -iptr->val.i);
884                                 M_IADD(s1, REG_ITMP2, d);
885                         }
886                         emit_store(jd, iptr, iptr->dst, d);
887                         break;
888
889                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
890
891                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
892                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
893                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
894                         M_SUBC(s1, s2, GET_LOW_REG(d));
895                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
896                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
897                         M_SUBE(s1, s2, GET_HIGH_REG(d));
898                         emit_store(jd, iptr, iptr->dst, d);
899                         break;
900
901                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
902                                       /* val.l = constant                             */
903
904                         s3 = (-iptr->val.l) & 0xffffffff;
905                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
906                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
907                         if ((s3 >= -32768) && (s3 <= 32767)) {
908                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
909                         } else {
910                                 ICONST(REG_ITMP2, s3);
911                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
912                         }
913                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
914                         s3 = (-iptr->val.l) >> 32;
915                         if (s3 == -1)
916                                 M_ADDME(s1, GET_HIGH_REG(d));
917                         else if (s3 == 0)
918                                 M_ADDZE(s1, GET_HIGH_REG(d));
919                         else {
920                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
921                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
922                         }
923                         emit_store(jd, iptr, iptr->dst, d);
924                         break;
925
926                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
927
928                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
929                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
930                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
931                         M_TST(s2);
932                         M_BEQ(0);
933                         codegen_add_arithmeticexception_ref(cd);
934                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
935                         M_CMP(REG_ITMP3, s1);
936                         M_BNE(3 + (s1 != d));
937                         M_CMPI(s2, -1);
938                         M_BNE(1 + (s1 != d));
939                         M_INTMOVE(s1, d);
940                         M_BR(1);
941                         M_IDIV(s1, s2, d);
942                         emit_store(jd, iptr, iptr->dst, d);
943                         break;
944
945                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
946
947                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
948                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
949                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
950                         M_TST(s2);
951                         M_BEQ(0);
952                         codegen_add_arithmeticexception_ref(cd);
953                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
954                         M_CMP(REG_ITMP3, s1);
955                         M_BNE(4);
956                         M_CMPI(s2, -1);
957                         M_BNE(2);
958                         M_CLR(d);
959                         M_BR(3);
960                         M_IDIV(s1, s2, REG_ITMP3);
961                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
962                         M_ISUB(s1, REG_ITMP3, d);
963                         emit_store(jd, iptr, iptr->dst, d);
964                         break;
965
966                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
967                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
968
969                         bte = iptr->val.a;
970                         md = bte->md;
971
972                         s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
973                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
974                         M_BEQ(0);
975                         codegen_add_arithmeticexception_ref(cd);
976
977                         disp = dseg_addaddress(cd, bte->fp);
978                         M_ALD(REG_ITMP3, REG_PV, disp);
979                         M_MTCTR(REG_ITMP3);
980
981                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
982                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
983                         M_LNGMOVE(s2, s3);
984
985                         s1 = emit_load_s1(jd, iptr, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
986                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
987                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
988                         M_LNGMOVE(s1, s3);
989
990                         M_JSR;
991
992                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
993                         M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), d);
994                         emit_store(jd, iptr, iptr->dst, d);
995                         break;
996
997                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
998
999                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1000                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1001                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1002                         M_IMUL(s1, s2, d);
1003                         emit_store(jd, iptr, iptr->dst, d);
1004                         break;
1005
1006                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1007                                       /* val.i = constant                             */
1008
1009                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1010                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1011                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
1012                                 M_IMUL_IMM(s1, iptr->val.i, d);
1013                         } else {
1014                                 ICONST(REG_ITMP3, iptr->val.i);
1015                                 M_IMUL(s1, REG_ITMP3, d);
1016                         }
1017                         emit_store(jd, iptr, iptr->dst, d);
1018                         break;
1019
1020                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1021                                       
1022                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1023                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1024                         M_SRA_IMM(s1, iptr->val.i, d);
1025                         M_ADDZE(d, d);
1026                         emit_store(jd, iptr, iptr->dst, d);
1027                         break;
1028
1029                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1030
1031                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1032                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1033                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1034                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1035                         M_SLL(s1, REG_ITMP3, d);
1036                         emit_store(jd, iptr, iptr->dst, d);
1037                         break;
1038
1039                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1040                                       /* val.i = constant                             */
1041
1042                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1043                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1044                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1045                         emit_store(jd, iptr, iptr->dst, d);
1046                         break;
1047
1048                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1049
1050                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1051                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1052                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1053                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1054                         M_SRA(s1, REG_ITMP3, d);
1055                         emit_store(jd, iptr, iptr->dst, d);
1056                         break;
1057
1058                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1059                                       /* val.i = constant                             */
1060
1061                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1062                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1063                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1064                         emit_store(jd, iptr, iptr->dst, d);
1065                         break;
1066
1067                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1068
1069                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1070                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1071                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1072                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1073                         M_SRL(s1, REG_ITMP2, d);
1074                         emit_store(jd, iptr, iptr->dst, d);
1075                         break;
1076
1077                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1078                                       /* val.i = constant                             */
1079
1080                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1081                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1082                         if (iptr->val.i & 0x1f) {
1083                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1084                         } else {
1085                                 M_INTMOVE(s1, d);
1086                         }
1087                         emit_store(jd, iptr, iptr->dst, d);
1088                         break;
1089
1090                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1091
1092                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1093                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1094                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1095                         M_AND(s1, s2, d);
1096                         emit_store(jd, iptr, iptr->dst, d);
1097                         break;
1098
1099                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1100                                       /* val.i = constant                             */
1101
1102                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1103                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1104                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1105                                 M_AND_IMM(s1, iptr->val.i, d);
1106                                 }
1107                         /*
1108                         else if (iptr->val.i == 0xffffff) {
1109                                 M_RLWINM(s1, 0, 8, 31, d);
1110                                 }
1111                         */
1112                         else {
1113                                 ICONST(REG_ITMP3, iptr->val.i);
1114                                 M_AND(s1, REG_ITMP3, d);
1115                         }
1116                         emit_store(jd, iptr, iptr->dst, d);
1117                         break;
1118
1119                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1120
1121                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1122                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1123                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1124                         M_AND(s1, s2, GET_LOW_REG(d));
1125                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1126                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1127                         M_AND(s1, s2, GET_HIGH_REG(d));
1128                         emit_store(jd, iptr, iptr->dst, d);
1129                         break;
1130
1131                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1132                                       /* val.l = constant                             */
1133
1134                         s3 = iptr->val.l & 0xffffffff;
1135                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1136                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1137                         if ((s3 >= 0) && (s3 <= 65535)) {
1138                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1139                         } else {
1140                                 ICONST(REG_ITMP3, s3);
1141                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1142                         }
1143                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1144                         s3 = iptr->val.l >> 32;
1145                         if ((s3 >= 0) && (s3 <= 65535)) {
1146                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1147                         } else {
1148                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1149                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1150                         }
1151                         emit_store(jd, iptr, iptr->dst, d);
1152                         break;
1153
1154                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1155                                       /* val.i = constant                             */
1156
1157                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1158                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1159                         M_MOV(s1, REG_ITMP2);
1160                         M_CMPI(s1, 0);
1161                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1162                         if (iptr->val.i >= 32768) {
1163                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1164                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1165                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1166                         } else {
1167                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1168                         }
1169                         {
1170                                 int b=0, m = iptr->val.i;
1171                                 while (m >>= 1)
1172                                         ++b;
1173                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1174                         }
1175                         M_ISUB(s1, REG_ITMP2, d);
1176                         emit_store(jd, iptr, iptr->dst, d);
1177                         break;
1178
1179                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1180
1181                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1182                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1183                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1184                         M_OR(s1, s2, d);
1185                         emit_store(jd, iptr, iptr->dst, d);
1186                         break;
1187
1188                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1189                                       /* val.i = constant                             */
1190
1191                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1192                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1193                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1194                                 M_OR_IMM(s1, iptr->val.i, d);
1195                         } else {
1196                                 ICONST(REG_ITMP3, iptr->val.i);
1197                                 M_OR(s1, REG_ITMP3, d);
1198                         }
1199                         emit_store(jd, iptr, iptr->dst, d);
1200                         break;
1201
1202                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1203
1204                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1205                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1206                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1207                         M_OR(s1, s2, GET_LOW_REG(d));
1208                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1209                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1210                         M_OR(s1, s2, GET_HIGH_REG(d));
1211                         emit_store(jd, iptr, iptr->dst, d);
1212                         break;
1213
1214                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1215                                       /* val.l = constant                             */
1216
1217                         s3 = iptr->val.l & 0xffffffff;
1218                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1219                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1220                         if ((s3 >= 0) && (s3 <= 65535)) {
1221                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1222                         } else {
1223                                 ICONST(REG_ITMP3, s3);
1224                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1225                         }
1226                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1227                         s3 = iptr->val.l >> 32;
1228                         if ((s3 >= 0) && (s3 <= 65535)) {
1229                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1230                         } else {
1231                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1232                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1233                         }
1234                         emit_store(jd, iptr, iptr->dst, d);
1235                         break;
1236
1237                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1238
1239                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1240                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1241                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1242                         M_XOR(s1, s2, d);
1243                         emit_store(jd, iptr, iptr->dst, d);
1244                         break;
1245
1246                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1247                                       /* val.i = constant                             */
1248
1249                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1250                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1251                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1252                                 M_XOR_IMM(s1, iptr->val.i, d);
1253                         } else {
1254                                 ICONST(REG_ITMP3, iptr->val.i);
1255                                 M_XOR(s1, REG_ITMP3, d);
1256                         }
1257                         emit_store(jd, iptr, iptr->dst, d);
1258                         break;
1259
1260                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1261
1262                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1263                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1264                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1265                         M_XOR(s1, s2, GET_LOW_REG(d));
1266                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1267                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1268                         M_XOR(s1, s2, GET_HIGH_REG(d));
1269                         emit_store(jd, iptr, iptr->dst, d);
1270                         break;
1271
1272                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1273                                       /* val.l = constant                             */
1274
1275                         s3 = iptr->val.l & 0xffffffff;
1276                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1277                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1278                         if ((s3 >= 0) && (s3 <= 65535)) {
1279                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1280                         } else {
1281                                 ICONST(REG_ITMP3, s3);
1282                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1283                         }
1284                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1285                         s3 = iptr->val.l >> 32;
1286                         if ((s3 >= 0) && (s3 <= 65535)) {
1287                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1288                         } else {
1289                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1290                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1291                         }
1292                         emit_store(jd, iptr, iptr->dst, d);
1293                         break;
1294
1295                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1296                         /*******************************************************************
1297                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1298                         *******************************************************************/
1299                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP3);
1300                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
1301                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1302                         {
1303                                 int tempreg = false;
1304                                 int dreg;
1305                                 u1  *br1;
1306
1307                                 if (src->prev->flags & INMEMORY) {
1308                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1309                                 } else {
1310                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1311                                                         || (d == GET_LOW_REG(src->prev->regoff));
1312                                 }
1313                                 if (src->flags & INMEMORY) {
1314                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1315                                 } else {
1316                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1317                                  || (d == GET_LOW_REG(src->regoff));
1318                                 }
1319
1320                                 dreg = tempreg ? REG_ITMP1 : d;
1321                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1322                                 M_CMP(s1, s2);
1323                                 M_BGT(0);
1324                                 br1 = cd->mcodeptr;
1325                                 M_BLT(0);
1326                                 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP3);
1327                                 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1328                                 M_CMPU(s1, s2);
1329                                 M_BGT(3);
1330                                 M_BEQ(1);
1331                                 M_IADD_IMM(dreg, -1, dreg);
1332                                 M_IADD_IMM(dreg, -1, dreg);
1333                                 gen_resolvebranch(br1, br1, cd->mcodeptr);
1334                                 gen_resolvebranch(br1 + 1 * 4, br1 + 1 * 4, cd->mcodeptr - 2 * 4);
1335                                 M_INTMOVE(dreg, d);
1336                         }
1337                         emit_store(jd, iptr, iptr->dst, d);
1338                         break;
1339
1340                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1341                                       /* op1 = variable, val.i = constant             */
1342
1343                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1344                         if (var->flags & INMEMORY) {
1345                                 s1 = REG_ITMP1;
1346                                 M_ILD(s1, REG_SP, var->regoff * 4);
1347                         } else
1348                                 s1 = var->regoff;
1349                         {
1350                                 u4 m = iptr->val.i;
1351                                 if (m & 0x8000)
1352                                         m += 65536;
1353                                 if (m & 0xffff0000)
1354                                         M_ADDIS(s1, m >> 16, s1);
1355                                 if (m & 0xffff)
1356                                         M_IADD_IMM(s1, m & 0xffff, s1);
1357                         }
1358                         if (var->flags & INMEMORY)
1359                                 M_IST(s1, REG_SP, var->regoff * 4);
1360                         break;
1361
1362
1363                 /* floating operations ************************************************/
1364
1365                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1366
1367                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1368                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1369                         M_FMOVN(s1, d);
1370                         emit_store(jd, iptr, iptr->dst, d);
1371                         break;
1372
1373                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1374
1375                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1376                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1377                         M_FMOVN(s1, d);
1378                         emit_store(jd, iptr, iptr->dst, d);
1379                         break;
1380
1381                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1382
1383                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1384                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1385                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1386                         M_FADD(s1, s2, d);
1387                         emit_store(jd, iptr, iptr->dst, d);
1388                         break;
1389
1390                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1391
1392                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1393                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1394                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1395                         M_DADD(s1, s2, d);
1396                         emit_store(jd, iptr, iptr->dst, d);
1397                         break;
1398
1399                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1400
1401                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1402                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1403                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1404                         M_FSUB(s1, s2, d);
1405                         emit_store(jd, iptr, iptr->dst, d);
1406                         break;
1407
1408                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1409
1410                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1411                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1412                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1413                         M_DSUB(s1, s2, d);
1414                         emit_store(jd, iptr, iptr->dst, d);
1415                         break;
1416
1417                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1418
1419                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1420                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1421                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1422                         M_FMUL(s1, s2, d);
1423                         emit_store(jd, iptr, iptr->dst, d);
1424                         break;
1425
1426                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1427
1428                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1429                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1430                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1431                         M_DMUL(s1, s2, d);
1432                         emit_store(jd, iptr, iptr->dst, d);
1433                         break;
1434
1435                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1436
1437                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1438                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1439                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1440                         M_FDIV(s1, s2, d);
1441                         emit_store(jd, iptr, iptr->dst, d);
1442                         break;
1443
1444                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1445
1446                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1447                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1448                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1449                         M_DDIV(s1, s2, d);
1450                         emit_store(jd, iptr, iptr->dst, d);
1451                         break;
1452                 
1453                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1454                 case ICMD_D2I:
1455
1456                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1457                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1458                         M_CLR(d);
1459                         disp = dseg_addfloat(cd, 0.0);
1460                         M_FLD(REG_FTMP2, REG_PV, disp);
1461                         M_FCMPU(s1, REG_FTMP2);
1462                         M_BNAN(4);
1463                         disp = dseg_adds4(cd, 0);
1464                         M_CVTDL_C(s1, REG_FTMP1);
1465                         M_LDA(REG_ITMP1, REG_PV, disp);
1466                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1467                         M_ILD(d, REG_PV, disp);
1468                         emit_store(jd, iptr, iptr->dst, d);
1469                         break;
1470                 
1471                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1472
1473                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1474                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1475                         M_FLTMOVE(s1, d);
1476                         emit_store(jd, iptr, iptr->dst, d);
1477                         break;
1478                                         
1479                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1480
1481                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1482                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1483                         M_CVTDF(s1, d);
1484                         emit_store(jd, iptr, iptr->dst, d);
1485                         break;
1486                 
1487                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1488                 case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                     */
1489
1490
1491                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1492                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1493                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1494                         M_FCMPU(s2, s1);
1495                         M_IADD_IMM(REG_ZERO, -1, d);
1496                         M_BNAN(4);
1497                         M_BGT(3);
1498                         M_IADD_IMM(REG_ZERO, 0, d);
1499                         M_BGE(1);
1500                         M_IADD_IMM(REG_ZERO, 1, d);
1501                         emit_store(jd, iptr, iptr->dst, d);
1502                         break;
1503
1504                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1505                 case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                     */
1506
1507                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1508                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1509                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1510                         M_FCMPU(s1, s2);
1511                         M_IADD_IMM(REG_ZERO, 1, d);
1512                         M_BNAN(4);
1513                         M_BGT(3);
1514                         M_IADD_IMM(REG_ZERO, 0, d);
1515                         M_BGE(1);
1516                         M_IADD_IMM(REG_ZERO, -1, d);
1517                         emit_store(jd, iptr, iptr->dst, d);
1518                         break;
1519                         
1520                 case ICMD_IF_FCMPEQ:    /* ..., value, value ==> ...                  */
1521                 case ICMD_IF_DCMPEQ:
1522
1523                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1524                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1525                         M_FCMPU(s1, s2);
1526                         M_BNAN(1);
1527                         M_BEQ(0);
1528                         codegen_addreference(cd, (basicblock *) iptr->target);
1529                         break;
1530
1531                 case ICMD_IF_FCMPNE:    /* ..., value, value ==> ...                  */
1532                 case ICMD_IF_DCMPNE:
1533
1534                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1535                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1536                         M_FCMPU(s1, s2);
1537                         M_BNAN(0);
1538                         codegen_addreference(cd, (basicblock *) iptr->target);
1539                         M_BNE(0);
1540                         codegen_addreference(cd, (basicblock *) iptr->target);
1541                         break;
1542
1543
1544                 case ICMD_IF_FCMPL_LT:  /* ..., value, value ==> ...                  */
1545                 case ICMD_IF_DCMPL_LT:
1546
1547                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1548                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1549                         M_FCMPU(s1, s2);
1550                         M_BNAN(0);
1551                         codegen_addreference(cd, (basicblock *) iptr->target);
1552                         M_BLT(0);
1553                         codegen_addreference(cd, (basicblock *) iptr->target);
1554                         break;
1555
1556                 case ICMD_IF_FCMPL_GT:  /* ..., value, value ==> ...                  */
1557                 case ICMD_IF_DCMPL_GT:
1558
1559                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1560                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1561                         M_FCMPU(s1, s2);
1562                         M_BNAN(1);
1563                         M_BGT(0);
1564                         codegen_addreference(cd, (basicblock *) iptr->target);
1565                         break;
1566
1567                 case ICMD_IF_FCMPL_LE:  /* ..., value, value ==> ...                  */
1568                 case ICMD_IF_DCMPL_LE:
1569
1570                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1571                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1572                         M_FCMPU(s1, s2);
1573                         M_BNAN(0);
1574                         codegen_addreference(cd, (basicblock *) iptr->target);
1575                         M_BLE(0);
1576                         codegen_addreference(cd, (basicblock *) iptr->target);
1577                         break;
1578
1579                 case ICMD_IF_FCMPL_GE:  /* ..., value, value ==> ...                  */
1580                 case ICMD_IF_DCMPL_GE:
1581
1582                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1583                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1584                         M_FCMPU(s1, s2);
1585                         M_BNAN(1);
1586                         M_BGE(0);
1587                         codegen_addreference(cd, (basicblock *) iptr->target);
1588                         break;
1589
1590                 case ICMD_IF_FCMPG_LT:  /* ..., value, value ==> ...                  */
1591                 case ICMD_IF_DCMPG_LT:
1592
1593                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1594                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1595                         M_FCMPU(s1, s2);
1596                         M_BNAN(1);
1597                         M_BLT(0);
1598                         codegen_addreference(cd, (basicblock *) iptr->target);
1599                         break;
1600
1601                 case ICMD_IF_FCMPG_GT:  /* ..., value, value ==> ...                  */
1602                 case ICMD_IF_DCMPG_GT:
1603
1604                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1605                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1606                         M_FCMPU(s1, s2);
1607                         M_BNAN(0);
1608                         codegen_addreference(cd, (basicblock *) iptr->target);
1609                         M_BGT(0);
1610                         codegen_addreference(cd, (basicblock *) iptr->target);
1611                         break;
1612
1613                 case ICMD_IF_FCMPG_LE:  /* ..., value, value ==> ...                  */
1614                 case ICMD_IF_DCMPG_LE:
1615
1616                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1617                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1618                         M_FCMPU(s1, s2);
1619                         M_BNAN(1);
1620                         M_BLE(0);
1621                         codegen_addreference(cd, (basicblock *) iptr->target);
1622                         break;
1623
1624                 case ICMD_IF_FCMPG_GE:  /* ..., value, value ==> ...                  */
1625                 case ICMD_IF_DCMPG_GE:
1626
1627                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1628                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1629                         M_FCMPU(s1, s2);
1630                         M_BNAN(0);
1631                         codegen_addreference(cd, (basicblock *) iptr->target);
1632                         M_BGE(0);
1633                         codegen_addreference(cd, (basicblock *) iptr->target);
1634                         break;
1635
1636
1637                 /* memory operations **************************************************/
1638
1639                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1640
1641                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1642                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1643                         gen_nullptr_check(s1);
1644                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1645                         emit_store(jd, iptr, iptr->dst, d);
1646                         break;
1647
1648                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1649
1650                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1651                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1652                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1653                         if (iptr->op1 == 0) {
1654                                 gen_nullptr_check(s1);
1655                                 gen_bound_check;
1656                         }
1657                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1658                         M_LBZX(d, s1, REG_ITMP2);
1659                         M_BSEXT(d, d);
1660                         emit_store(jd, iptr, iptr->dst, d);
1661                         break;                  
1662
1663                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1664
1665                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1666                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1667                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1668                         if (iptr->op1 == 0) {
1669                                 gen_nullptr_check(s1);
1670                                 gen_bound_check;
1671                         }
1672                         M_SLL_IMM(s2, 1, REG_ITMP2);
1673                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1674                         M_LHZX(d, s1, REG_ITMP2);
1675                         emit_store(jd, iptr, iptr->dst, d);
1676                         break;
1677
1678                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1679
1680                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1681                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1682                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1683                         if (iptr->op1 == 0) {
1684                                 gen_nullptr_check(s1);
1685                                 gen_bound_check;
1686                         }
1687                         M_SLL_IMM(s2, 1, REG_ITMP2);
1688                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1689                         M_LHAX(d, s1, REG_ITMP2);
1690                         emit_store(jd, iptr, iptr->dst, d);
1691                         break;
1692
1693                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1694
1695                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1696                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1697                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1698                         if (iptr->op1 == 0) {
1699                                 gen_nullptr_check(s1);
1700                                 gen_bound_check;
1701                         }
1702                         M_SLL_IMM(s2, 2, REG_ITMP2);
1703                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1704                         M_LWZX(d, s1, REG_ITMP2);
1705                         emit_store(jd, iptr, iptr->dst, d);
1706                         break;
1707
1708                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1709
1710                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1711                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1712                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1713                         if (iptr->op1 == 0) {
1714                                 gen_nullptr_check(s1);
1715                                 gen_bound_check;
1716                         }
1717                         M_SLL_IMM(s2, 3, REG_ITMP2);
1718                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1719                         M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1720                         emit_store(jd, iptr, iptr->dst, d);
1721                         break;
1722
1723                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1724
1725                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1726                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1727                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1728                         if (iptr->op1 == 0) {
1729                                 gen_nullptr_check(s1);
1730                                 gen_bound_check;
1731                         }
1732                         M_SLL_IMM(s2, 2, REG_ITMP2);
1733                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1734                         M_LFSX(d, s1, REG_ITMP2);
1735                         emit_store(jd, iptr, iptr->dst, d);
1736                         break;
1737
1738                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1739
1740                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1741                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1742                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1743                         if (iptr->op1 == 0) {
1744                                 gen_nullptr_check(s1);
1745                                 gen_bound_check;
1746                         }
1747                         M_SLL_IMM(s2, 3, REG_ITMP2);
1748                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1749                         M_LFDX(d, s1, REG_ITMP2);
1750                         emit_store(jd, iptr, iptr->dst, d);
1751                         break;
1752
1753                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1754
1755                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1756                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1757                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1758                         if (iptr->op1 == 0) {
1759                                 gen_nullptr_check(s1);
1760                                 gen_bound_check;
1761                         }
1762                         M_SLL_IMM(s2, 2, REG_ITMP2);
1763                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1764                         M_LWZX(d, s1, REG_ITMP2);
1765                         emit_store(jd, iptr, iptr->dst, d);
1766                         break;
1767
1768
1769                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1770
1771                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1772                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1773                         if (iptr->op1 == 0) {
1774                                 gen_nullptr_check(s1);
1775                                 gen_bound_check;
1776                         }
1777                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1778                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1779                         M_STBX(s3, s1, REG_ITMP2);
1780                         break;
1781
1782                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1783
1784                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1785                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1786                         if (iptr->op1 == 0) {
1787                                 gen_nullptr_check(s1);
1788                                 gen_bound_check;
1789                         }
1790                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1791                         M_SLL_IMM(s2, 1, REG_ITMP2);
1792                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1793                         M_STHX(s3, s1, REG_ITMP2);
1794                         break;
1795
1796                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1797
1798                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1799                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1800                         if (iptr->op1 == 0) {
1801                                 gen_nullptr_check(s1);
1802                                 gen_bound_check;
1803                         }
1804                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1805                         M_SLL_IMM(s2, 1, REG_ITMP2);
1806                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1807                         M_STHX(s3, s1, REG_ITMP2);
1808                         break;
1809
1810                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1811
1812                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1813                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1814                         if (iptr->op1 == 0) {
1815                                 gen_nullptr_check(s1);
1816                                 gen_bound_check;
1817                         }
1818                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1819                         M_SLL_IMM(s2, 2, REG_ITMP2);
1820                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1821                         M_STWX(s3, s1, REG_ITMP2);
1822                         break;
1823
1824                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1825
1826                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1827                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1828                         if (iptr->op1 == 0) {
1829                                 gen_nullptr_check(s1);
1830                                 gen_bound_check;
1831                         }
1832                         s3 = emit_load_s3_high(jd, iptr, src, REG_ITMP3);
1833                         M_SLL_IMM(s2, 3, REG_ITMP2);
1834                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1835                         M_STWX(s3, s1, REG_ITMP2);
1836                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1837                         s3 = emit_load_s3_low(jd, iptr, src, REG_ITMP3);
1838                         M_STWX(s3, s1, REG_ITMP2);
1839                         break;
1840
1841                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1842
1843                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1844                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1845                         if (iptr->op1 == 0) {
1846                                 gen_nullptr_check(s1);
1847                                 gen_bound_check;
1848                         }
1849                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1850                         M_SLL_IMM(s2, 2, REG_ITMP2);
1851                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1852                         M_STFSX(s3, s1, REG_ITMP2);
1853                         break;
1854
1855                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1856
1857                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1858                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1859                         if (iptr->op1 == 0) {
1860                                 gen_nullptr_check(s1);
1861                                 gen_bound_check;
1862                         }
1863                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1864                         M_SLL_IMM(s2, 3, REG_ITMP2);
1865                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1866                         M_STFDX(s3, s1, REG_ITMP2);
1867                         break;
1868
1869                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1870
1871                         s1 = emit_load_s1(jd, iptr, src->prev->prev, rd->argintregs[0]);
1872                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1873                         if (iptr->op1 == 0) {
1874                                 gen_nullptr_check(s1);
1875                                 gen_bound_check;
1876                         }
1877                         s3 = emit_load_s3(jd, iptr, src, rd->argintregs[1]);
1878
1879                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1880                         M_ALD(REG_ITMP3, REG_PV, disp);
1881                         M_MTCTR(REG_ITMP3);
1882
1883                         M_INTMOVE(s1, rd->argintregs[0]);
1884                         M_INTMOVE(s3, rd->argintregs[1]);
1885
1886                         M_JSR;
1887                         M_TST(REG_RESULT);
1888                         M_BEQ(0);
1889                         codegen_add_arraystoreexception_ref(cd);
1890
1891                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1892                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1893                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1894                         M_SLL_IMM(s2, 2, REG_ITMP2);
1895                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1896                         M_STWX(s3, s1, REG_ITMP2);
1897                         break;
1898
1899
1900                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1901                                       /* op1 = type, val.a = field address            */
1902
1903                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1904                                 disp = dseg_addaddress(cd, NULL);
1905
1906                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1907                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1908
1909                                 if (opt_showdisassemble)
1910                                         M_NOP;
1911
1912                         } else {
1913                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1914
1915                                 disp = dseg_addaddress(cd, &(fi->value));
1916
1917                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1918                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1919
1920                                         if (opt_showdisassemble)
1921                                                 M_NOP;
1922                                 }
1923                         }
1924
1925                         M_ALD(REG_ITMP1, REG_PV, disp);
1926                         switch (iptr->op1) {
1927                         case TYPE_INT:
1928                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1929                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1930                                 break;
1931                         case TYPE_LNG:
1932                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1933                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1934                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1935                                 break;
1936                         case TYPE_ADR:
1937                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1938                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1939                                 break;
1940                         case TYPE_FLT:
1941                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1942                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1943                                 break;
1944                         case TYPE_DBL:                          
1945                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1946                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1947                                 break;
1948                         }
1949                         emit_store(jd, iptr, iptr->dst, d);
1950                         break;
1951
1952                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1953                                       /* op1 = type, val.a = field address            */
1954
1955
1956                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1957                                 disp = dseg_addaddress(cd, NULL);
1958
1959                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1960                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1961
1962                                 if (opt_showdisassemble)
1963                                         M_NOP;
1964
1965                         } else {
1966                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1967
1968                                 disp = dseg_addaddress(cd, &(fi->value));
1969
1970                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1971                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1972
1973                                         if (opt_showdisassemble)
1974                                                 M_NOP;
1975                                 }
1976                         }
1977
1978                         M_ALD(REG_ITMP1, REG_PV, disp);
1979                         switch (iptr->op1) {
1980                         case TYPE_INT:
1981                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1982                                 M_IST_INTERN(s2, REG_ITMP1, 0);
1983                                 break;
1984                         case TYPE_LNG:
1985                                 s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1986                                 M_LST_INTERN(s2, REG_ITMP1, 0);
1987                                 break;
1988                         case TYPE_ADR:
1989                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1990                                 M_AST_INTERN(s2, REG_ITMP1, 0);
1991                                 break;
1992                         case TYPE_FLT:
1993                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1994                                 M_FST_INTERN(s2, REG_ITMP1, 0);
1995                                 break;
1996                         case TYPE_DBL:
1997                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1998                                 M_DST_INTERN(s2, REG_ITMP1, 0);
1999                                 break;
2000                         }
2001                         break;
2002
2003
2004                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2005                                       /* op1 = type, val.i = field offset             */
2006
2007                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2008                         gen_nullptr_check(s1);
2009
2010                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2011                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2012                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2013
2014                                 if (opt_showdisassemble)
2015                                         M_NOP;
2016
2017                                 disp = 0;
2018
2019                         } else {
2020                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2021                         }
2022
2023                         switch (iptr->op1) {
2024                         case TYPE_INT:
2025                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2026                                 M_ILD(d, s1, disp);
2027                                 break;
2028                         case TYPE_LNG:
2029                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
2030                                 if (GET_HIGH_REG(d) == s1) {
2031                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
2032                                         M_ILD(GET_HIGH_REG(d), s1, disp);
2033                                 } else {
2034                                         M_ILD(GET_HIGH_REG(d), s1, disp);
2035                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
2036                                 }
2037                                 break;
2038                         case TYPE_ADR:
2039                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2040                                 M_ALD(d, s1, disp);
2041                                 break;
2042                         case TYPE_FLT:
2043                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2044                                 M_FLD(d, s1, disp);
2045                                 break;
2046                         case TYPE_DBL:                          
2047                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2048                                 M_DLD(d, s1, disp);
2049                                 break;
2050                         }
2051                         emit_store(jd, iptr, iptr->dst, d);
2052                         break;
2053
2054                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2055                                       /* op1 = type, val.i = field offset             */
2056
2057                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2058                         gen_nullptr_check(s1);
2059
2060                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2061                                 if (IS_2_WORD_TYPE(iptr->op1)) {
2062                                         s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
2063                                 } else {
2064                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2065                                 }
2066                         } else {
2067                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2068                         }
2069
2070                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2071                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2072                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2073
2074                                 if (opt_showdisassemble)
2075                                         M_NOP;
2076
2077                                 disp = 0;
2078
2079                         } else {
2080                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2081                         }
2082
2083                         switch (iptr->op1) {
2084                         case TYPE_INT:
2085                                 M_IST(s2, s1, disp);
2086                                 break;
2087                         case TYPE_LNG:
2088                                 M_IST(GET_LOW_REG(s2), s1, disp + 4);      /* keep this order */
2089                                 M_IST(GET_HIGH_REG(s2), s1, disp);         /* keep this order */
2090                                 break;
2091                         case TYPE_ADR:
2092                                 M_AST(s2, s1, disp);
2093                                 break;
2094                         case TYPE_FLT:
2095                                 M_FST(s2, s1, disp);
2096                                 break;
2097                         case TYPE_DBL:
2098                                 M_DST(s2, s1, disp);
2099                                 break;
2100                         }
2101                         break;
2102
2103
2104                 /* branch operations **************************************************/
2105
2106                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2107
2108                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2109                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2110
2111 #ifdef ENABLE_VERIFIER
2112                         if (iptr->val.a) {
2113                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2114                                                                         (unresolved_class *) iptr->val.a, 0);
2115
2116                                 if (opt_showdisassemble)
2117                                         M_NOP;
2118                         }
2119 #endif /* ENABLE_VERIFIER */
2120
2121                         disp = dseg_addaddress(cd, asm_handle_exception);
2122                         M_ALD(REG_ITMP2, REG_PV, disp);
2123                         M_MTCTR(REG_ITMP2);
2124
2125                         if (code->isleafmethod)
2126                                 M_MFLR(REG_ITMP3);                          /* save LR        */
2127
2128                         M_BL(0);                                        /* get current PC */
2129                         M_MFLR(REG_ITMP2_XPC);
2130
2131                         if (code->isleafmethod)
2132                                 M_MTLR(REG_ITMP3);                          /* restore LR     */
2133
2134                         M_RTS;                                          /* jump to CTR    */
2135                         ALIGNCODENOP;
2136                         break;
2137
2138                 case ICMD_GOTO:         /* ... ==> ...                                */
2139                                         /* op1 = target JavaVM pc                     */
2140                         M_BR(0);
2141                         codegen_addreference(cd, (basicblock *) iptr->target);
2142                         ALIGNCODENOP;
2143                         break;
2144
2145                 case ICMD_JSR:          /* ... ==> ...                                */
2146                                         /* op1 = target JavaVM pc                     */
2147
2148                         if (code->isleafmethod)
2149                                 M_MFLR(REG_ITMP2);
2150
2151                         M_BL(0);
2152                         M_MFLR(REG_ITMP1);
2153                         M_IADD_IMM(REG_ITMP1, code->isleafmethod ? 4*4 : 3*4, REG_ITMP1);
2154
2155                         if (code->isleafmethod)
2156                                 M_MTLR(REG_ITMP2);
2157
2158                         M_BR(0);
2159                         codegen_addreference(cd, (basicblock *) iptr->target);
2160                         break;
2161                         
2162                 case ICMD_RET:          /* ... ==> ...                                */
2163                                         /* op1 = local variable                       */
2164
2165                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2166                         if (var->flags & INMEMORY) {
2167                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2168                                 M_MTCTR(REG_ITMP1);
2169                         } else {
2170                                 M_MTCTR(var->regoff);
2171                         }
2172                         M_RTS;
2173                         ALIGNCODENOP;
2174                         break;
2175
2176                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2177                                         /* op1 = target JavaVM pc                     */
2178
2179                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2180                         M_TST(s1);
2181                         M_BEQ(0);
2182                         codegen_addreference(cd, (basicblock *) iptr->target);
2183                         break;
2184
2185                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2186                                         /* op1 = target JavaVM pc                     */
2187
2188                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2189                         M_TST(s1);
2190                         M_BNE(0);
2191                         codegen_addreference(cd, (basicblock *) iptr->target);
2192                         break;
2193
2194                 case ICMD_IFLT:
2195                 case ICMD_IFLE:
2196                 case ICMD_IFNE:
2197                 case ICMD_IFGT:
2198                 case ICMD_IFGE:
2199                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2200                                         /* op1 = target JavaVM pc, val.i = constant   */
2201
2202                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2203                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767))
2204                                 M_CMPI(s1, iptr->val.i);
2205                         else {
2206                                 ICONST(REG_ITMP2, iptr->val.i);
2207                                 M_CMP(s1, REG_ITMP2);
2208                         }
2209                         switch (iptr->opc) {
2210                         case ICMD_IFLT:
2211                                 M_BLT(0);
2212                                 break;
2213                         case ICMD_IFLE:
2214                                 M_BLE(0);
2215                                 break;
2216                         case ICMD_IFNE:
2217                                 M_BNE(0);
2218                                 break;
2219                         case ICMD_IFGT:
2220                                 M_BGT(0);
2221                                 break;
2222                         case ICMD_IFGE:
2223                                 M_BGE(0);
2224                                 break;
2225                         case ICMD_IFEQ:
2226                                 M_BEQ(0);
2227                                 break;
2228                         }
2229                         codegen_addreference(cd, (basicblock *) iptr->target);
2230                         break;
2231
2232
2233                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2234                                         /* op1 = target JavaVM pc, val.l = constant   */
2235
2236                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2237                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2238                         if (iptr->val.l == 0) {
2239                                 M_OR_TST(s1, s2, REG_ITMP3);
2240                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2241                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2242                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2243                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2244                         } else {
2245                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2246                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2247                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2248                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2249                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2250                         }
2251                         M_BEQ(0);
2252                         codegen_addreference(cd, (basicblock *) iptr->target);
2253                         break;
2254                         
2255                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2256                                         /* op1 = target JavaVM pc, val.l = constant   */
2257                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2258                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2259                         if (iptr->val.l == 0) {
2260                                 /* if high word is less than zero, the whole long is too */
2261                                 M_CMPI(s2, 0);
2262                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2263                                 M_CMPI(s2, 0);
2264                                 M_BLT(0);
2265                                 codegen_addreference(cd, (basicblock *) iptr->target);
2266                                 M_BGT(2);
2267                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2268                         } else {
2269                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2270                                 M_CMP(s2, REG_ITMP3);
2271                                 M_BLT(0);
2272                                 codegen_addreference(cd, (basicblock *) iptr->target);
2273                                 M_BGT(3);
2274                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2275                                 M_CMPU(s1, REG_ITMP3);
2276                         }
2277                         M_BLT(0);
2278                         codegen_addreference(cd, (basicblock *) iptr->target);
2279                         break;
2280                         
2281                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2282                                         /* op1 = target JavaVM pc, val.l = constant   */
2283
2284                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2285                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2286 /*                      if (iptr->val.l == 0) { */
2287 /*                              M_OR(s1, s2, REG_ITMP3); */
2288 /*                              M_CMPI(REG_ITMP3, 0); */
2289
2290 /*                      } else  */
2291                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2292                                 M_CMPI(s2, 0);
2293                                 M_BLT(0);
2294                                 codegen_addreference(cd, (basicblock *) iptr->target);
2295                                 M_BGT(2);
2296                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2297                         } else {
2298                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2299                                 M_CMP(s2, REG_ITMP3);
2300                                 M_BLT(0);
2301                                 codegen_addreference(cd, (basicblock *) iptr->target);
2302                                 M_BGT(3);
2303                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2304                                 M_CMPU(s1, REG_ITMP3);
2305                         }
2306                         M_BLE(0);
2307                         codegen_addreference(cd, (basicblock *) iptr->target);
2308                         break;
2309                         
2310                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2311                                         /* op1 = target JavaVM pc, val.l = constant   */
2312
2313                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2314                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2315                         if (iptr->val.l == 0) {
2316                                 M_OR_TST(s1, s2, REG_ITMP3);
2317                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2318                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2319                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2320                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2321                         } else {
2322                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2323                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2324                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2325                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2326                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2327                         }
2328                         M_BNE(0);
2329                         codegen_addreference(cd, (basicblock *) iptr->target);
2330                         break;
2331                         
2332                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2333                                         /* op1 = target JavaVM pc, val.l = constant   */
2334
2335                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2336                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2337 /*                      if (iptr->val.l == 0) { */
2338 /*                              M_OR(s1, s2, REG_ITMP3); */
2339 /*                              M_CMPI(REG_ITMP3, 0); */
2340
2341 /*                      } else  */
2342                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2343                                 M_CMPI(s2, 0);
2344                                 M_BGT(0);
2345                                 codegen_addreference(cd, (basicblock *) iptr->target);
2346                                 M_BLT(2);
2347                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2348                         } else {
2349                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2350                                 M_CMP(s2, REG_ITMP3);
2351                                 M_BGT(0);
2352                                 codegen_addreference(cd, (basicblock *) iptr->target);
2353                                 M_BLT(3);
2354                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2355                                 M_CMPU(s1, REG_ITMP3);
2356                         }
2357                         M_BGT(0);
2358                         codegen_addreference(cd, (basicblock *) iptr->target);
2359                         break;
2360                         
2361                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2362                                         /* op1 = target JavaVM pc, val.l = constant   */
2363
2364                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2365                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2366                         if (iptr->val.l == 0) {
2367                                 /* if high word is greater equal zero, the whole long is too */
2368                                 M_CMPI(s2, 0);
2369                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2370                                 M_CMPI(s2, 0);
2371                                 M_BGT(0);
2372                                 codegen_addreference(cd, (basicblock *) iptr->target);
2373                                 M_BLT(2);
2374                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2375                         } else {
2376                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2377                                 M_CMP(s2, REG_ITMP3);
2378                                 M_BGT(0);
2379                                 codegen_addreference(cd, (basicblock *) iptr->target);
2380                                 M_BLT(3);
2381                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2382                                 M_CMPU(s1, REG_ITMP3);
2383                         }
2384                         M_BGE(0);
2385                         codegen_addreference(cd, (basicblock *) iptr->target);
2386                         break;
2387
2388                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2389                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
2390
2391                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2392                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2393                         M_CMP(s1, s2);
2394                         M_BEQ(0);
2395                         codegen_addreference(cd, (basicblock *) iptr->target);
2396                         break;
2397
2398                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2399                                         /* op1 = target JavaVM pc                     */
2400
2401                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2402                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2403                         M_CMP(s1, s2);
2404                         /* load low-bits before the branch, so we know the distance */
2405                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2406                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2407                         M_BNE(2);
2408                         M_CMP(s1, s2);
2409                         M_BEQ(0);
2410                         codegen_addreference(cd, (basicblock *) iptr->target);
2411                         break;
2412
2413                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2414                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
2415
2416                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2417                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2418                         M_CMP(s1, s2);
2419                         M_BNE(0);
2420                         codegen_addreference(cd, (basicblock *) iptr->target);
2421                         break;
2422
2423                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
2424                                         /* op1 = target JavaVM pc                     */
2425
2426                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2427                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2428                         M_CMP(s1, s2);
2429                         M_BNE(0);
2430                         codegen_addreference(cd, (basicblock *) iptr->target);
2431                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2432                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2433                         M_CMP(s1, s2);
2434                         M_BNE(0);
2435                         codegen_addreference(cd, (basicblock *) iptr->target);
2436                         break;
2437
2438                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2439                                         /* op1 = target JavaVM pc                     */
2440
2441                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2442                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2443                         M_CMP(s1, s2);
2444                         M_BLT(0);
2445                         codegen_addreference(cd, (basicblock *) iptr->target);
2446                         break;
2447
2448                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2449                                         /* op1 = target JavaVM pc                     */
2450
2451                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2452                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2453                         M_CMP(s1, s2);
2454                         M_BLT(0);
2455                         codegen_addreference(cd, (basicblock *) iptr->target);
2456                         /* load low-bits before the branch, so we know the distance */
2457                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2458                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2459                         M_BGT(2);
2460                         M_CMPU(s1, s2);
2461                         M_BLT(0);
2462                         codegen_addreference(cd, (basicblock *) iptr->target);
2463                         break;
2464
2465                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2466                                         /* op1 = target JavaVM pc                     */
2467
2468                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2469                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2470                         M_CMP(s1, s2);
2471                         M_BGT(0);
2472                         codegen_addreference(cd, (basicblock *) iptr->target);
2473                         break;
2474
2475                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2476                                         /* op1 = target JavaVM pc                     */
2477
2478                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2479                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2480                         M_CMP(s1, s2);
2481                         M_BGT(0);
2482                         codegen_addreference(cd, (basicblock *) iptr->target);
2483                         /* load low-bits before the branch, so we know the distance */  
2484                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2485                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2486                         M_BLT(2);
2487                         M_CMPU(s1, s2);
2488                         M_BGT(0);
2489                         codegen_addreference(cd, (basicblock *) iptr->target);
2490                         break;
2491
2492                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2493                                         /* op1 = target JavaVM pc                     */
2494
2495                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2496                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2497                         M_CMP(s1, s2);
2498                         M_BLE(0);
2499                         codegen_addreference(cd, (basicblock *) iptr->target);
2500                         break;
2501
2502                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2503                                         /* op1 = target JavaVM pc                     */
2504
2505                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2506                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2507                         M_CMP(s1, s2);
2508                         M_BLT(0);
2509                         codegen_addreference(cd, (basicblock *) iptr->target);
2510                         /* load low-bits before the branch, so we know the distance */
2511                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2512                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2513                         M_BGT(2);
2514                         M_CMPU(s1, s2);
2515                         M_BLE(0);
2516                         codegen_addreference(cd, (basicblock *) iptr->target);
2517                         break;
2518
2519                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2520                                         /* op1 = target JavaVM pc                     */
2521
2522                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2523                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2524                         M_CMP(s1, s2);
2525                         M_BGE(0);
2526                         codegen_addreference(cd, (basicblock *) iptr->target);
2527                         break;
2528
2529                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2530                                         /* op1 = target JavaVM pc                     */
2531
2532                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2533                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2534                         M_CMP(s1, s2);
2535                         M_BGT(0);
2536                         codegen_addreference(cd, (basicblock *) iptr->target);
2537                         /* load low-bits before the branch, so we know the distance */
2538                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2539                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2540                         M_BLT(2);
2541                         M_CMPU(s1, s2);
2542                         M_BGE(0);
2543                         codegen_addreference(cd, (basicblock *) iptr->target);
2544                         break;
2545
2546                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2547
2548                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2549                         M_INTMOVE(s1, REG_RESULT);
2550                         goto nowperformreturn;
2551
2552                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2553
2554                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2555                         M_INTMOVE(s1, REG_RESULT);
2556
2557 #ifdef ENABLE_VERIFIER
2558                         if (iptr->val.a) {
2559                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2560                                                                         (unresolved_class *) iptr->val.a, 0);
2561
2562                                 if (opt_showdisassemble)
2563                                         M_NOP;
2564                         }
2565 #endif /* ENABLE_VERIFIER */
2566                         goto nowperformreturn;
2567
2568                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2569
2570                         s1 = emit_load_s1(jd, iptr, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2571                         M_LNGMOVE(s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2572                         goto nowperformreturn;
2573
2574                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2575                 case ICMD_DRETURN:
2576
2577                         s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2578                         M_FLTMOVE(s1, REG_FRESULT);
2579                         goto nowperformreturn;
2580
2581                 case ICMD_RETURN:      /* ...  ==> ...                                */
2582
2583 nowperformreturn:
2584                         {
2585                         s4 i, p;
2586                         
2587                         p = stackframesize;
2588
2589                         /* call trace function */
2590
2591                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
2592                                 M_MFLR(REG_ZERO);
2593                                 M_LDA(REG_SP, REG_SP, -10 * 8);
2594                                 M_DST(REG_FRESULT, REG_SP, 48+0);
2595                                 M_IST(REG_RESULT, REG_SP, 48+8);
2596                                 M_AST(REG_ZERO, REG_SP, 48+12);
2597                                 M_IST(REG_RESULT2, REG_SP, 48+16);
2598
2599                                 /* keep this order */
2600                                 switch (iptr->opc) {
2601                                 case ICMD_IRETURN:
2602                                 case ICMD_ARETURN:
2603 #if defined(__DARWIN__)
2604                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2605                                         M_CLR(rd->argintregs[1]);
2606 #else
2607                                         M_MOV(REG_RESULT, rd->argintregs[3]);
2608                                         M_CLR(rd->argintregs[2]);
2609 #endif
2610                                         break;
2611
2612                                 case ICMD_LRETURN:
2613 #if defined(__DARWIN__)
2614                                         M_MOV(REG_RESULT2, rd->argintregs[2]);
2615                                         M_MOV(REG_RESULT, rd->argintregs[1]);
2616 #else
2617                                         M_MOV(REG_RESULT2, rd->argintregs[3]);
2618                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2619 #endif
2620                                         break;
2621                                 }
2622
2623                                 disp = dseg_addaddress(cd, m);
2624                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2625
2626                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2627                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2628                                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2629                                 M_ALD(REG_ITMP2, REG_PV, disp);
2630                                 M_MTCTR(REG_ITMP2);
2631                                 M_JSR;
2632
2633                                 M_DLD(REG_FRESULT, REG_SP, 48+0);
2634                                 M_ILD(REG_RESULT, REG_SP, 48+8);
2635                                 M_ALD(REG_ZERO, REG_SP, 48+12);
2636                                 M_ILD(REG_RESULT2, REG_SP, 48+16);
2637                                 M_LDA(REG_SP, REG_SP, 10 * 8);
2638                                 M_MTLR(REG_ZERO);
2639                         }
2640                         
2641 #if defined(ENABLE_THREADS)
2642                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2643                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2644                                 M_ALD(REG_ITMP3, REG_PV, disp);
2645                                 M_MTCTR(REG_ITMP3);
2646
2647                                 /* we need to save the proper return value */
2648
2649                                 switch (iptr->opc) {
2650                                 case ICMD_LRETURN:
2651                                         M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2652                                         /* fall through */
2653                                 case ICMD_IRETURN:
2654                                 case ICMD_ARETURN:
2655                                         M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2656                                         break;
2657                                 case ICMD_FRETURN:
2658                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2659                                         break;
2660                                 case ICMD_DRETURN:
2661                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2662                                         break;
2663                                 }
2664
2665                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2666                                 M_JSR;
2667
2668                                 /* and now restore the proper return value */
2669
2670                                 switch (iptr->opc) {
2671                                 case ICMD_LRETURN:
2672                                         M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2673                                         /* fall through */
2674                                 case ICMD_IRETURN:
2675                                 case ICMD_ARETURN:
2676                                         M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2677                                         break;
2678                                 case ICMD_FRETURN:
2679                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2680                                         break;
2681                                 case ICMD_DRETURN:
2682                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2683                                         break;
2684                                 }
2685                         }
2686 #endif
2687
2688                         /* restore return address                                         */
2689
2690                         if (!code->isleafmethod) {
2691                                 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
2692                                    may have a displacement overflow. */
2693
2694                                 M_ALD(REG_ITMP1, REG_SP, p * 4 + LA_LR_OFFSET);
2695                                 M_MTLR(REG_ITMP1);
2696                         }
2697
2698                         /* restore saved registers                                        */
2699
2700                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2701                                 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2702                         }
2703                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2704                                 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2705                         }
2706
2707                         /* deallocate stack                                               */
2708
2709                         if (stackframesize)
2710                                 M_LDA(REG_SP, REG_SP, stackframesize * 4);
2711
2712                         M_RET;
2713                         ALIGNCODENOP;
2714                         }
2715                         break;
2716
2717
2718                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2719                         {
2720                         s4 i, l, *s4ptr;
2721                         void **tptr;
2722
2723                         tptr = (void **) iptr->target;
2724
2725                         s4ptr = iptr->val.a;
2726                         l = s4ptr[1];                          /* low     */
2727                         i = s4ptr[2];                          /* high    */
2728                         
2729                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2730                         if (l == 0) {
2731                                 M_INTMOVE(s1, REG_ITMP1);
2732                         } else if (l <= 32768) {
2733                                 M_LDA(REG_ITMP1, s1, -l);
2734                         } else {
2735                                 ICONST(REG_ITMP2, l);
2736                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2737                         }
2738                         i = i - l + 1;
2739
2740                         /* range check */
2741
2742                         M_CMPUI(REG_ITMP1, i - 1);
2743                         M_BGT(0);
2744                         codegen_addreference(cd, (basicblock *) tptr[0]);
2745
2746                         /* build jump table top down and use address of lowest entry */
2747
2748                         /* s4ptr += 3 + i; */
2749                         tptr += i;
2750
2751                         while (--i >= 0) {
2752                                 dseg_addtarget(cd, (basicblock *) tptr[0]); 
2753                                 --tptr;
2754                         }
2755                         }
2756
2757                         /* length of dataseg after last dseg_addtarget is used by load */
2758
2759                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2760                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2761                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2762                         M_MTCTR(REG_ITMP2);
2763                         M_RTS;
2764                         ALIGNCODENOP;
2765                         break;
2766
2767
2768                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2769                         {
2770                         s4 i, l, val, *s4ptr;
2771                         void **tptr;
2772
2773                         tptr = (void **) iptr->target;
2774
2775                         s4ptr = iptr->val.a;
2776                         l = s4ptr[0];                          /* default  */
2777                         i = s4ptr[1];                          /* count    */
2778                         
2779                         MCODECHECK((i<<2)+8);
2780                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2781                         while (--i >= 0) {
2782                                 s4ptr += 2;
2783                                 ++tptr;
2784
2785                                 val = s4ptr[0];
2786                                 if ((val >= -32768) && (val <= 32767)) {
2787                                         M_CMPI(s1, val);
2788                                 } else {
2789                                         a = dseg_adds4(cd, val);
2790                                         M_ILD(REG_ITMP2, REG_PV, a);
2791                                         M_CMP(s1, REG_ITMP2);
2792                                 }
2793                                 M_BEQ(0);
2794                                 codegen_addreference(cd, (basicblock *) tptr[0]); 
2795                         }
2796
2797                         M_BR(0);
2798                         tptr = (void **) iptr->target;
2799                         codegen_addreference(cd, (basicblock *) tptr[0]);
2800
2801                         ALIGNCODENOP;
2802                         break;
2803                         }
2804
2805
2806                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2807                                         /* op1 = arg count val.a = builtintable entry */
2808
2809                         bte = iptr->val.a;
2810                         md = bte->md;
2811                         goto gen_method;
2812
2813                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2814                                         /* op1 = arg count, val.a = method pointer    */
2815
2816                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2817                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2818                 case ICMD_INVOKEINTERFACE:
2819
2820                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2821                                 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
2822                                 lm = NULL;
2823                         }
2824                         else {
2825                                 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
2826                                 md = lm->parseddesc;
2827                         }
2828
2829 gen_method:
2830                         s3 = md->paramcount;
2831
2832                         MCODECHECK((s3 << 1) + 64);
2833
2834                         /* copy arguments to registers or stack location */
2835
2836                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2837                                 if (src->varkind == ARGVAR)
2838                                         continue;
2839                                 if (IS_INT_LNG_TYPE(src->type)) {
2840                                         if (!md->params[s3].inmemory) {
2841                                                 if (IS_2_WORD_TYPE(src->type)) {
2842                                                         s1 = PACK_REGS(
2843                                                    rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2844                                                    rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2845                                                         d = emit_load_s1(jd, iptr, src, s1);
2846                                                         M_LNGMOVE(d, s1);
2847                                                 } else {
2848                                                         s1 = rd->argintregs[md->params[s3].regoff];
2849                                                         d = emit_load_s1(jd, iptr, src, s1);
2850                                                         M_INTMOVE(d, s1);
2851                                                 }
2852
2853                                         } else {
2854                                                 if (IS_2_WORD_TYPE(src->type)) {
2855                                                         d = emit_load_s1(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2856                                                         M_LST(d, REG_SP, md->params[s3].regoff * 4);
2857                                                 } else {
2858                                                         d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2859                                                         M_IST(d, REG_SP, md->params[s3].regoff * 4);
2860                                                 }
2861                                         }
2862                                                 
2863                                 } else {
2864                                         if (!md->params[s3].inmemory) {
2865                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2866                                                 d = emit_load_s1(jd, iptr, src, s1);
2867                                                 M_FLTMOVE(d, s1);
2868
2869                                         } else {
2870                                                 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
2871                                                 if (IS_2_WORD_TYPE(src->type))
2872                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2873                                                 else
2874                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2875                                         }
2876                                 }
2877                         } /* end of for */
2878
2879                         switch (iptr->opc) {
2880                         case ICMD_BUILTIN:
2881                                 disp = dseg_addaddress(cd, bte->fp);
2882                                 d = md->returntype.type;
2883
2884                                 M_ALD(REG_PV, REG_PV, disp);  /* pointer to built-in-function */
2885                                 M_MTCTR(REG_PV);
2886                                 M_JSR;
2887                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2888                                 M_MFLR(REG_ITMP1);
2889                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2890
2891                                 /* if op1 == true, we need to check for an exception */
2892
2893                                 if (iptr->op1 == true) {
2894                                         M_CMPI(REG_RESULT, 0);
2895                                         M_BEQ(0);
2896                                         codegen_add_fillinstacktrace_ref(cd);
2897                                 }
2898                                 break;
2899
2900                         case ICMD_INVOKESPECIAL:
2901                                 gen_nullptr_check(rd->argintregs[0]);
2902                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2903                                 /* fall through */
2904
2905                         case ICMD_INVOKESTATIC:
2906                                 if (lm == NULL) {
2907                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2908
2909                                         disp = dseg_addaddress(cd, NULL);
2910
2911                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2912                                                                                 um, disp);
2913
2914                                         if (opt_showdisassemble)
2915                                                 M_NOP;
2916
2917                                         d = md->returntype.type;
2918
2919                                 } else {
2920                                         disp = dseg_addaddress(cd, lm->stubroutine);
2921                                         d = md->returntype.type;
2922                                 }
2923
2924                                 M_ALD(REG_PV, REG_PV, disp);
2925                                 M_MTCTR(REG_PV);
2926                                 M_JSR;
2927                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2928                                 M_MFLR(REG_ITMP1);
2929                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2930                                 break;
2931
2932                         case ICMD_INVOKEVIRTUAL:
2933                                 gen_nullptr_check(rd->argintregs[0]);
2934
2935                                 if (lm == NULL) {
2936                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2937
2938                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2939
2940                                         if (opt_showdisassemble)
2941                                                 M_NOP;
2942
2943                                         s1 = 0;
2944                                         d = md->returntype.type;
2945
2946                                 } else {
2947                                         s1 = OFFSET(vftbl_t, table[0]) +
2948                                                 sizeof(methodptr) * lm->vftblindex;
2949                                         d = md->returntype.type;
2950                                 }
2951
2952                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2953                                           OFFSET(java_objectheader, vftbl));
2954                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2955                                 M_MTCTR(REG_PV);
2956                                 M_JSR;
2957                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2958                                 M_MFLR(REG_ITMP1);
2959                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2960                                 break;
2961
2962                         case ICMD_INVOKEINTERFACE:
2963                                 gen_nullptr_check(rd->argintregs[0]);
2964
2965                                 if (lm == NULL) {
2966                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2967
2968                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2969
2970                                         if (opt_showdisassemble)
2971                                                 M_NOP;
2972
2973                                         s1 = 0;
2974                                         s2 = 0;
2975                                         d = md->returntype.type;
2976
2977                                 } else {
2978                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2979                                                 sizeof(methodptr*) * lm->class->index;
2980
2981                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2982
2983                                         d = md->returntype.type;
2984                                 }
2985
2986                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2987                                           OFFSET(java_objectheader, vftbl));    
2988                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2989                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2990                                 M_MTCTR(REG_PV);
2991                                 M_JSR;
2992                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2993                                 M_MFLR(REG_ITMP1);
2994                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2995                                 break;
2996                         }
2997
2998                         /* d contains return type */
2999
3000                         if (d != TYPE_VOID) {
3001                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3002                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
3003                                                 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst,
3004                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT));
3005                                                 M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), s1);
3006                                         } else {
3007                                                 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3008                                                 M_INTMOVE(REG_RESULT, s1);
3009                                         }
3010                                 } else {
3011                                         s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
3012                                         M_FLTMOVE(REG_FRESULT, s1);
3013                                 }
3014                                 emit_store(jd, iptr, iptr->dst, s1);
3015                         }
3016                         break;
3017
3018
3019                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3020                                       /* op1:   0 == array, 1 == class                */
3021                                       /* val.a: (classinfo*) superclass               */
3022
3023                         /*  superclass is an interface:
3024                          *
3025                          *  OK if ((sub == NULL) ||
3026                          *         (sub->vftbl->interfacetablelength > super->index) &&
3027                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3028                          *
3029                          *  superclass is a class:
3030                          *
3031                          *  OK if ((sub == NULL) || (0
3032                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3033                          *         super->vftbl->diffvall));
3034                          */
3035
3036                         if (iptr->op1 == 1) {
3037                                 /* object type cast-check */
3038
3039                                 classinfo *super;
3040                                 vftbl_t   *supervftbl;
3041                                 s4         superindex;
3042
3043                                 super = (classinfo *) iptr->val.a;
3044
3045                                 if (!super) {
3046                                         superindex = 0;
3047                                         supervftbl = NULL;
3048
3049                                 } else {
3050                                         superindex = super->index;
3051                                         supervftbl = super->vftbl;
3052                                 }
3053                         
3054 #if defined(ENABLE_THREADS)
3055                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3056 #endif
3057                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3058
3059                                 /* calculate interface checkcast code size */
3060
3061                                 s2 = 7;
3062                                 if (!super)
3063                                         s2 += (opt_showdisassemble ? 1 : 0);
3064
3065                                 /* calculate class checkcast code size */
3066
3067                                 s3 = 8 + (s1 == REG_ITMP1);
3068                                 if (!super)
3069                                         s3 += (opt_showdisassemble ? 1 : 0);
3070
3071                                 /* if class is not resolved, check which code to call */
3072
3073                                 if (!super) {
3074                                         M_TST(s1);
3075                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3076
3077                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
3078
3079                                         codegen_addpatchref(cd,
3080                                                                                 PATCHER_checkcast_instanceof_flags,
3081                                                                                 (constant_classref *) iptr->target,
3082                                                                                 disp);
3083
3084                                         if (opt_showdisassemble)
3085                                                 M_NOP;
3086
3087                                         M_ILD(REG_ITMP2, REG_PV, disp);
3088                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
3089                                         M_BEQ(s2 + 1);
3090                                 }
3091
3092                                 /* interface checkcast code */
3093
3094                                 if (!super || (super->flags & ACC_INTERFACE)) {
3095                                         if (super) {
3096                                                 M_TST(s1);
3097                                                 M_BEQ(s2);
3098
3099                                         } else {
3100                                                 codegen_addpatchref(cd,
3101                                                                                         PATCHER_checkcast_instanceof_interface,
3102                                                                                         (constant_classref *) iptr->target,
3103                                                                                         0);
3104
3105                                                 if (opt_showdisassemble)
3106                                                         M_NOP;
3107                                         }
3108
3109                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3110                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3111                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3112                                         M_BLE(0);
3113                                         codegen_add_classcastexception_ref(cd);
3114                                         M_ALD(REG_ITMP3, REG_ITMP2,
3115                                                   OFFSET(vftbl_t, interfacetable[0]) -
3116                                                   superindex * sizeof(methodptr*));
3117                                         M_TST(REG_ITMP3);
3118                                         M_BEQ(0);
3119                                         codegen_add_classcastexception_ref(cd);
3120
3121                                         if (!super)
3122                                                 M_BR(s3);
3123                                 }
3124
3125                                 /* class checkcast code */
3126
3127                                 if (!super || !(super->flags & ACC_INTERFACE)) {
3128                                         disp = dseg_addaddress(cd, supervftbl);
3129
3130                                         if (super) {
3131                                                 M_TST(s1);
3132                                                 M_BEQ(s3);
3133
3134                                         } else {
3135                                                 codegen_addpatchref(cd, PATCHER_checkcast_class,
3136                                                                                         (constant_classref *) iptr->target,
3137                                                                                         disp);
3138
3139                                                 if (opt_showdisassemble)
3140                                                         M_NOP;
3141                                         }
3142
3143                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3144 #if defined(ENABLE_THREADS)
3145                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3146 #endif
3147                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3148                                         M_ALD(REG_ITMP2, REG_PV, disp);
3149                                         if (s1 != REG_ITMP1) {
3150                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
3151                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3152 #if defined(ENABLE_THREADS)
3153                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3154 #endif
3155                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
3156                                         } else {
3157                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3158                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3159                                                 M_ALD(REG_ITMP2, REG_PV, disp);
3160                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3161 #if defined(ENABLE_THREADS)
3162                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3163 #endif
3164                                         }
3165                                         M_CMPU(REG_ITMP3, REG_ITMP2);
3166                                         M_BGT(0);
3167                                         codegen_add_classcastexception_ref(cd);
3168                                 }
3169                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3170
3171                         } else {
3172                                 /* array type cast-check */
3173
3174                                 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3175                                 M_INTMOVE(s1, rd->argintregs[0]);
3176
3177                                 disp = dseg_addaddress(cd, iptr->val.a);
3178
3179                                 if (iptr->val.a == NULL) {
3180                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3181                                                                                 (constant_classref *) iptr->target,
3182                                                                                 disp);
3183
3184                                         if (opt_showdisassemble)
3185                                                 M_NOP;
3186                                 }
3187
3188                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3189                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3190                                 M_ALD(REG_ITMP2, REG_PV, disp);
3191                                 M_MTCTR(REG_ITMP2);
3192                                 M_JSR;
3193                                 M_TST(REG_RESULT);
3194                                 M_BEQ(0);
3195                                 codegen_add_classcastexception_ref(cd);
3196
3197                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3198                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3199                         }
3200                         M_INTMOVE(s1, d);
3201                         emit_store(jd, iptr, iptr->dst, d);
3202                         break;
3203
3204                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3205                                       /* val.a: (classinfo*) superclass               */
3206
3207                         /*  superclass is an interface:
3208                          *
3209                          *  return (sub != NULL) &&
3210                          *         (sub->vftbl->interfacetablelength > super->index) &&
3211                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3212                          *
3213                          *  superclass is a class:
3214                          *
3215                          *  return ((sub != NULL) && (0
3216                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3217                          *          super->vftbl->diffvall));
3218                          */
3219
3220                         {
3221                         classinfo *super;
3222                         vftbl_t   *supervftbl;
3223                         s4         superindex;
3224
3225                         super = (classinfo *) iptr->val.a;
3226
3227                         if (!super) {
3228                                 superindex = 0;
3229                                 supervftbl = NULL;
3230
3231                         } else {
3232                                 superindex = super->index;
3233                                 supervftbl = super->vftbl;
3234                         }
3235                         
3236 #if defined(ENABLE_THREADS)
3237             codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3238 #endif
3239                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3240                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3241                         if (s1 == d) {
3242                                 M_MOV(s1, REG_ITMP1);
3243                                 s1 = REG_ITMP1;
3244                         }
3245
3246                         /* calculate interface instanceof code size */
3247
3248                         s2 = 8;
3249                         if (!super)
3250                                 s2 += (opt_showdisassemble ? 1 : 0);
3251
3252                         /* calculate class instanceof code size */
3253
3254                         s3 = 10;
3255                         if (!super)
3256                                 s3 += (opt_showdisassemble ? 1 : 0);
3257
3258                         M_CLR(d);
3259
3260                         /* if class is not resolved, check which code to call */
3261
3262                         if (!super) {
3263                                 M_TST(s1);
3264                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3265
3266                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3267
3268                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3269                                                                         (constant_classref *) iptr->target, disp);
3270
3271                                 if (opt_showdisassemble)
3272                                         M_NOP;
3273
3274                                 M_ILD(REG_ITMP3, REG_PV, disp);
3275                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3276                                 M_BEQ(s2 + 1);
3277                         }
3278
3279                         /* interface instanceof code */
3280
3281                         if (!super || (super->flags & ACC_INTERFACE)) {
3282                                 if (super) {
3283                                         M_TST(s1);
3284                                         M_BEQ(s2);
3285
3286                                 } else {
3287                                         codegen_addpatchref(cd,
3288                                                                                 PATCHER_checkcast_instanceof_interface,
3289                                                                                 (constant_classref *) iptr->target, 0);
3290
3291                                         if (opt_showdisassemble)
3292                                                 M_NOP;
3293                                 }
3294
3295                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3296                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3297                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3298                                 M_BLE(4);
3299                                 M_ALD(REG_ITMP1, REG_ITMP1,
3300                                           OFFSET(vftbl_t, interfacetable[0]) -
3301                                           superindex * sizeof(methodptr*));
3302                                 M_TST(REG_ITMP1);
3303                                 M_BEQ(1);
3304                                 M_IADD_IMM(REG_ZERO, 1, d);
3305
3306                                 if (!super)
3307                                         M_BR(s3);
3308                         }
3309
3310                         /* class instanceof code */
3311
3312                         if (!super || !(super->flags & ACC_INTERFACE)) {
3313                                 disp = dseg_addaddress(cd, supervftbl);
3314
3315                                 if (super) {
3316                                         M_TST(s1);
3317                                         M_BEQ(s3);
3318
3319                                 } else {
3320                                         codegen_addpatchref(cd, PATCHER_instanceof_class,
3321                                                                                 (constant_classref *) iptr->target,
3322                                                                                 disp);
3323
3324                                         if (opt_showdisassemble) {
3325                                                 M_NOP;
3326                                         }
3327                                 }
3328
3329                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3330                                 M_ALD(REG_ITMP2, REG_PV, disp);
3331 #if defined(ENABLE_THREADS)
3332                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3333 #endif
3334                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3335                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3336                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3337 #if defined(ENABLE_THREADS)
3338                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3339 #endif
3340                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3341                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3342                                 M_CLR(d);
3343                                 M_BGT(1);
3344                                 M_IADD_IMM(REG_ZERO, 1, d);
3345                         }
3346                         emit_store(jd, iptr, iptr->dst, d);
3347                         }
3348                         break;
3349
3350                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3351                                       /* op1 = dimension, val.a = class               */
3352
3353                         /* check for negative sizes and copy sizes to stack if necessary  */
3354
3355                         MCODECHECK((iptr->op1 << 1) + 64);
3356
3357                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3358                                 /* copy SAVEDVAR sizes to stack */
3359
3360                                 if (src->varkind != ARGVAR) {
3361                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3362 #if defined(__DARWIN__)
3363                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3364 #else
3365                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3366 #endif
3367                                 }
3368                         }
3369
3370                         /* a0 = dimension count */
3371
3372                         ICONST(rd->argintregs[0], iptr->op1);
3373
3374                         /* is patcher function set? */
3375
3376                         if (iptr->val.a == NULL) {
3377                                 disp = dseg_addaddress(cd, NULL);
3378
3379                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3380                                                                         (constant_classref *) iptr->target, disp);
3381
3382                                 if (opt_showdisassemble)
3383                                         M_NOP;
3384
3385                         } else {
3386                                 disp = dseg_addaddress(cd, iptr->val.a);
3387                         }
3388
3389                         /* a1 = arraydescriptor */
3390
3391                         M_ALD(rd->argintregs[1], REG_PV, disp);
3392
3393                         /* a2 = pointer to dimensions = stack pointer */
3394
3395 #if defined(__DARWIN__)
3396                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3397 #else
3398                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3399 #endif
3400
3401                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3402                         M_ALD(REG_ITMP3, REG_PV, disp);
3403                         M_MTCTR(REG_ITMP3);
3404                         M_JSR;
3405
3406                         /* check for exception before result assignment */
3407
3408                         M_CMPI(REG_RESULT, 0);
3409                         M_BEQ(0);
3410                         codegen_add_fillinstacktrace_ref(cd);
3411
3412                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3413                         M_INTMOVE(REG_RESULT, d);
3414                         emit_store(jd, iptr, iptr->dst, d);
3415                         break;
3416
3417                 default:
3418                         *exceptionptr =
3419                                 new_internalerror("Unknown ICMD %d during code generation",
3420                                                                   iptr->opc);
3421                         return false;
3422         } /* switch */
3423                 
3424         } /* for instruction */
3425                 
3426         /* copy values to interface registers */
3427
3428         src = bptr->outstack;
3429         len = bptr->outdepth;
3430         MCODECHECK(64 + len);
3431 #if defined(ENABLE_LSRA)
3432         if (!opt_lsra)
3433 #endif
3434         while (src) {
3435                 len--;
3436                 if ((src->varkind != STACKVAR)) {
3437                         s2 = src->type;
3438                         if (IS_FLT_DBL_TYPE(s2)) {
3439                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
3440                                 if (!(rd->interfaces[len][s2].flags & INMEMORY))
3441                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3442                                 else
3443                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3444
3445                         } else {
3446                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3447                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3448                                         if (IS_2_WORD_TYPE(s2))
3449                                                 M_LNGMOVE(s1, rd->interfaces[len][s2].regoff);
3450                                         else
3451                                                 M_INTMOVE(s1, rd->interfaces[len][s2].regoff);
3452
3453                                 } else {
3454                                         if (IS_2_WORD_TYPE(s2))
3455                                                 M_LST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3456                                         else
3457                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3458                                 }
3459                         }
3460                 }
3461                 src = src->prev;
3462         }
3463         } /* if (bptr -> flags >= BBREACHED) */
3464         } /* for basic block */
3465
3466         dseg_createlinenumbertable(cd);
3467
3468
3469         /* generate exception and patcher stubs */
3470
3471         {
3472                 exceptionref *eref;
3473                 patchref     *pref;
3474                 u4            mcode;
3475                 u1           *savedmcodeptr;
3476                 u1           *tmpmcodeptr;
3477
3478                 savedmcodeptr = NULL;
3479
3480                 /* generate exception stubs */
3481
3482                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3483                         gen_resolvebranch(cd->mcodebase + eref->branchpos, 
3484                                                           eref->branchpos, cd->mcodeptr - cd->mcodebase);
3485
3486                         MCODECHECK(100);
3487
3488                         /* Check if the exception is an
3489                            ArrayIndexOutOfBoundsException.  If so, move index register
3490                            into REG_ITMP1. */
3491
3492                         if (eref->reg != -1)
3493                                 M_MOV(eref->reg, REG_ITMP1);
3494
3495                         /* calcuate exception address */
3496
3497                         M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
3498
3499                         /* move function to call into REG_ITMP3 */
3500
3501                         disp = dseg_addaddress(cd, eref->function);
3502                         M_ALD(REG_ITMP3, REG_PV, disp);
3503
3504                         if (savedmcodeptr != NULL) {
3505                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3506                                 M_BR(disp);
3507
3508                         } else {
3509                                 savedmcodeptr = cd->mcodeptr;
3510
3511                                 if (code->isleafmethod) {
3512                                         M_MFLR(REG_ZERO);
3513                                         M_AST(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3514                                 }
3515
3516                                 M_MOV(REG_PV, rd->argintregs[0]);
3517                                 M_MOV(REG_SP, rd->argintregs[1]);
3518
3519                                 if (code->isleafmethod)
3520                                         M_MOV(REG_ZERO, rd->argintregs[2]);
3521                                 else
3522                                         M_ALD(rd->argintregs[2],
3523                                                   REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3524
3525                                 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3526                                 M_MOV(REG_ITMP1, rd->argintregs[4]);
3527
3528                                 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3529                                 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3530
3531                                 M_MTCTR(REG_ITMP3);
3532                                 M_JSR;
3533                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3534
3535                                 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3536                                 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3537
3538                                 if (code->isleafmethod) {
3539                                         /* XXX FIXME: REG_ZERO can cause problems here! */
3540                                         assert(stackframesize * 4 <= 32767);
3541
3542                                         M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3543                                         M_MTLR(REG_ZERO);
3544                                 }
3545
3546                                 disp = dseg_addaddress(cd, asm_handle_exception);
3547                                 M_ALD(REG_ITMP3, REG_PV, disp);
3548                                 M_MTCTR(REG_ITMP3);
3549                                 M_RTS;
3550                         }
3551                 }
3552
3553
3554                 /* generate code patching stub call code */
3555
3556                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3557                         /* check code segment size */
3558
3559                         MCODECHECK(16);
3560
3561                         /* Get machine code which is patched back in later. The
3562                            call is 1 instruction word long. */
3563
3564                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3565
3566                         mcode = *((u4 *) tmpmcodeptr);
3567
3568                         /* Patch in the call to call the following code (done at
3569                            compile time). */
3570
3571                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3572                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3573
3574                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3575                         M_BR(disp);
3576
3577                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3578
3579                         /* create stack frame - keep stack 16-byte aligned */
3580
3581                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3582
3583                         /* calculate return address and move it onto the stack */
3584
3585                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3586                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3587
3588                         /* move pointer to java_objectheader onto stack */
3589
3590 #if defined(ENABLE_THREADS)
3591                         /* order reversed because of data segment layout */
3592
3593                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3594                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3595                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3596
3597                         M_LDA(REG_ITMP3, REG_PV, disp);
3598                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3599 #else
3600                         /* do nothing */
3601 #endif
3602
3603                         /* move machine code onto stack */
3604
3605                         disp = dseg_adds4(cd, mcode);
3606                         M_ILD(REG_ITMP3, REG_PV, disp);
3607                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3608
3609                         /* move class/method/field reference onto stack */
3610
3611                         disp = dseg_addaddress(cd, pref->ref);
3612                         M_ALD(REG_ITMP3, REG_PV, disp);
3613                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3614
3615                         /* move data segment displacement onto stack */
3616
3617                         disp = dseg_addaddress(cd, pref->disp);
3618                         M_ILD(REG_ITMP3, REG_PV, disp);
3619                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3620
3621                         /* move patcher function pointer onto stack */
3622
3623                         disp = dseg_addaddress(cd, pref->patcher);
3624                         M_ALD(REG_ITMP3, REG_PV, disp);
3625                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3626
3627                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
3628                         M_ALD(REG_ITMP3, REG_PV, disp);
3629                         M_MTCTR(REG_ITMP3);
3630                         M_RTS;
3631                 }
3632
3633                 /* generate replacement-out stubs */
3634
3635                 {
3636                         int i;
3637
3638                         replacementpoint = jd->code->rplpoints;
3639
3640                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3641                                 /* check code segment size */
3642
3643                                 MCODECHECK(100);
3644
3645                                 /* note start of stub code */
3646
3647                                 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
3648
3649                                 /* make machine code for patching */
3650
3651                                 tmpmcodeptr  = cd->mcodeptr;
3652                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
3653
3654                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3655                                 M_BR(disp);
3656
3657                                 cd->mcodeptr = tmpmcodeptr;
3658
3659                                 /* create stack frame - keep 16-byte aligned */
3660
3661                                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
3662
3663                                 /* push address of `rplpoint` struct */
3664
3665                                 disp = dseg_addaddress(cd, replacementpoint);
3666                                 M_ALD(REG_ITMP3, REG_PV, disp);
3667                                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3668
3669                                 /* jump to replacement function */
3670
3671                                 disp = dseg_addaddress(cd, asm_replacement_out);
3672                                 M_ALD(REG_ITMP3, REG_PV, disp);
3673                                 M_MTCTR(REG_ITMP3);
3674                                 M_RTS;
3675                         }
3676                 }
3677         }
3678
3679         codegen_finish(jd);
3680
3681         /* everything's ok */
3682
3683         return true;
3684 }
3685
3686
3687 /* createcompilerstub **********************************************************
3688
3689    Creates a stub routine which calls the compiler.
3690         
3691 *******************************************************************************/
3692
3693 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
3694 #define COMPILERSTUB_CODESIZE    4 * 4
3695
3696 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3697
3698
3699 u1 *createcompilerstub(methodinfo *m)
3700 {
3701         u1          *s;                     /* memory to hold the stub            */
3702         ptrint      *d;
3703         codeinfo    *code;
3704         codegendata *cd;
3705         s4           dumpsize;
3706
3707         s = CNEW(u1, COMPILERSTUB_SIZE);
3708
3709         /* set data pointer and code pointer */
3710
3711         d = (ptrint *) s;
3712         s = s + COMPILERSTUB_DATASIZE;
3713
3714         /* mark start of dump memory area */
3715
3716         dumpsize = dump_size();
3717
3718         cd = DNEW(codegendata);
3719         cd->mcodeptr = s;
3720
3721         /* Store the codeinfo pointer in the same place as in the
3722            methodheader for compiled methods. */
3723
3724         code = code_codeinfo_new(m);
3725
3726         d[0] = (ptrint) asm_call_jit_compiler;
3727         d[1] = (ptrint) m;
3728         d[2] = (ptrint) code;
3729
3730         M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
3731         M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
3732         M_MTCTR(REG_PV);
3733         M_RTS;
3734
3735         md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
3736
3737 #if defined(ENABLE_STATISTICS)
3738         if (opt_stat)
3739                 count_cstub_len += COMPILERSTUB_SIZE;
3740 #endif
3741
3742         /* release dump area */
3743
3744         dump_release(dumpsize);
3745
3746         return s;
3747 }
3748
3749
3750 /* createnativestub ************************************************************
3751
3752    Creates a stub routine which calls a native method.
3753
3754 *******************************************************************************/
3755
3756 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3757 {
3758         methodinfo   *m;
3759         codeinfo     *code;
3760         codegendata  *cd;
3761         registerdata *rd;
3762         s4            stackframesize;       /* size of stackframe if needed       */
3763         methoddesc   *md;
3764         s4            nativeparams;
3765         s4            i, j;                 /* count variables                    */
3766         s4            t;
3767         s4            s1, s2, disp;
3768         s4            funcdisp;
3769
3770         /* get required compiler data */
3771
3772         m    = jd->m;
3773         code = jd->code;
3774         cd   = jd->cd;
3775         rd   = jd->rd;
3776
3777         /* set some variables */
3778
3779         md = m->parseddesc;
3780         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3781
3782         /* calculate stackframe size */
3783
3784         stackframesize =
3785                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3786                 sizeof(localref_table) / SIZEOF_VOID_P +
3787                 4 +                             /* 4 stackframeinfo arguments (darwin)*/
3788                 nmd->paramcount * 2 +           /* assume all arguments are doubles   */
3789                 nmd->memuse;
3790
3791         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3792
3793         /* create method header */
3794
3795         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3796         (void) dseg_adds4(cd, stackframesize * 4);             /* FrameSize       */
3797         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3798         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3799         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3800         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3801         (void) dseg_addlinenumbertablesize(cd);
3802         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3803
3804         /* generate code */
3805
3806         M_MFLR(REG_ZERO);
3807         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3808         M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3809
3810         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3811                 /* parent_argbase == stackframesize * 4 */
3812                 codegen_trace_args(jd, stackframesize * 4 , true);
3813
3814         /* get function address (this must happen before the stackframeinfo) */
3815
3816         funcdisp = dseg_addaddress(cd, f);
3817
3818 #if !defined(WITH_STATIC_CLASSPATH)
3819         if (f == NULL) {
3820                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3821
3822                 if (opt_showdisassemble)
3823                         M_NOP;
3824         }
3825 #endif
3826
3827         /* save integer and float argument registers */
3828
3829         j = 0;
3830
3831         for (i = 0; i < md->paramcount; i++) {
3832                 t = md->paramtypes[i].type;
3833
3834                 if (IS_INT_LNG_TYPE(t)) {
3835                         if (!md->params[i].inmemory) {
3836                                 s1 = md->params[i].regoff;
3837                                 if (IS_2_WORD_TYPE(t)) {
3838                                         M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3839                                         j++;
3840                                         M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3841                                 } else {
3842                                         M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3843                                 }
3844                                 j++;
3845                         }
3846                 }
3847         }
3848
3849         for (i = 0; i < md->paramcount; i++) {
3850                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3851                         if (!md->params[i].inmemory) {
3852                                 s1 = md->params[i].regoff;
3853                                 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3854                                 j++;
3855                         }
3856                 }
3857         }
3858
3859         /* create native stack info */
3860
3861         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3862         M_MOV(REG_PV, rd->argintregs[1]);
3863         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3864         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3865         disp = dseg_addaddress(cd, codegen_start_native_call);
3866         M_ALD(REG_ITMP1, REG_PV, disp);
3867         M_MTCTR(REG_ITMP1);
3868         M_JSR;
3869
3870         /* restore integer and float argument registers */
3871
3872         j = 0;
3873
3874         for (i = 0; i < md->paramcount; i++) {
3875                 t = md->paramtypes[i].type;
3876
3877                 if (IS_INT_LNG_TYPE(t)) {
3878                         if (!md->params[i].inmemory) {
3879                                 s1 = md->params[i].regoff;
3880
3881                                 if (IS_2_WORD_TYPE(t)) {
3882                                         M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3883                                         j++;
3884                                         M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3885                                 } else {
3886                                         M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3887                                 }
3888                                 j++;
3889                         }
3890                 }
3891         }
3892
3893         for (i = 0; i < md->paramcount; i++) {
3894                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3895                         if (!md->params[i].inmemory) {
3896                                 s1 = md->params[i].regoff;
3897                                 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3898                                 j++;
3899                         }
3900                 }
3901         }
3902         
3903         /* copy or spill arguments to new locations */
3904
3905         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3906                 t = md->paramtypes[i].type;
3907
3908                 if (IS_INT_LNG_TYPE(t)) {
3909                         if (!md->params[i].inmemory) {
3910                                 if (IS_2_WORD_TYPE(t))
3911                                         s1 = PACK_REGS(
3912                                                 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3913                                             rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3914                                 else
3915                                         s1 = rd->argintregs[md->params[i].regoff];
3916
3917                                 if (!nmd->params[j].inmemory) {
3918                                         if (IS_2_WORD_TYPE(t)) {
3919                                                 s2 = PACK_REGS(
3920                                                    rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3921                                                    rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3922                                                 M_LNGMOVE(s1, s2);
3923                                         } else {
3924                                                 s2 = rd->argintregs[nmd->params[j].regoff];
3925                                                 M_INTMOVE(s1, s2);
3926                                         }
3927
3928                                 } else {
3929                                         s2 = nmd->params[j].regoff;
3930                                         if (IS_2_WORD_TYPE(t))
3931                                                 M_LST(s1, REG_SP, s2 * 4);
3932                                         else
3933                                                 M_IST(s1, REG_SP, s2 * 4);
3934                                 }
3935
3936                         } else {
3937                                 s1 = md->params[i].regoff + stackframesize;
3938                                 s2 = nmd->params[j].regoff;
3939
3940                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3941                                 if (IS_2_WORD_TYPE(t))
3942                                         M_ILD(REG_ITMP2, REG_SP, s1 * 4 + 4);
3943
3944                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3945                                 if (IS_2_WORD_TYPE(t))
3946                                         M_IST(REG_ITMP2, REG_SP, s2 * 4 + 4);
3947                         }
3948
3949                 } else {
3950                         /* We only copy spilled float arguments, as the float
3951                            argument registers keep unchanged. */
3952
3953                         if (md->params[i].inmemory) {
3954                                 s1 = md->params[i].regoff + stackframesize;
3955                                 s2 = nmd->params[j].regoff;
3956
3957                                 if (IS_2_WORD_TYPE(t)) {
3958                                         M_DLD(REG_FTMP1, REG_SP, s1 * 4);
3959                                         M_DST(REG_FTMP1, REG_SP, s2 * 4);
3960
3961                                 } else {
3962                                         M_FLD(REG_FTMP1, REG_SP, s1 * 4);
3963                                         M_FST(REG_FTMP1, REG_SP, s2 * 4);
3964                                 }
3965                         }
3966                 }
3967         }
3968
3969         /* put class into second argument register */
3970
3971         if (m->flags & ACC_STATIC) {
3972                 disp = dseg_addaddress(cd, m->class);
3973                 M_ALD(rd->argintregs[1], REG_PV, disp);
3974         }
3975
3976         /* put env into first argument register */
3977
3978         disp = dseg_addaddress(cd, _Jv_env);
3979         M_ALD(rd->argintregs[0], REG_PV, disp);
3980
3981         /* generate the actual native call */
3982
3983         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3984         M_MTCTR(REG_ITMP3);
3985         M_JSR;
3986
3987         /* save return value */
3988
3989         if (md->returntype.type != TYPE_VOID) {
3990                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3991                         if (IS_2_WORD_TYPE(md->returntype.type))
3992                                 M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
3993                         M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
3994                 }
3995                 else {
3996                         if (IS_2_WORD_TYPE(md->returntype.type))
3997                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3998                         else
3999                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4000                 }
4001         }
4002
4003         /* print call trace */
4004
4005         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
4006                  /* just restore the value we need, don't care about the other */
4007
4008                 if (md->returntype.type != TYPE_VOID) {
4009                         if (IS_INT_LNG_TYPE(md->returntype.type)) {
4010                                 if (IS_2_WORD_TYPE(md->returntype.type))
4011                                         M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4012                                 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4013                         }
4014                         else {
4015                                 if (IS_2_WORD_TYPE(md->returntype.type))
4016                                         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4017                                 else
4018                                         M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4019                         }
4020                 }
4021
4022                 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
4023
4024                 /* keep this order */
4025                 switch (md->returntype.type) {
4026                 case TYPE_INT:
4027                 case TYPE_ADR:
4028 #if defined(__DARWIN__)
4029                         M_MOV(REG_RESULT, rd->argintregs[2]);
4030                         M_CLR(rd->argintregs[1]);
4031 #else
4032                         M_MOV(REG_RESULT, rd->argintregs[3]);
4033                         M_CLR(rd->argintregs[2]);
4034 #endif
4035                         break;
4036
4037                 case TYPE_LNG:
4038 #if defined(__DARWIN__)
4039                         M_MOV(REG_RESULT2, rd->argintregs[2]);
4040                         M_MOV(REG_RESULT, rd->argintregs[1]);
4041 #else
4042                         M_MOV(REG_RESULT2, rd->argintregs[3]);
4043                         M_MOV(REG_RESULT, rd->argintregs[2]);
4044 #endif
4045                         break;
4046                 }
4047
4048                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
4049                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
4050                 disp = dseg_addaddress(cd, m);
4051                 M_ALD(rd->argintregs[0], REG_PV, disp);
4052
4053                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4054                 M_ALD(REG_ITMP2, REG_PV, disp);
4055                 M_MTCTR(REG_ITMP2);
4056                 M_JSR;
4057
4058                 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4059         }
4060
4061         /* remove native stackframe info */
4062
4063         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
4064         disp = dseg_addaddress(cd, codegen_finish_native_call);
4065         M_ALD(REG_ITMP1, REG_PV, disp);
4066         M_MTCTR(REG_ITMP1);
4067         M_JSR;
4068         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4069
4070         /* restore return value */
4071
4072         if (md->returntype.type != TYPE_VOID) {
4073                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4074                         if (IS_2_WORD_TYPE(md->returntype.type))
4075                                 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4076                         M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4077                 }
4078                 else {
4079                         if (IS_2_WORD_TYPE(md->returntype.type))
4080                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4081                         else
4082                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4083                 }
4084         }
4085
4086         M_ALD(REG_ITMP2_XPC, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
4087         M_MTLR(REG_ITMP2_XPC);
4088         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4089
4090         /* check for exception */
4091
4092         M_TST(REG_ITMP1_XPTR);
4093         M_BNE(1);                           /* if no exception then return        */
4094
4095         M_RET;
4096
4097         /* handle exception */
4098
4099         M_IADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC);  /* exception address       */
4100
4101         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4102         M_ALD(REG_ITMP3, REG_PV, disp);
4103         M_MTCTR(REG_ITMP3);
4104         M_RTS;
4105
4106         /* generate patcher stub call code */
4107
4108         {
4109                 patchref *pref;
4110                 u4        mcode;
4111                 u1       *savedmcodeptr;
4112                 u1       *tmpmcodeptr;
4113
4114                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4115                         /* Get machine code which is patched back in later. The
4116                            call is 1 instruction word long. */
4117
4118                         tmpmcodeptr = cd->mcodebase + pref->branchpos;
4119
4120                         mcode = *((u4 *) tmpmcodeptr);
4121
4122                         /* Patch in the call to call the following code (done at
4123                            compile time). */
4124
4125                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
4126                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
4127
4128                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
4129                         M_BL(disp);
4130
4131                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
4132
4133                         /* create stack frame - keep stack 16-byte aligned */
4134
4135                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4136
4137                         /* move return address onto stack */
4138
4139                         M_MFLR(REG_ZERO);
4140                         M_AST(REG_ZERO, REG_SP, 5 * 4);
4141
4142                         /* move pointer to java_objectheader onto stack */
4143
4144 #if defined(ENABLE_THREADS)
4145                         /* order reversed because of data segment layout */
4146
4147                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
4148                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
4149                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
4150
4151                         M_LDA(REG_ITMP3, REG_PV, disp);
4152                         M_AST(REG_ITMP3, REG_SP, 4 * 4);
4153 #else
4154                         /* do nothing */
4155 #endif
4156
4157                         /* move machine code onto stack */
4158
4159                         disp = dseg_adds4(cd, mcode);
4160                         M_ILD(REG_ITMP3, REG_PV, disp);
4161                         M_IST(REG_ITMP3, REG_SP, 3 * 4);
4162
4163                         /* move class/method/field reference onto stack */
4164
4165                         disp = dseg_addaddress(cd, pref->ref);
4166                         M_ALD(REG_ITMP3, REG_PV, disp);
4167                         M_AST(REG_ITMP3, REG_SP, 2 * 4);
4168
4169                         /* move data segment displacement onto stack */
4170
4171                         disp = dseg_addaddress(cd, pref->disp);
4172                         M_ILD(REG_ITMP3, REG_PV, disp);
4173                         M_IST(REG_ITMP3, REG_SP, 1 * 4);
4174
4175                         /* move patcher function pointer onto stack */
4176
4177                         disp = dseg_addaddress(cd, pref->patcher);
4178                         M_ALD(REG_ITMP3, REG_PV, disp);
4179                         M_AST(REG_ITMP3, REG_SP, 0 * 4);
4180
4181                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4182                         M_ALD(REG_ITMP3, REG_PV, disp);
4183                         M_MTCTR(REG_ITMP3);
4184                         M_RTS;
4185                 }
4186         }
4187
4188         codegen_finish(jd);
4189
4190         return jd->code->entrypoint;
4191 }
4192
4193
4194 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub)
4195 {
4196         methodinfo   *m;
4197         codegendata  *cd;
4198         registerdata *rd;
4199         s4 s1, p, t, d;
4200         int stack_off;
4201         int stack_size;
4202         methoddesc *md;
4203
4204         /* get required compiler data */
4205
4206         m  = jd->m;
4207         cd = jd->cd;
4208         rd = jd->rd;
4209
4210         md = m->parseddesc;
4211         
4212         if (!nativestub)
4213                 M_MFLR(REG_ITMP3);
4214         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4215         /* For Darwin:                                                        */
4216         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
4217         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
4218         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
4219         /* For Linux:                                                         */
4220         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
4221         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4222         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
4223         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
4224         
4225         /* in nativestubs no Place to save the LR (Link Register) would be needed */
4226         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
4227         /* be padded again */
4228
4229 #if defined(__DARWIN__)
4230         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4231 #else
4232         stack_size = 6 * 16;
4233 #endif
4234         M_LDA(REG_SP, REG_SP, -stack_size);
4235
4236         /* Save LR */
4237         if (!nativestub)
4238                 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4239
4240         M_CLR(REG_ITMP1);    /* clear help register */
4241
4242         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4243 #if defined(__DARWIN__)
4244         /* Copy Params starting from first to Stack                          */
4245         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */ 
4246         /* are saved                                                         */
4247         p = 0;
4248 #else
4249         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
4250         /* integer argument regs                                             */
4251         /* all integer argument registers have to be saved                   */
4252         for (p = 0; p < 8; p++) {
4253                 d = rd->argintregs[p];
4254                 /* save integer argument registers */
4255                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4256         }
4257         p = 4;
4258 #endif
4259         stack_off = LA_SIZE;
4260         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4261                 t = md->paramtypes[p].type;
4262                 if (IS_INT_LNG_TYPE(t)) {
4263                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4264                                 if (IS_2_WORD_TYPE(t)) {
4265                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4266                                                   , REG_SP, stack_off);
4267                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4268                                                   , REG_SP, stack_off + 4);
4269                                 } else {
4270                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4271                                         M_IST(rd->argintregs[md->params[p].regoff]
4272                                                   , REG_SP, stack_off + 4);
4273                                 }
4274                         } else { /* Param on Stack */
4275                                 s1 = (md->params[p].regoff + stackframesize) * 4 
4276                                         + stack_size;
4277                                 if (IS_2_WORD_TYPE(t)) {
4278                                         M_ILD(REG_ITMP2, REG_SP, s1);
4279                                         M_IST(REG_ITMP2, REG_SP, stack_off);
4280                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4281                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4282                                 } else {
4283                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4284                                         M_ILD(REG_ITMP2, REG_SP, s1);
4285                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4286                                 }
4287                         }
4288                 } else { /* IS_FLT_DBL_TYPE(t) */
4289                         if (!md->params[p].inmemory) { /* in Arg Reg */
4290                                 s1 = rd->argfltregs[md->params[p].regoff];
4291                                 if (!IS_2_WORD_TYPE(t)) {
4292                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4293                                         M_FST(s1, REG_SP, stack_off + 4);
4294                                 } else {
4295                                         M_DST(s1, REG_SP, stack_off);
4296                                 }
4297                         } else { /* on Stack */
4298                                 /* this should not happen */
4299                         }
4300                 }
4301         }
4302
4303         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4304 #if defined(__DARWIN__)
4305         for (p = 0; p < 8; p++) {
4306                 d = rd->argintregs[p];
4307                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4308         }
4309 #else
4310         /* LINUX */
4311         /* Set integer and float argument registers vor trace_args call */
4312         /* offset to saved integer argument registers                   */
4313         stack_off = LA_SIZE + 4 * 8 + 4;
4314         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4315                 t = md->paramtypes[p].type;
4316                 if (IS_INT_LNG_TYPE(t)) {
4317                         /* "stretch" int types */
4318                         if (!IS_2_WORD_TYPE(t)) {
4319                                 M_CLR(rd->argintregs[2 * p]);
4320                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4321                                 stack_off += 4;
4322                         } else {
4323                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4324                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4325                                 stack_off += 8;
4326                         }
4327                 } else { /* Float/Dbl */
4328                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4329                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
4330                                 /* float/double arg reg to int reg                    */
4331                                 s1 = rd->argfltregs[md->params[p].regoff];
4332                                 if (!IS_2_WORD_TYPE(t)) {
4333                                         M_FST(s1, REG_SP, 5 * 16);
4334                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4335                                         M_CLR(rd->argintregs[2 * p]);
4336                                 } else {
4337                                         M_DST(s1, REG_SP, 5 * 16);
4338                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
4339                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4340                                 }
4341                         }
4342                 }
4343         }
4344 #endif
4345
4346         /* put methodinfo pointer on Stackframe */
4347         p = dseg_addaddress(cd, m);
4348         M_ALD(REG_ITMP1, REG_PV, p);
4349 #if defined(__DARWIN__)
4350         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8); 
4351 #else
4352         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4353 #endif
4354         p = dseg_addaddress(cd, builtin_trace_args);
4355         M_ALD(REG_ITMP2, REG_PV, p);
4356         M_MTCTR(REG_ITMP2);
4357         M_JSR;
4358
4359 #if defined(__DARWIN__)
4360         /* restore integer argument registers from the reserved stack space */
4361
4362         stack_off = LA_SIZE;
4363         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; 
4364                  p++, stack_off += 8) {
4365                 t = md->paramtypes[p].type;
4366
4367                 if (IS_INT_LNG_TYPE(t)) {
4368                         if (!md->params[p].inmemory) {
4369                                 if (IS_2_WORD_TYPE(t)) {
4370                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4371                                                   , REG_SP, stack_off);
4372                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4373                                                   , REG_SP, stack_off + 4);
4374                                 } else {
4375                                         M_ILD(rd->argintregs[md->params[p].regoff]
4376                                                   , REG_SP, stack_off + 4);
4377                                 }
4378                         }
4379                 }
4380         }
4381 #else
4382         /* LINUX */
4383         for (p = 0; p < 8; p++) {
4384                 d = rd->argintregs[p];
4385                 /* save integer argument registers */
4386                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4387         }
4388 #endif
4389
4390         if (!nativestub)
4391                 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4392
4393         M_LDA(REG_SP, REG_SP, stack_size);
4394
4395         if (!nativestub)
4396                 M_MTLR(REG_ITMP3);
4397 }
4398
4399
4400 /*
4401  * These are local overrides for various environment variables in Emacs.
4402  * Please do not remove this and leave it at the end of the file, where
4403  * Emacs will automagically detect them.
4404  * ---------------------------------------------------------------------
4405  * Local variables:
4406  * mode: c
4407  * indent-tabs-mode: t
4408  * c-basic-offset: 4
4409  * tab-width: 4
4410  * End:
4411  * vim:noexpandtab:sw=4:ts=4:
4412  */