1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Andreas Krall
30 Changes: Christian Thalinger
34 $Id: codegen.c 5079 2006-07-06 11:36:01Z twisti $
49 #include "vm/jit/powerpc/arch.h"
50 #include "vm/jit/powerpc/codegen.h"
52 #include "mm/memory.h"
53 #include "native/native.h"
54 #include "vm/builtin.h"
55 #include "vm/exceptions.h"
56 #include "vm/global.h"
57 #include "vm/loader.h"
58 #include "vm/options.h"
59 #include "vm/stringlocal.h"
61 #include "vm/jit/asmpart.h"
62 #include "vm/jit/codegen-common.h"
63 #include "vm/jit/dseg.h"
64 #include "vm/jit/emit.h"
65 #include "vm/jit/jit.h"
66 #include "vm/jit/methodheader.h"
67 #include "vm/jit/parse.h"
68 #include "vm/jit/patcher.h"
69 #include "vm/jit/reg.h"
70 #include "vm/jit/replace.h"
72 #if defined(ENABLE_LSRA)
73 # include "vm/jit/allocator/lsra.h"
77 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub);
79 /* codegen *********************************************************************
81 Generates machine code.
83 *******************************************************************************/
85 bool codegen(jitdata *jd)
91 s4 len, s1, s2, s3, d, disp;
100 methodinfo *lm; /* local methodinfo for ICMD_INVOKE* */
101 builtintable_entry *bte;
103 rplpoint *replacementpoint;
105 /* get required compiler data */
112 /* prevent compiler warnings */
124 /* space to save used callee saved registers */
126 savedregs_num += (INT_SAV_CNT - rd->savintreguse);
127 savedregs_num += (FLT_SAV_CNT - rd->savfltreguse) * 2;
129 stackframesize = rd->memuse + savedregs_num;
131 #if defined(ENABLE_THREADS)
132 /* space to save argument of monitor_enter and Return Values to survive */
133 /* monitor_exit. The stack position for the argument can not be shared */
134 /* with place to save the return register on PPC, since both values */
136 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
137 /* reserve 2 slots for long/double return values for monitorexit */
139 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
147 /* create method header */
149 /* align stack to 16-bytes */
151 /* if (!code->isleafmethod || opt_verbosecall) */
152 stackframesize = (stackframesize + 3) & ~3;
154 /* else if (code->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
155 /* stackframesize = 0; */
157 (void) dseg_addaddress(cd, code); /* CodeinfoPointer */
158 (void) dseg_adds4(cd, stackframesize * 4); /* FrameSize */
160 #if defined(ENABLE_THREADS)
161 /* IsSync contains the offset relative to the stack pointer for the
162 argument of monitor_exit used in the exception handler. Since the
163 offset could be zero and give a wrong meaning of the flag it is
167 if (checksync && (m->flags & ACC_SYNCHRONIZED))
168 (void) dseg_adds4(cd, (rd->memuse + 1) * 4); /* IsSync */
171 (void) dseg_adds4(cd, 0); /* IsSync */
173 (void) dseg_adds4(cd, code->isleafmethod); /* IsLeaf */
174 (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
175 (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
177 dseg_addlinenumbertablesize(cd);
179 (void) dseg_adds4(cd, cd->exceptiontablelength); /* ExTableSize */
181 /* create exception table */
183 for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
184 dseg_addtarget(cd, ex->start);
185 dseg_addtarget(cd, ex->end);
186 dseg_addtarget(cd, ex->handler);
187 (void) dseg_addaddress(cd, ex->catchtype.cls);
190 /* generate method profiling code */
192 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
193 /* count frequency */
195 M_ALD(REG_ITMP1, REG_PV, CodeinfoPointer);
196 M_ALD(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
197 M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
198 M_AST(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
200 /* PROFILE_CYCLE_START; */
203 /* create stack frame (if necessary) */
205 if (!code->isleafmethod) {
207 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
211 M_STWU(REG_SP, REG_SP, -stackframesize * 4);
213 /* save return address and used callee saved registers */
216 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
217 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
219 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
220 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
223 /* take arguments out of register or stack frame */
227 for (p = 0, l = 0; p < md->paramcount; p++) {
228 t = md->paramtypes[p].type;
229 var = &(rd->locals[l][t]);
231 if (IS_2_WORD_TYPE(t)) /* increment local counter for 2 word types */
235 s1 = md->params[p].regoff;
236 if (IS_INT_LNG_TYPE(t)) { /* integer args */
237 if (IS_2_WORD_TYPE(t))
238 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
239 rd->argintregs[GET_HIGH_REG(s1)]);
241 s2 = rd->argintregs[s1];
242 if (!md->params[p].inmemory) { /* register arguments */
243 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
244 if (IS_2_WORD_TYPE(t))
245 M_LNGMOVE(s2, var->regoff);
247 M_INTMOVE(s2, var->regoff);
249 } else { /* reg arg -> spilled */
250 if (IS_2_WORD_TYPE(t))
251 M_LST(s2, REG_SP, var->regoff * 4);
253 M_IST(s2, REG_SP, var->regoff * 4);
256 } else { /* stack arguments */
257 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
258 if (IS_2_WORD_TYPE(t))
259 M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
261 M_ILD(var->regoff, REG_SP, (stackframesize + s1) * 4);
263 } else { /* stack arg -> spilled */
265 M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4);
266 M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
267 if (IS_2_WORD_TYPE(t)) {
268 M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4 +4);
269 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
272 /* Reuse Memory Position on Caller Stack */
273 var->regoff = stackframesize + s1;
278 } else { /* floating args */
279 if (!md->params[p].inmemory) { /* register arguments */
280 s2 = rd->argfltregs[s1];
281 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
282 M_FLTMOVE(s2, var->regoff);
284 } else { /* reg arg -> spilled */
285 if (IS_2_WORD_TYPE(t))
286 M_DST(s2, REG_SP, var->regoff * 4);
288 M_FST(s2, REG_SP, var->regoff * 4);
291 } else { /* stack arguments */
292 if (!(var->flags & INMEMORY)) { /* stack-arg -> register */
293 if (IS_2_WORD_TYPE(t))
294 M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
297 M_FLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
299 } else { /* stack-arg -> spilled */
301 if (IS_2_WORD_TYPE(t)) {
302 M_DLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
303 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
304 var->regoff = stackframesize + s1;
307 M_FLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
308 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
311 /* Reuse Memory Position on Caller Stack */
312 var->regoff = stackframesize + s1;
319 /* save monitorenter argument */
321 #if defined(ENABLE_THREADS)
322 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
323 p = dseg_addaddress(cd, BUILTIN_monitorenter);
324 M_ALD(REG_ITMP3, REG_PV, p);
327 /* get or test the lock object */
329 if (m->flags & ACC_STATIC) {
330 p = dseg_addaddress(cd, &m->class->object.header);
331 M_ALD(rd->argintregs[0], REG_PV, p);
334 M_TST(rd->argintregs[0]);
336 codegen_add_nullpointerexception_ref(cd);
339 M_AST(rd->argintregs[0], REG_SP, rd->memuse * 4);
344 /* call trace function */
346 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
347 codegen_trace_args(jd, stackframesize, false);
350 /* end of header generation */
352 replacementpoint = code->rplpoints;
354 /* walk through all basic blocks */
356 for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
358 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
360 if (bptr->flags >= BBREACHED) {
362 /* branch resolving */
366 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
367 gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
373 /* handle replacement points */
375 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
376 replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
381 /* generate basicblock profiling code */
383 if (JITDATA_HAS_FLAG_INSTRUMENT(jd) && 0) {
384 /* count frequency */
386 disp = dseg_addaddress(cd, code->bbfrequency);
387 M_ALD(REG_ITMP2, REG_PV, disp);
388 M_ALD(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
389 M_IADD_IMM(REG_ITMP3, 1, REG_ITMP3);
390 M_AST(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
392 /* if this is an exception handler, start profiling again */
394 /* if (bptr->type == BBTYPE_EXH) */
395 /* PROFILE_CYCLE_START; */
398 /* copy interface registers to their destination */
404 #if defined(ENABLE_LSRA)
406 while (src != NULL) {
408 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
409 /* d = reg_of_var(m, src, REG_ITMP1); */
410 if (!(src->flags & INMEMORY))
414 M_INTMOVE(REG_ITMP1, d);
415 emit_store(jd, NULL, src, d);
421 while (src != NULL) {
423 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
424 d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
425 M_INTMOVE(REG_ITMP1, d);
426 emit_store(jd, NULL, src, d);
429 if (src->type == TYPE_LNG)
430 d = codegen_reg_of_var(rd, 0, src, REG_ITMP12_PACKED);
432 d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
433 if ((src->varkind != STACKVAR)) {
435 if (IS_FLT_DBL_TYPE(s2)) {
436 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
437 s1 = rd->interfaces[len][s2].regoff;
441 if (IS_2_WORD_TYPE(s2)) {
443 rd->interfaces[len][s2].regoff * 4);
447 rd->interfaces[len][s2].regoff * 4);
450 emit_store(jd, NULL, src, d);
453 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
454 s1 = rd->interfaces[len][s2].regoff;
455 if (IS_2_WORD_TYPE(s2))
461 if (IS_2_WORD_TYPE(s2))
463 rd->interfaces[len][s2].regoff * 4);
466 rd->interfaces[len][s2].regoff * 4);
468 emit_store(jd, NULL, src, d);
475 #if defined(ENABLE_LSRA)
478 /* walk through all instructions */
484 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
485 if (iptr->line != currentline) {
486 dseg_addlinenumber(cd, iptr->line);
487 currentline = iptr->line;
490 MCODECHECK(64); /* an instruction usually needs < 64 words */
493 case ICMD_NOP: /* ... ==> ... */
494 case ICMD_INLINE_START:
495 case ICMD_INLINE_END:
498 case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
500 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
503 codegen_add_nullpointerexception_ref(cd);
506 /* constant operations ************************************************/
508 case ICMD_ICONST: /* ... ==> ..., constant */
509 /* op1 = 0, val.i = constant */
511 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
512 ICONST(d, iptr->val.i);
513 emit_store(jd, iptr, iptr->dst, d);
516 case ICMD_LCONST: /* ... ==> ..., constant */
517 /* op1 = 0, val.l = constant */
519 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
520 LCONST(d, iptr->val.l);
521 emit_store(jd, iptr, iptr->dst, d);
524 case ICMD_FCONST: /* ... ==> ..., constant */
525 /* op1 = 0, val.f = constant */
527 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
528 a = dseg_addfloat(cd, iptr->val.f);
530 emit_store(jd, iptr, iptr->dst, d);
533 case ICMD_DCONST: /* ... ==> ..., constant */
534 /* op1 = 0, val.d = constant */
536 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
537 a = dseg_adddouble(cd, iptr->val.d);
539 emit_store(jd, iptr, iptr->dst, d);
542 case ICMD_ACONST: /* ... ==> ..., constant */
543 /* op1 = 0, val.a = constant */
545 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
546 disp = dseg_addaddress(cd, iptr->val.a);
548 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
549 codegen_addpatchref(cd, PATCHER_aconst,
550 ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
553 if (opt_showdisassemble)
557 M_ALD(d, REG_PV, disp);
558 emit_store(jd, iptr, iptr->dst, d);
562 /* load/store operations **********************************************/
564 case ICMD_ILOAD: /* ... ==> ..., content of local variable */
565 case ICMD_ALOAD: /* op1 = local variable */
567 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
568 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
569 if ((iptr->dst->varkind == LOCALVAR) &&
570 (iptr->dst->varnum == iptr->op1))
572 if (var->flags & INMEMORY)
573 M_ILD(d, REG_SP, var->regoff * 4);
575 M_INTMOVE(var->regoff, d);
576 emit_store(jd, iptr, iptr->dst, d);
579 case ICMD_LLOAD: /* ... ==> ..., content of local variable */
580 /* op1 = local variable */
582 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
583 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
584 if ((iptr->dst->varkind == LOCALVAR) &&
585 (iptr->dst->varnum == iptr->op1))
587 if (var->flags & INMEMORY)
588 M_LLD(d, REG_SP, var->regoff * 4);
590 M_LNGMOVE(var->regoff, d);
591 emit_store(jd, iptr, iptr->dst, d);
594 case ICMD_FLOAD: /* ... ==> ..., content of local variable */
595 /* op1 = local variable */
597 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
598 if ((iptr->dst->varkind == LOCALVAR) &&
599 (iptr->dst->varnum == iptr->op1))
601 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
602 if (var->flags & INMEMORY)
603 M_FLD(d, REG_SP, var->regoff * 4);
605 M_FLTMOVE(var->regoff, d);
606 emit_store(jd, iptr, iptr->dst, d);
609 case ICMD_DLOAD: /* ... ==> ..., content of local variable */
610 /* op1 = local variable */
612 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
613 if ((iptr->dst->varkind == LOCALVAR) &&
614 (iptr->dst->varnum == iptr->op1))
616 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
617 if (var->flags & INMEMORY)
618 M_DLD(d, REG_SP, var->regoff * 4);
620 M_FLTMOVE(var->regoff, d);
621 emit_store(jd, iptr, iptr->dst, d);
625 case ICMD_ISTORE: /* ..., value ==> ... */
626 case ICMD_ASTORE: /* op1 = local variable */
628 if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
630 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
631 if (var->flags & INMEMORY) {
632 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
633 M_IST(s1, REG_SP, var->regoff * 4);
635 s1 = emit_load_s1(jd, iptr, src, var->regoff);
636 M_INTMOVE(s1, var->regoff);
640 case ICMD_LSTORE: /* ..., value ==> ... */
641 /* op1 = local variable */
643 if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
645 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
646 if (var->flags & INMEMORY) {
647 s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
648 M_LST(s1, REG_SP, var->regoff * 4);
650 s1 = emit_load_s1(jd, iptr, src, var->regoff);
651 M_LNGMOVE(s1, var->regoff);
655 case ICMD_FSTORE: /* ..., value ==> ... */
656 /* op1 = local variable */
658 if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
660 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
661 if (var->flags & INMEMORY) {
662 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
663 M_FST(s1, REG_SP, var->regoff * 4);
665 s1 = emit_load_s1(jd, iptr, src, var->regoff);
666 M_FLTMOVE(s1, var->regoff);
670 case ICMD_DSTORE: /* ..., value ==> ... */
671 /* op1 = local variable */
673 if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
675 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
676 if (var->flags & INMEMORY) {
677 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
678 M_DST(s1, REG_SP, var->regoff * 4);
680 s1 = emit_load_s1(jd, iptr, src, var->regoff);
681 M_FLTMOVE(s1, var->regoff);
686 /* pop/dup/swap operations ********************************************/
688 /* attention: double and longs are only one entry in CACAO ICMDs */
690 case ICMD_POP: /* ..., value ==> ... */
691 case ICMD_POP2: /* ..., value, value ==> ... */
694 case ICMD_DUP: /* ..., a ==> ..., a, a */
695 M_COPY(src, iptr->dst);
698 case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */
700 M_COPY(src, iptr->dst);
701 M_COPY(src->prev, iptr->dst->prev);
702 M_COPY(iptr->dst, iptr->dst->prev->prev);
705 case ICMD_DUP_X2: /* ..., a, b, c ==> ..., c, a, b, c */
707 M_COPY(src, iptr->dst);
708 M_COPY(src->prev, iptr->dst->prev);
709 M_COPY(src->prev->prev, iptr->dst->prev->prev);
710 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
713 case ICMD_DUP2: /* ..., a, b ==> ..., a, b, a, b */
715 M_COPY(src, iptr->dst);
716 M_COPY(src->prev, iptr->dst->prev);
719 case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */
721 M_COPY(src, iptr->dst);
722 M_COPY(src->prev, iptr->dst->prev);
723 M_COPY(src->prev->prev, iptr->dst->prev->prev);
724 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
725 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
728 case ICMD_DUP2_X2: /* ..., a, b, c, d ==> ..., c, d, a, b, c, d */
730 M_COPY(src, iptr->dst);
731 M_COPY(src->prev, iptr->dst->prev);
732 M_COPY(src->prev->prev, iptr->dst->prev->prev);
733 M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
734 M_COPY(iptr->dst, iptr->dst->prev->prev->prev->prev);
735 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev->prev);
738 case ICMD_SWAP: /* ..., a, b ==> ..., b, a */
740 M_COPY(src, iptr->dst->prev);
741 M_COPY(src->prev, iptr->dst);
745 /* integer operations *************************************************/
747 case ICMD_INEG: /* ..., value ==> ..., - value */
749 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
750 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
752 emit_store(jd, iptr, iptr->dst, d);
755 case ICMD_LNEG: /* ..., value ==> ..., - value */
757 s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
758 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
759 M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
760 M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
761 emit_store(jd, iptr, iptr->dst, d);
764 case ICMD_I2L: /* ..., value ==> ..., value */
766 s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
767 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
768 M_INTMOVE(s1, GET_LOW_REG(d));
769 M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
770 emit_store(jd, iptr, iptr->dst, d);
773 case ICMD_L2I: /* ..., value ==> ..., value */
775 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP2);
776 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
778 emit_store(jd, iptr, iptr->dst, d);
781 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
783 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
784 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
786 emit_store(jd, iptr, iptr->dst, d);
789 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
791 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
792 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
794 emit_store(jd, iptr, iptr->dst, d);
797 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
799 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
800 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
802 emit_store(jd, iptr, iptr->dst, d);
806 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
808 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
809 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
810 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
812 emit_store(jd, iptr, iptr->dst, d);
815 case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
816 /* val.i = constant */
818 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
819 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
820 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
821 M_IADD_IMM(s1, iptr->val.i, d);
823 ICONST(REG_ITMP2, iptr->val.i);
824 M_IADD(s1, REG_ITMP2, d);
826 emit_store(jd, iptr, iptr->dst, d);
829 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
831 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
832 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
833 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
834 M_ADDC(s1, s2, GET_LOW_REG(d));
835 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
836 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3); /* don't use REG_ITMP2 */
837 M_ADDE(s1, s2, GET_HIGH_REG(d));
838 emit_store(jd, iptr, iptr->dst, d);
841 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
842 /* val.l = constant */
844 s3 = iptr->val.l & 0xffffffff;
845 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
846 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
847 if ((s3 >= -32768) && (s3 <= 32767)) {
848 M_ADDIC(s1, s3, GET_LOW_REG(d));
850 ICONST(REG_ITMP2, s3);
851 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
853 s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
854 s3 = iptr->val.l >> 32;
856 M_ADDME(s1, GET_HIGH_REG(d));
857 } else if (s3 == 0) {
858 M_ADDZE(s1, GET_HIGH_REG(d));
860 ICONST(REG_ITMP3, s3); /* don't use REG_ITMP2 */
861 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
863 emit_store(jd, iptr, iptr->dst, d);
866 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
868 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
869 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
870 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
872 emit_store(jd, iptr, iptr->dst, d);
875 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
876 /* val.i = constant */
878 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
879 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
880 if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
881 M_IADD_IMM(s1, -iptr->val.i, d);
883 ICONST(REG_ITMP2, -iptr->val.i);
884 M_IADD(s1, REG_ITMP2, d);
886 emit_store(jd, iptr, iptr->dst, d);
889 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
891 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
892 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
893 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
894 M_SUBC(s1, s2, GET_LOW_REG(d));
895 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
896 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3); /* don't use REG_ITMP2 */
897 M_SUBE(s1, s2, GET_HIGH_REG(d));
898 emit_store(jd, iptr, iptr->dst, d);
901 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
902 /* val.l = constant */
904 s3 = (-iptr->val.l) & 0xffffffff;
905 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
906 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
907 if ((s3 >= -32768) && (s3 <= 32767)) {
908 M_ADDIC(s1, s3, GET_LOW_REG(d));
910 ICONST(REG_ITMP2, s3);
911 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
913 s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
914 s3 = (-iptr->val.l) >> 32;
916 M_ADDME(s1, GET_HIGH_REG(d));
918 M_ADDZE(s1, GET_HIGH_REG(d));
920 ICONST(REG_ITMP3, s3); /* don't use REG_ITMP2 */
921 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
923 emit_store(jd, iptr, iptr->dst, d);
926 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
928 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
929 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
930 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
933 codegen_add_arithmeticexception_ref(cd);
934 M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
935 M_CMP(REG_ITMP3, s1);
936 M_BNE(3 + (s1 != d));
938 M_BNE(1 + (s1 != d));
942 emit_store(jd, iptr, iptr->dst, d);
945 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
947 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
948 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
949 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
952 codegen_add_arithmeticexception_ref(cd);
953 M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
954 M_CMP(REG_ITMP3, s1);
960 M_IDIV(s1, s2, REG_ITMP3);
961 M_IMUL(REG_ITMP3, s2, REG_ITMP3);
962 M_ISUB(s1, REG_ITMP3, d);
963 emit_store(jd, iptr, iptr->dst, d);
966 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
967 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
972 s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
973 M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
975 codegen_add_arithmeticexception_ref(cd);
977 disp = dseg_addaddress(cd, bte->fp);
978 M_ALD(REG_ITMP3, REG_PV, disp);
981 s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
982 rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
985 s1 = emit_load_s1(jd, iptr, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
986 s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
987 rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
992 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
993 M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), d);
994 emit_store(jd, iptr, iptr->dst, d);
997 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
999 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1000 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1001 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1003 emit_store(jd, iptr, iptr->dst, d);
1006 case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
1007 /* val.i = constant */
1009 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1010 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1011 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
1012 M_IMUL_IMM(s1, iptr->val.i, d);
1014 ICONST(REG_ITMP3, iptr->val.i);
1015 M_IMUL(s1, REG_ITMP3, d);
1017 emit_store(jd, iptr, iptr->dst, d);
1020 case ICMD_IDIVPOW2: /* ..., value ==> ..., value << constant */
1022 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1023 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1024 M_SRA_IMM(s1, iptr->val.i, d);
1026 emit_store(jd, iptr, iptr->dst, d);
1029 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
1031 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1032 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1033 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1034 M_AND_IMM(s2, 0x1f, REG_ITMP3);
1035 M_SLL(s1, REG_ITMP3, d);
1036 emit_store(jd, iptr, iptr->dst, d);
1039 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
1040 /* val.i = constant */
1042 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1043 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1044 M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1045 emit_store(jd, iptr, iptr->dst, d);
1048 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
1050 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1051 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1052 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1053 M_AND_IMM(s2, 0x1f, REG_ITMP3);
1054 M_SRA(s1, REG_ITMP3, d);
1055 emit_store(jd, iptr, iptr->dst, d);
1058 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
1059 /* val.i = constant */
1061 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1062 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1063 M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1064 emit_store(jd, iptr, iptr->dst, d);
1067 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
1069 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1070 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1071 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1072 M_AND_IMM(s2, 0x1f, REG_ITMP2);
1073 M_SRL(s1, REG_ITMP2, d);
1074 emit_store(jd, iptr, iptr->dst, d);
1077 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
1078 /* val.i = constant */
1080 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1081 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1082 if (iptr->val.i & 0x1f) {
1083 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1087 emit_store(jd, iptr, iptr->dst, d);
1090 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
1092 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1093 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1094 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1096 emit_store(jd, iptr, iptr->dst, d);
1099 case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
1100 /* val.i = constant */
1102 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1103 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1104 if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1105 M_AND_IMM(s1, iptr->val.i, d);
1108 else if (iptr->val.i == 0xffffff) {
1109 M_RLWINM(s1, 0, 8, 31, d);
1113 ICONST(REG_ITMP3, iptr->val.i);
1114 M_AND(s1, REG_ITMP3, d);
1116 emit_store(jd, iptr, iptr->dst, d);
1119 case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
1121 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1122 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1123 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1124 M_AND(s1, s2, GET_LOW_REG(d));
1125 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1126 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3); /* don't use REG_ITMP2 */
1127 M_AND(s1, s2, GET_HIGH_REG(d));
1128 emit_store(jd, iptr, iptr->dst, d);
1131 case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
1132 /* val.l = constant */
1134 s3 = iptr->val.l & 0xffffffff;
1135 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1136 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1137 if ((s3 >= 0) && (s3 <= 65535)) {
1138 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1140 ICONST(REG_ITMP3, s3);
1141 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1143 s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1144 s3 = iptr->val.l >> 32;
1145 if ((s3 >= 0) && (s3 <= 65535)) {
1146 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1148 ICONST(REG_ITMP3, s3); /* don't use REG_ITMP2 */
1149 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1151 emit_store(jd, iptr, iptr->dst, d);
1154 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
1155 /* val.i = constant */
1157 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1158 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1159 M_MOV(s1, REG_ITMP2);
1161 M_BGE(1 + 2*(iptr->val.i >= 32768));
1162 if (iptr->val.i >= 32768) {
1163 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1164 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1165 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1167 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1170 int b=0, m = iptr->val.i;
1173 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1175 M_ISUB(s1, REG_ITMP2, d);
1176 emit_store(jd, iptr, iptr->dst, d);
1179 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1181 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1182 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1183 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1185 emit_store(jd, iptr, iptr->dst, d);
1188 case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
1189 /* val.i = constant */
1191 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1192 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1193 if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1194 M_OR_IMM(s1, iptr->val.i, d);
1196 ICONST(REG_ITMP3, iptr->val.i);
1197 M_OR(s1, REG_ITMP3, d);
1199 emit_store(jd, iptr, iptr->dst, d);
1202 case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1204 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1205 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1206 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1207 M_OR(s1, s2, GET_LOW_REG(d));
1208 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1209 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3); /* don't use REG_ITMP2 */
1210 M_OR(s1, s2, GET_HIGH_REG(d));
1211 emit_store(jd, iptr, iptr->dst, d);
1214 case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
1215 /* val.l = constant */
1217 s3 = iptr->val.l & 0xffffffff;
1218 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1219 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1220 if ((s3 >= 0) && (s3 <= 65535)) {
1221 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1223 ICONST(REG_ITMP3, s3);
1224 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1226 s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1227 s3 = iptr->val.l >> 32;
1228 if ((s3 >= 0) && (s3 <= 65535)) {
1229 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1231 ICONST(REG_ITMP3, s3); /* don't use REG_ITMP2 */
1232 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1234 emit_store(jd, iptr, iptr->dst, d);
1237 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1239 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1240 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1241 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1243 emit_store(jd, iptr, iptr->dst, d);
1246 case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
1247 /* val.i = constant */
1249 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1250 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1251 if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1252 M_XOR_IMM(s1, iptr->val.i, d);
1254 ICONST(REG_ITMP3, iptr->val.i);
1255 M_XOR(s1, REG_ITMP3, d);
1257 emit_store(jd, iptr, iptr->dst, d);
1260 case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1262 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1263 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1264 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1265 M_XOR(s1, s2, GET_LOW_REG(d));
1266 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1267 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3); /* don't use REG_ITMP2 */
1268 M_XOR(s1, s2, GET_HIGH_REG(d));
1269 emit_store(jd, iptr, iptr->dst, d);
1272 case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
1273 /* val.l = constant */
1275 s3 = iptr->val.l & 0xffffffff;
1276 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1277 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1278 if ((s3 >= 0) && (s3 <= 65535)) {
1279 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1281 ICONST(REG_ITMP3, s3);
1282 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1284 s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1285 s3 = iptr->val.l >> 32;
1286 if ((s3 >= 0) && (s3 <= 65535)) {
1287 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1289 ICONST(REG_ITMP3, s3); /* don't use REG_ITMP2 */
1290 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1292 emit_store(jd, iptr, iptr->dst, d);
1295 case ICMD_LCMP: /* ..., val1, val2 ==> ..., val1 cmp val2 */
1296 /*******************************************************************
1297 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1298 *******************************************************************/
1299 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP3);
1300 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
1301 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1303 int tempreg = false;
1307 if (src->prev->flags & INMEMORY) {
1308 tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1310 tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1311 || (d == GET_LOW_REG(src->prev->regoff));
1313 if (src->flags & INMEMORY) {
1314 tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1316 tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1317 || (d == GET_LOW_REG(src->regoff));
1320 dreg = tempreg ? REG_ITMP1 : d;
1321 M_IADD_IMM(REG_ZERO, 1, dreg);
1326 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP3);
1327 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1331 M_IADD_IMM(dreg, -1, dreg);
1332 M_IADD_IMM(dreg, -1, dreg);
1333 gen_resolvebranch(br1, br1, cd->mcodeptr);
1334 gen_resolvebranch(br1 + 1 * 4, br1 + 1 * 4, cd->mcodeptr - 2 * 4);
1337 emit_store(jd, iptr, iptr->dst, d);
1340 case ICMD_IINC: /* ..., value ==> ..., value + constant */
1341 /* op1 = variable, val.i = constant */
1343 var = &(rd->locals[iptr->op1][TYPE_INT]);
1344 if (var->flags & INMEMORY) {
1346 M_ILD(s1, REG_SP, var->regoff * 4);
1354 M_ADDIS(s1, m >> 16, s1);
1356 M_IADD_IMM(s1, m & 0xffff, s1);
1358 if (var->flags & INMEMORY)
1359 M_IST(s1, REG_SP, var->regoff * 4);
1363 /* floating operations ************************************************/
1365 case ICMD_FNEG: /* ..., value ==> ..., - value */
1367 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1368 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1370 emit_store(jd, iptr, iptr->dst, d);
1373 case ICMD_DNEG: /* ..., value ==> ..., - value */
1375 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1376 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1378 emit_store(jd, iptr, iptr->dst, d);
1381 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1383 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1384 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1385 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1387 emit_store(jd, iptr, iptr->dst, d);
1390 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1392 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1393 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1394 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1396 emit_store(jd, iptr, iptr->dst, d);
1399 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1401 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1402 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1403 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1405 emit_store(jd, iptr, iptr->dst, d);
1408 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1410 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1411 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1412 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1414 emit_store(jd, iptr, iptr->dst, d);
1417 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1419 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1420 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1421 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1423 emit_store(jd, iptr, iptr->dst, d);
1426 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1428 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1429 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1430 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1432 emit_store(jd, iptr, iptr->dst, d);
1435 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1437 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1438 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1439 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1441 emit_store(jd, iptr, iptr->dst, d);
1444 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1446 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1447 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1448 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1450 emit_store(jd, iptr, iptr->dst, d);
1453 case ICMD_F2I: /* ..., value ==> ..., (int) value */
1456 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1457 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1459 disp = dseg_addfloat(cd, 0.0);
1460 M_FLD(REG_FTMP2, REG_PV, disp);
1461 M_FCMPU(s1, REG_FTMP2);
1463 disp = dseg_adds4(cd, 0);
1464 M_CVTDL_C(s1, REG_FTMP1);
1465 M_LDA(REG_ITMP1, REG_PV, disp);
1466 M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1467 M_ILD(d, REG_PV, disp);
1468 emit_store(jd, iptr, iptr->dst, d);
1471 case ICMD_F2D: /* ..., value ==> ..., (double) value */
1473 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1474 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1476 emit_store(jd, iptr, iptr->dst, d);
1479 case ICMD_D2F: /* ..., value ==> ..., (double) value */
1481 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1482 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1484 emit_store(jd, iptr, iptr->dst, d);
1487 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
1488 case ICMD_DCMPL: /* == => 0, < => 1, > => -1 */
1491 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1492 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1493 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1495 M_IADD_IMM(REG_ZERO, -1, d);
1498 M_IADD_IMM(REG_ZERO, 0, d);
1500 M_IADD_IMM(REG_ZERO, 1, d);
1501 emit_store(jd, iptr, iptr->dst, d);
1504 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
1505 case ICMD_DCMPG: /* == => 0, < => 1, > => -1 */
1507 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1508 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1509 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1511 M_IADD_IMM(REG_ZERO, 1, d);
1514 M_IADD_IMM(REG_ZERO, 0, d);
1516 M_IADD_IMM(REG_ZERO, -1, d);
1517 emit_store(jd, iptr, iptr->dst, d);
1520 case ICMD_IF_FCMPEQ: /* ..., value, value ==> ... */
1521 case ICMD_IF_DCMPEQ:
1523 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1524 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1528 codegen_addreference(cd, (basicblock *) iptr->target);
1531 case ICMD_IF_FCMPNE: /* ..., value, value ==> ... */
1532 case ICMD_IF_DCMPNE:
1534 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1535 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1538 codegen_addreference(cd, (basicblock *) iptr->target);
1540 codegen_addreference(cd, (basicblock *) iptr->target);
1544 case ICMD_IF_FCMPL_LT: /* ..., value, value ==> ... */
1545 case ICMD_IF_DCMPL_LT:
1547 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1548 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1551 codegen_addreference(cd, (basicblock *) iptr->target);
1553 codegen_addreference(cd, (basicblock *) iptr->target);
1556 case ICMD_IF_FCMPL_GT: /* ..., value, value ==> ... */
1557 case ICMD_IF_DCMPL_GT:
1559 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1560 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1564 codegen_addreference(cd, (basicblock *) iptr->target);
1567 case ICMD_IF_FCMPL_LE: /* ..., value, value ==> ... */
1568 case ICMD_IF_DCMPL_LE:
1570 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1571 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1574 codegen_addreference(cd, (basicblock *) iptr->target);
1576 codegen_addreference(cd, (basicblock *) iptr->target);
1579 case ICMD_IF_FCMPL_GE: /* ..., value, value ==> ... */
1580 case ICMD_IF_DCMPL_GE:
1582 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1583 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1587 codegen_addreference(cd, (basicblock *) iptr->target);
1590 case ICMD_IF_FCMPG_LT: /* ..., value, value ==> ... */
1591 case ICMD_IF_DCMPG_LT:
1593 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1594 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1598 codegen_addreference(cd, (basicblock *) iptr->target);
1601 case ICMD_IF_FCMPG_GT: /* ..., value, value ==> ... */
1602 case ICMD_IF_DCMPG_GT:
1604 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1605 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1608 codegen_addreference(cd, (basicblock *) iptr->target);
1610 codegen_addreference(cd, (basicblock *) iptr->target);
1613 case ICMD_IF_FCMPG_LE: /* ..., value, value ==> ... */
1614 case ICMD_IF_DCMPG_LE:
1616 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1617 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1621 codegen_addreference(cd, (basicblock *) iptr->target);
1624 case ICMD_IF_FCMPG_GE: /* ..., value, value ==> ... */
1625 case ICMD_IF_DCMPG_GE:
1627 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1628 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1631 codegen_addreference(cd, (basicblock *) iptr->target);
1633 codegen_addreference(cd, (basicblock *) iptr->target);
1637 /* memory operations **************************************************/
1639 case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */
1641 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1642 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1643 gen_nullptr_check(s1);
1644 M_ILD(d, s1, OFFSET(java_arrayheader, size));
1645 emit_store(jd, iptr, iptr->dst, d);
1648 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
1650 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1651 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1652 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1653 if (iptr->op1 == 0) {
1654 gen_nullptr_check(s1);
1657 M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1658 M_LBZX(d, s1, REG_ITMP2);
1660 emit_store(jd, iptr, iptr->dst, d);
1663 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1665 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1666 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1667 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1668 if (iptr->op1 == 0) {
1669 gen_nullptr_check(s1);
1672 M_SLL_IMM(s2, 1, REG_ITMP2);
1673 M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1674 M_LHZX(d, s1, REG_ITMP2);
1675 emit_store(jd, iptr, iptr->dst, d);
1678 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1680 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1681 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1682 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1683 if (iptr->op1 == 0) {
1684 gen_nullptr_check(s1);
1687 M_SLL_IMM(s2, 1, REG_ITMP2);
1688 M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1689 M_LHAX(d, s1, REG_ITMP2);
1690 emit_store(jd, iptr, iptr->dst, d);
1693 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1695 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1696 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1697 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1698 if (iptr->op1 == 0) {
1699 gen_nullptr_check(s1);
1702 M_SLL_IMM(s2, 2, REG_ITMP2);
1703 M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1704 M_LWZX(d, s1, REG_ITMP2);
1705 emit_store(jd, iptr, iptr->dst, d);
1708 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1710 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1711 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1712 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1713 if (iptr->op1 == 0) {
1714 gen_nullptr_check(s1);
1717 M_SLL_IMM(s2, 3, REG_ITMP2);
1718 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1719 M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1720 emit_store(jd, iptr, iptr->dst, d);
1723 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1725 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1726 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1727 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1728 if (iptr->op1 == 0) {
1729 gen_nullptr_check(s1);
1732 M_SLL_IMM(s2, 2, REG_ITMP2);
1733 M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1734 M_LFSX(d, s1, REG_ITMP2);
1735 emit_store(jd, iptr, iptr->dst, d);
1738 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1740 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1741 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1742 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1743 if (iptr->op1 == 0) {
1744 gen_nullptr_check(s1);
1747 M_SLL_IMM(s2, 3, REG_ITMP2);
1748 M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1749 M_LFDX(d, s1, REG_ITMP2);
1750 emit_store(jd, iptr, iptr->dst, d);
1753 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1755 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1756 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1757 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1758 if (iptr->op1 == 0) {
1759 gen_nullptr_check(s1);
1762 M_SLL_IMM(s2, 2, REG_ITMP2);
1763 M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1764 M_LWZX(d, s1, REG_ITMP2);
1765 emit_store(jd, iptr, iptr->dst, d);
1769 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1771 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1772 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1773 if (iptr->op1 == 0) {
1774 gen_nullptr_check(s1);
1777 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1778 M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1779 M_STBX(s3, s1, REG_ITMP2);
1782 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1784 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1785 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1786 if (iptr->op1 == 0) {
1787 gen_nullptr_check(s1);
1790 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1791 M_SLL_IMM(s2, 1, REG_ITMP2);
1792 M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1793 M_STHX(s3, s1, REG_ITMP2);
1796 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1798 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1799 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1800 if (iptr->op1 == 0) {
1801 gen_nullptr_check(s1);
1804 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1805 M_SLL_IMM(s2, 1, REG_ITMP2);
1806 M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1807 M_STHX(s3, s1, REG_ITMP2);
1810 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1812 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1813 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1814 if (iptr->op1 == 0) {
1815 gen_nullptr_check(s1);
1818 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1819 M_SLL_IMM(s2, 2, REG_ITMP2);
1820 M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1821 M_STWX(s3, s1, REG_ITMP2);
1824 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1826 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1827 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1828 if (iptr->op1 == 0) {
1829 gen_nullptr_check(s1);
1832 s3 = emit_load_s3_high(jd, iptr, src, REG_ITMP3);
1833 M_SLL_IMM(s2, 3, REG_ITMP2);
1834 M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1835 M_STWX(s3, s1, REG_ITMP2);
1836 M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1837 s3 = emit_load_s3_low(jd, iptr, src, REG_ITMP3);
1838 M_STWX(s3, s1, REG_ITMP2);
1841 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1843 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1844 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1845 if (iptr->op1 == 0) {
1846 gen_nullptr_check(s1);
1849 s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1850 M_SLL_IMM(s2, 2, REG_ITMP2);
1851 M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1852 M_STFSX(s3, s1, REG_ITMP2);
1855 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1857 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1858 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1859 if (iptr->op1 == 0) {
1860 gen_nullptr_check(s1);
1863 s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1864 M_SLL_IMM(s2, 3, REG_ITMP2);
1865 M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1866 M_STFDX(s3, s1, REG_ITMP2);
1869 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1871 s1 = emit_load_s1(jd, iptr, src->prev->prev, rd->argintregs[0]);
1872 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1873 if (iptr->op1 == 0) {
1874 gen_nullptr_check(s1);
1877 s3 = emit_load_s3(jd, iptr, src, rd->argintregs[1]);
1879 disp = dseg_addaddress(cd, BUILTIN_canstore);
1880 M_ALD(REG_ITMP3, REG_PV, disp);
1883 M_INTMOVE(s1, rd->argintregs[0]);
1884 M_INTMOVE(s3, rd->argintregs[1]);
1889 codegen_add_arraystoreexception_ref(cd);
1891 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1892 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1893 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1894 M_SLL_IMM(s2, 2, REG_ITMP2);
1895 M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1896 M_STWX(s3, s1, REG_ITMP2);
1900 case ICMD_GETSTATIC: /* ... ==> ..., value */
1901 /* op1 = type, val.a = field address */
1903 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1904 disp = dseg_addaddress(cd, NULL);
1906 codegen_addpatchref(cd, PATCHER_get_putstatic,
1907 INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1909 if (opt_showdisassemble)
1913 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1915 disp = dseg_addaddress(cd, &(fi->value));
1917 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1918 codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1920 if (opt_showdisassemble)
1925 M_ALD(REG_ITMP1, REG_PV, disp);
1926 switch (iptr->op1) {
1928 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1929 M_ILD_INTERN(d, REG_ITMP1, 0);
1932 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1933 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1934 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1937 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1938 M_ALD_INTERN(d, REG_ITMP1, 0);
1941 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1942 M_FLD_INTERN(d, REG_ITMP1, 0);
1945 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1946 M_DLD_INTERN(d, REG_ITMP1, 0);
1949 emit_store(jd, iptr, iptr->dst, d);
1952 case ICMD_PUTSTATIC: /* ..., value ==> ... */
1953 /* op1 = type, val.a = field address */
1956 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1957 disp = dseg_addaddress(cd, NULL);
1959 codegen_addpatchref(cd, PATCHER_get_putstatic,
1960 INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1962 if (opt_showdisassemble)
1966 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1968 disp = dseg_addaddress(cd, &(fi->value));
1970 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1971 codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1973 if (opt_showdisassemble)
1978 M_ALD(REG_ITMP1, REG_PV, disp);
1979 switch (iptr->op1) {
1981 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1982 M_IST_INTERN(s2, REG_ITMP1, 0);
1985 s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1986 M_LST_INTERN(s2, REG_ITMP1, 0);
1989 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1990 M_AST_INTERN(s2, REG_ITMP1, 0);
1993 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1994 M_FST_INTERN(s2, REG_ITMP1, 0);
1997 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1998 M_DST_INTERN(s2, REG_ITMP1, 0);
2004 case ICMD_GETFIELD: /* ... ==> ..., value */
2005 /* op1 = type, val.i = field offset */
2007 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2008 gen_nullptr_check(s1);
2010 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2011 codegen_addpatchref(cd, PATCHER_get_putfield,
2012 INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2014 if (opt_showdisassemble)
2020 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2023 switch (iptr->op1) {
2025 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2029 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
2030 if (GET_HIGH_REG(d) == s1) {
2031 M_ILD(GET_LOW_REG(d), s1, disp + 4);
2032 M_ILD(GET_HIGH_REG(d), s1, disp);
2034 M_ILD(GET_HIGH_REG(d), s1, disp);
2035 M_ILD(GET_LOW_REG(d), s1, disp + 4);
2039 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2043 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2047 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2051 emit_store(jd, iptr, iptr->dst, d);
2054 case ICMD_PUTFIELD: /* ..., value ==> ... */
2055 /* op1 = type, val.i = field offset */
2057 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2058 gen_nullptr_check(s1);
2060 if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2061 if (IS_2_WORD_TYPE(iptr->op1)) {
2062 s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
2064 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2067 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2070 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2071 codegen_addpatchref(cd, PATCHER_get_putfield,
2072 INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2074 if (opt_showdisassemble)
2080 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2083 switch (iptr->op1) {
2085 M_IST(s2, s1, disp);
2088 M_IST(GET_LOW_REG(s2), s1, disp + 4); /* keep this order */
2089 M_IST(GET_HIGH_REG(s2), s1, disp); /* keep this order */
2092 M_AST(s2, s1, disp);
2095 M_FST(s2, s1, disp);
2098 M_DST(s2, s1, disp);
2104 /* branch operations **************************************************/
2106 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
2108 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2109 M_INTMOVE(s1, REG_ITMP1_XPTR);
2111 #ifdef ENABLE_VERIFIER
2113 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2114 (unresolved_class *) iptr->val.a, 0);
2116 if (opt_showdisassemble)
2119 #endif /* ENABLE_VERIFIER */
2121 disp = dseg_addaddress(cd, asm_handle_exception);
2122 M_ALD(REG_ITMP2, REG_PV, disp);
2125 if (code->isleafmethod)
2126 M_MFLR(REG_ITMP3); /* save LR */
2128 M_BL(0); /* get current PC */
2129 M_MFLR(REG_ITMP2_XPC);
2131 if (code->isleafmethod)
2132 M_MTLR(REG_ITMP3); /* restore LR */
2134 M_RTS; /* jump to CTR */
2138 case ICMD_GOTO: /* ... ==> ... */
2139 /* op1 = target JavaVM pc */
2141 codegen_addreference(cd, (basicblock *) iptr->target);
2145 case ICMD_JSR: /* ... ==> ... */
2146 /* op1 = target JavaVM pc */
2148 if (code->isleafmethod)
2153 M_IADD_IMM(REG_ITMP1, code->isleafmethod ? 4*4 : 3*4, REG_ITMP1);
2155 if (code->isleafmethod)
2159 codegen_addreference(cd, (basicblock *) iptr->target);
2162 case ICMD_RET: /* ... ==> ... */
2163 /* op1 = local variable */
2165 var = &(rd->locals[iptr->op1][TYPE_ADR]);
2166 if (var->flags & INMEMORY) {
2167 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2170 M_MTCTR(var->regoff);
2176 case ICMD_IFNULL: /* ..., value ==> ... */
2177 /* op1 = target JavaVM pc */
2179 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2182 codegen_addreference(cd, (basicblock *) iptr->target);
2185 case ICMD_IFNONNULL: /* ..., value ==> ... */
2186 /* op1 = target JavaVM pc */
2188 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2191 codegen_addreference(cd, (basicblock *) iptr->target);
2199 case ICMD_IFEQ: /* ..., value ==> ... */
2200 /* op1 = target JavaVM pc, val.i = constant */
2202 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2203 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767))
2204 M_CMPI(s1, iptr->val.i);
2206 ICONST(REG_ITMP2, iptr->val.i);
2207 M_CMP(s1, REG_ITMP2);
2209 switch (iptr->opc) {
2229 codegen_addreference(cd, (basicblock *) iptr->target);
2233 case ICMD_IF_LEQ: /* ..., value ==> ... */
2234 /* op1 = target JavaVM pc, val.l = constant */
2236 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2237 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2238 if (iptr->val.l == 0) {
2239 M_OR_TST(s1, s2, REG_ITMP3);
2240 } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2241 M_XOR_IMM(s2, 0, REG_ITMP2);
2242 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2243 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2245 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2246 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2247 ICONST(REG_ITMP3, iptr->val.l >> 32);
2248 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2249 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2252 codegen_addreference(cd, (basicblock *) iptr->target);
2255 case ICMD_IF_LLT: /* ..., value ==> ... */
2256 /* op1 = target JavaVM pc, val.l = constant */
2257 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2258 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2259 if (iptr->val.l == 0) {
2260 /* if high word is less than zero, the whole long is too */
2262 } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2265 codegen_addreference(cd, (basicblock *) iptr->target);
2267 M_CMPUI(s1, iptr->val.l & 0xffff);
2269 ICONST(REG_ITMP3, iptr->val.l >> 32);
2270 M_CMP(s2, REG_ITMP3);
2272 codegen_addreference(cd, (basicblock *) iptr->target);
2274 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2275 M_CMPU(s1, REG_ITMP3);
2278 codegen_addreference(cd, (basicblock *) iptr->target);
2281 case ICMD_IF_LLE: /* ..., value ==> ... */
2282 /* op1 = target JavaVM pc, val.l = constant */
2284 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2285 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2286 /* if (iptr->val.l == 0) { */
2287 /* M_OR(s1, s2, REG_ITMP3); */
2288 /* M_CMPI(REG_ITMP3, 0); */
2291 if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2294 codegen_addreference(cd, (basicblock *) iptr->target);
2296 M_CMPUI(s1, iptr->val.l & 0xffff);
2298 ICONST(REG_ITMP3, iptr->val.l >> 32);
2299 M_CMP(s2, REG_ITMP3);
2301 codegen_addreference(cd, (basicblock *) iptr->target);
2303 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2304 M_CMPU(s1, REG_ITMP3);
2307 codegen_addreference(cd, (basicblock *) iptr->target);
2310 case ICMD_IF_LNE: /* ..., value ==> ... */
2311 /* op1 = target JavaVM pc, val.l = constant */
2313 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2314 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2315 if (iptr->val.l == 0) {
2316 M_OR_TST(s1, s2, REG_ITMP3);
2317 } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2318 M_XOR_IMM(s2, 0, REG_ITMP2);
2319 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2320 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2322 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2323 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2324 ICONST(REG_ITMP3, iptr->val.l >> 32);
2325 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2326 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2329 codegen_addreference(cd, (basicblock *) iptr->target);
2332 case ICMD_IF_LGT: /* ..., value ==> ... */
2333 /* op1 = target JavaVM pc, val.l = constant */
2335 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2336 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2337 /* if (iptr->val.l == 0) { */
2338 /* M_OR(s1, s2, REG_ITMP3); */
2339 /* M_CMPI(REG_ITMP3, 0); */
2342 if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2345 codegen_addreference(cd, (basicblock *) iptr->target);
2347 M_CMPUI(s1, iptr->val.l & 0xffff);
2349 ICONST(REG_ITMP3, iptr->val.l >> 32);
2350 M_CMP(s2, REG_ITMP3);
2352 codegen_addreference(cd, (basicblock *) iptr->target);
2354 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2355 M_CMPU(s1, REG_ITMP3);
2358 codegen_addreference(cd, (basicblock *) iptr->target);
2361 case ICMD_IF_LGE: /* ..., value ==> ... */
2362 /* op1 = target JavaVM pc, val.l = constant */
2364 s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2365 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2366 if (iptr->val.l == 0) {
2367 /* if high word is greater equal zero, the whole long is too */
2369 } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2372 codegen_addreference(cd, (basicblock *) iptr->target);
2374 M_CMPUI(s1, iptr->val.l & 0xffff);
2376 ICONST(REG_ITMP3, iptr->val.l >> 32);
2377 M_CMP(s2, REG_ITMP3);
2379 codegen_addreference(cd, (basicblock *) iptr->target);
2381 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2382 M_CMPU(s1, REG_ITMP3);
2385 codegen_addreference(cd, (basicblock *) iptr->target);
2388 case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
2389 case ICMD_IF_ACMPEQ: /* op1 = target JavaVM pc */
2391 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2392 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2395 codegen_addreference(cd, (basicblock *) iptr->target);
2398 case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
2399 /* op1 = target JavaVM pc */
2401 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2402 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2404 /* load low-bits before the branch, so we know the distance */
2405 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2406 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2410 codegen_addreference(cd, (basicblock *) iptr->target);
2413 case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */
2414 case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */
2416 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2417 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2420 codegen_addreference(cd, (basicblock *) iptr->target);
2423 case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
2424 /* op1 = target JavaVM pc */
2426 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2427 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2430 codegen_addreference(cd, (basicblock *) iptr->target);
2431 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2432 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2435 codegen_addreference(cd, (basicblock *) iptr->target);
2438 case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
2439 /* op1 = target JavaVM pc */
2441 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2442 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2445 codegen_addreference(cd, (basicblock *) iptr->target);
2448 case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
2449 /* op1 = target JavaVM pc */
2451 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2452 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2455 codegen_addreference(cd, (basicblock *) iptr->target);
2456 /* load low-bits before the branch, so we know the distance */
2457 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2458 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2462 codegen_addreference(cd, (basicblock *) iptr->target);
2465 case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
2466 /* op1 = target JavaVM pc */
2468 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2469 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2472 codegen_addreference(cd, (basicblock *) iptr->target);
2475 case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
2476 /* op1 = target JavaVM pc */
2478 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2479 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2482 codegen_addreference(cd, (basicblock *) iptr->target);
2483 /* load low-bits before the branch, so we know the distance */
2484 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2485 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2489 codegen_addreference(cd, (basicblock *) iptr->target);
2492 case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
2493 /* op1 = target JavaVM pc */
2495 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2496 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2499 codegen_addreference(cd, (basicblock *) iptr->target);
2502 case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
2503 /* op1 = target JavaVM pc */
2505 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2506 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2509 codegen_addreference(cd, (basicblock *) iptr->target);
2510 /* load low-bits before the branch, so we know the distance */
2511 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2512 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2516 codegen_addreference(cd, (basicblock *) iptr->target);
2519 case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
2520 /* op1 = target JavaVM pc */
2522 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2523 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2526 codegen_addreference(cd, (basicblock *) iptr->target);
2529 case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
2530 /* op1 = target JavaVM pc */
2532 s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2533 s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2536 codegen_addreference(cd, (basicblock *) iptr->target);
2537 /* load low-bits before the branch, so we know the distance */
2538 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2539 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2543 codegen_addreference(cd, (basicblock *) iptr->target);
2546 case ICMD_IRETURN: /* ..., retvalue ==> ... */
2548 s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2549 M_INTMOVE(s1, REG_RESULT);
2550 goto nowperformreturn;
2552 case ICMD_ARETURN: /* ..., retvalue ==> ... */
2554 s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2555 M_INTMOVE(s1, REG_RESULT);
2557 #ifdef ENABLE_VERIFIER
2559 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2560 (unresolved_class *) iptr->val.a, 0);
2562 if (opt_showdisassemble)
2565 #endif /* ENABLE_VERIFIER */
2566 goto nowperformreturn;
2568 case ICMD_LRETURN: /* ..., retvalue ==> ... */
2570 s1 = emit_load_s1(jd, iptr, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2571 M_LNGMOVE(s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2572 goto nowperformreturn;
2574 case ICMD_FRETURN: /* ..., retvalue ==> ... */
2577 s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2578 M_FLTMOVE(s1, REG_FRESULT);
2579 goto nowperformreturn;
2581 case ICMD_RETURN: /* ... ==> ... */
2589 /* call trace function */
2591 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
2593 M_LDA(REG_SP, REG_SP, -10 * 8);
2594 M_DST(REG_FRESULT, REG_SP, 48+0);
2595 M_IST(REG_RESULT, REG_SP, 48+8);
2596 M_AST(REG_ZERO, REG_SP, 48+12);
2597 M_IST(REG_RESULT2, REG_SP, 48+16);
2599 /* keep this order */
2600 switch (iptr->opc) {
2603 #if defined(__DARWIN__)
2604 M_MOV(REG_RESULT, rd->argintregs[2]);
2605 M_CLR(rd->argintregs[1]);
2607 M_MOV(REG_RESULT, rd->argintregs[3]);
2608 M_CLR(rd->argintregs[2]);
2613 #if defined(__DARWIN__)
2614 M_MOV(REG_RESULT2, rd->argintregs[2]);
2615 M_MOV(REG_RESULT, rd->argintregs[1]);
2617 M_MOV(REG_RESULT2, rd->argintregs[3]);
2618 M_MOV(REG_RESULT, rd->argintregs[2]);
2623 disp = dseg_addaddress(cd, m);
2624 M_ALD(rd->argintregs[0], REG_PV, disp);
2626 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2627 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2628 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2629 M_ALD(REG_ITMP2, REG_PV, disp);
2633 M_DLD(REG_FRESULT, REG_SP, 48+0);
2634 M_ILD(REG_RESULT, REG_SP, 48+8);
2635 M_ALD(REG_ZERO, REG_SP, 48+12);
2636 M_ILD(REG_RESULT2, REG_SP, 48+16);
2637 M_LDA(REG_SP, REG_SP, 10 * 8);
2641 #if defined(ENABLE_THREADS)
2642 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2643 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2644 M_ALD(REG_ITMP3, REG_PV, disp);
2647 /* we need to save the proper return value */
2649 switch (iptr->opc) {
2651 M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2655 M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2658 M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2661 M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2665 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2668 /* and now restore the proper return value */
2670 switch (iptr->opc) {
2672 M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2676 M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2679 M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2682 M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2688 /* restore return address */
2690 if (!code->isleafmethod) {
2691 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
2692 may have a displacement overflow. */
2694 M_ALD(REG_ITMP1, REG_SP, p * 4 + LA_LR_OFFSET);
2698 /* restore saved registers */
2700 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2701 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2703 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2704 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2707 /* deallocate stack */
2710 M_LDA(REG_SP, REG_SP, stackframesize * 4);
2718 case ICMD_TABLESWITCH: /* ..., index ==> ... */
2723 tptr = (void **) iptr->target;
2725 s4ptr = iptr->val.a;
2726 l = s4ptr[1]; /* low */
2727 i = s4ptr[2]; /* high */
2729 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2731 M_INTMOVE(s1, REG_ITMP1);
2732 } else if (l <= 32768) {
2733 M_LDA(REG_ITMP1, s1, -l);
2735 ICONST(REG_ITMP2, l);
2736 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2742 M_CMPUI(REG_ITMP1, i - 1);
2744 codegen_addreference(cd, (basicblock *) tptr[0]);
2746 /* build jump table top down and use address of lowest entry */
2748 /* s4ptr += 3 + i; */
2752 dseg_addtarget(cd, (basicblock *) tptr[0]);
2757 /* length of dataseg after last dseg_addtarget is used by load */
2759 M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2760 M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2761 M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2768 case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
2770 s4 i, l, val, *s4ptr;
2773 tptr = (void **) iptr->target;
2775 s4ptr = iptr->val.a;
2776 l = s4ptr[0]; /* default */
2777 i = s4ptr[1]; /* count */
2779 MCODECHECK((i<<2)+8);
2780 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2786 if ((val >= -32768) && (val <= 32767)) {
2789 a = dseg_adds4(cd, val);
2790 M_ILD(REG_ITMP2, REG_PV, a);
2791 M_CMP(s1, REG_ITMP2);
2794 codegen_addreference(cd, (basicblock *) tptr[0]);
2798 tptr = (void **) iptr->target;
2799 codegen_addreference(cd, (basicblock *) tptr[0]);
2806 case ICMD_BUILTIN: /* ..., [arg1, [arg2 ...]] ==> ... */
2807 /* op1 = arg count val.a = builtintable entry */
2813 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
2814 /* op1 = arg count, val.a = method pointer */
2816 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2817 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
2818 case ICMD_INVOKEINTERFACE:
2820 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2821 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
2825 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
2826 md = lm->parseddesc;
2830 s3 = md->paramcount;
2832 MCODECHECK((s3 << 1) + 64);
2834 /* copy arguments to registers or stack location */
2836 for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2837 if (src->varkind == ARGVAR)
2839 if (IS_INT_LNG_TYPE(src->type)) {
2840 if (!md->params[s3].inmemory) {
2841 if (IS_2_WORD_TYPE(src->type)) {
2843 rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2844 rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2845 d = emit_load_s1(jd, iptr, src, s1);
2848 s1 = rd->argintregs[md->params[s3].regoff];
2849 d = emit_load_s1(jd, iptr, src, s1);
2854 if (IS_2_WORD_TYPE(src->type)) {
2855 d = emit_load_s1(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2856 M_LST(d, REG_SP, md->params[s3].regoff * 4);
2858 d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2859 M_IST(d, REG_SP, md->params[s3].regoff * 4);
2864 if (!md->params[s3].inmemory) {
2865 s1 = rd->argfltregs[md->params[s3].regoff];
2866 d = emit_load_s1(jd, iptr, src, s1);
2870 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
2871 if (IS_2_WORD_TYPE(src->type))
2872 M_DST(d, REG_SP, md->params[s3].regoff * 4);
2874 M_FST(d, REG_SP, md->params[s3].regoff * 4);
2879 switch (iptr->opc) {
2881 disp = dseg_addaddress(cd, bte->fp);
2882 d = md->returntype.type;
2884 M_ALD(REG_PV, REG_PV, disp); /* pointer to built-in-function */
2887 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2889 M_LDA(REG_PV, REG_ITMP1, -disp);
2891 /* if op1 == true, we need to check for an exception */
2893 if (iptr->op1 == true) {
2894 M_CMPI(REG_RESULT, 0);
2896 codegen_add_fillinstacktrace_ref(cd);
2900 case ICMD_INVOKESPECIAL:
2901 gen_nullptr_check(rd->argintregs[0]);
2902 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr */
2905 case ICMD_INVOKESTATIC:
2907 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2909 disp = dseg_addaddress(cd, NULL);
2911 codegen_addpatchref(cd, PATCHER_invokestatic_special,
2914 if (opt_showdisassemble)
2917 d = md->returntype.type;
2920 disp = dseg_addaddress(cd, lm->stubroutine);
2921 d = md->returntype.type;
2924 M_ALD(REG_PV, REG_PV, disp);
2927 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2929 M_LDA(REG_PV, REG_ITMP1, -disp);
2932 case ICMD_INVOKEVIRTUAL:
2933 gen_nullptr_check(rd->argintregs[0]);
2936 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2938 codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2940 if (opt_showdisassemble)
2944 d = md->returntype.type;
2947 s1 = OFFSET(vftbl_t, table[0]) +
2948 sizeof(methodptr) * lm->vftblindex;
2949 d = md->returntype.type;
2952 M_ALD(REG_METHODPTR, rd->argintregs[0],
2953 OFFSET(java_objectheader, vftbl));
2954 M_ALD(REG_PV, REG_METHODPTR, s1);
2957 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2959 M_LDA(REG_PV, REG_ITMP1, -disp);
2962 case ICMD_INVOKEINTERFACE:
2963 gen_nullptr_check(rd->argintregs[0]);
2966 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2968 codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2970 if (opt_showdisassemble)
2975 d = md->returntype.type;
2978 s1 = OFFSET(vftbl_t, interfacetable[0]) -
2979 sizeof(methodptr*) * lm->class->index;
2981 s2 = sizeof(methodptr) * (lm - lm->class->methods);
2983 d = md->returntype.type;
2986 M_ALD(REG_METHODPTR, rd->argintregs[0],
2987 OFFSET(java_objectheader, vftbl));
2988 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2989 M_ALD(REG_PV, REG_METHODPTR, s2);
2992 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2994 M_LDA(REG_PV, REG_ITMP1, -disp);
2998 /* d contains return type */
3000 if (d != TYPE_VOID) {
3001 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3002 if (IS_2_WORD_TYPE(iptr->dst->type)) {
3003 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst,
3004 PACK_REGS(REG_RESULT2, REG_RESULT));
3005 M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), s1);
3007 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3008 M_INTMOVE(REG_RESULT, s1);
3011 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
3012 M_FLTMOVE(REG_FRESULT, s1);
3014 emit_store(jd, iptr, iptr->dst, s1);
3019 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
3020 /* op1: 0 == array, 1 == class */
3021 /* val.a: (classinfo*) superclass */
3023 /* superclass is an interface:
3025 * OK if ((sub == NULL) ||
3026 * (sub->vftbl->interfacetablelength > super->index) &&
3027 * (sub->vftbl->interfacetable[-super->index] != NULL));
3029 * superclass is a class:
3031 * OK if ((sub == NULL) || (0
3032 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3033 * super->vftbl->diffvall));
3036 if (iptr->op1 == 1) {
3037 /* object type cast-check */
3040 vftbl_t *supervftbl;
3043 super = (classinfo *) iptr->val.a;
3050 superindex = super->index;
3051 supervftbl = super->vftbl;
3054 #if defined(ENABLE_THREADS)
3055 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3057 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3059 /* calculate interface checkcast code size */
3063 s2 += (opt_showdisassemble ? 1 : 0);
3065 /* calculate class checkcast code size */
3067 s3 = 8 + (s1 == REG_ITMP1);
3069 s3 += (opt_showdisassemble ? 1 : 0);
3071 /* if class is not resolved, check which code to call */
3075 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3077 disp = dseg_adds4(cd, 0); /* super->flags */
3079 codegen_addpatchref(cd,
3080 PATCHER_checkcast_instanceof_flags,
3081 (constant_classref *) iptr->target,
3084 if (opt_showdisassemble)
3087 M_ILD(REG_ITMP2, REG_PV, disp);
3088 M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
3092 /* interface checkcast code */
3094 if (!super || (super->flags & ACC_INTERFACE)) {
3100 codegen_addpatchref(cd,
3101 PATCHER_checkcast_instanceof_interface,
3102 (constant_classref *) iptr->target,
3105 if (opt_showdisassemble)
3109 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3110 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3111 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3113 codegen_add_classcastexception_ref(cd);
3114 M_ALD(REG_ITMP3, REG_ITMP2,
3115 OFFSET(vftbl_t, interfacetable[0]) -
3116 superindex * sizeof(methodptr*));
3119 codegen_add_classcastexception_ref(cd);
3125 /* class checkcast code */
3127 if (!super || !(super->flags & ACC_INTERFACE)) {
3128 disp = dseg_addaddress(cd, supervftbl);
3135 codegen_addpatchref(cd, PATCHER_checkcast_class,
3136 (constant_classref *) iptr->target,
3139 if (opt_showdisassemble)
3143 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3144 #if defined(ENABLE_THREADS)
3145 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3147 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3148 M_ALD(REG_ITMP2, REG_PV, disp);
3149 if (s1 != REG_ITMP1) {
3150 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
3151 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3152 #if defined(ENABLE_THREADS)
3153 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3155 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
3157 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3158 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3159 M_ALD(REG_ITMP2, REG_PV, disp);
3160 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3161 #if defined(ENABLE_THREADS)
3162 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3165 M_CMPU(REG_ITMP3, REG_ITMP2);
3167 codegen_add_classcastexception_ref(cd);
3169 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3172 /* array type cast-check */
3174 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3175 M_INTMOVE(s1, rd->argintregs[0]);
3177 disp = dseg_addaddress(cd, iptr->val.a);
3179 if (iptr->val.a == NULL) {
3180 codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3181 (constant_classref *) iptr->target,
3184 if (opt_showdisassemble)
3188 M_ALD(rd->argintregs[1], REG_PV, disp);
3189 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3190 M_ALD(REG_ITMP2, REG_PV, disp);
3195 codegen_add_classcastexception_ref(cd);
3197 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3198 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3201 emit_store(jd, iptr, iptr->dst, d);
3204 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
3205 /* val.a: (classinfo*) superclass */
3207 /* superclass is an interface:
3209 * return (sub != NULL) &&
3210 * (sub->vftbl->interfacetablelength > super->index) &&
3211 * (sub->vftbl->interfacetable[-super->index] != NULL);
3213 * superclass is a class:
3215 * return ((sub != NULL) && (0
3216 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3217 * super->vftbl->diffvall));
3222 vftbl_t *supervftbl;
3225 super = (classinfo *) iptr->val.a;
3232 superindex = super->index;
3233 supervftbl = super->vftbl;
3236 #if defined(ENABLE_THREADS)
3237 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3239 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3240 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3242 M_MOV(s1, REG_ITMP1);
3246 /* calculate interface instanceof code size */
3250 s2 += (opt_showdisassemble ? 1 : 0);
3252 /* calculate class instanceof code size */
3256 s3 += (opt_showdisassemble ? 1 : 0);
3260 /* if class is not resolved, check which code to call */
3264 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3266 disp = dseg_adds4(cd, 0); /* super->flags */
3268 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3269 (constant_classref *) iptr->target, disp);
3271 if (opt_showdisassemble)
3274 M_ILD(REG_ITMP3, REG_PV, disp);
3275 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3279 /* interface instanceof code */
3281 if (!super || (super->flags & ACC_INTERFACE)) {
3287 codegen_addpatchref(cd,
3288 PATCHER_checkcast_instanceof_interface,
3289 (constant_classref *) iptr->target, 0);
3291 if (opt_showdisassemble)
3295 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3296 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3297 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3299 M_ALD(REG_ITMP1, REG_ITMP1,
3300 OFFSET(vftbl_t, interfacetable[0]) -
3301 superindex * sizeof(methodptr*));
3304 M_IADD_IMM(REG_ZERO, 1, d);
3310 /* class instanceof code */
3312 if (!super || !(super->flags & ACC_INTERFACE)) {
3313 disp = dseg_addaddress(cd, supervftbl);
3320 codegen_addpatchref(cd, PATCHER_instanceof_class,
3321 (constant_classref *) iptr->target,
3324 if (opt_showdisassemble) {
3329 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3330 M_ALD(REG_ITMP2, REG_PV, disp);
3331 #if defined(ENABLE_THREADS)
3332 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3334 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3335 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3336 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3337 #if defined(ENABLE_THREADS)
3338 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3340 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3341 M_CMPU(REG_ITMP1, REG_ITMP2);
3344 M_IADD_IMM(REG_ZERO, 1, d);
3346 emit_store(jd, iptr, iptr->dst, d);
3350 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
3351 /* op1 = dimension, val.a = class */
3353 /* check for negative sizes and copy sizes to stack if necessary */
3355 MCODECHECK((iptr->op1 << 1) + 64);
3357 for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3358 /* copy SAVEDVAR sizes to stack */
3360 if (src->varkind != ARGVAR) {
3361 s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3362 #if defined(__DARWIN__)
3363 M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3365 M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3370 /* a0 = dimension count */
3372 ICONST(rd->argintregs[0], iptr->op1);
3374 /* is patcher function set? */
3376 if (iptr->val.a == NULL) {
3377 disp = dseg_addaddress(cd, NULL);
3379 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3380 (constant_classref *) iptr->target, disp);
3382 if (opt_showdisassemble)
3386 disp = dseg_addaddress(cd, iptr->val.a);
3389 /* a1 = arraydescriptor */
3391 M_ALD(rd->argintregs[1], REG_PV, disp);
3393 /* a2 = pointer to dimensions = stack pointer */
3395 #if defined(__DARWIN__)
3396 M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3398 M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3401 disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3402 M_ALD(REG_ITMP3, REG_PV, disp);
3406 /* check for exception before result assignment */
3408 M_CMPI(REG_RESULT, 0);
3410 codegen_add_fillinstacktrace_ref(cd);
3412 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3413 M_INTMOVE(REG_RESULT, d);
3414 emit_store(jd, iptr, iptr->dst, d);
3419 new_internalerror("Unknown ICMD %d during code generation",
3424 } /* for instruction */
3426 /* copy values to interface registers */
3428 src = bptr->outstack;
3429 len = bptr->outdepth;
3430 MCODECHECK(64 + len);
3431 #if defined(ENABLE_LSRA)
3436 if ((src->varkind != STACKVAR)) {
3438 if (IS_FLT_DBL_TYPE(s2)) {
3439 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
3440 if (!(rd->interfaces[len][s2].flags & INMEMORY))
3441 M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3443 M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3446 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3447 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3448 if (IS_2_WORD_TYPE(s2))
3449 M_LNGMOVE(s1, rd->interfaces[len][s2].regoff);
3451 M_INTMOVE(s1, rd->interfaces[len][s2].regoff);
3454 if (IS_2_WORD_TYPE(s2))
3455 M_LST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3457 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3463 } /* if (bptr -> flags >= BBREACHED) */
3464 } /* for basic block */
3466 dseg_createlinenumbertable(cd);
3469 /* generate exception and patcher stubs */
3478 savedmcodeptr = NULL;
3480 /* generate exception stubs */
3482 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3483 gen_resolvebranch(cd->mcodebase + eref->branchpos,
3484 eref->branchpos, cd->mcodeptr - cd->mcodebase);
3488 /* Check if the exception is an
3489 ArrayIndexOutOfBoundsException. If so, move index register
3492 if (eref->reg != -1)
3493 M_MOV(eref->reg, REG_ITMP1);
3495 /* calcuate exception address */
3497 M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
3499 /* move function to call into REG_ITMP3 */
3501 disp = dseg_addaddress(cd, eref->function);
3502 M_ALD(REG_ITMP3, REG_PV, disp);
3504 if (savedmcodeptr != NULL) {
3505 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3509 savedmcodeptr = cd->mcodeptr;
3511 if (code->isleafmethod) {
3513 M_AST(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3516 M_MOV(REG_PV, rd->argintregs[0]);
3517 M_MOV(REG_SP, rd->argintregs[1]);
3519 if (code->isleafmethod)
3520 M_MOV(REG_ZERO, rd->argintregs[2]);
3522 M_ALD(rd->argintregs[2],
3523 REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3525 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3526 M_MOV(REG_ITMP1, rd->argintregs[4]);
3528 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3529 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3533 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3535 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3536 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3538 if (code->isleafmethod) {
3539 /* XXX FIXME: REG_ZERO can cause problems here! */
3540 assert(stackframesize * 4 <= 32767);
3542 M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3546 disp = dseg_addaddress(cd, asm_handle_exception);
3547 M_ALD(REG_ITMP3, REG_PV, disp);
3554 /* generate code patching stub call code */
3556 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3557 /* check code segment size */
3561 /* Get machine code which is patched back in later. The
3562 call is 1 instruction word long. */
3564 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3566 mcode = *((u4 *) tmpmcodeptr);
3568 /* Patch in the call to call the following code (done at
3571 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
3572 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
3574 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3577 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
3579 /* create stack frame - keep stack 16-byte aligned */
3581 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3583 /* calculate return address and move it onto the stack */
3585 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3586 M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3588 /* move pointer to java_objectheader onto stack */
3590 #if defined(ENABLE_THREADS)
3591 /* order reversed because of data segment layout */
3593 (void) dseg_addaddress(cd, NULL); /* flcword */
3594 (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3595 disp = dseg_addaddress(cd, NULL); /* vftbl */
3597 M_LDA(REG_ITMP3, REG_PV, disp);
3598 M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3603 /* move machine code onto stack */
3605 disp = dseg_adds4(cd, mcode);
3606 M_ILD(REG_ITMP3, REG_PV, disp);
3607 M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3609 /* move class/method/field reference onto stack */
3611 disp = dseg_addaddress(cd, pref->ref);
3612 M_ALD(REG_ITMP3, REG_PV, disp);
3613 M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3615 /* move data segment displacement onto stack */
3617 disp = dseg_addaddress(cd, pref->disp);
3618 M_ILD(REG_ITMP3, REG_PV, disp);
3619 M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3621 /* move patcher function pointer onto stack */
3623 disp = dseg_addaddress(cd, pref->patcher);
3624 M_ALD(REG_ITMP3, REG_PV, disp);
3625 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3627 disp = dseg_addaddress(cd, asm_wrapper_patcher);
3628 M_ALD(REG_ITMP3, REG_PV, disp);
3633 /* generate replacement-out stubs */
3638 replacementpoint = jd->code->rplpoints;
3640 for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3641 /* check code segment size */
3645 /* note start of stub code */
3647 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
3649 /* make machine code for patching */
3651 tmpmcodeptr = cd->mcodeptr;
3652 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
3654 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3657 cd->mcodeptr = tmpmcodeptr;
3659 /* create stack frame - keep 16-byte aligned */
3661 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
3663 /* push address of `rplpoint` struct */
3665 disp = dseg_addaddress(cd, replacementpoint);
3666 M_ALD(REG_ITMP3, REG_PV, disp);
3667 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3669 /* jump to replacement function */
3671 disp = dseg_addaddress(cd, asm_replacement_out);
3672 M_ALD(REG_ITMP3, REG_PV, disp);
3681 /* everything's ok */
3687 /* createcompilerstub **********************************************************
3689 Creates a stub routine which calls the compiler.
3691 *******************************************************************************/
3693 #define COMPILERSTUB_DATASIZE 3 * SIZEOF_VOID_P
3694 #define COMPILERSTUB_CODESIZE 4 * 4
3696 #define COMPILERSTUB_SIZE COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3699 u1 *createcompilerstub(methodinfo *m)
3701 u1 *s; /* memory to hold the stub */
3707 s = CNEW(u1, COMPILERSTUB_SIZE);
3709 /* set data pointer and code pointer */
3712 s = s + COMPILERSTUB_DATASIZE;
3714 /* mark start of dump memory area */
3716 dumpsize = dump_size();
3718 cd = DNEW(codegendata);
3721 /* Store the codeinfo pointer in the same place as in the
3722 methodheader for compiled methods. */
3724 code = code_codeinfo_new(m);
3726 d[0] = (ptrint) asm_call_jit_compiler;
3728 d[2] = (ptrint) code;
3730 M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
3731 M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
3735 md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
3737 #if defined(ENABLE_STATISTICS)
3739 count_cstub_len += COMPILERSTUB_SIZE;
3742 /* release dump area */
3744 dump_release(dumpsize);
3750 /* createnativestub ************************************************************
3752 Creates a stub routine which calls a native method.
3754 *******************************************************************************/
3756 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3762 s4 stackframesize; /* size of stackframe if needed */
3765 s4 i, j; /* count variables */
3770 /* get required compiler data */
3777 /* set some variables */
3780 nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3782 /* calculate stackframe size */
3785 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3786 sizeof(localref_table) / SIZEOF_VOID_P +
3787 4 + /* 4 stackframeinfo arguments (darwin)*/
3788 nmd->paramcount * 2 + /* assume all arguments are doubles */
3791 stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3793 /* create method header */
3795 (void) dseg_addaddress(cd, code); /* CodeinfoPointer */
3796 (void) dseg_adds4(cd, stackframesize * 4); /* FrameSize */
3797 (void) dseg_adds4(cd, 0); /* IsSync */
3798 (void) dseg_adds4(cd, 0); /* IsLeaf */
3799 (void) dseg_adds4(cd, 0); /* IntSave */
3800 (void) dseg_adds4(cd, 0); /* FltSave */
3801 (void) dseg_addlinenumbertablesize(cd);
3802 (void) dseg_adds4(cd, 0); /* ExTableSize */
3807 M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3808 M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3810 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3811 /* parent_argbase == stackframesize * 4 */
3812 codegen_trace_args(jd, stackframesize * 4 , true);
3814 /* get function address (this must happen before the stackframeinfo) */
3816 funcdisp = dseg_addaddress(cd, f);
3818 #if !defined(WITH_STATIC_CLASSPATH)
3820 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3822 if (opt_showdisassemble)
3827 /* save integer and float argument registers */
3831 for (i = 0; i < md->paramcount; i++) {
3832 t = md->paramtypes[i].type;
3834 if (IS_INT_LNG_TYPE(t)) {
3835 if (!md->params[i].inmemory) {
3836 s1 = md->params[i].regoff;
3837 if (IS_2_WORD_TYPE(t)) {
3838 M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3840 M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3842 M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3849 for (i = 0; i < md->paramcount; i++) {
3850 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3851 if (!md->params[i].inmemory) {
3852 s1 = md->params[i].regoff;
3853 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3859 /* create native stack info */
3861 M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3862 M_MOV(REG_PV, rd->argintregs[1]);
3863 M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3864 M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3865 disp = dseg_addaddress(cd, codegen_start_native_call);
3866 M_ALD(REG_ITMP1, REG_PV, disp);
3870 /* restore integer and float argument registers */
3874 for (i = 0; i < md->paramcount; i++) {
3875 t = md->paramtypes[i].type;
3877 if (IS_INT_LNG_TYPE(t)) {
3878 if (!md->params[i].inmemory) {
3879 s1 = md->params[i].regoff;
3881 if (IS_2_WORD_TYPE(t)) {
3882 M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3884 M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3886 M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3893 for (i = 0; i < md->paramcount; i++) {
3894 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3895 if (!md->params[i].inmemory) {
3896 s1 = md->params[i].regoff;
3897 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3903 /* copy or spill arguments to new locations */
3905 for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3906 t = md->paramtypes[i].type;
3908 if (IS_INT_LNG_TYPE(t)) {
3909 if (!md->params[i].inmemory) {
3910 if (IS_2_WORD_TYPE(t))
3912 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3913 rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3915 s1 = rd->argintregs[md->params[i].regoff];
3917 if (!nmd->params[j].inmemory) {
3918 if (IS_2_WORD_TYPE(t)) {
3920 rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3921 rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3924 s2 = rd->argintregs[nmd->params[j].regoff];
3929 s2 = nmd->params[j].regoff;
3930 if (IS_2_WORD_TYPE(t))
3931 M_LST(s1, REG_SP, s2 * 4);
3933 M_IST(s1, REG_SP, s2 * 4);
3937 s1 = md->params[i].regoff + stackframesize;
3938 s2 = nmd->params[j].regoff;
3940 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3941 if (IS_2_WORD_TYPE(t))
3942 M_ILD(REG_ITMP2, REG_SP, s1 * 4 + 4);
3944 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3945 if (IS_2_WORD_TYPE(t))
3946 M_IST(REG_ITMP2, REG_SP, s2 * 4 + 4);
3950 /* We only copy spilled float arguments, as the float
3951 argument registers keep unchanged. */
3953 if (md->params[i].inmemory) {
3954 s1 = md->params[i].regoff + stackframesize;
3955 s2 = nmd->params[j].regoff;
3957 if (IS_2_WORD_TYPE(t)) {
3958 M_DLD(REG_FTMP1, REG_SP, s1 * 4);
3959 M_DST(REG_FTMP1, REG_SP, s2 * 4);
3962 M_FLD(REG_FTMP1, REG_SP, s1 * 4);
3963 M_FST(REG_FTMP1, REG_SP, s2 * 4);
3969 /* put class into second argument register */
3971 if (m->flags & ACC_STATIC) {
3972 disp = dseg_addaddress(cd, m->class);
3973 M_ALD(rd->argintregs[1], REG_PV, disp);
3976 /* put env into first argument register */
3978 disp = dseg_addaddress(cd, _Jv_env);
3979 M_ALD(rd->argintregs[0], REG_PV, disp);
3981 /* generate the actual native call */
3983 M_ALD(REG_ITMP3, REG_PV, funcdisp);
3987 /* save return value */
3989 if (md->returntype.type != TYPE_VOID) {
3990 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3991 if (IS_2_WORD_TYPE(md->returntype.type))
3992 M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
3993 M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
3996 if (IS_2_WORD_TYPE(md->returntype.type))
3997 M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
3999 M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4003 /* print call trace */
4005 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
4006 /* just restore the value we need, don't care about the other */
4008 if (md->returntype.type != TYPE_VOID) {
4009 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4010 if (IS_2_WORD_TYPE(md->returntype.type))
4011 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4012 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4015 if (IS_2_WORD_TYPE(md->returntype.type))
4016 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4018 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4022 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
4024 /* keep this order */
4025 switch (md->returntype.type) {
4028 #if defined(__DARWIN__)
4029 M_MOV(REG_RESULT, rd->argintregs[2]);
4030 M_CLR(rd->argintregs[1]);
4032 M_MOV(REG_RESULT, rd->argintregs[3]);
4033 M_CLR(rd->argintregs[2]);
4038 #if defined(__DARWIN__)
4039 M_MOV(REG_RESULT2, rd->argintregs[2]);
4040 M_MOV(REG_RESULT, rd->argintregs[1]);
4042 M_MOV(REG_RESULT2, rd->argintregs[3]);
4043 M_MOV(REG_RESULT, rd->argintregs[2]);
4048 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
4049 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
4050 disp = dseg_addaddress(cd, m);
4051 M_ALD(rd->argintregs[0], REG_PV, disp);
4053 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4054 M_ALD(REG_ITMP2, REG_PV, disp);
4058 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4061 /* remove native stackframe info */
4063 M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
4064 disp = dseg_addaddress(cd, codegen_finish_native_call);
4065 M_ALD(REG_ITMP1, REG_PV, disp);
4068 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4070 /* restore return value */
4072 if (md->returntype.type != TYPE_VOID) {
4073 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4074 if (IS_2_WORD_TYPE(md->returntype.type))
4075 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4076 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4079 if (IS_2_WORD_TYPE(md->returntype.type))
4080 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4082 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4086 M_ALD(REG_ITMP2_XPC, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
4087 M_MTLR(REG_ITMP2_XPC);
4088 M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe */
4090 /* check for exception */
4092 M_TST(REG_ITMP1_XPTR);
4093 M_BNE(1); /* if no exception then return */
4097 /* handle exception */
4099 M_IADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC); /* exception address */
4101 disp = dseg_addaddress(cd, asm_handle_nat_exception);
4102 M_ALD(REG_ITMP3, REG_PV, disp);
4106 /* generate patcher stub call code */
4114 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4115 /* Get machine code which is patched back in later. The
4116 call is 1 instruction word long. */
4118 tmpmcodeptr = cd->mcodebase + pref->branchpos;
4120 mcode = *((u4 *) tmpmcodeptr);
4122 /* Patch in the call to call the following code (done at
4125 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
4126 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
4128 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
4131 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
4133 /* create stack frame - keep stack 16-byte aligned */
4135 M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4137 /* move return address onto stack */
4140 M_AST(REG_ZERO, REG_SP, 5 * 4);
4142 /* move pointer to java_objectheader onto stack */
4144 #if defined(ENABLE_THREADS)
4145 /* order reversed because of data segment layout */
4147 (void) dseg_addaddress(cd, NULL); /* flcword */
4148 (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
4149 disp = dseg_addaddress(cd, NULL); /* vftbl */
4151 M_LDA(REG_ITMP3, REG_PV, disp);
4152 M_AST(REG_ITMP3, REG_SP, 4 * 4);
4157 /* move machine code onto stack */
4159 disp = dseg_adds4(cd, mcode);
4160 M_ILD(REG_ITMP3, REG_PV, disp);
4161 M_IST(REG_ITMP3, REG_SP, 3 * 4);
4163 /* move class/method/field reference onto stack */
4165 disp = dseg_addaddress(cd, pref->ref);
4166 M_ALD(REG_ITMP3, REG_PV, disp);
4167 M_AST(REG_ITMP3, REG_SP, 2 * 4);
4169 /* move data segment displacement onto stack */
4171 disp = dseg_addaddress(cd, pref->disp);
4172 M_ILD(REG_ITMP3, REG_PV, disp);
4173 M_IST(REG_ITMP3, REG_SP, 1 * 4);
4175 /* move patcher function pointer onto stack */
4177 disp = dseg_addaddress(cd, pref->patcher);
4178 M_ALD(REG_ITMP3, REG_PV, disp);
4179 M_AST(REG_ITMP3, REG_SP, 0 * 4);
4181 disp = dseg_addaddress(cd, asm_wrapper_patcher);
4182 M_ALD(REG_ITMP3, REG_PV, disp);
4190 return jd->code->entrypoint;
4194 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub)
4204 /* get required compiler data */
4214 /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4216 /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR */
4217 /* LA_SIZE(=6*4) + 8*8 + 4 + 4 + 0(Padding) */
4218 /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16 */
4220 /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo */
4221 /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4222 /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8 */
4223 /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16 */
4225 /* in nativestubs no Place to save the LR (Link Register) would be needed */
4226 /* but since the stack frame has to be aligned the 4 Bytes would have to */
4227 /* be padded again */
4229 #if defined(__DARWIN__)
4230 stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4232 stack_size = 6 * 16;
4234 M_LDA(REG_SP, REG_SP, -stack_size);
4238 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4240 M_CLR(REG_ITMP1); /* clear help register */
4242 /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4243 #if defined(__DARWIN__)
4244 /* Copy Params starting from first to Stack */
4245 /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
4249 /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
4250 /* integer argument regs */
4251 /* all integer argument registers have to be saved */
4252 for (p = 0; p < 8; p++) {
4253 d = rd->argintregs[p];
4254 /* save integer argument registers */
4255 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4259 stack_off = LA_SIZE;
4260 for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4261 t = md->paramtypes[p].type;
4262 if (IS_INT_LNG_TYPE(t)) {
4263 if (!md->params[p].inmemory) { /* Param in Arg Reg */
4264 if (IS_2_WORD_TYPE(t)) {
4265 M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4266 , REG_SP, stack_off);
4267 M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4268 , REG_SP, stack_off + 4);
4270 M_IST(REG_ITMP1, REG_SP, stack_off);
4271 M_IST(rd->argintregs[md->params[p].regoff]
4272 , REG_SP, stack_off + 4);
4274 } else { /* Param on Stack */
4275 s1 = (md->params[p].regoff + stackframesize) * 4
4277 if (IS_2_WORD_TYPE(t)) {
4278 M_ILD(REG_ITMP2, REG_SP, s1);
4279 M_IST(REG_ITMP2, REG_SP, stack_off);
4280 M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4281 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4283 M_IST(REG_ITMP1, REG_SP, stack_off);
4284 M_ILD(REG_ITMP2, REG_SP, s1);
4285 M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4288 } else { /* IS_FLT_DBL_TYPE(t) */
4289 if (!md->params[p].inmemory) { /* in Arg Reg */
4290 s1 = rd->argfltregs[md->params[p].regoff];
4291 if (!IS_2_WORD_TYPE(t)) {
4292 M_IST(REG_ITMP1, REG_SP, stack_off);
4293 M_FST(s1, REG_SP, stack_off + 4);
4295 M_DST(s1, REG_SP, stack_off);
4297 } else { /* on Stack */
4298 /* this should not happen */
4303 /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4304 #if defined(__DARWIN__)
4305 for (p = 0; p < 8; p++) {
4306 d = rd->argintregs[p];
4307 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4311 /* Set integer and float argument registers vor trace_args call */
4312 /* offset to saved integer argument registers */
4313 stack_off = LA_SIZE + 4 * 8 + 4;
4314 for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4315 t = md->paramtypes[p].type;
4316 if (IS_INT_LNG_TYPE(t)) {
4317 /* "stretch" int types */
4318 if (!IS_2_WORD_TYPE(t)) {
4319 M_CLR(rd->argintregs[2 * p]);
4320 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4323 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4324 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4327 } else { /* Float/Dbl */
4328 if (!md->params[p].inmemory) { /* Param in Arg Reg */
4329 /* use reserved Place on Stack (sp + 5 * 16) to copy */
4330 /* float/double arg reg to int reg */
4331 s1 = rd->argfltregs[md->params[p].regoff];
4332 if (!IS_2_WORD_TYPE(t)) {
4333 M_FST(s1, REG_SP, 5 * 16);
4334 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4335 M_CLR(rd->argintregs[2 * p]);
4337 M_DST(s1, REG_SP, 5 * 16);
4338 M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16 + 4);
4339 M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4346 /* put methodinfo pointer on Stackframe */
4347 p = dseg_addaddress(cd, m);
4348 M_ALD(REG_ITMP1, REG_PV, p);
4349 #if defined(__DARWIN__)
4350 M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
4352 M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4354 p = dseg_addaddress(cd, builtin_trace_args);
4355 M_ALD(REG_ITMP2, REG_PV, p);
4359 #if defined(__DARWIN__)
4360 /* restore integer argument registers from the reserved stack space */
4362 stack_off = LA_SIZE;
4363 for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
4364 p++, stack_off += 8) {
4365 t = md->paramtypes[p].type;
4367 if (IS_INT_LNG_TYPE(t)) {
4368 if (!md->params[p].inmemory) {
4369 if (IS_2_WORD_TYPE(t)) {
4370 M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4371 , REG_SP, stack_off);
4372 M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4373 , REG_SP, stack_off + 4);
4375 M_ILD(rd->argintregs[md->params[p].regoff]
4376 , REG_SP, stack_off + 4);
4383 for (p = 0; p < 8; p++) {
4384 d = rd->argintregs[p];
4385 /* save integer argument registers */
4386 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4391 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4393 M_LDA(REG_SP, REG_SP, stack_size);
4401 * These are local overrides for various environment variables in Emacs.
4402 * Please do not remove this and leave it at the end of the file, where
4403 * Emacs will automagically detect them.
4404 * ---------------------------------------------------------------------
4407 * indent-tabs-mode: t
4411 * vim:noexpandtab:sw=4:ts=4: