src/vm/jit/powerpc/codegen.c

   1 /* src/vm/jit/powerpc/codegen.c - machine code generator for 32-bit PowerPC
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Stefan Ring
  29
  30    Changes: Christian Thalinger
  31             Christian Ullrich
  32             Edwin Steiner
  33
  34    $Id: codegen.c 5129 2006-07-13 11:54:16Z twisti $
  35
  36 */
  37
  38
  39 #include "config.h"
  40
  41 #include <assert.h>
  42 #include <stdio.h>
  43 #include <signal.h>
  44
  45 #include "vm/types.h"
  46
  47 #include "md-abi.h"
  48
  49 #include "vm/jit/powerpc/arch.h"
  50 #include "vm/jit/powerpc/codegen.h"
  51
  52 #include "mm/memory.h"
  53 #include "native/native.h"
  54
  55 #if defined(ENABLE_THREADS)
  56 # include "threads/native/lock.h"
  57 #endif
  58
  59 #include "vm/builtin.h"
  60 #include "vm/exceptions.h"
  61 #include "vm/global.h"
  62 #include "vm/loader.h"
  63 #include "vm/options.h"
  64 #include "vm/stringlocal.h"
  65 #include "vm/vm.h"
  66 #include "vm/jit/asmpart.h"
  67 #include "vm/jit/codegen-common.h"
  68 #include "vm/jit/dseg.h"
  69 #include "vm/jit/emit.h"
  70 #include "vm/jit/jit.h"
  71 #include "vm/jit/methodheader.h"
  72 #include "vm/jit/parse.h"
  73 #include "vm/jit/patcher.h"
  74 #include "vm/jit/reg.h"
  75 #include "vm/jit/replace.h"
  76
  77 #if defined(ENABLE_LSRA)
  78 # include "vm/jit/allocator/lsra.h"
  79 #endif
  80
  81
  82 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub);
  83
  84 /* codegen *********************************************************************
  85
  86    Generates machine code.
  87
  88 *******************************************************************************/
  89
  90 bool codegen(jitdata *jd)
  91 {
  92         methodinfo         *m;
  93         codeinfo           *code;
  94         codegendata        *cd;
  95         registerdata       *rd;
  96         s4                  len, s1, s2, s3, d, disp;
  97         ptrint              a;
  98         s4                  stackframesize;
  99         stackptr            src;
 100         varinfo            *var;
 101         basicblock         *bptr;
 102         instruction        *iptr;
 103         exceptiontable     *ex;
 104         u2                  currentline;
 105         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
 106         builtintable_entry *bte;
 107         methoddesc         *md;
 108         rplpoint           *replacementpoint;
 109
 110         /* get required compiler data */
 111
 112         m    = jd->m;
 113         code = jd->code;
 114         cd   = jd->cd;
 115         rd   = jd->rd;
 116
 117         /* prevent compiler warnings */
 118
 119         d = 0;
 120         lm = NULL;
 121         bte = NULL;
 122
 123         {
 124         s4 i, p, t, l;
 125         s4 savedregs_num;
 126
 127         savedregs_num = 0;
 128
 129         /* space to save used callee saved registers */
 130
 131         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 132         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse) * 2;
 133
 134         stackframesize = rd->memuse + savedregs_num;
 135
 136 #if defined(ENABLE_THREADS)
 137         /* Space to save argument of monitor_enter and Return Values to
 138            survive monitor_exit. The stack position for the argument can
 139            not be shared with place to save the return register on PPC,
 140            since both values reside in R3. */
 141
 142         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 143                 /* reserve 2 slots for long/double return values for monitorexit */
 144
 145                 if (IS_2_WORD_TYPE(m->parseddesc->returntype.type))
 146                         stackframesize += 3;
 147                 else
 148                         stackframesize += 2;
 149         }
 150
 151 #endif
 152
 153         /* create method header */
 154
 155         /* align stack to 16-bytes */
 156
 157 /*      if (!jd->isleafmethod || opt_verbosecall) */
 158                 stackframesize = (stackframesize + 3) & ~3;
 159
 160 /*      else if (jd->isleafmethod && (stackframesize == LA_WORD_SIZE)) */
 161 /*              stackframesize = 0; */
 162
 163         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
 164         (void) dseg_adds4(cd, stackframesize * 4);             /* FrameSize       */
 165
 166 #if defined(ENABLE_THREADS)
 167         /* IsSync contains the offset relative to the stack pointer for the
 168            argument of monitor_exit used in the exception handler. Since the
 169            offset could be zero and give a wrong meaning of the flag it is
 170            offset by one.
 171         */
 172
 173         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 174                 (void) dseg_adds4(cd, (rd->memuse + 1) * 4);       /* IsSync          */
 175         else
 176 #endif
 177                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
 178
 179         (void) dseg_adds4(cd, jd->isleafmethod);               /* IsLeaf          */
 180         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
 181         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
 182
 183         dseg_addlinenumbertablesize(cd);
 184
 185         (void) dseg_adds4(cd, cd->exceptiontablelength);       /* ExTableSize     */
 186
 187         /* create exception table */
 188
 189         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 190                 dseg_addtarget(cd, ex->start);
 191                 dseg_addtarget(cd, ex->end);
 192                 dseg_addtarget(cd, ex->handler);
 193                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 194         }
 195
 196         /* generate method profiling code */
 197
 198         if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
 199                 /* count frequency */
 200
 201                 M_ALD(REG_ITMP1, REG_PV, CodeinfoPointer);
 202                 M_ALD(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
 203                 M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
 204                 M_AST(REG_ITMP2, REG_ITMP1, OFFSET(codeinfo, frequency));
 205
 206 /*              PROFILE_CYCLE_START; */
 207         }
 208
 209         /* create stack frame (if necessary) */
 210
 211         if (!jd->isleafmethod) {
 212                 M_MFLR(REG_ZERO);
 213                 M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
 214         }
 215
 216         if (stackframesize)
 217                 M_STWU(REG_SP, REG_SP, -stackframesize * 4);
 218
 219         /* save return address and used callee saved registers */
 220
 221         p = stackframesize;
 222         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 223                 p--; M_IST(rd->savintregs[i], REG_SP, p * 4);
 224         }
 225         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 226                 p -= 2; M_DST(rd->savfltregs[i], REG_SP, p * 4);
 227         }
 228
 229         /* take arguments out of register or stack frame */
 230
 231         md = m->parseddesc;
 232
 233         for (p = 0, l = 0; p < md->paramcount; p++) {
 234                 t = md->paramtypes[p].type;
 235                 var = &(rd->locals[l][t]);
 236                 l++;
 237                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 238                         l++;
 239                 if (var->type < 0)
 240                         continue;
 241                 s1 = md->params[p].regoff;
 242                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 243                         if (IS_2_WORD_TYPE(t))
 244                                 s2 = PACK_REGS(rd->argintregs[GET_LOW_REG(s1)],
 245                                                            rd->argintregs[GET_HIGH_REG(s1)]);
 246                         else
 247                                 s2 = rd->argintregs[s1];
 248                         if (!md->params[p].inmemory) {           /* register arguments    */
 249                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 250                                         if (IS_2_WORD_TYPE(t))
 251                                                 M_LNGMOVE(s2, var->regoff);
 252                                         else
 253                                                 M_INTMOVE(s2, var->regoff);
 254
 255                                 } else {                             /* reg arg -> spilled    */
 256                                         if (IS_2_WORD_TYPE(t))
 257                                                 M_LST(s2, REG_SP, var->regoff * 4);
 258                                         else
 259                                                 M_IST(s2, REG_SP, var->regoff * 4);
 260                                 }
 261
 262                         } else {                                 /* stack arguments       */
 263                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 264                                         if (IS_2_WORD_TYPE(t))
 265                                                 M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 266                                         else
 267                                                 M_ILD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 268
 269                                 } else {                             /* stack arg -> spilled  */
 270 #if 1
 271                                         M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4);
 272                                         M_IST(REG_ITMP1, REG_SP, var->regoff * 4);
 273                                         if (IS_2_WORD_TYPE(t)) {
 274                                                 M_ILD(REG_ITMP1, REG_SP, (stackframesize + s1) * 4 +4);
 275                                                 M_IST(REG_ITMP1, REG_SP, var->regoff * 4 + 4);
 276                                         }
 277 #else
 278                                         /* Reuse Memory Position on Caller Stack */
 279                                         var->regoff = stackframesize + s1;
 280 #endif
 281                                 }
 282                         }
 283
 284                 } else {                                     /* floating args         */
 285                         if (!md->params[p].inmemory) {           /* register arguments    */
 286                                 s2 = rd->argfltregs[s1];
 287                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 288                                         M_FLTMOVE(s2, var->regoff);
 289
 290                                 } else {                                         /* reg arg -> spilled    */
 291                                         if (IS_2_WORD_TYPE(t))
 292                                                 M_DST(s2, REG_SP, var->regoff * 4);
 293                                         else
 294                                                 M_FST(s2, REG_SP, var->regoff * 4);
 295                                 }
 296
 297                         } else {                                 /* stack arguments       */
 298                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 299                                         if (IS_2_WORD_TYPE(t))
 300                                                 M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 301
 302                                         else
 303                                                 M_FLD(var->regoff, REG_SP, (stackframesize + s1) * 4);
 304
 305                                 } else {                             /* stack-arg -> spilled  */
 306 #if 1
 307                                         if (IS_2_WORD_TYPE(t)) {
 308                                                 M_DLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
 309                                                 M_DST(REG_FTMP1, REG_SP, var->regoff * 4);
 310                                                 var->regoff = stackframesize + s1;
 311
 312                                         } else {
 313                                                 M_FLD(REG_FTMP1, REG_SP, (stackframesize + s1) * 4);
 314                                                 M_FST(REG_FTMP1, REG_SP, var->regoff * 4);
 315                                         }
 316 #else
 317                                         /* Reuse Memory Position on Caller Stack */
 318                                         var->regoff = stackframesize + s1;
 319 #endif
 320                                 }
 321                         }
 322                 }
 323         } /* end for */
 324
 325 #if defined(ENABLE_THREADS)
 326         /* call monitorenter function */
 327
 328         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 329                 p = dseg_addaddress(cd, LOCK_monitor_enter);
 330                 M_ALD(REG_ITMP3, REG_PV, p);
 331                 M_MTCTR(REG_ITMP3);
 332
 333                 /* get or test the lock object */
 334
 335                 if (m->flags & ACC_STATIC) {
 336                         p = dseg_addaddress(cd, &m->class->object.header);
 337                         M_ALD(rd->argintregs[0], REG_PV, p);
 338                 }
 339                 else {
 340                         M_TST(rd->argintregs[0]);
 341                         M_BEQ(0);
 342                         codegen_add_nullpointerexception_ref(cd);
 343                 }
 344
 345                 M_AST(rd->argintregs[0], REG_SP, rd->memuse * 4);
 346                 M_JSR;
 347         }
 348 #endif
 349
 350         /* call trace function */
 351
 352         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 353                 codegen_trace_args(jd, stackframesize, false);
 354         }
 355
 356         /* end of header generation */
 357
 358         replacementpoint = code->rplpoints;
 359
 360         /* walk through all basic blocks */
 361
 362         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 363
 364                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 365
 366                 if (bptr->flags >= BBREACHED) {
 367
 368                 /* branch resolving */
 369
 370                 {
 371                 branchref *brefs;
 372                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 373                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 374                                           brefs->branchpos,
 375                                                           bptr->mpc);
 376                         }
 377                 }
 378
 379                 /* handle replacement points */
 380
 381                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 382                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 383
 384                         replacementpoint++;
 385                 }
 386
 387 #if 0
 388                 /* generate basicblock profiling code */
 389
 390                 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
 391                         /* count frequency */
 392
 393                         disp = dseg_addaddress(cd, code->bbfrequency);
 394                         M_ALD(REG_ITMP2, REG_PV, disp);
 395                         M_ALD(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
 396                         M_IADD_IMM(REG_ITMP3, 1, REG_ITMP3);
 397                         M_AST(REG_ITMP3, REG_ITMP2, bptr->debug_nr * 4);
 398
 399                         /* if this is an exception handler, start profiling again */
 400
 401 /*                      if (bptr->type == BBTYPE_EXH) */
 402 /*                              PROFILE_CYCLE_START; */
 403                 }
 404 #endif
 405
 406                 /* copy interface registers to their destination */
 407
 408                 src = bptr->instack;
 409                 len = bptr->indepth;
 410                 MCODECHECK(64+len);
 411
 412 #if defined(ENABLE_LSRA)
 413                 if (opt_lsra) {
 414                         while (src != NULL) {
 415                                 len--;
 416                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 417                                         /* d = reg_of_var(m, src, REG_ITMP1); */
 418                                         if (!(src->flags & INMEMORY))
 419                                                 d = src->regoff;
 420                                         else
 421                                                 d = REG_ITMP1;
 422                                         M_INTMOVE(REG_ITMP1, d);
 423                                         emit_store(jd, NULL, src, d);
 424                                 }
 425                                 src = src->prev;
 426                         }
 427                 } else {
 428 #endif
 429                 while (src != NULL) {
 430                         len--;
 431                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 432                                 d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
 433                                 M_INTMOVE(REG_ITMP1, d);
 434                                 emit_store(jd, NULL, src, d);
 435                         }
 436                         else {
 437                                 if (src->type == TYPE_LNG)
 438                                         d = codegen_reg_of_var(rd, 0, src, REG_ITMP12_PACKED);
 439                                 else
 440                                         d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
 441                                 if ((src->varkind != STACKVAR)) {
 442                                         s2 = src->type;
 443                                         if (IS_FLT_DBL_TYPE(s2)) {
 444                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 445                                                         s1 = rd->interfaces[len][s2].regoff;
 446                                                         M_FLTMOVE(s1, d);
 447                                                 }
 448                                                 else {
 449                                                         if (IS_2_WORD_TYPE(s2)) {
 450                                                                 M_DLD(d, REG_SP,
 451                                                                           rd->interfaces[len][s2].regoff * 4);
 452                                                         }
 453                                                         else {
 454                                                                 M_FLD(d, REG_SP,
 455                                                                           rd->interfaces[len][s2].regoff * 4);
 456                                                         }
 457                                                 }
 458                                                 emit_store(jd, NULL, src, d);
 459                                         }
 460                                         else {
 461                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 462                                                         s1 = rd->interfaces[len][s2].regoff;
 463                                                         if (IS_2_WORD_TYPE(s2))
 464                                                                 M_LNGMOVE(s1, d);
 465                                                         else
 466                                                                 M_INTMOVE(s1, d);
 467                                                 }
 468                                                 else {
 469                                                         if (IS_2_WORD_TYPE(s2))
 470                                                                 M_LLD(d, REG_SP,
 471                                                                           rd->interfaces[len][s2].regoff * 4);
 472                                                         else
 473                                                                 M_ILD(d, REG_SP,
 474                                                                           rd->interfaces[len][s2].regoff * 4);
 475                                                 }
 476                                                 emit_store(jd, NULL, src, d);
 477                                         }
 478                                 }
 479                         }
 480                         src = src->prev;
 481                 }
 482
 483 #if defined(ENABLE_LSRA)
 484                 }
 485 #endif
 486                 /* walk through all instructions */
 487
 488                 src = bptr->instack;
 489                 len = bptr->icount;
 490                 currentline = 0;
 491
 492                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 493                         if (iptr->line != currentline) {
 494                                 dseg_addlinenumber(cd, iptr->line);
 495                                 currentline = iptr->line;
 496                         }
 497
 498                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 499
 500                         switch (iptr->opc) {
 501                         case ICMD_NOP:    /* ...  ==> ...                                 */
 502                         case ICMD_INLINE_START:
 503                         case ICMD_INLINE_END:
 504                                 break;
 505
 506                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 507
 508                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 509                         M_TST(s1);
 510                         M_BEQ(0);
 511                         codegen_add_nullpointerexception_ref(cd);
 512                         break;
 513
 514                 /* constant operations ************************************************/
 515
 516                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 517                                       /* op1 = 0, val.i = constant                    */
 518
 519                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 520                         ICONST(d, iptr->val.i);
 521                         emit_store(jd, iptr, iptr->dst, d);
 522                         break;
 523
 524                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 525                                       /* op1 = 0, val.l = constant                    */
 526
 527                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
 528                         LCONST(d, iptr->val.l);
 529                         emit_store(jd, iptr, iptr->dst, d);
 530                         break;
 531
 532                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 533                                       /* op1 = 0, val.f = constant                    */
 534
 535                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 536                         a = dseg_addfloat(cd, iptr->val.f);
 537                         M_FLD(d, REG_PV, a);
 538                         emit_store(jd, iptr, iptr->dst, d);
 539                         break;
 540
 541                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 542                                       /* op1 = 0, val.d = constant                    */
 543
 544                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 545                         a = dseg_adddouble(cd, iptr->val.d);
 546                         M_DLD(d, REG_PV, a);
 547                         emit_store(jd, iptr, iptr->dst, d);
 548                         break;
 549
 550                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 551                                       /* op1 = 0, val.a = constant                    */
 552
 553                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 554                         disp = dseg_addaddress(cd, iptr->val.a);
 555
 556                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 557                                 codegen_addpatchref(cd, PATCHER_aconst,
 558                                                                         ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
 559                                                                     disp);
 560
 561                                 if (opt_showdisassemble)
 562                                         M_NOP;
 563                         }
 564
 565                         M_ALD(d, REG_PV, disp);
 566                         emit_store(jd, iptr, iptr->dst, d);
 567                         break;
 568
 569
 570                 /* load/store operations **********************************************/
 571
 572                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 573                 case ICMD_ALOAD:      /* op1 = local variable                         */
 574
 575                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 576                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 577                         if ((iptr->dst->varkind == LOCALVAR) &&
 578                             (iptr->dst->varnum == iptr->op1))
 579                                 break;
 580                         if (var->flags & INMEMORY)
 581                                 M_ILD(d, REG_SP, var->regoff * 4);
 582                         else
 583                                 M_INTMOVE(var->regoff, d);
 584                         emit_store(jd, iptr, iptr->dst, d);
 585                         break;
 586
 587                 case ICMD_LLOAD:      /* ...  ==> ..., content of local variable      */
 588                                       /* op1 = local variable                         */
 589
 590                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 591                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
 592                         if ((iptr->dst->varkind == LOCALVAR) &&
 593                                 (iptr->dst->varnum == iptr->op1))
 594                                 break;
 595                         if (var->flags & INMEMORY)
 596                                 M_LLD(d, REG_SP, var->regoff * 4);
 597                         else
 598                                 M_LNGMOVE(var->regoff, d);
 599                         emit_store(jd, iptr, iptr->dst, d);
 600                         break;
 601
 602                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 603                                       /* op1 = local variable                         */
 604
 605                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 606                         if ((iptr->dst->varkind == LOCALVAR) &&
 607                                 (iptr->dst->varnum == iptr->op1))
 608                                 break;
 609                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 610                         if (var->flags & INMEMORY)
 611                                 M_FLD(d, REG_SP, var->regoff * 4);
 612                         else
 613                                 M_FLTMOVE(var->regoff, d);
 614                         emit_store(jd, iptr, iptr->dst, d);
 615                         break;
 616
 617                 case ICMD_DLOAD:      /* ...  ==> ..., content of local variable      */
 618                                       /* op1 = local variable                         */
 619
 620                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 621                         if ((iptr->dst->varkind == LOCALVAR) &&
 622                                 (iptr->dst->varnum == iptr->op1))
 623                                 break;
 624                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 625                         if (var->flags & INMEMORY)
 626                                 M_DLD(d, REG_SP, var->regoff * 4);
 627                         else
 628                                 M_FLTMOVE(var->regoff, d);
 629                         emit_store(jd, iptr, iptr->dst, d);
 630                         break;
 631
 632
 633                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 634                 case ICMD_ASTORE:     /* op1 = local variable                         */
 635
 636                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 637                                 break;
 638                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 639                         if (var->flags & INMEMORY) {
 640                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 641                                 M_IST(s1, REG_SP, var->regoff * 4);
 642                         } else {
 643                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 644                                 M_INTMOVE(s1, var->regoff);
 645                         }
 646                         break;
 647
 648                 case ICMD_LSTORE:     /* ..., value  ==> ...                          */
 649                                       /* op1 = local variable                         */
 650
 651                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 652                                 break;
 653                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 654                         if (var->flags & INMEMORY) {
 655                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
 656                                 M_LST(s1, REG_SP, var->regoff * 4);
 657                         } else {
 658                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 659                                 M_LNGMOVE(s1, var->regoff);
 660                         }
 661                         break;
 662
 663                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 664                                       /* op1 = local variable                         */
 665
 666                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 667                                 break;
 668                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 669                         if (var->flags & INMEMORY) {
 670                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
 671                                 M_FST(s1, REG_SP, var->regoff * 4);
 672                         } else {
 673                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 674                                 M_FLTMOVE(s1, var->regoff);
 675                         }
 676                         break;
 677
 678                 case ICMD_DSTORE:     /* ..., value  ==> ...                          */
 679                                       /* op1 = local variable                         */
 680
 681                         if ((src->varkind == LOCALVAR) && (src->varnum == iptr->op1))
 682                                 break;
 683                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 684                         if (var->flags & INMEMORY) {
 685                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
 686                                 M_DST(s1, REG_SP, var->regoff * 4);
 687                         } else {
 688                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 689                                 M_FLTMOVE(s1, var->regoff);
 690                         }
 691                         break;
 692
 693
 694                 /* pop/dup/swap operations ********************************************/
 695
 696                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 697
 698                 case ICMD_POP:        /* ..., value  ==> ...                          */
 699                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 700                         break;
 701
 702                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 703                         M_COPY(src, iptr->dst);
 704                         break;
 705
 706                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 707
 708                         M_COPY(src,       iptr->dst);
 709                         M_COPY(src->prev, iptr->dst->prev);
 710                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 711                         break;
 712
 713                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 714
 715                         M_COPY(src,             iptr->dst);
 716                         M_COPY(src->prev,       iptr->dst->prev);
 717                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 718                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 719                         break;
 720
 721                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 722
 723                         M_COPY(src,       iptr->dst);
 724                         M_COPY(src->prev, iptr->dst->prev);
 725                         break;
 726
 727                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 728
 729                         M_COPY(src,             iptr->dst);
 730                         M_COPY(src->prev,       iptr->dst->prev);
 731                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 732                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 733                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 734                         break;
 735
 736                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 737
 738                         M_COPY(src,                   iptr->dst);
 739                         M_COPY(src->prev,             iptr->dst->prev);
 740                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 741                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 742                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 743                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 744                         break;
 745
 746                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 747
 748                         M_COPY(src,       iptr->dst->prev);
 749                         M_COPY(src->prev, iptr->dst);
 750                         break;
 751
 752
 753                 /* integer operations *************************************************/
 754
 755                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 756
 757                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 758                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 759                         M_NEG(s1, d);
 760                         emit_store(jd, iptr, iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 764
 765                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP12_PACKED);
 766                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
 767                         M_SUBFIC(GET_LOW_REG(s1), 0, GET_LOW_REG(d));
 768                         M_SUBFZE(GET_HIGH_REG(s1), GET_HIGH_REG(d));
 769                         emit_store(jd, iptr, iptr->dst, d);
 770                         break;
 771
 772                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 773
 774                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP2);
 775                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP12_PACKED);
 776                         M_INTMOVE(s1, GET_LOW_REG(d));
 777                         M_SRA_IMM(GET_LOW_REG(d), 31, GET_HIGH_REG(d));
 778                         emit_store(jd, iptr, iptr->dst, d);
 779                         break;
 780
 781                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 782
 783                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP2);
 784                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 785                         M_INTMOVE(s1, d);
 786                         emit_store(jd, iptr, iptr->dst, d);
 787                         break;
 788
 789                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 790
 791                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 792                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 793                         M_BSEXT(s1, d);
 794                         emit_store(jd, iptr, iptr->dst, d);
 795                         break;
 796
 797                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 798
 799                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 800                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 801                         M_CZEXT(s1, d);
 802                         emit_store(jd, iptr, iptr->dst, d);
 803                         break;
 804
 805                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 806
 807                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 808                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 809                         M_SSEXT(s1, d);
 810                         emit_store(jd, iptr, iptr->dst, d);
 811                         break;
 812
 813
 814                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 815
 816                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 817                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 818                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 819                         M_IADD(s1, s2, d);
 820                         emit_store(jd, iptr, iptr->dst, d);
 821                         break;
 822
 823                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 824                                       /* val.i = constant                             */
 825
 826                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 827                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 828                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 829                                 M_IADD_IMM(s1, iptr->val.i, d);
 830                         } else {
 831                                 ICONST(REG_ITMP2, iptr->val.i);
 832                                 M_IADD(s1, REG_ITMP2, d);
 833                         }
 834                         emit_store(jd, iptr, iptr->dst, d);
 835                         break;
 836
 837                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 838
 839                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
 840                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
 841                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 842                         M_ADDC(s1, s2, GET_LOW_REG(d));
 843                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
 844                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 845                         M_ADDE(s1, s2, GET_HIGH_REG(d));
 846                         emit_store(jd, iptr, iptr->dst, d);
 847                         break;
 848
 849                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 850                                       /* val.l = constant                             */
 851
 852                         s3 = iptr->val.l & 0xffffffff;
 853                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
 854                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 855                         if ((s3 >= -32768) && (s3 <= 32767)) {
 856                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 857                         } else {
 858                                 ICONST(REG_ITMP2, s3);
 859                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 860                         }
 861                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
 862                         s3 = iptr->val.l >> 32;
 863                         if (s3 == -1) {
 864                                 M_ADDME(s1, GET_HIGH_REG(d));
 865                         } else if (s3 == 0) {
 866                                 M_ADDZE(s1, GET_HIGH_REG(d));
 867                         } else {
 868                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 869                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 870                         }
 871                         emit_store(jd, iptr, iptr->dst, d);
 872                         break;
 873
 874                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 875
 876                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 877                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 878                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 879                         M_ISUB(s1, s2, d);
 880                         emit_store(jd, iptr, iptr->dst, d);
 881                         break;
 882
 883                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 884                                       /* val.i = constant                             */
 885
 886                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 887                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 888                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 889                                 M_IADD_IMM(s1, -iptr->val.i, d);
 890                         } else {
 891                                 ICONST(REG_ITMP2, -iptr->val.i);
 892                                 M_IADD(s1, REG_ITMP2, d);
 893                         }
 894                         emit_store(jd, iptr, iptr->dst, d);
 895                         break;
 896
 897                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 898
 899                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
 900                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
 901                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 902                         M_SUBC(s1, s2, GET_LOW_REG(d));
 903                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
 904                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
 905                         M_SUBE(s1, s2, GET_HIGH_REG(d));
 906                         emit_store(jd, iptr, iptr->dst, d);
 907                         break;
 908
 909                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 910                                       /* val.l = constant                             */
 911
 912                         s3 = (-iptr->val.l) & 0xffffffff;
 913                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
 914                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
 915                         if ((s3 >= -32768) && (s3 <= 32767)) {
 916                                 M_ADDIC(s1, s3, GET_LOW_REG(d));
 917                         } else {
 918                                 ICONST(REG_ITMP2, s3);
 919                                 M_ADDC(s1, REG_ITMP2, GET_LOW_REG(d));
 920                         }
 921                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
 922                         s3 = (-iptr->val.l) >> 32;
 923                         if (s3 == -1)
 924                                 M_ADDME(s1, GET_HIGH_REG(d));
 925                         else if (s3 == 0)
 926                                 M_ADDZE(s1, GET_HIGH_REG(d));
 927                         else {
 928                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
 929                                 M_ADDE(s1, REG_ITMP3, GET_HIGH_REG(d));
 930                         }
 931                         emit_store(jd, iptr, iptr->dst, d);
 932                         break;
 933
 934                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 935
 936                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 937                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 938                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 939                         M_TST(s2);
 940                         M_BEQ(0);
 941                         codegen_add_arithmeticexception_ref(cd);
 942                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 943                         M_CMP(REG_ITMP3, s1);
 944                         M_BNE(3 + (s1 != d));
 945                         M_CMPI(s2, -1);
 946                         M_BNE(1 + (s1 != d));
 947                         M_INTMOVE(s1, d);
 948                         M_BR(1);
 949                         M_IDIV(s1, s2, d);
 950                         emit_store(jd, iptr, iptr->dst, d);
 951                         break;
 952
 953                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 954
 955                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 956                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 957                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 958                         M_TST(s2);
 959                         M_BEQ(0);
 960                         codegen_add_arithmeticexception_ref(cd);
 961                         M_LDAH(REG_ITMP3, REG_ZERO, 0x8000);
 962                         M_CMP(REG_ITMP3, s1);
 963                         M_BNE(4);
 964                         M_CMPI(s2, -1);
 965                         M_BNE(2);
 966                         M_CLR(d);
 967                         M_BR(3);
 968                         M_IDIV(s1, s2, REG_ITMP3);
 969                         M_IMUL(REG_ITMP3, s2, REG_ITMP3);
 970                         M_ISUB(s1, REG_ITMP3, d);
 971                         emit_store(jd, iptr, iptr->dst, d);
 972                         break;
 973
 974                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 975                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 976
 977                         bte = iptr->val.a;
 978                         md = bte->md;
 979
 980                         s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
 981                         M_OR_TST(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
 982                         M_BEQ(0);
 983                         codegen_add_arithmeticexception_ref(cd);
 984
 985                         disp = dseg_addaddress(cd, bte->fp);
 986                         M_ALD(REG_ITMP3, REG_PV, disp);
 987                         M_MTCTR(REG_ITMP3);
 988
 989                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[1].regoff)],
 990                                                    rd->argintregs[GET_HIGH_REG(md->params[1].regoff)]);
 991                         M_LNGMOVE(s2, s3);
 992
 993                         s1 = emit_load_s1(jd, iptr, src->prev, PACK_REGS(REG_ITMP2, REG_ITMP1));
 994                         s3 = PACK_REGS(rd->argintregs[GET_LOW_REG(md->params[0].regoff)],
 995                                                    rd->argintregs[GET_HIGH_REG(md->params[0].regoff)]);
 996                         M_LNGMOVE(s1, s3);
 997
 998                         M_JSR;
 999
1000                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_RESULT2, REG_RESULT));
1001                         M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), d);
1002                         emit_store(jd, iptr, iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1006
1007                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1008                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1009                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1010                         M_IMUL(s1, s2, d);
1011                         emit_store(jd, iptr, iptr->dst, d);
1012                         break;
1013
1014                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1015                                       /* val.i = constant                             */
1016
1017                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1018                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1019                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
1020                                 M_IMUL_IMM(s1, iptr->val.i, d);
1021                         } else {
1022                                 ICONST(REG_ITMP3, iptr->val.i);
1023                                 M_IMUL(s1, REG_ITMP3, d);
1024                         }
1025                         emit_store(jd, iptr, iptr->dst, d);
1026                         break;
1027
1028                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1029
1030                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1031                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1032                         M_SRA_IMM(s1, iptr->val.i, d);
1033                         M_ADDZE(d, d);
1034                         emit_store(jd, iptr, iptr->dst, d);
1035                         break;
1036
1037                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1038
1039                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1040                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1041                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1042                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1043                         M_SLL(s1, REG_ITMP3, d);
1044                         emit_store(jd, iptr, iptr->dst, d);
1045                         break;
1046
1047                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1048                                       /* val.i = constant                             */
1049
1050                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1051                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1052                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1053                         emit_store(jd, iptr, iptr->dst, d);
1054                         break;
1055
1056                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1057
1058                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1059                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1060                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1061                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1062                         M_SRA(s1, REG_ITMP3, d);
1063                         emit_store(jd, iptr, iptr->dst, d);
1064                         break;
1065
1066                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1067                                       /* val.i = constant                             */
1068
1069                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1070                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1071                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1072                         emit_store(jd, iptr, iptr->dst, d);
1073                         break;
1074
1075                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1076
1077                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1078                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1079                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1080                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1081                         M_SRL(s1, REG_ITMP2, d);
1082                         emit_store(jd, iptr, iptr->dst, d);
1083                         break;
1084
1085                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1086                                       /* val.i = constant                             */
1087
1088                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1089                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1090                         if (iptr->val.i & 0x1f) {
1091                                 M_SRL_IMM(s1, iptr->val.i & 0x1f, d);
1092                         } else {
1093                                 M_INTMOVE(s1, d);
1094                         }
1095                         emit_store(jd, iptr, iptr->dst, d);
1096                         break;
1097
1098                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1099
1100                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1101                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1102                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1103                         M_AND(s1, s2, d);
1104                         emit_store(jd, iptr, iptr->dst, d);
1105                         break;
1106
1107                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1108                                       /* val.i = constant                             */
1109
1110                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1111                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1112                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1113                                 M_AND_IMM(s1, iptr->val.i, d);
1114                                 }
1115                         /*
1116                         else if (iptr->val.i == 0xffffff) {
1117                                 M_RLWINM(s1, 0, 8, 31, d);
1118                                 }
1119                         */
1120                         else {
1121                                 ICONST(REG_ITMP3, iptr->val.i);
1122                                 M_AND(s1, REG_ITMP3, d);
1123                         }
1124                         emit_store(jd, iptr, iptr->dst, d);
1125                         break;
1126
1127                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1128
1129                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1130                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1131                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1132                         M_AND(s1, s2, GET_LOW_REG(d));
1133                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1134                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1135                         M_AND(s1, s2, GET_HIGH_REG(d));
1136                         emit_store(jd, iptr, iptr->dst, d);
1137                         break;
1138
1139                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1140                                       /* val.l = constant                             */
1141
1142                         s3 = iptr->val.l & 0xffffffff;
1143                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1144                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1145                         if ((s3 >= 0) && (s3 <= 65535)) {
1146                                 M_AND_IMM(s1, s3, GET_LOW_REG(d));
1147                         } else {
1148                                 ICONST(REG_ITMP3, s3);
1149                                 M_AND(s1, REG_ITMP3, GET_LOW_REG(d));
1150                         }
1151                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1152                         s3 = iptr->val.l >> 32;
1153                         if ((s3 >= 0) && (s3 <= 65535)) {
1154                                 M_AND_IMM(s1, s3, GET_HIGH_REG(d));
1155                         } else {
1156                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1157                                 M_AND(s1, REG_ITMP3, GET_HIGH_REG(d));
1158                         }
1159                         emit_store(jd, iptr, iptr->dst, d);
1160                         break;
1161
1162                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1163                                       /* val.i = constant                             */
1164
1165                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1166                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1167                         M_MOV(s1, REG_ITMP2);
1168                         M_CMPI(s1, 0);
1169                         M_BGE(1 + 2*(iptr->val.i >= 32768));
1170                         if (iptr->val.i >= 32768) {
1171                                 M_ADDIS(REG_ZERO, iptr->val.i >> 16, REG_ITMP2);
1172                                 M_OR_IMM(REG_ITMP2, iptr->val.i, REG_ITMP2);
1173                                 M_IADD(s1, REG_ITMP2, REG_ITMP2);
1174                         } else {
1175                                 M_IADD_IMM(s1, iptr->val.i, REG_ITMP2);
1176                         }
1177                         {
1178                                 int b=0, m = iptr->val.i;
1179                                 while (m >>= 1)
1180                                         ++b;
1181                                 M_RLWINM(REG_ITMP2, 0, 0, 30-b, REG_ITMP2);
1182                         }
1183                         M_ISUB(s1, REG_ITMP2, d);
1184                         emit_store(jd, iptr, iptr->dst, d);
1185                         break;
1186
1187                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1188
1189                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1190                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1191                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1192                         M_OR(s1, s2, d);
1193                         emit_store(jd, iptr, iptr->dst, d);
1194                         break;
1195
1196                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1197                                       /* val.i = constant                             */
1198
1199                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1200                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1201                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1202                                 M_OR_IMM(s1, iptr->val.i, d);
1203                         } else {
1204                                 ICONST(REG_ITMP3, iptr->val.i);
1205                                 M_OR(s1, REG_ITMP3, d);
1206                         }
1207                         emit_store(jd, iptr, iptr->dst, d);
1208                         break;
1209
1210                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
1211
1212                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1213                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1214                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1215                         M_OR(s1, s2, GET_LOW_REG(d));
1216                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1217                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1218                         M_OR(s1, s2, GET_HIGH_REG(d));
1219                         emit_store(jd, iptr, iptr->dst, d);
1220                         break;
1221
1222                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1223                                       /* val.l = constant                             */
1224
1225                         s3 = iptr->val.l & 0xffffffff;
1226                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1227                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1228                         if ((s3 >= 0) && (s3 <= 65535)) {
1229                                 M_OR_IMM(s1, s3, GET_LOW_REG(d));
1230                         } else {
1231                                 ICONST(REG_ITMP3, s3);
1232                                 M_OR(s1, REG_ITMP3, GET_LOW_REG(d));
1233                         }
1234                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1235                         s3 = iptr->val.l >> 32;
1236                         if ((s3 >= 0) && (s3 <= 65535)) {
1237                                 M_OR_IMM(s1, s3, GET_HIGH_REG(d));
1238                         } else {
1239                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1240                                 M_OR(s1, REG_ITMP3, GET_HIGH_REG(d));
1241                         }
1242                         emit_store(jd, iptr, iptr->dst, d);
1243                         break;
1244
1245                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1246
1247                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1248                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1249                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1250                         M_XOR(s1, s2, d);
1251                         emit_store(jd, iptr, iptr->dst, d);
1252                         break;
1253
1254                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1255                                       /* val.i = constant                             */
1256
1257                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1258                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1259                         if ((iptr->val.i >= 0) && (iptr->val.i <= 65535)) {
1260                                 M_XOR_IMM(s1, iptr->val.i, d);
1261                         } else {
1262                                 ICONST(REG_ITMP3, iptr->val.i);
1263                                 M_XOR(s1, REG_ITMP3, d);
1264                         }
1265                         emit_store(jd, iptr, iptr->dst, d);
1266                         break;
1267
1268                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1269
1270                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
1271                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1272                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1273                         M_XOR(s1, s2, GET_LOW_REG(d));
1274                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
1275                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP3);   /* don't use REG_ITMP2 */
1276                         M_XOR(s1, s2, GET_HIGH_REG(d));
1277                         emit_store(jd, iptr, iptr->dst, d);
1278                         break;
1279
1280                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1281                                       /* val.l = constant                             */
1282
1283                         s3 = iptr->val.l & 0xffffffff;
1284                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
1285                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1286                         if ((s3 >= 0) && (s3 <= 65535)) {
1287                                 M_XOR_IMM(s1, s3, GET_LOW_REG(d));
1288                         } else {
1289                                 ICONST(REG_ITMP3, s3);
1290                                 M_XOR(s1, REG_ITMP3, GET_LOW_REG(d));
1291                         }
1292                         s1 = emit_load_s1_high(jd, iptr, src, REG_ITMP1);
1293                         s3 = iptr->val.l >> 32;
1294                         if ((s3 >= 0) && (s3 <= 65535)) {
1295                                 M_XOR_IMM(s1, s3, GET_HIGH_REG(d));
1296                         } else {
1297                                 ICONST(REG_ITMP3, s3);                 /* don't use REG_ITMP2 */
1298                                 M_XOR(s1, REG_ITMP3, GET_HIGH_REG(d));
1299                         }
1300                         emit_store(jd, iptr, iptr->dst, d);
1301                         break;
1302
1303                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1304                         /*******************************************************************
1305                 TODO: CHANGE THIS TO A VERSION THAT WORKS !!!
1306                         *******************************************************************/
1307                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP3);
1308                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
1309                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1310                         {
1311                                 int tempreg = false;
1312                                 int dreg;
1313                                 u1  *br1;
1314
1315                                 if (src->prev->flags & INMEMORY) {
1316                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1317                                 } else {
1318                                         tempreg = tempreg || (d == GET_HIGH_REG(src->prev->regoff))
1319                                                         || (d == GET_LOW_REG(src->prev->regoff));
1320                                 }
1321                                 if (src->flags & INMEMORY) {
1322                                         tempreg = tempreg || (d == REG_ITMP3) || (d == REG_ITMP2);
1323                                 } else {
1324                                         tempreg = tempreg || (d == GET_HIGH_REG(src->regoff))
1325                                  || (d == GET_LOW_REG(src->regoff));
1326                                 }
1327
1328                                 dreg = tempreg ? REG_ITMP1 : d;
1329                                 M_IADD_IMM(REG_ZERO, 1, dreg);
1330                                 M_CMP(s1, s2);
1331                                 M_BGT(0);
1332                                 br1 = cd->mcodeptr;
1333                                 M_BLT(0);
1334                                 s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP3);
1335                                 s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
1336                                 M_CMPU(s1, s2);
1337                                 M_BGT(3);
1338                                 M_BEQ(1);
1339                                 M_IADD_IMM(dreg, -1, dreg);
1340                                 M_IADD_IMM(dreg, -1, dreg);
1341                                 gen_resolvebranch(br1, br1, cd->mcodeptr);
1342                                 gen_resolvebranch(br1 + 1 * 4, br1 + 1 * 4, cd->mcodeptr - 2 * 4);
1343                                 M_INTMOVE(dreg, d);
1344                         }
1345                         emit_store(jd, iptr, iptr->dst, d);
1346                         break;
1347
1348                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1349                                       /* op1 = variable, val.i = constant             */
1350
1351                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1352                         if (var->flags & INMEMORY) {
1353                                 s1 = REG_ITMP1;
1354                                 M_ILD(s1, REG_SP, var->regoff * 4);
1355                         } else
1356                                 s1 = var->regoff;
1357                         {
1358                                 u4 m = iptr->val.i;
1359                                 if (m & 0x8000)
1360                                         m += 65536;
1361                                 if (m & 0xffff0000)
1362                                         M_ADDIS(s1, m >> 16, s1);
1363                                 if (m & 0xffff)
1364                                         M_IADD_IMM(s1, m & 0xffff, s1);
1365                         }
1366                         if (var->flags & INMEMORY)
1367                                 M_IST(s1, REG_SP, var->regoff * 4);
1368                         break;
1369
1370
1371                 /* floating operations ************************************************/
1372
1373                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1374
1375                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1376                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1377                         M_FMOVN(s1, d);
1378                         emit_store(jd, iptr, iptr->dst, d);
1379                         break;
1380
1381                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1382
1383                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1384                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1385                         M_FMOVN(s1, d);
1386                         emit_store(jd, iptr, iptr->dst, d);
1387                         break;
1388
1389                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1390
1391                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1392                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1393                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1394                         M_FADD(s1, s2, d);
1395                         emit_store(jd, iptr, iptr->dst, d);
1396                         break;
1397
1398                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1399
1400                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1401                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1402                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1403                         M_DADD(s1, s2, d);
1404                         emit_store(jd, iptr, iptr->dst, d);
1405                         break;
1406
1407                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1408
1409                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1410                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1411                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1412                         M_FSUB(s1, s2, d);
1413                         emit_store(jd, iptr, iptr->dst, d);
1414                         break;
1415
1416                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1417
1418                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1419                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1420                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1421                         M_DSUB(s1, s2, d);
1422                         emit_store(jd, iptr, iptr->dst, d);
1423                         break;
1424
1425                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1426
1427                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1428                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1429                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1430                         M_FMUL(s1, s2, d);
1431                         emit_store(jd, iptr, iptr->dst, d);
1432                         break;
1433
1434                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1435
1436                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1437                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1438                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1439                         M_DMUL(s1, s2, d);
1440                         emit_store(jd, iptr, iptr->dst, d);
1441                         break;
1442
1443                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1444
1445                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1446                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1447                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1448                         M_FDIV(s1, s2, d);
1449                         emit_store(jd, iptr, iptr->dst, d);
1450                         break;
1451
1452                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1453
1454                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1455                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1456                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1457                         M_DDIV(s1, s2, d);
1458                         emit_store(jd, iptr, iptr->dst, d);
1459                         break;
1460
1461                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1462                 case ICMD_D2I:
1463
1464                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1465                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1466                         M_CLR(d);
1467                         disp = dseg_addfloat(cd, 0.0);
1468                         M_FLD(REG_FTMP2, REG_PV, disp);
1469                         M_FCMPU(s1, REG_FTMP2);
1470                         M_BNAN(4);
1471                         disp = dseg_adds4(cd, 0);
1472                         M_CVTDL_C(s1, REG_FTMP1);
1473                         M_LDA(REG_ITMP1, REG_PV, disp);
1474                         M_STFIWX(REG_FTMP1, 0, REG_ITMP1);
1475                         M_ILD(d, REG_PV, disp);
1476                         emit_store(jd, iptr, iptr->dst, d);
1477                         break;
1478
1479                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1480
1481                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1482                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1483                         M_FLTMOVE(s1, d);
1484                         emit_store(jd, iptr, iptr->dst, d);
1485                         break;
1486
1487                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1488
1489                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1490                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1491                         M_CVTDF(s1, d);
1492                         emit_store(jd, iptr, iptr->dst, d);
1493                         break;
1494
1495                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1496                 case ICMD_DCMPL:      /* == => 0, < => 1, > => -1                     */
1497
1498
1499                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1500                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1501                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1502                         M_FCMPU(s2, s1);
1503                         M_IADD_IMM(REG_ZERO, -1, d);
1504                         M_BNAN(4);
1505                         M_BGT(3);
1506                         M_IADD_IMM(REG_ZERO, 0, d);
1507                         M_BGE(1);
1508                         M_IADD_IMM(REG_ZERO, 1, d);
1509                         emit_store(jd, iptr, iptr->dst, d);
1510                         break;
1511
1512                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1513                 case ICMD_DCMPG:      /* == => 0, < => 1, > => -1                     */
1514
1515                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1516                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1517                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
1518                         M_FCMPU(s1, s2);
1519                         M_IADD_IMM(REG_ZERO, 1, d);
1520                         M_BNAN(4);
1521                         M_BGT(3);
1522                         M_IADD_IMM(REG_ZERO, 0, d);
1523                         M_BGE(1);
1524                         M_IADD_IMM(REG_ZERO, -1, d);
1525                         emit_store(jd, iptr, iptr->dst, d);
1526                         break;
1527
1528                 case ICMD_IF_FCMPEQ:    /* ..., value, value ==> ...                  */
1529                 case ICMD_IF_DCMPEQ:
1530
1531                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1532                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1533                         M_FCMPU(s1, s2);
1534                         M_BNAN(1);
1535                         M_BEQ(0);
1536                         codegen_addreference(cd, (basicblock *) iptr->target);
1537                         break;
1538
1539                 case ICMD_IF_FCMPNE:    /* ..., value, value ==> ...                  */
1540                 case ICMD_IF_DCMPNE:
1541
1542                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1543                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1544                         M_FCMPU(s1, s2);
1545                         M_BNAN(0);
1546                         codegen_addreference(cd, (basicblock *) iptr->target);
1547                         M_BNE(0);
1548                         codegen_addreference(cd, (basicblock *) iptr->target);
1549                         break;
1550
1551
1552                 case ICMD_IF_FCMPL_LT:  /* ..., value, value ==> ...                  */
1553                 case ICMD_IF_DCMPL_LT:
1554
1555                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1556                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1557                         M_FCMPU(s1, s2);
1558                         M_BNAN(0);
1559                         codegen_addreference(cd, (basicblock *) iptr->target);
1560                         M_BLT(0);
1561                         codegen_addreference(cd, (basicblock *) iptr->target);
1562                         break;
1563
1564                 case ICMD_IF_FCMPL_GT:  /* ..., value, value ==> ...                  */
1565                 case ICMD_IF_DCMPL_GT:
1566
1567                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1568                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1569                         M_FCMPU(s1, s2);
1570                         M_BNAN(1);
1571                         M_BGT(0);
1572                         codegen_addreference(cd, (basicblock *) iptr->target);
1573                         break;
1574
1575                 case ICMD_IF_FCMPL_LE:  /* ..., value, value ==> ...                  */
1576                 case ICMD_IF_DCMPL_LE:
1577
1578                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1579                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1580                         M_FCMPU(s1, s2);
1581                         M_BNAN(0);
1582                         codegen_addreference(cd, (basicblock *) iptr->target);
1583                         M_BLE(0);
1584                         codegen_addreference(cd, (basicblock *) iptr->target);
1585                         break;
1586
1587                 case ICMD_IF_FCMPL_GE:  /* ..., value, value ==> ...                  */
1588                 case ICMD_IF_DCMPL_GE:
1589
1590                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1591                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1592                         M_FCMPU(s1, s2);
1593                         M_BNAN(1);
1594                         M_BGE(0);
1595                         codegen_addreference(cd, (basicblock *) iptr->target);
1596                         break;
1597
1598                 case ICMD_IF_FCMPG_LT:  /* ..., value, value ==> ...                  */
1599                 case ICMD_IF_DCMPG_LT:
1600
1601                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1602                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1603                         M_FCMPU(s1, s2);
1604                         M_BNAN(1);
1605                         M_BLT(0);
1606                         codegen_addreference(cd, (basicblock *) iptr->target);
1607                         break;
1608
1609                 case ICMD_IF_FCMPG_GT:  /* ..., value, value ==> ...                  */
1610                 case ICMD_IF_DCMPG_GT:
1611
1612                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1613                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1614                         M_FCMPU(s1, s2);
1615                         M_BNAN(0);
1616                         codegen_addreference(cd, (basicblock *) iptr->target);
1617                         M_BGT(0);
1618                         codegen_addreference(cd, (basicblock *) iptr->target);
1619                         break;
1620
1621                 case ICMD_IF_FCMPG_LE:  /* ..., value, value ==> ...                  */
1622                 case ICMD_IF_DCMPG_LE:
1623
1624                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1625                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1626                         M_FCMPU(s1, s2);
1627                         M_BNAN(1);
1628                         M_BLE(0);
1629                         codegen_addreference(cd, (basicblock *) iptr->target);
1630                         break;
1631
1632                 case ICMD_IF_FCMPG_GE:  /* ..., value, value ==> ...                  */
1633                 case ICMD_IF_DCMPG_GE:
1634
1635                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1636                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1637                         M_FCMPU(s1, s2);
1638                         M_BNAN(0);
1639                         codegen_addreference(cd, (basicblock *) iptr->target);
1640                         M_BGE(0);
1641                         codegen_addreference(cd, (basicblock *) iptr->target);
1642                         break;
1643
1644
1645                 /* memory operations **************************************************/
1646
1647                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1648
1649                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1650                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1651                         gen_nullptr_check(s1);
1652                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1653                         emit_store(jd, iptr, iptr->dst, d);
1654                         break;
1655
1656                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1657
1658                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1659                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1660                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1661                         if (iptr->op1 == 0) {
1662                                 gen_nullptr_check(s1);
1663                                 gen_bound_check;
1664                         }
1665                         M_IADD_IMM(s2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1666                         M_LBZX(d, s1, REG_ITMP2);
1667                         M_BSEXT(d, d);
1668                         emit_store(jd, iptr, iptr->dst, d);
1669                         break;
1670
1671                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1672
1673                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1674                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1675                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1676                         if (iptr->op1 == 0) {
1677                                 gen_nullptr_check(s1);
1678                                 gen_bound_check;
1679                         }
1680                         M_SLL_IMM(s2, 1, REG_ITMP2);
1681                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1682                         M_LHZX(d, s1, REG_ITMP2);
1683                         emit_store(jd, iptr, iptr->dst, d);
1684                         break;
1685
1686                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1687
1688                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1689                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1690                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1691                         if (iptr->op1 == 0) {
1692                                 gen_nullptr_check(s1);
1693                                 gen_bound_check;
1694                         }
1695                         M_SLL_IMM(s2, 1, REG_ITMP2);
1696                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1697                         M_LHAX(d, s1, REG_ITMP2);
1698                         emit_store(jd, iptr, iptr->dst, d);
1699                         break;
1700
1701                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1702
1703                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1704                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1705                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1706                         if (iptr->op1 == 0) {
1707                                 gen_nullptr_check(s1);
1708                                 gen_bound_check;
1709                         }
1710                         M_SLL_IMM(s2, 2, REG_ITMP2);
1711                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1712                         M_LWZX(d, s1, REG_ITMP2);
1713                         emit_store(jd, iptr, iptr->dst, d);
1714                         break;
1715
1716                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1717
1718                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1719                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1720                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1721                         if (iptr->op1 == 0) {
1722                                 gen_nullptr_check(s1);
1723                                 gen_bound_check;
1724                         }
1725                         M_SLL_IMM(s2, 3, REG_ITMP2);
1726                         M_IADD(s1, REG_ITMP2, REG_ITMP2);
1727                         M_LLD_INTERN(d, REG_ITMP2, OFFSET(java_longarray, data[0]));
1728                         emit_store(jd, iptr, iptr->dst, d);
1729                         break;
1730
1731                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1732
1733                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1734                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1735                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1736                         if (iptr->op1 == 0) {
1737                                 gen_nullptr_check(s1);
1738                                 gen_bound_check;
1739                         }
1740                         M_SLL_IMM(s2, 2, REG_ITMP2);
1741                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1742                         M_LFSX(d, s1, REG_ITMP2);
1743                         emit_store(jd, iptr, iptr->dst, d);
1744                         break;
1745
1746                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1747
1748                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1749                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1750                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1751                         if (iptr->op1 == 0) {
1752                                 gen_nullptr_check(s1);
1753                                 gen_bound_check;
1754                         }
1755                         M_SLL_IMM(s2, 3, REG_ITMP2);
1756                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1757                         M_LFDX(d, s1, REG_ITMP2);
1758                         emit_store(jd, iptr, iptr->dst, d);
1759                         break;
1760
1761                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1762
1763                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1764                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1765                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1766                         if (iptr->op1 == 0) {
1767                                 gen_nullptr_check(s1);
1768                                 gen_bound_check;
1769                         }
1770                         M_SLL_IMM(s2, 2, REG_ITMP2);
1771                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1772                         M_LWZX(d, s1, REG_ITMP2);
1773                         emit_store(jd, iptr, iptr->dst, d);
1774                         break;
1775
1776
1777                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1778
1779                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1780                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1781                         if (iptr->op1 == 0) {
1782                                 gen_nullptr_check(s1);
1783                                 gen_bound_check;
1784                         }
1785                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1786                         M_IADD_IMM(s2, OFFSET(java_bytearray, data[0]), REG_ITMP2);
1787                         M_STBX(s3, s1, REG_ITMP2);
1788                         break;
1789
1790                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1791
1792                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1793                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1794                         if (iptr->op1 == 0) {
1795                                 gen_nullptr_check(s1);
1796                                 gen_bound_check;
1797                         }
1798                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1799                         M_SLL_IMM(s2, 1, REG_ITMP2);
1800                         M_IADD_IMM(REG_ITMP2, OFFSET(java_chararray, data[0]), REG_ITMP2);
1801                         M_STHX(s3, s1, REG_ITMP2);
1802                         break;
1803
1804                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1805
1806                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1807                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1808                         if (iptr->op1 == 0) {
1809                                 gen_nullptr_check(s1);
1810                                 gen_bound_check;
1811                         }
1812                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1813                         M_SLL_IMM(s2, 1, REG_ITMP2);
1814                         M_IADD_IMM(REG_ITMP2, OFFSET(java_shortarray, data[0]), REG_ITMP2);
1815                         M_STHX(s3, s1, REG_ITMP2);
1816                         break;
1817
1818                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1819
1820                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1821                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1822                         if (iptr->op1 == 0) {
1823                                 gen_nullptr_check(s1);
1824                                 gen_bound_check;
1825                         }
1826                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1827                         M_SLL_IMM(s2, 2, REG_ITMP2);
1828                         M_IADD_IMM(REG_ITMP2, OFFSET(java_intarray, data[0]), REG_ITMP2);
1829                         M_STWX(s3, s1, REG_ITMP2);
1830                         break;
1831
1832                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1833
1834                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1835                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1836                         if (iptr->op1 == 0) {
1837                                 gen_nullptr_check(s1);
1838                                 gen_bound_check;
1839                         }
1840                         s3 = emit_load_s3_high(jd, iptr, src, REG_ITMP3);
1841                         M_SLL_IMM(s2, 3, REG_ITMP2);
1842                         M_IADD_IMM(REG_ITMP2, OFFSET(java_longarray, data[0]), REG_ITMP2);
1843                         M_STWX(s3, s1, REG_ITMP2);
1844                         M_IADD_IMM(REG_ITMP2, 4, REG_ITMP2);
1845                         s3 = emit_load_s3_low(jd, iptr, src, REG_ITMP3);
1846                         M_STWX(s3, s1, REG_ITMP2);
1847                         break;
1848
1849                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1850
1851                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1852                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1853                         if (iptr->op1 == 0) {
1854                                 gen_nullptr_check(s1);
1855                                 gen_bound_check;
1856                         }
1857                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1858                         M_SLL_IMM(s2, 2, REG_ITMP2);
1859                         M_IADD_IMM(REG_ITMP2, OFFSET(java_floatarray, data[0]), REG_ITMP2);
1860                         M_STFSX(s3, s1, REG_ITMP2);
1861                         break;
1862
1863                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1864
1865                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1866                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1867                         if (iptr->op1 == 0) {
1868                                 gen_nullptr_check(s1);
1869                                 gen_bound_check;
1870                         }
1871                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1872                         M_SLL_IMM(s2, 3, REG_ITMP2);
1873                         M_IADD_IMM(REG_ITMP2, OFFSET(java_doublearray, data[0]), REG_ITMP2);
1874                         M_STFDX(s3, s1, REG_ITMP2);
1875                         break;
1876
1877                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1878
1879                         s1 = emit_load_s1(jd, iptr, src->prev->prev, rd->argintregs[0]);
1880                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1881                         if (iptr->op1 == 0) {
1882                                 gen_nullptr_check(s1);
1883                                 gen_bound_check;
1884                         }
1885                         s3 = emit_load_s3(jd, iptr, src, rd->argintregs[1]);
1886
1887                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1888                         M_ALD(REG_ITMP3, REG_PV, disp);
1889                         M_MTCTR(REG_ITMP3);
1890
1891                         M_INTMOVE(s1, rd->argintregs[0]);
1892                         M_INTMOVE(s3, rd->argintregs[1]);
1893
1894                         M_JSR;
1895                         M_TST(REG_RESULT);
1896                         M_BEQ(0);
1897                         codegen_add_arraystoreexception_ref(cd);
1898
1899                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1900                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1901                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1902                         M_SLL_IMM(s2, 2, REG_ITMP2);
1903                         M_IADD_IMM(REG_ITMP2, OFFSET(java_objectarray, data[0]), REG_ITMP2);
1904                         M_STWX(s3, s1, REG_ITMP2);
1905                         break;
1906
1907
1908                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1909                                       /* op1 = type, val.a = field address            */
1910
1911                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1912                                 disp = dseg_addaddress(cd, NULL);
1913
1914                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1915                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1916
1917                                 if (opt_showdisassemble)
1918                                         M_NOP;
1919
1920                         } else {
1921                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1922
1923                                 disp = dseg_addaddress(cd, &(fi->value));
1924
1925                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1926                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1927
1928                                         if (opt_showdisassemble)
1929                                                 M_NOP;
1930                                 }
1931                         }
1932
1933                         M_ALD(REG_ITMP1, REG_PV, disp);
1934                         switch (iptr->op1) {
1935                         case TYPE_INT:
1936                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1937                                 M_ILD_INTERN(d, REG_ITMP1, 0);
1938                                 break;
1939                         case TYPE_LNG:
1940                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
1941                                 M_ILD_INTERN(GET_LOW_REG(d), REG_ITMP1, 4);/* keep this order */
1942                                 M_ILD_INTERN(GET_HIGH_REG(d), REG_ITMP1, 0);/*keep this order */
1943                                 break;
1944                         case TYPE_ADR:
1945                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1946                                 M_ALD_INTERN(d, REG_ITMP1, 0);
1947                                 break;
1948                         case TYPE_FLT:
1949                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1950                                 M_FLD_INTERN(d, REG_ITMP1, 0);
1951                                 break;
1952                         case TYPE_DBL:
1953                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
1954                                 M_DLD_INTERN(d, REG_ITMP1, 0);
1955                                 break;
1956                         }
1957                         emit_store(jd, iptr, iptr->dst, d);
1958                         break;
1959
1960                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1961                                       /* op1 = type, val.a = field address            */
1962
1963
1964                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1965                                 disp = dseg_addaddress(cd, NULL);
1966
1967                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
1968                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
1969
1970                                 if (opt_showdisassemble)
1971                                         M_NOP;
1972
1973                         } else {
1974                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
1975
1976                                 disp = dseg_addaddress(cd, &(fi->value));
1977
1978                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1979                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, disp);
1980
1981                                         if (opt_showdisassemble)
1982                                                 M_NOP;
1983                                 }
1984                         }
1985
1986                         M_ALD(REG_ITMP1, REG_PV, disp);
1987                         switch (iptr->op1) {
1988                         case TYPE_INT:
1989                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1990                                 M_IST_INTERN(s2, REG_ITMP1, 0);
1991                                 break;
1992                         case TYPE_LNG:
1993                                 s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
1994                                 M_LST_INTERN(s2, REG_ITMP1, 0);
1995                                 break;
1996                         case TYPE_ADR:
1997                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1998                                 M_AST_INTERN(s2, REG_ITMP1, 0);
1999                                 break;
2000                         case TYPE_FLT:
2001                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2002                                 M_FST_INTERN(s2, REG_ITMP1, 0);
2003                                 break;
2004                         case TYPE_DBL:
2005                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2006                                 M_DST_INTERN(s2, REG_ITMP1, 0);
2007                                 break;
2008                         }
2009                         break;
2010
2011
2012                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2013                                       /* op1 = type, val.i = field offset             */
2014
2015                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2016                         gen_nullptr_check(s1);
2017
2018                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2019                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2020                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2021
2022                                 if (opt_showdisassemble)
2023                                         M_NOP;
2024
2025                                 disp = 0;
2026
2027                         } else {
2028                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2029                         }
2030
2031                         switch (iptr->op1) {
2032                         case TYPE_INT:
2033                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2034                                 M_ILD(d, s1, disp);
2035                                 break;
2036                         case TYPE_LNG:
2037                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
2038                                 if (GET_HIGH_REG(d) == s1) {
2039                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
2040                                         M_ILD(GET_HIGH_REG(d), s1, disp);
2041                                 } else {
2042                                         M_ILD(GET_HIGH_REG(d), s1, disp);
2043                                         M_ILD(GET_LOW_REG(d), s1, disp + 4);
2044                                 }
2045                                 break;
2046                         case TYPE_ADR:
2047                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2048                                 M_ALD(d, s1, disp);
2049                                 break;
2050                         case TYPE_FLT:
2051                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2052                                 M_FLD(d, s1, disp);
2053                                 break;
2054                         case TYPE_DBL:
2055                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2056                                 M_DLD(d, s1, disp);
2057                                 break;
2058                         }
2059                         emit_store(jd, iptr, iptr->dst, d);
2060                         break;
2061
2062                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2063                                       /* op1 = type, val.i = field offset             */
2064
2065                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2066                         gen_nullptr_check(s1);
2067
2068                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2069                                 if (IS_2_WORD_TYPE(iptr->op1)) {
2070                                         s2 = emit_load_s2(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP3));
2071                                 } else {
2072                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2073                                 }
2074                         } else {
2075                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2076                         }
2077
2078                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2079                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2080                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2081
2082                                 if (opt_showdisassemble)
2083                                         M_NOP;
2084
2085                                 disp = 0;
2086
2087                         } else {
2088                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2089                         }
2090
2091                         switch (iptr->op1) {
2092                         case TYPE_INT:
2093                                 M_IST(s2, s1, disp);
2094                                 break;
2095                         case TYPE_LNG:
2096                                 M_IST(GET_LOW_REG(s2), s1, disp + 4);      /* keep this order */
2097                                 M_IST(GET_HIGH_REG(s2), s1, disp);         /* keep this order */
2098                                 break;
2099                         case TYPE_ADR:
2100                                 M_AST(s2, s1, disp);
2101                                 break;
2102                         case TYPE_FLT:
2103                                 M_FST(s2, s1, disp);
2104                                 break;
2105                         case TYPE_DBL:
2106                                 M_DST(s2, s1, disp);
2107                                 break;
2108                         }
2109                         break;
2110
2111
2112                 /* branch operations **************************************************/
2113
2114                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2115
2116                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2117                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2118
2119 #ifdef ENABLE_VERIFIER
2120                         if (iptr->val.a) {
2121                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2122                                                                         (unresolved_class *) iptr->val.a, 0);
2123
2124                                 if (opt_showdisassemble)
2125                                         M_NOP;
2126                         }
2127 #endif /* ENABLE_VERIFIER */
2128
2129                         disp = dseg_addaddress(cd, asm_handle_exception);
2130                         M_ALD(REG_ITMP2, REG_PV, disp);
2131                         M_MTCTR(REG_ITMP2);
2132
2133                         if (jd->isleafmethod)
2134                                 M_MFLR(REG_ITMP3);                          /* save LR        */
2135
2136                         M_BL(0);                                        /* get current PC */
2137                         M_MFLR(REG_ITMP2_XPC);
2138
2139                         if (jd->isleafmethod)
2140                                 M_MTLR(REG_ITMP3);                          /* restore LR     */
2141
2142                         M_RTS;                                          /* jump to CTR    */
2143                         ALIGNCODENOP;
2144                         break;
2145
2146                 case ICMD_GOTO:         /* ... ==> ...                                */
2147                                         /* op1 = target JavaVM pc                     */
2148                         M_BR(0);
2149                         codegen_addreference(cd, (basicblock *) iptr->target);
2150                         ALIGNCODENOP;
2151                         break;
2152
2153                 case ICMD_JSR:          /* ... ==> ...                                */
2154                                         /* op1 = target JavaVM pc                     */
2155
2156                         if (jd->isleafmethod)
2157                                 M_MFLR(REG_ITMP2);
2158
2159                         M_BL(0);
2160                         M_MFLR(REG_ITMP1);
2161                         M_IADD_IMM(REG_ITMP1, jd->isleafmethod ? 4*4 : 3*4, REG_ITMP1);
2162
2163                         if (jd->isleafmethod)
2164                                 M_MTLR(REG_ITMP2);
2165
2166                         M_BR(0);
2167                         codegen_addreference(cd, (basicblock *) iptr->target);
2168                         break;
2169
2170                 case ICMD_RET:          /* ... ==> ...                                */
2171                                         /* op1 = local variable                       */
2172
2173                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2174                         if (var->flags & INMEMORY) {
2175                                 M_ALD(REG_ITMP1, REG_SP, var->regoff * 4);
2176                                 M_MTCTR(REG_ITMP1);
2177                         } else {
2178                                 M_MTCTR(var->regoff);
2179                         }
2180                         M_RTS;
2181                         ALIGNCODENOP;
2182                         break;
2183
2184                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2185                                         /* op1 = target JavaVM pc                     */
2186
2187                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2188                         M_TST(s1);
2189                         M_BEQ(0);
2190                         codegen_addreference(cd, (basicblock *) iptr->target);
2191                         break;
2192
2193                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2194                                         /* op1 = target JavaVM pc                     */
2195
2196                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2197                         M_TST(s1);
2198                         M_BNE(0);
2199                         codegen_addreference(cd, (basicblock *) iptr->target);
2200                         break;
2201
2202                 case ICMD_IFLT:
2203                 case ICMD_IFLE:
2204                 case ICMD_IFNE:
2205                 case ICMD_IFGT:
2206                 case ICMD_IFGE:
2207                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2208                                         /* op1 = target JavaVM pc, val.i = constant   */
2209
2210                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2211                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767))
2212                                 M_CMPI(s1, iptr->val.i);
2213                         else {
2214                                 ICONST(REG_ITMP2, iptr->val.i);
2215                                 M_CMP(s1, REG_ITMP2);
2216                         }
2217                         switch (iptr->opc) {
2218                         case ICMD_IFLT:
2219                                 M_BLT(0);
2220                                 break;
2221                         case ICMD_IFLE:
2222                                 M_BLE(0);
2223                                 break;
2224                         case ICMD_IFNE:
2225                                 M_BNE(0);
2226                                 break;
2227                         case ICMD_IFGT:
2228                                 M_BGT(0);
2229                                 break;
2230                         case ICMD_IFGE:
2231                                 M_BGE(0);
2232                                 break;
2233                         case ICMD_IFEQ:
2234                                 M_BEQ(0);
2235                                 break;
2236                         }
2237                         codegen_addreference(cd, (basicblock *) iptr->target);
2238                         break;
2239
2240
2241                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2242                                         /* op1 = target JavaVM pc, val.l = constant   */
2243
2244                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2245                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2246                         if (iptr->val.l == 0) {
2247                                 M_OR_TST(s1, s2, REG_ITMP3);
2248                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2249                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2250                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2251                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2252                         } else {
2253                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2254                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2255                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2256                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2257                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2258                         }
2259                         M_BEQ(0);
2260                         codegen_addreference(cd, (basicblock *) iptr->target);
2261                         break;
2262
2263                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2264                                         /* op1 = target JavaVM pc, val.l = constant   */
2265                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2266                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2267                         if (iptr->val.l == 0) {
2268                                 /* if high word is less than zero, the whole long is too */
2269                                 M_CMPI(s2, 0);
2270                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2271                                 M_CMPI(s2, 0);
2272                                 M_BLT(0);
2273                                 codegen_addreference(cd, (basicblock *) iptr->target);
2274                                 M_BGT(2);
2275                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2276                         } else {
2277                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2278                                 M_CMP(s2, REG_ITMP3);
2279                                 M_BLT(0);
2280                                 codegen_addreference(cd, (basicblock *) iptr->target);
2281                                 M_BGT(3);
2282                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2283                                 M_CMPU(s1, REG_ITMP3);
2284                         }
2285                         M_BLT(0);
2286                         codegen_addreference(cd, (basicblock *) iptr->target);
2287                         break;
2288
2289                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2290                                         /* op1 = target JavaVM pc, val.l = constant   */
2291
2292                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2293                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2294 /*                      if (iptr->val.l == 0) { */
2295 /*                              M_OR(s1, s2, REG_ITMP3); */
2296 /*                              M_CMPI(REG_ITMP3, 0); */
2297
2298 /*                      } else  */
2299                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2300                                 M_CMPI(s2, 0);
2301                                 M_BLT(0);
2302                                 codegen_addreference(cd, (basicblock *) iptr->target);
2303                                 M_BGT(2);
2304                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2305                         } else {
2306                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2307                                 M_CMP(s2, REG_ITMP3);
2308                                 M_BLT(0);
2309                                 codegen_addreference(cd, (basicblock *) iptr->target);
2310                                 M_BGT(3);
2311                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2312                                 M_CMPU(s1, REG_ITMP3);
2313                         }
2314                         M_BLE(0);
2315                         codegen_addreference(cd, (basicblock *) iptr->target);
2316                         break;
2317
2318                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2319                                         /* op1 = target JavaVM pc, val.l = constant   */
2320
2321                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2322                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2323                         if (iptr->val.l == 0) {
2324                                 M_OR_TST(s1, s2, REG_ITMP3);
2325                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2326                                 M_XOR_IMM(s2, 0, REG_ITMP2);
2327                                 M_XOR_IMM(s1, iptr->val.l & 0xffff, REG_ITMP1);
2328                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2329                         } else {
2330                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2331                                 M_XOR(s1, REG_ITMP3, REG_ITMP1);
2332                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2333                                 M_XOR(s2, REG_ITMP3, REG_ITMP2);
2334                                 M_OR_TST(REG_ITMP1, REG_ITMP2, REG_ITMP3);
2335                         }
2336                         M_BNE(0);
2337                         codegen_addreference(cd, (basicblock *) iptr->target);
2338                         break;
2339
2340                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2341                                         /* op1 = target JavaVM pc, val.l = constant   */
2342
2343                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2344                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2345 /*                      if (iptr->val.l == 0) { */
2346 /*                              M_OR(s1, s2, REG_ITMP3); */
2347 /*                              M_CMPI(REG_ITMP3, 0); */
2348
2349 /*                      } else  */
2350                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2351                                 M_CMPI(s2, 0);
2352                                 M_BGT(0);
2353                                 codegen_addreference(cd, (basicblock *) iptr->target);
2354                                 M_BLT(2);
2355                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2356                         } else {
2357                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2358                                 M_CMP(s2, REG_ITMP3);
2359                                 M_BGT(0);
2360                                 codegen_addreference(cd, (basicblock *) iptr->target);
2361                                 M_BLT(3);
2362                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2363                                 M_CMPU(s1, REG_ITMP3);
2364                         }
2365                         M_BGT(0);
2366                         codegen_addreference(cd, (basicblock *) iptr->target);
2367                         break;
2368
2369                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2370                                         /* op1 = target JavaVM pc, val.l = constant   */
2371
2372                         s1 = emit_load_s1_low(jd, iptr, src, REG_ITMP1);
2373                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2374                         if (iptr->val.l == 0) {
2375                                 /* if high word is greater equal zero, the whole long is too */
2376                                 M_CMPI(s2, 0);
2377                         } else if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
2378                                 M_CMPI(s2, 0);
2379                                 M_BGT(0);
2380                                 codegen_addreference(cd, (basicblock *) iptr->target);
2381                                 M_BLT(2);
2382                                 M_CMPUI(s1, iptr->val.l & 0xffff);
2383                         } else {
2384                                 ICONST(REG_ITMP3, iptr->val.l >> 32);
2385                                 M_CMP(s2, REG_ITMP3);
2386                                 M_BGT(0);
2387                                 codegen_addreference(cd, (basicblock *) iptr->target);
2388                                 M_BLT(3);
2389                                 ICONST(REG_ITMP3, iptr->val.l & 0xffffffff);
2390                                 M_CMPU(s1, REG_ITMP3);
2391                         }
2392                         M_BGE(0);
2393                         codegen_addreference(cd, (basicblock *) iptr->target);
2394                         break;
2395
2396                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2397                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
2398
2399                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2400                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2401                         M_CMP(s1, s2);
2402                         M_BEQ(0);
2403                         codegen_addreference(cd, (basicblock *) iptr->target);
2404                         break;
2405
2406                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2407                                         /* op1 = target JavaVM pc                     */
2408
2409                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2410                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2411                         M_CMP(s1, s2);
2412                         /* load low-bits before the branch, so we know the distance */
2413                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2414                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2415                         M_BNE(2);
2416                         M_CMP(s1, s2);
2417                         M_BEQ(0);
2418                         codegen_addreference(cd, (basicblock *) iptr->target);
2419                         break;
2420
2421                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2422                 case ICMD_IF_ACMPNE:    /* op1 = target JavaVM pc                     */
2423
2424                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2425                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2426                         M_CMP(s1, s2);
2427                         M_BNE(0);
2428                         codegen_addreference(cd, (basicblock *) iptr->target);
2429                         break;
2430
2431                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
2432                                         /* op1 = target JavaVM pc                     */
2433
2434                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2435                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2436                         M_CMP(s1, s2);
2437                         M_BNE(0);
2438                         codegen_addreference(cd, (basicblock *) iptr->target);
2439                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2440                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2441                         M_CMP(s1, s2);
2442                         M_BNE(0);
2443                         codegen_addreference(cd, (basicblock *) iptr->target);
2444                         break;
2445
2446                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2447                                         /* op1 = target JavaVM pc                     */
2448
2449                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2450                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2451                         M_CMP(s1, s2);
2452                         M_BLT(0);
2453                         codegen_addreference(cd, (basicblock *) iptr->target);
2454                         break;
2455
2456                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
2457                                         /* op1 = target JavaVM pc                     */
2458
2459                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2460                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2461                         M_CMP(s1, s2);
2462                         M_BLT(0);
2463                         codegen_addreference(cd, (basicblock *) iptr->target);
2464                         /* load low-bits before the branch, so we know the distance */
2465                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2466                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2467                         M_BGT(2);
2468                         M_CMPU(s1, s2);
2469                         M_BLT(0);
2470                         codegen_addreference(cd, (basicblock *) iptr->target);
2471                         break;
2472
2473                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2474                                         /* op1 = target JavaVM pc                     */
2475
2476                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2477                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2478                         M_CMP(s1, s2);
2479                         M_BGT(0);
2480                         codegen_addreference(cd, (basicblock *) iptr->target);
2481                         break;
2482
2483                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
2484                                         /* op1 = target JavaVM pc                     */
2485
2486                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2487                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2488                         M_CMP(s1, s2);
2489                         M_BGT(0);
2490                         codegen_addreference(cd, (basicblock *) iptr->target);
2491                         /* load low-bits before the branch, so we know the distance */
2492                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2493                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2494                         M_BLT(2);
2495                         M_CMPU(s1, s2);
2496                         M_BGT(0);
2497                         codegen_addreference(cd, (basicblock *) iptr->target);
2498                         break;
2499
2500                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2501                                         /* op1 = target JavaVM pc                     */
2502
2503                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2504                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2505                         M_CMP(s1, s2);
2506                         M_BLE(0);
2507                         codegen_addreference(cd, (basicblock *) iptr->target);
2508                         break;
2509
2510                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
2511                                         /* op1 = target JavaVM pc                     */
2512
2513                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2514                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2515                         M_CMP(s1, s2);
2516                         M_BLT(0);
2517                         codegen_addreference(cd, (basicblock *) iptr->target);
2518                         /* load low-bits before the branch, so we know the distance */
2519                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2520                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2521                         M_BGT(2);
2522                         M_CMPU(s1, s2);
2523                         M_BLE(0);
2524                         codegen_addreference(cd, (basicblock *) iptr->target);
2525                         break;
2526
2527                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2528                                         /* op1 = target JavaVM pc                     */
2529
2530                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2531                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2532                         M_CMP(s1, s2);
2533                         M_BGE(0);
2534                         codegen_addreference(cd, (basicblock *) iptr->target);
2535                         break;
2536
2537                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
2538                                         /* op1 = target JavaVM pc                     */
2539
2540                         s1 = emit_load_s1_high(jd, iptr, src->prev, REG_ITMP1);
2541                         s2 = emit_load_s2_high(jd, iptr, src, REG_ITMP2);
2542                         M_CMP(s1, s2);
2543                         M_BGT(0);
2544                         codegen_addreference(cd, (basicblock *) iptr->target);
2545                         /* load low-bits before the branch, so we know the distance */
2546                         s1 = emit_load_s1_low(jd, iptr, src->prev, REG_ITMP1);
2547                         s2 = emit_load_s2_low(jd, iptr, src, REG_ITMP2);
2548                         M_BLT(2);
2549                         M_CMPU(s1, s2);
2550                         M_BGE(0);
2551                         codegen_addreference(cd, (basicblock *) iptr->target);
2552                         break;
2553
2554                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2555
2556                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2557                         M_INTMOVE(s1, REG_RESULT);
2558                         goto nowperformreturn;
2559
2560                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2561
2562                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2563                         M_INTMOVE(s1, REG_RESULT);
2564
2565 #ifdef ENABLE_VERIFIER
2566                         if (iptr->val.a) {
2567                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2568                                                                         (unresolved_class *) iptr->val.a, 0);
2569
2570                                 if (opt_showdisassemble)
2571                                         M_NOP;
2572                         }
2573 #endif /* ENABLE_VERIFIER */
2574                         goto nowperformreturn;
2575
2576                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2577
2578                         s1 = emit_load_s1(jd, iptr, src, PACK_REGS(REG_RESULT2, REG_RESULT));
2579                         M_LNGMOVE(s1, PACK_REGS(REG_RESULT2, REG_RESULT));
2580                         goto nowperformreturn;
2581
2582                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2583                 case ICMD_DRETURN:
2584
2585                         s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2586                         M_FLTMOVE(s1, REG_FRESULT);
2587                         goto nowperformreturn;
2588
2589                 case ICMD_RETURN:      /* ...  ==> ...                                */
2590
2591 nowperformreturn:
2592                         {
2593                         s4 i, p;
2594
2595                         p = stackframesize;
2596
2597                         /* call trace function */
2598
2599                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
2600                                 M_MFLR(REG_ZERO);
2601                                 M_LDA(REG_SP, REG_SP, -10 * 8);
2602                                 M_DST(REG_FRESULT, REG_SP, 48+0);
2603                                 M_IST(REG_RESULT, REG_SP, 48+8);
2604                                 M_AST(REG_ZERO, REG_SP, 48+12);
2605                                 M_IST(REG_RESULT2, REG_SP, 48+16);
2606
2607                                 /* keep this order */
2608                                 switch (iptr->opc) {
2609                                 case ICMD_IRETURN:
2610                                 case ICMD_ARETURN:
2611 #if defined(__DARWIN__)
2612                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2613                                         M_CLR(rd->argintregs[1]);
2614 #else
2615                                         M_MOV(REG_RESULT, rd->argintregs[3]);
2616                                         M_CLR(rd->argintregs[2]);
2617 #endif
2618                                         break;
2619
2620                                 case ICMD_LRETURN:
2621 #if defined(__DARWIN__)
2622                                         M_MOV(REG_RESULT2, rd->argintregs[2]);
2623                                         M_MOV(REG_RESULT, rd->argintregs[1]);
2624 #else
2625                                         M_MOV(REG_RESULT2, rd->argintregs[3]);
2626                                         M_MOV(REG_RESULT, rd->argintregs[2]);
2627 #endif
2628                                         break;
2629                                 }
2630
2631                                 disp = dseg_addaddress(cd, m);
2632                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2633
2634                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
2635                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
2636                                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
2637                                 M_ALD(REG_ITMP2, REG_PV, disp);
2638                                 M_MTCTR(REG_ITMP2);
2639                                 M_JSR;
2640
2641                                 M_DLD(REG_FRESULT, REG_SP, 48+0);
2642                                 M_ILD(REG_RESULT, REG_SP, 48+8);
2643                                 M_ALD(REG_ZERO, REG_SP, 48+12);
2644                                 M_ILD(REG_RESULT2, REG_SP, 48+16);
2645                                 M_LDA(REG_SP, REG_SP, 10 * 8);
2646                                 M_MTLR(REG_ZERO);
2647                         }
2648
2649 #if defined(ENABLE_THREADS)
2650                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2651                                 disp = dseg_addaddress(cd, LOCK_monitor_exit);
2652                                 M_ALD(REG_ITMP3, REG_PV, disp);
2653                                 M_MTCTR(REG_ITMP3);
2654
2655                                 /* we need to save the proper return value */
2656
2657                                 switch (iptr->opc) {
2658                                 case ICMD_LRETURN:
2659                                         M_IST(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2660                                         /* fall through */
2661                                 case ICMD_IRETURN:
2662                                 case ICMD_ARETURN:
2663                                         M_IST(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2664                                         break;
2665                                 case ICMD_FRETURN:
2666                                         M_FST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2667                                         break;
2668                                 case ICMD_DRETURN:
2669                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2670                                         break;
2671                                 }
2672
2673                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 4);
2674                                 M_JSR;
2675
2676                                 /* and now restore the proper return value */
2677
2678                                 switch (iptr->opc) {
2679                                 case ICMD_LRETURN:
2680                                         M_ILD(REG_RESULT2, REG_SP, rd->memuse * 4 + 8);
2681                                         /* fall through */
2682                                 case ICMD_IRETURN:
2683                                 case ICMD_ARETURN:
2684                                         M_ILD(REG_RESULT , REG_SP, rd->memuse * 4 + 4);
2685                                         break;
2686                                 case ICMD_FRETURN:
2687                                         M_FLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2688                                         break;
2689                                 case ICMD_DRETURN:
2690                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 4 + 4);
2691                                         break;
2692                                 }
2693                         }
2694 #endif
2695
2696                         /* restore return address                                         */
2697
2698                         if (!jd->isleafmethod) {
2699                                 /* ATTENTION: Don't use REG_ZERO (r0) here, as M_ALD
2700                                    may have a displacement overflow. */
2701
2702                                 M_ALD(REG_ITMP1, REG_SP, p * 4 + LA_LR_OFFSET);
2703                                 M_MTLR(REG_ITMP1);
2704                         }
2705
2706                         /* restore saved registers                                        */
2707
2708                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2709                                 p--; M_ILD(rd->savintregs[i], REG_SP, p * 4);
2710                         }
2711                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2712                                 p -= 2; M_DLD(rd->savfltregs[i], REG_SP, p * 4);
2713                         }
2714
2715                         /* deallocate stack                                               */
2716
2717                         if (stackframesize)
2718                                 M_LDA(REG_SP, REG_SP, stackframesize * 4);
2719
2720                         M_RET;
2721                         ALIGNCODENOP;
2722                         }
2723                         break;
2724
2725
2726                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2727                         {
2728                         s4 i, l, *s4ptr;
2729                         void **tptr;
2730
2731                         tptr = (void **) iptr->target;
2732
2733                         s4ptr = iptr->val.a;
2734                         l = s4ptr[1];                          /* low     */
2735                         i = s4ptr[2];                          /* high    */
2736
2737                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2738                         if (l == 0) {
2739                                 M_INTMOVE(s1, REG_ITMP1);
2740                         } else if (l <= 32768) {
2741                                 M_LDA(REG_ITMP1, s1, -l);
2742                         } else {
2743                                 ICONST(REG_ITMP2, l);
2744                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2745                         }
2746                         i = i - l + 1;
2747
2748                         /* range check */
2749
2750                         M_CMPUI(REG_ITMP1, i - 1);
2751                         M_BGT(0);
2752                         codegen_addreference(cd, (basicblock *) tptr[0]);
2753
2754                         /* build jump table top down and use address of lowest entry */
2755
2756                         /* s4ptr += 3 + i; */
2757                         tptr += i;
2758
2759                         while (--i >= 0) {
2760                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2761                                 --tptr;
2762                         }
2763                         }
2764
2765                         /* length of dataseg after last dseg_addtarget is used by load */
2766
2767                         M_SLL_IMM(REG_ITMP1, 2, REG_ITMP1);
2768                         M_IADD(REG_ITMP1, REG_PV, REG_ITMP2);
2769                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2770                         M_MTCTR(REG_ITMP2);
2771                         M_RTS;
2772                         ALIGNCODENOP;
2773                         break;
2774
2775
2776                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2777                         {
2778                         s4 i, l, val, *s4ptr;
2779                         void **tptr;
2780
2781                         tptr = (void **) iptr->target;
2782
2783                         s4ptr = iptr->val.a;
2784                         l = s4ptr[0];                          /* default  */
2785                         i = s4ptr[1];                          /* count    */
2786
2787                         MCODECHECK((i<<2)+8);
2788                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2789                         while (--i >= 0) {
2790                                 s4ptr += 2;
2791                                 ++tptr;
2792
2793                                 val = s4ptr[0];
2794                                 if ((val >= -32768) && (val <= 32767)) {
2795                                         M_CMPI(s1, val);
2796                                 } else {
2797                                         a = dseg_adds4(cd, val);
2798                                         M_ILD(REG_ITMP2, REG_PV, a);
2799                                         M_CMP(s1, REG_ITMP2);
2800                                 }
2801                                 M_BEQ(0);
2802                                 codegen_addreference(cd, (basicblock *) tptr[0]);
2803                         }
2804
2805                         M_BR(0);
2806                         tptr = (void **) iptr->target;
2807                         codegen_addreference(cd, (basicblock *) tptr[0]);
2808
2809                         ALIGNCODENOP;
2810                         break;
2811                         }
2812
2813
2814                 case ICMD_BUILTIN:      /* ..., [arg1, [arg2 ...]] ==> ...            */
2815                                         /* op1 = arg count val.a = builtintable entry */
2816
2817                         bte = iptr->val.a;
2818                         md = bte->md;
2819                         goto gen_method;
2820
2821                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2822                                         /* op1 = arg count, val.a = method pointer    */
2823
2824                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2825                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2826                 case ICMD_INVOKEINTERFACE:
2827
2828                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2829                                 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
2830                                 lm = NULL;
2831                         }
2832                         else {
2833                                 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
2834                                 md = lm->parseddesc;
2835                         }
2836
2837 gen_method:
2838                         s3 = md->paramcount;
2839
2840                         MCODECHECK((s3 << 1) + 64);
2841
2842                         /* copy arguments to registers or stack location */
2843
2844                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2845                                 if (src->varkind == ARGVAR)
2846                                         continue;
2847                                 if (IS_INT_LNG_TYPE(src->type)) {
2848                                         if (!md->params[s3].inmemory) {
2849                                                 if (IS_2_WORD_TYPE(src->type)) {
2850                                                         s1 = PACK_REGS(
2851                                                    rd->argintregs[GET_LOW_REG(md->params[s3].regoff)],
2852                                                    rd->argintregs[GET_HIGH_REG(md->params[s3].regoff)]);
2853                                                         d = emit_load_s1(jd, iptr, src, s1);
2854                                                         M_LNGMOVE(d, s1);
2855                                                 } else {
2856                                                         s1 = rd->argintregs[md->params[s3].regoff];
2857                                                         d = emit_load_s1(jd, iptr, src, s1);
2858                                                         M_INTMOVE(d, s1);
2859                                                 }
2860
2861                                         } else {
2862                                                 if (IS_2_WORD_TYPE(src->type)) {
2863                                                         d = emit_load_s1(jd, iptr, src, PACK_REGS(REG_ITMP2, REG_ITMP1));
2864                                                         M_LST(d, REG_SP, md->params[s3].regoff * 4);
2865                                                 } else {
2866                                                         d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2867                                                         M_IST(d, REG_SP, md->params[s3].regoff * 4);
2868                                                 }
2869                                         }
2870
2871                                 } else {
2872                                         if (!md->params[s3].inmemory) {
2873                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2874                                                 d = emit_load_s1(jd, iptr, src, s1);
2875                                                 M_FLTMOVE(d, s1);
2876
2877                                         } else {
2878                                                 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
2879                                                 if (IS_2_WORD_TYPE(src->type))
2880                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2881                                                 else
2882                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2883                                         }
2884                                 }
2885                         } /* end of for */
2886
2887                         switch (iptr->opc) {
2888                         case ICMD_BUILTIN:
2889                                 disp = dseg_addaddress(cd, bte->fp);
2890                                 d = md->returntype.type;
2891
2892                                 M_ALD(REG_PV, REG_PV, disp);  /* pointer to built-in-function */
2893                                 M_MTCTR(REG_PV);
2894                                 M_JSR;
2895                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2896                                 M_MFLR(REG_ITMP1);
2897                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2898
2899                                 /* if op1 == true, we need to check for an exception */
2900
2901                                 if (iptr->op1 == true) {
2902                                         M_CMPI(REG_RESULT, 0);
2903                                         M_BEQ(0);
2904                                         codegen_add_fillinstacktrace_ref(cd);
2905                                 }
2906                                 break;
2907
2908                         case ICMD_INVOKESPECIAL:
2909                                 gen_nullptr_check(rd->argintregs[0]);
2910                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
2911                                 /* fall through */
2912
2913                         case ICMD_INVOKESTATIC:
2914                                 if (lm == NULL) {
2915                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2916
2917                                         disp = dseg_addaddress(cd, NULL);
2918
2919                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2920                                                                                 um, disp);
2921
2922                                         if (opt_showdisassemble)
2923                                                 M_NOP;
2924
2925                                         d = md->returntype.type;
2926
2927                                 } else {
2928                                         disp = dseg_addaddress(cd, lm->stubroutine);
2929                                         d = md->returntype.type;
2930                                 }
2931
2932                                 M_ALD(REG_PV, REG_PV, disp);
2933                                 M_MTCTR(REG_PV);
2934                                 M_JSR;
2935                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2936                                 M_MFLR(REG_ITMP1);
2937                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2938                                 break;
2939
2940                         case ICMD_INVOKEVIRTUAL:
2941                                 gen_nullptr_check(rd->argintregs[0]);
2942
2943                                 if (lm == NULL) {
2944                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2945
2946                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2947
2948                                         if (opt_showdisassemble)
2949                                                 M_NOP;
2950
2951                                         s1 = 0;
2952                                         d = md->returntype.type;
2953
2954                                 } else {
2955                                         s1 = OFFSET(vftbl_t, table[0]) +
2956                                                 sizeof(methodptr) * lm->vftblindex;
2957                                         d = md->returntype.type;
2958                                 }
2959
2960                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2961                                           OFFSET(java_objectheader, vftbl));
2962                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2963                                 M_MTCTR(REG_PV);
2964                                 M_JSR;
2965                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2966                                 M_MFLR(REG_ITMP1);
2967                                 M_LDA(REG_PV, REG_ITMP1, -disp);
2968                                 break;
2969
2970                         case ICMD_INVOKEINTERFACE:
2971                                 gen_nullptr_check(rd->argintregs[0]);
2972
2973                                 if (lm == NULL) {
2974                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2975
2976                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2977
2978                                         if (opt_showdisassemble)
2979                                                 M_NOP;
2980
2981                                         s1 = 0;
2982                                         s2 = 0;
2983                                         d = md->returntype.type;
2984
2985                                 } else {
2986                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2987                                                 sizeof(methodptr*) * lm->class->index;
2988
2989                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2990
2991                                         d = md->returntype.type;
2992                                 }
2993
2994                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
2995                                           OFFSET(java_objectheader, vftbl));
2996                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2997                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2998                                 M_MTCTR(REG_PV);
2999                                 M_JSR;
3000                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3001                                 M_MFLR(REG_ITMP1);
3002                                 M_LDA(REG_PV, REG_ITMP1, -disp);
3003                                 break;
3004                         }
3005
3006                         /* d contains return type */
3007
3008                         if (d != TYPE_VOID) {
3009                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3010                                         if (IS_2_WORD_TYPE(iptr->dst->type)) {
3011                                                 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst,
3012                                                                                 PACK_REGS(REG_RESULT2, REG_RESULT));
3013                                                 M_LNGMOVE(PACK_REGS(REG_RESULT2, REG_RESULT), s1);
3014                                         } else {
3015                                                 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3016                                                 M_INTMOVE(REG_RESULT, s1);
3017                                         }
3018                                 } else {
3019                                         s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
3020                                         M_FLTMOVE(REG_FRESULT, s1);
3021                                 }
3022                                 emit_store(jd, iptr, iptr->dst, s1);
3023                         }
3024                         break;
3025
3026
3027                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3028                                       /* op1:   0 == array, 1 == class                */
3029                                       /* val.a: (classinfo*) superclass               */
3030
3031                         /*  superclass is an interface:
3032                          *
3033                          *  OK if ((sub == NULL) ||
3034                          *         (sub->vftbl->interfacetablelength > super->index) &&
3035                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3036                          *
3037                          *  superclass is a class:
3038                          *
3039                          *  OK if ((sub == NULL) || (0
3040                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3041                          *         super->vftbl->diffvall));
3042                          */
3043
3044                         if (iptr->op1 == 1) {
3045                                 /* object type cast-check */
3046
3047                                 classinfo *super;
3048                                 vftbl_t   *supervftbl;
3049                                 s4         superindex;
3050
3051                                 super = (classinfo *) iptr->val.a;
3052
3053                                 if (!super) {
3054                                         superindex = 0;
3055                                         supervftbl = NULL;
3056
3057                                 } else {
3058                                         superindex = super->index;
3059                                         supervftbl = super->vftbl;
3060                                 }
3061
3062 #if defined(ENABLE_THREADS)
3063                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3064 #endif
3065                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3066
3067                                 /* calculate interface checkcast code size */
3068
3069                                 s2 = 7;
3070                                 if (!super)
3071                                         s2 += (opt_showdisassemble ? 1 : 0);
3072
3073                                 /* calculate class checkcast code size */
3074
3075                                 s3 = 8 + (s1 == REG_ITMP1);
3076                                 if (!super)
3077                                         s3 += (opt_showdisassemble ? 1 : 0);
3078
3079                                 /* if class is not resolved, check which code to call */
3080
3081                                 if (!super) {
3082                                         M_TST(s1);
3083                                         M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3084
3085                                         disp = dseg_adds4(cd, 0);                     /* super->flags */
3086
3087                                         codegen_addpatchref(cd,
3088                                                                                 PATCHER_checkcast_instanceof_flags,
3089                                                                                 (constant_classref *) iptr->target,
3090                                                                                 disp);
3091
3092                                         if (opt_showdisassemble)
3093                                                 M_NOP;
3094
3095                                         M_ILD(REG_ITMP2, REG_PV, disp);
3096                                         M_AND_IMM(REG_ITMP2, ACC_INTERFACE, REG_ITMP2);
3097                                         M_BEQ(s2 + 1);
3098                                 }
3099
3100                                 /* interface checkcast code */
3101
3102                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3103                                         if (super != NULL) {
3104                                                 M_TST(s1);
3105                                                 M_BEQ(s2);
3106                                         }
3107                                         else {
3108                                                 codegen_addpatchref(cd,
3109                                                                                         PATCHER_checkcast_instanceof_interface,
3110                                                                                         (constant_classref *) iptr->target,
3111                                                                                         0);
3112
3113                                                 if (opt_showdisassemble)
3114                                                         M_NOP;
3115                                         }
3116
3117                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3118                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3119                                         M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3120                                         M_BLE(0);
3121                                         codegen_add_classcastexception_ref(cd, s1);
3122                                         M_ALD(REG_ITMP3, REG_ITMP2,
3123                                                   OFFSET(vftbl_t, interfacetable[0]) -
3124                                                   superindex * sizeof(methodptr*));
3125                                         M_TST(REG_ITMP3);
3126                                         M_BEQ(0);
3127                                         codegen_add_classcastexception_ref(cd, s1);
3128
3129                                         if (super == NULL)
3130                                                 M_BR(s3);
3131                                 }
3132
3133                                 /* class checkcast code */
3134
3135                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3136                                         disp = dseg_addaddress(cd, supervftbl);
3137
3138                                         if (super != NULL) {
3139                                                 M_TST(s1);
3140                                                 M_BEQ(s3);
3141                                         }
3142                                         else {
3143                                                 codegen_addpatchref(cd, PATCHER_checkcast_class,
3144                                                                                         (constant_classref *) iptr->target,
3145                                                                                         disp);
3146
3147                                                 if (opt_showdisassemble)
3148                                                         M_NOP;
3149                                         }
3150
3151                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3152 #if defined(ENABLE_THREADS)
3153                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3154 #endif
3155                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3156                                         M_ALD(REG_ITMP2, REG_PV, disp);
3157                                         if (s1 != REG_ITMP1) {
3158                                                 M_ILD(REG_ITMP1, REG_ITMP2, OFFSET(vftbl_t, baseval));
3159                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3160 #if defined(ENABLE_THREADS)
3161                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3162 #endif
3163                                                 M_ISUB(REG_ITMP3, REG_ITMP1, REG_ITMP3);
3164                                         } else {
3165                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3166                                                 M_ISUB(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3167                                                 M_ALD(REG_ITMP2, REG_PV, disp);
3168                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3169 #if defined(ENABLE_THREADS)
3170                                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3171 #endif
3172                                         }
3173                                         M_CMPU(REG_ITMP3, REG_ITMP2);
3174                                         M_BGT(0);
3175                                         codegen_add_classcastexception_ref(cd, s1);
3176                                 }
3177                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3178                         }
3179                         else {
3180                                 /* array type cast-check */
3181
3182                                 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3183                                 M_INTMOVE(s1, rd->argintregs[0]);
3184
3185                                 disp = dseg_addaddress(cd, iptr->val.a);
3186
3187                                 if (iptr->val.a == NULL) {
3188                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3189                                                                                 (constant_classref *) iptr->target,
3190                                                                                 disp);
3191
3192                                         if (opt_showdisassemble)
3193                                                 M_NOP;
3194                                 }
3195
3196                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3197                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3198                                 M_ALD(REG_ITMP2, REG_PV, disp);
3199                                 M_MTCTR(REG_ITMP2);
3200                                 M_JSR;
3201                                 M_TST(REG_RESULT);
3202                                 M_BEQ(0);
3203                                 codegen_add_classcastexception_ref(cd, s1);
3204
3205                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3206                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3207                         }
3208                         M_INTMOVE(s1, d);
3209                         emit_store(jd, iptr, iptr->dst, d);
3210                         break;
3211
3212                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3213                                       /* val.a: (classinfo*) superclass               */
3214
3215                         /*  superclass is an interface:
3216                          *
3217                          *  return (sub != NULL) &&
3218                          *         (sub->vftbl->interfacetablelength > super->index) &&
3219                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3220                          *
3221                          *  superclass is a class:
3222                          *
3223                          *  return ((sub != NULL) && (0
3224                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3225                          *          super->vftbl->diffvall));
3226                          */
3227
3228                         {
3229                         classinfo *super;
3230                         vftbl_t   *supervftbl;
3231                         s4         superindex;
3232
3233                         super = (classinfo *) iptr->val.a;
3234
3235                         if (!super) {
3236                                 superindex = 0;
3237                                 supervftbl = NULL;
3238
3239                         } else {
3240                                 superindex = super->index;
3241                                 supervftbl = super->vftbl;
3242                         }
3243
3244 #if defined(ENABLE_THREADS)
3245             codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3246 #endif
3247                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3248                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3249                         if (s1 == d) {
3250                                 M_MOV(s1, REG_ITMP1);
3251                                 s1 = REG_ITMP1;
3252                         }
3253
3254                         /* calculate interface instanceof code size */
3255
3256                         s2 = 8;
3257                         if (!super)
3258                                 s2 += (opt_showdisassemble ? 1 : 0);
3259
3260                         /* calculate class instanceof code size */
3261
3262                         s3 = 10;
3263                         if (!super)
3264                                 s3 += (opt_showdisassemble ? 1 : 0);
3265
3266                         M_CLR(d);
3267
3268                         /* if class is not resolved, check which code to call */
3269
3270                         if (!super) {
3271                                 M_TST(s1);
3272                                 M_BEQ(3 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3273
3274                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3275
3276                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3277                                                                         (constant_classref *) iptr->target, disp);
3278
3279                                 if (opt_showdisassemble)
3280                                         M_NOP;
3281
3282                                 M_ILD(REG_ITMP3, REG_PV, disp);
3283                                 M_AND_IMM(REG_ITMP3, ACC_INTERFACE, REG_ITMP3);
3284                                 M_BEQ(s2 + 1);
3285                         }
3286
3287                         /* interface instanceof code */
3288
3289                         if (!super || (super->flags & ACC_INTERFACE)) {
3290                                 if (super) {
3291                                         M_TST(s1);
3292                                         M_BEQ(s2);
3293
3294                                 } else {
3295                                         codegen_addpatchref(cd,
3296                                                                                 PATCHER_checkcast_instanceof_interface,
3297                                                                                 (constant_classref *) iptr->target, 0);
3298
3299                                         if (opt_showdisassemble)
3300                                                 M_NOP;
3301                                 }
3302
3303                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3304                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3305                                 M_LDATST(REG_ITMP3, REG_ITMP3, -superindex);
3306                                 M_BLE(4);
3307                                 M_ALD(REG_ITMP1, REG_ITMP1,
3308                                           OFFSET(vftbl_t, interfacetable[0]) -
3309                                           superindex * sizeof(methodptr*));
3310                                 M_TST(REG_ITMP1);
3311                                 M_BEQ(1);
3312                                 M_IADD_IMM(REG_ZERO, 1, d);
3313
3314                                 if (!super)
3315                                         M_BR(s3);
3316                         }
3317
3318                         /* class instanceof code */
3319
3320                         if (!super || !(super->flags & ACC_INTERFACE)) {
3321                                 disp = dseg_addaddress(cd, supervftbl);
3322
3323                                 if (super) {
3324                                         M_TST(s1);
3325                                         M_BEQ(s3);
3326
3327                                 } else {
3328                                         codegen_addpatchref(cd, PATCHER_instanceof_class,
3329                                                                                 (constant_classref *) iptr->target,
3330                                                                                 disp);
3331
3332                                         if (opt_showdisassemble) {
3333                                                 M_NOP;
3334                                         }
3335                                 }
3336
3337                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3338                                 M_ALD(REG_ITMP2, REG_PV, disp);
3339 #if defined(ENABLE_THREADS)
3340                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3341 #endif
3342                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3343                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3344                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3345 #if defined(ENABLE_THREADS)
3346                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3347 #endif
3348                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3349                                 M_CMPU(REG_ITMP1, REG_ITMP2);
3350                                 M_CLR(d);
3351                                 M_BGT(1);
3352                                 M_IADD_IMM(REG_ZERO, 1, d);
3353                         }
3354                         emit_store(jd, iptr, iptr->dst, d);
3355                         }
3356                         break;
3357
3358                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3359                                       /* op1 = dimension, val.a = class               */
3360
3361                         /* check for negative sizes and copy sizes to stack if necessary  */
3362
3363                         MCODECHECK((iptr->op1 << 1) + 64);
3364
3365                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3366                                 /* copy SAVEDVAR sizes to stack */
3367
3368                                 if (src->varkind != ARGVAR) {
3369                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3370 #if defined(__DARWIN__)
3371                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + INT_ARG_CNT) * 4);
3372 #else
3373                                         M_IST(s2, REG_SP, LA_SIZE + (s1 + 3) * 4);
3374 #endif
3375                                 }
3376                         }
3377
3378                         /* a0 = dimension count */
3379
3380                         ICONST(rd->argintregs[0], iptr->op1);
3381
3382                         /* is patcher function set? */
3383
3384                         if (iptr->val.a == NULL) {
3385                                 disp = dseg_addaddress(cd, NULL);
3386
3387                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3388                                                                         (constant_classref *) iptr->target, disp);
3389
3390                                 if (opt_showdisassemble)
3391                                         M_NOP;
3392
3393                         } else {
3394                                 disp = dseg_addaddress(cd, iptr->val.a);
3395                         }
3396
3397                         /* a1 = arraydescriptor */
3398
3399                         M_ALD(rd->argintregs[1], REG_PV, disp);
3400
3401                         /* a2 = pointer to dimensions = stack pointer */
3402
3403 #if defined(__DARWIN__)
3404                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + INT_ARG_CNT * 4);
3405 #else
3406                         M_LDA(rd->argintregs[2], REG_SP, LA_SIZE + 3 * 4);
3407 #endif
3408
3409                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3410                         M_ALD(REG_ITMP3, REG_PV, disp);
3411                         M_MTCTR(REG_ITMP3);
3412                         M_JSR;
3413
3414                         /* check for exception before result assignment */
3415
3416                         M_CMPI(REG_RESULT, 0);
3417                         M_BEQ(0);
3418                         codegen_add_fillinstacktrace_ref(cd);
3419
3420                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3421                         M_INTMOVE(REG_RESULT, d);
3422                         emit_store(jd, iptr, iptr->dst, d);
3423                         break;
3424
3425                 default:
3426                         *exceptionptr =
3427                                 new_internalerror("Unknown ICMD %d during code generation",
3428                                                                   iptr->opc);
3429                         return false;
3430         } /* switch */
3431
3432         } /* for instruction */
3433
3434         /* copy values to interface registers */
3435
3436         src = bptr->outstack;
3437         len = bptr->outdepth;
3438         MCODECHECK(64 + len);
3439 #if defined(ENABLE_LSRA)
3440         if (!opt_lsra)
3441 #endif
3442         while (src) {
3443                 len--;
3444                 if ((src->varkind != STACKVAR)) {
3445                         s2 = src->type;
3446                         if (IS_FLT_DBL_TYPE(s2)) {
3447                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
3448                                 if (!(rd->interfaces[len][s2].flags & INMEMORY))
3449                                         M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
3450                                 else
3451                                         M_DST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3452
3453                         } else {
3454                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3455                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3456                                         if (IS_2_WORD_TYPE(s2))
3457                                                 M_LNGMOVE(s1, rd->interfaces[len][s2].regoff);
3458                                         else
3459                                                 M_INTMOVE(s1, rd->interfaces[len][s2].regoff);
3460
3461                                 } else {
3462                                         if (IS_2_WORD_TYPE(s2))
3463                                                 M_LST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3464                                         else
3465                                                 M_IST(s1, REG_SP, rd->interfaces[len][s2].regoff * 4);
3466                                 }
3467                         }
3468                 }
3469                 src = src->prev;
3470         }
3471         } /* if (bptr -> flags >= BBREACHED) */
3472         } /* for basic block */
3473
3474         dseg_createlinenumbertable(cd);
3475
3476
3477         /* generate exception and patcher stubs */
3478
3479         {
3480                 exceptionref *eref;
3481                 patchref     *pref;
3482                 u4            mcode;
3483                 u1           *savedmcodeptr;
3484                 u1           *tmpmcodeptr;
3485
3486                 savedmcodeptr = NULL;
3487
3488                 /* generate exception stubs */
3489
3490                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3491                         gen_resolvebranch(cd->mcodebase + eref->branchpos,
3492                                                           eref->branchpos, cd->mcodeptr - cd->mcodebase);
3493
3494                         MCODECHECK(100);
3495
3496                         /* Move the value register to a temporary register, if
3497                            there is the need for it. */
3498
3499                         if (eref->reg != -1)
3500                                 M_MOV(eref->reg, REG_ITMP1);
3501
3502                         /* calcuate exception address */
3503
3504                         M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
3505
3506                         /* move function to call into REG_ITMP3 */
3507
3508                         disp = dseg_addaddress(cd, eref->function);
3509                         M_ALD(REG_ITMP3, REG_PV, disp);
3510
3511                         if (savedmcodeptr != NULL) {
3512                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3513                                 M_BR(disp);
3514                         }
3515                         else {
3516                                 savedmcodeptr = cd->mcodeptr;
3517
3518                                 if (jd->isleafmethod) {
3519                                         M_MFLR(REG_ZERO);
3520                                         M_AST(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3521                                 }
3522
3523                                 M_MOV(REG_PV, rd->argintregs[0]);
3524                                 M_MOV(REG_SP, rd->argintregs[1]);
3525
3526                                 if (jd->isleafmethod)
3527                                         M_MOV(REG_ZERO, rd->argintregs[2]);
3528                                 else
3529                                         M_ALD(rd->argintregs[2],
3530                                                   REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3531
3532                                 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3533                                 M_MOV(REG_ITMP1, rd->argintregs[4]);
3534
3535                                 M_STWU(REG_SP, REG_SP, -(LA_SIZE + 6 * 4));
3536                                 M_AST(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3537
3538                                 M_MTCTR(REG_ITMP3);
3539                                 M_JSR;
3540                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3541
3542                                 M_ALD(REG_ITMP2_XPC, REG_SP, LA_SIZE + 5 * 4);
3543                                 M_IADD_IMM(REG_SP, LA_SIZE + 6 * 4, REG_SP);
3544
3545                                 if (jd->isleafmethod) {
3546                                         /* XXX FIXME: REG_ZERO can cause problems here! */
3547                                         assert(stackframesize * 4 <= 32767);
3548
3549                                         M_ALD(REG_ZERO, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3550                                         M_MTLR(REG_ZERO);
3551                                 }
3552
3553                                 disp = dseg_addaddress(cd, asm_handle_exception);
3554                                 M_ALD(REG_ITMP3, REG_PV, disp);
3555                                 M_MTCTR(REG_ITMP3);
3556                                 M_RTS;
3557                         }
3558                 }
3559
3560
3561                 /* generate code patching stub call code */
3562
3563                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3564                         /* check code segment size */
3565
3566                         MCODECHECK(16);
3567
3568                         /* Get machine code which is patched back in later. The
3569                            call is 1 instruction word long. */
3570
3571                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3572
3573                         mcode = *((u4 *) tmpmcodeptr);
3574
3575                         /* Patch in the call to call the following code (done at
3576                            compile time). */
3577
3578                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3579                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3580
3581                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3582                         M_BR(disp);
3583
3584                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3585
3586                         /* create stack frame - keep stack 16-byte aligned */
3587
3588                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
3589
3590                         /* calculate return address and move it onto the stack */
3591
3592                         M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
3593                         M_AST_INTERN(REG_ITMP3, REG_SP, 5 * 4);
3594
3595                         /* move pointer to java_objectheader onto stack */
3596
3597 #if defined(ENABLE_THREADS)
3598                         /* order reversed because of data segment layout */
3599
3600                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3601                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3602                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3603
3604                         M_LDA(REG_ITMP3, REG_PV, disp);
3605                         M_AST_INTERN(REG_ITMP3, REG_SP, 4 * 4);
3606 #else
3607                         /* do nothing */
3608 #endif
3609
3610                         /* move machine code onto stack */
3611
3612                         disp = dseg_adds4(cd, mcode);
3613                         M_ILD(REG_ITMP3, REG_PV, disp);
3614                         M_IST_INTERN(REG_ITMP3, REG_SP, 3 * 4);
3615
3616                         /* move class/method/field reference onto stack */
3617
3618                         disp = dseg_addaddress(cd, pref->ref);
3619                         M_ALD(REG_ITMP3, REG_PV, disp);
3620                         M_AST_INTERN(REG_ITMP3, REG_SP, 2 * 4);
3621
3622                         /* move data segment displacement onto stack */
3623
3624                         disp = dseg_addaddress(cd, pref->disp);
3625                         M_ILD(REG_ITMP3, REG_PV, disp);
3626                         M_IST_INTERN(REG_ITMP3, REG_SP, 1 * 4);
3627
3628                         /* move patcher function pointer onto stack */
3629
3630                         disp = dseg_addaddress(cd, pref->patcher);
3631                         M_ALD(REG_ITMP3, REG_PV, disp);
3632                         M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3633
3634                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
3635                         M_ALD(REG_ITMP3, REG_PV, disp);
3636                         M_MTCTR(REG_ITMP3);
3637                         M_RTS;
3638                 }
3639
3640                 /* generate replacement-out stubs */
3641
3642                 {
3643                         int i;
3644
3645                         replacementpoint = jd->code->rplpoints;
3646
3647                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3648                                 /* check code segment size */
3649
3650                                 MCODECHECK(100);
3651
3652                                 /* note start of stub code */
3653
3654                                 replacementpoint->outcode = (u1 *) (cd->mcodeptr - cd->mcodebase);
3655
3656                                 /* make machine code for patching */
3657
3658                                 tmpmcodeptr  = cd->mcodeptr;
3659                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode) + 1 /* big-endian */;
3660
3661                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3662                                 M_BR(disp);
3663
3664                                 cd->mcodeptr = tmpmcodeptr;
3665
3666                                 /* create stack frame - keep 16-byte aligned */
3667
3668                                 M_AADD_IMM(REG_SP, -4 * 4, REG_SP);
3669
3670                                 /* push address of `rplpoint` struct */
3671
3672                                 disp = dseg_addaddress(cd, replacementpoint);
3673                                 M_ALD(REG_ITMP3, REG_PV, disp);
3674                                 M_AST_INTERN(REG_ITMP3, REG_SP, 0 * 4);
3675
3676                                 /* jump to replacement function */
3677
3678                                 disp = dseg_addaddress(cd, asm_replacement_out);
3679                                 M_ALD(REG_ITMP3, REG_PV, disp);
3680                                 M_MTCTR(REG_ITMP3);
3681                                 M_RTS;
3682                         }
3683                 }
3684         }
3685
3686         codegen_finish(jd);
3687
3688         /* everything's ok */
3689
3690         return true;
3691 }
3692
3693
3694 /* createcompilerstub **********************************************************
3695
3696    Creates a stub routine which calls the compiler.
3697
3698 *******************************************************************************/
3699
3700 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
3701 #define COMPILERSTUB_CODESIZE    4 * 4
3702
3703 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3704
3705
3706 u1 *createcompilerstub(methodinfo *m)
3707 {
3708         u1          *s;                     /* memory to hold the stub            */
3709         ptrint      *d;
3710         codeinfo    *code;
3711         codegendata *cd;
3712         s4           dumpsize;
3713
3714         s = CNEW(u1, COMPILERSTUB_SIZE);
3715
3716         /* set data pointer and code pointer */
3717
3718         d = (ptrint *) s;
3719         s = s + COMPILERSTUB_DATASIZE;
3720
3721         /* mark start of dump memory area */
3722
3723         dumpsize = dump_size();
3724
3725         cd = DNEW(codegendata);
3726         cd->mcodeptr = s;
3727
3728         /* Store the codeinfo pointer in the same place as in the
3729            methodheader for compiled methods. */
3730
3731         code = code_codeinfo_new(m);
3732
3733         d[0] = (ptrint) asm_call_jit_compiler;
3734         d[1] = (ptrint) m;
3735         d[2] = (ptrint) code;
3736
3737         M_ALD_INTERN(REG_ITMP1, REG_PV, -2 * SIZEOF_VOID_P);
3738         M_ALD_INTERN(REG_PV, REG_PV, -3 * SIZEOF_VOID_P);
3739         M_MTCTR(REG_PV);
3740         M_RTS;
3741
3742         md_cacheflush((u1 *) d, COMPILERSTUB_SIZE);
3743
3744 #if defined(ENABLE_STATISTICS)
3745         if (opt_stat)
3746                 count_cstub_len += COMPILERSTUB_SIZE;
3747 #endif
3748
3749         /* release dump area */
3750
3751         dump_release(dumpsize);
3752
3753         return s;
3754 }
3755
3756
3757 /* createnativestub ************************************************************
3758
3759    Creates a stub routine which calls a native method.
3760
3761 *******************************************************************************/
3762
3763 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3764 {
3765         methodinfo   *m;
3766         codeinfo     *code;
3767         codegendata  *cd;
3768         registerdata *rd;
3769         s4            stackframesize;       /* size of stackframe if needed       */
3770         methoddesc   *md;
3771         s4            nativeparams;
3772         s4            i, j;                 /* count variables                    */
3773         s4            t;
3774         s4            s1, s2, disp;
3775         s4            funcdisp;
3776
3777         /* get required compiler data */
3778
3779         m    = jd->m;
3780         code = jd->code;
3781         cd   = jd->cd;
3782         rd   = jd->rd;
3783
3784         /* set some variables */
3785
3786         md = m->parseddesc;
3787         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3788
3789         /* calculate stackframe size */
3790
3791         stackframesize =
3792                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3793                 sizeof(localref_table) / SIZEOF_VOID_P +
3794                 4 +                             /* 4 stackframeinfo arguments (darwin)*/
3795                 nmd->paramcount * 2 +           /* assume all arguments are doubles   */
3796                 nmd->memuse;
3797
3798         stackframesize = (stackframesize + 3) & ~3; /* keep stack 16-byte aligned */
3799
3800         /* create method header */
3801
3802         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3803         (void) dseg_adds4(cd, stackframesize * 4);             /* FrameSize       */
3804         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3805         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3806         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3807         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3808         (void) dseg_addlinenumbertablesize(cd);
3809         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3810
3811         /* generate code */
3812
3813         M_MFLR(REG_ZERO);
3814         M_AST_INTERN(REG_ZERO, REG_SP, LA_LR_OFFSET);
3815         M_STWU(REG_SP, REG_SP, -(stackframesize * 4));
3816
3817         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3818                 /* parent_argbase == stackframesize * 4 */
3819                 codegen_trace_args(jd, stackframesize * 4 , true);
3820
3821         /* get function address (this must happen before the stackframeinfo) */
3822
3823         funcdisp = dseg_addaddress(cd, f);
3824
3825 #if !defined(WITH_STATIC_CLASSPATH)
3826         if (f == NULL) {
3827                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3828
3829                 if (opt_showdisassemble)
3830                         M_NOP;
3831         }
3832 #endif
3833
3834         /* save integer and float argument registers */
3835
3836         j = 0;
3837
3838         for (i = 0; i < md->paramcount; i++) {
3839                 t = md->paramtypes[i].type;
3840
3841                 if (IS_INT_LNG_TYPE(t)) {
3842                         if (!md->params[i].inmemory) {
3843                                 s1 = md->params[i].regoff;
3844                                 if (IS_2_WORD_TYPE(t)) {
3845                                         M_IST(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3846                                         j++;
3847                                         M_IST(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3848                                 } else {
3849                                         M_IST(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3850                                 }
3851                                 j++;
3852                         }
3853                 }
3854         }
3855
3856         for (i = 0; i < md->paramcount; i++) {
3857                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3858                         if (!md->params[i].inmemory) {
3859                                 s1 = md->params[i].regoff;
3860                                 M_DST(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3861                                 j++;
3862                         }
3863                 }
3864         }
3865
3866         /* create native stack info */
3867
3868         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
3869         M_MOV(REG_PV, rd->argintregs[1]);
3870         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[2]);
3871         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 4 + LA_LR_OFFSET);
3872         disp = dseg_addaddress(cd, codegen_start_native_call);
3873         M_ALD(REG_ITMP1, REG_PV, disp);
3874         M_MTCTR(REG_ITMP1);
3875         M_JSR;
3876
3877         /* restore integer and float argument registers */
3878
3879         j = 0;
3880
3881         for (i = 0; i < md->paramcount; i++) {
3882                 t = md->paramtypes[i].type;
3883
3884                 if (IS_INT_LNG_TYPE(t)) {
3885                         if (!md->params[i].inmemory) {
3886                                 s1 = md->params[i].regoff;
3887
3888                                 if (IS_2_WORD_TYPE(t)) {
3889                                         M_ILD(rd->argintregs[GET_HIGH_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3890                                         j++;
3891                                         M_ILD(rd->argintregs[GET_LOW_REG(s1)], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3892                                 } else {
3893                                         M_ILD(rd->argintregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 4);
3894                                 }
3895                                 j++;
3896                         }
3897                 }
3898         }
3899
3900         for (i = 0; i < md->paramcount; i++) {
3901                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3902                         if (!md->params[i].inmemory) {
3903                                 s1 = md->params[i].regoff;
3904                                 M_DLD(rd->argfltregs[s1], REG_SP, LA_SIZE + 4 * 4 + j * 8);
3905                                 j++;
3906                         }
3907                 }
3908         }
3909
3910         /* copy or spill arguments to new locations */
3911
3912         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3913                 t = md->paramtypes[i].type;
3914
3915                 if (IS_INT_LNG_TYPE(t)) {
3916                         if (!md->params[i].inmemory) {
3917                                 if (IS_2_WORD_TYPE(t))
3918                                         s1 = PACK_REGS(
3919                                                 rd->argintregs[GET_LOW_REG(md->params[i].regoff)],
3920                                             rd->argintregs[GET_HIGH_REG(md->params[i].regoff)]);
3921                                 else
3922                                         s1 = rd->argintregs[md->params[i].regoff];
3923
3924                                 if (!nmd->params[j].inmemory) {
3925                                         if (IS_2_WORD_TYPE(t)) {
3926                                                 s2 = PACK_REGS(
3927                                                    rd->argintregs[GET_LOW_REG(nmd->params[j].regoff)],
3928                                                    rd->argintregs[GET_HIGH_REG(nmd->params[j].regoff)]);
3929                                                 M_LNGMOVE(s1, s2);
3930                                         } else {
3931                                                 s2 = rd->argintregs[nmd->params[j].regoff];
3932                                                 M_INTMOVE(s1, s2);
3933                                         }
3934
3935                                 } else {
3936                                         s2 = nmd->params[j].regoff;
3937                                         if (IS_2_WORD_TYPE(t))
3938                                                 M_LST(s1, REG_SP, s2 * 4);
3939                                         else
3940                                                 M_IST(s1, REG_SP, s2 * 4);
3941                                 }
3942
3943                         } else {
3944                                 s1 = md->params[i].regoff + stackframesize;
3945                                 s2 = nmd->params[j].regoff;
3946
3947                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3948                                 if (IS_2_WORD_TYPE(t))
3949                                         M_ILD(REG_ITMP2, REG_SP, s1 * 4 + 4);
3950
3951                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3952                                 if (IS_2_WORD_TYPE(t))
3953                                         M_IST(REG_ITMP2, REG_SP, s2 * 4 + 4);
3954                         }
3955
3956                 } else {
3957                         /* We only copy spilled float arguments, as the float
3958                            argument registers keep unchanged. */
3959
3960                         if (md->params[i].inmemory) {
3961                                 s1 = md->params[i].regoff + stackframesize;
3962                                 s2 = nmd->params[j].regoff;
3963
3964                                 if (IS_2_WORD_TYPE(t)) {
3965                                         M_DLD(REG_FTMP1, REG_SP, s1 * 4);
3966                                         M_DST(REG_FTMP1, REG_SP, s2 * 4);
3967
3968                                 } else {
3969                                         M_FLD(REG_FTMP1, REG_SP, s1 * 4);
3970                                         M_FST(REG_FTMP1, REG_SP, s2 * 4);
3971                                 }
3972                         }
3973                 }
3974         }
3975
3976         /* put class into second argument register */
3977
3978         if (m->flags & ACC_STATIC) {
3979                 disp = dseg_addaddress(cd, m->class);
3980                 M_ALD(rd->argintregs[1], REG_PV, disp);
3981         }
3982
3983         /* put env into first argument register */
3984
3985         disp = dseg_addaddress(cd, _Jv_env);
3986         M_ALD(rd->argintregs[0], REG_PV, disp);
3987
3988         /* generate the actual native call */
3989
3990         M_ALD(REG_ITMP3, REG_PV, funcdisp);
3991         M_MTCTR(REG_ITMP3);
3992         M_JSR;
3993
3994         /* save return value */
3995
3996         if (md->returntype.type != TYPE_VOID) {
3997                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
3998                         if (IS_2_WORD_TYPE(md->returntype.type))
3999                                 M_IST(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4000                         M_IST(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4001                 }
4002                 else {
4003                         if (IS_2_WORD_TYPE(md->returntype.type))
4004                                 M_DST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4005                         else
4006                                 M_FST(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4007                 }
4008         }
4009
4010         /* print call trace */
4011
4012         if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
4013                  /* just restore the value we need, don't care about the other */
4014
4015                 if (md->returntype.type != TYPE_VOID) {
4016                         if (IS_INT_LNG_TYPE(md->returntype.type)) {
4017                                 if (IS_2_WORD_TYPE(md->returntype.type))
4018                                         M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4019                                 M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4020                         }
4021                         else {
4022                                 if (IS_2_WORD_TYPE(md->returntype.type))
4023                                         M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4024                                 else
4025                                         M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4026                         }
4027                 }
4028
4029                 M_LDA(REG_SP, REG_SP, -(LA_SIZE + (1 + 2 + 2 + 1) * 4));
4030
4031                 /* keep this order */
4032                 switch (md->returntype.type) {
4033                 case TYPE_INT:
4034                 case TYPE_ADR:
4035 #if defined(__DARWIN__)
4036                         M_MOV(REG_RESULT, rd->argintregs[2]);
4037                         M_CLR(rd->argintregs[1]);
4038 #else
4039                         M_MOV(REG_RESULT, rd->argintregs[3]);
4040                         M_CLR(rd->argintregs[2]);
4041 #endif
4042                         break;
4043
4044                 case TYPE_LNG:
4045 #if defined(__DARWIN__)
4046                         M_MOV(REG_RESULT2, rd->argintregs[2]);
4047                         M_MOV(REG_RESULT, rd->argintregs[1]);
4048 #else
4049                         M_MOV(REG_RESULT2, rd->argintregs[3]);
4050                         M_MOV(REG_RESULT, rd->argintregs[2]);
4051 #endif
4052                         break;
4053                 }
4054
4055                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
4056                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
4057                 disp = dseg_addaddress(cd, m);
4058                 M_ALD(rd->argintregs[0], REG_PV, disp);
4059
4060                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4061                 M_ALD(REG_ITMP2, REG_PV, disp);
4062                 M_MTCTR(REG_ITMP2);
4063                 M_JSR;
4064
4065                 M_LDA(REG_SP, REG_SP, LA_SIZE + (1 + 2 + 2 + 1) * 4);
4066         }
4067
4068         /* remove native stackframe info */
4069
4070         M_AADD_IMM(REG_SP, stackframesize * 4, rd->argintregs[0]);
4071         disp = dseg_addaddress(cd, codegen_finish_native_call);
4072         M_ALD(REG_ITMP1, REG_PV, disp);
4073         M_MTCTR(REG_ITMP1);
4074         M_JSR;
4075         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4076
4077         /* restore return value */
4078
4079         if (md->returntype.type != TYPE_VOID) {
4080                 if (IS_INT_LNG_TYPE(md->returntype.type)) {
4081                         if (IS_2_WORD_TYPE(md->returntype.type))
4082                                 M_ILD(REG_RESULT2, REG_SP, LA_SIZE + 2 * 4);
4083                         M_ILD(REG_RESULT, REG_SP, LA_SIZE + 1 * 4);
4084                 }
4085                 else {
4086                         if (IS_2_WORD_TYPE(md->returntype.type))
4087                                 M_DLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4088                         else
4089                                 M_FLD(REG_FRESULT, REG_SP, LA_SIZE + 1 * 4);
4090                 }
4091         }
4092
4093         M_ALD(REG_ITMP2_XPC, REG_SP, stackframesize * 4 + LA_LR_OFFSET);
4094         M_MTLR(REG_ITMP2_XPC);
4095         M_LDA(REG_SP, REG_SP, stackframesize * 4); /* remove stackframe           */
4096
4097         /* check for exception */
4098
4099         M_TST(REG_ITMP1_XPTR);
4100         M_BNE(1);                           /* if no exception then return        */
4101
4102         M_RET;
4103
4104         /* handle exception */
4105
4106         M_IADD_IMM(REG_ITMP2_XPC, -4, REG_ITMP2_XPC);  /* exception address       */
4107
4108         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4109         M_ALD(REG_ITMP3, REG_PV, disp);
4110         M_MTCTR(REG_ITMP3);
4111         M_RTS;
4112
4113         /* generate patcher stub call code */
4114
4115         {
4116                 patchref *pref;
4117                 u4        mcode;
4118                 u1       *savedmcodeptr;
4119                 u1       *tmpmcodeptr;
4120
4121                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4122                         /* Get machine code which is patched back in later. The
4123                            call is 1 instruction word long. */
4124
4125                         tmpmcodeptr = cd->mcodebase + pref->branchpos;
4126
4127                         mcode = *((u4 *) tmpmcodeptr);
4128
4129                         /* Patch in the call to call the following code (done at
4130                            compile time). */
4131
4132                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
4133                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
4134
4135                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
4136                         M_BL(disp);
4137
4138                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
4139
4140                         /* create stack frame - keep stack 16-byte aligned */
4141
4142                         M_AADD_IMM(REG_SP, -8 * 4, REG_SP);
4143
4144                         /* move return address onto stack */
4145
4146                         M_MFLR(REG_ZERO);
4147                         M_AST(REG_ZERO, REG_SP, 5 * 4);
4148
4149                         /* move pointer to java_objectheader onto stack */
4150
4151 #if defined(ENABLE_THREADS)
4152                         /* order reversed because of data segment layout */
4153
4154                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
4155                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
4156                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
4157
4158                         M_LDA(REG_ITMP3, REG_PV, disp);
4159                         M_AST(REG_ITMP3, REG_SP, 4 * 4);
4160 #else
4161                         /* do nothing */
4162 #endif
4163
4164                         /* move machine code onto stack */
4165
4166                         disp = dseg_adds4(cd, mcode);
4167                         M_ILD(REG_ITMP3, REG_PV, disp);
4168                         M_IST(REG_ITMP3, REG_SP, 3 * 4);
4169
4170                         /* move class/method/field reference onto stack */
4171
4172                         disp = dseg_addaddress(cd, pref->ref);
4173                         M_ALD(REG_ITMP3, REG_PV, disp);
4174                         M_AST(REG_ITMP3, REG_SP, 2 * 4);
4175
4176                         /* move data segment displacement onto stack */
4177
4178                         disp = dseg_addaddress(cd, pref->disp);
4179                         M_ILD(REG_ITMP3, REG_PV, disp);
4180                         M_IST(REG_ITMP3, REG_SP, 1 * 4);
4181
4182                         /* move patcher function pointer onto stack */
4183
4184                         disp = dseg_addaddress(cd, pref->patcher);
4185                         M_ALD(REG_ITMP3, REG_PV, disp);
4186                         M_AST(REG_ITMP3, REG_SP, 0 * 4);
4187
4188                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4189                         M_ALD(REG_ITMP3, REG_PV, disp);
4190                         M_MTCTR(REG_ITMP3);
4191                         M_RTS;
4192                 }
4193         }
4194
4195         codegen_finish(jd);
4196
4197         return jd->code->entrypoint;
4198 }
4199
4200
4201 void codegen_trace_args(jitdata *jd, s4 stackframesize, bool nativestub)
4202 {
4203         methodinfo   *m;
4204         codegendata  *cd;
4205         registerdata *rd;
4206         s4 s1, p, t, d;
4207         int stack_off;
4208         int stack_size;
4209         methoddesc *md;
4210
4211         /* get required compiler data */
4212
4213         m  = jd->m;
4214         cd = jd->cd;
4215         rd = jd->rd;
4216
4217         md = m->parseddesc;
4218
4219         if (!nativestub)
4220                 M_MFLR(REG_ITMP3);
4221         /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
4222         /* For Darwin:                                                        */
4223         /* LA + TRACE_ARGS_NUM u8 args + methodinfo + LR                      */
4224         /* LA_SIZE(=6*4) + 8*8         + 4          + 4  + 0(Padding)         */
4225         /* 6 * 4 + 8 * 8 + 2 * 4 = 12 * 8 = 6 * 16                            */
4226         /* For Linux:                                                         */
4227         /* LA + (TRACE_ARGS_NUM - INT_ARG_CNT/2) u8 args + methodinfo         */
4228         /* + INT_ARG_CNT * 4 ( save integer registers) + LR + 8 + 8 (Padding) */
4229         /* LA_SIZE(=2*4) + 4 * 8 + 4 + 8 * 4 + 4 + 8                          */
4230         /* 2 * 4 + 4 * 8 + 10 * 4 + 1 * 8 + 8= 12 * 8 = 6 * 16                */
4231
4232         /* in nativestubs no Place to save the LR (Link Register) would be needed */
4233         /* but since the stack frame has to be aligned the 4 Bytes would have to  */
4234         /* be padded again */
4235
4236 #if defined(__DARWIN__)
4237         stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
4238 #else
4239         stack_size = 6 * 16;
4240 #endif
4241         M_LDA(REG_SP, REG_SP, -stack_size);
4242
4243         /* Save LR */
4244         if (!nativestub)
4245                 M_IST(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4246
4247         M_CLR(REG_ITMP1);    /* clear help register */
4248
4249         /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
4250 #if defined(__DARWIN__)
4251         /* Copy Params starting from first to Stack                          */
4252         /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs    */
4253         /* are saved                                                         */
4254         p = 0;
4255 #else
4256         /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in   */
4257         /* integer argument regs                                             */
4258         /* all integer argument registers have to be saved                   */
4259         for (p = 0; p < 8; p++) {
4260                 d = rd->argintregs[p];
4261                 /* save integer argument registers */
4262                 M_IST(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4263         }
4264         p = 4;
4265 #endif
4266         stack_off = LA_SIZE;
4267         for (; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
4268                 t = md->paramtypes[p].type;
4269                 if (IS_INT_LNG_TYPE(t)) {
4270                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4271                                 if (IS_2_WORD_TYPE(t)) {
4272                                         M_IST(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4273                                                   , REG_SP, stack_off);
4274                                         M_IST(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4275                                                   , REG_SP, stack_off + 4);
4276                                 } else {
4277                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4278                                         M_IST(rd->argintregs[md->params[p].regoff]
4279                                                   , REG_SP, stack_off + 4);
4280                                 }
4281                         } else { /* Param on Stack */
4282                                 s1 = (md->params[p].regoff + stackframesize) * 4
4283                                         + stack_size;
4284                                 if (IS_2_WORD_TYPE(t)) {
4285                                         M_ILD(REG_ITMP2, REG_SP, s1);
4286                                         M_IST(REG_ITMP2, REG_SP, stack_off);
4287                                         M_ILD(REG_ITMP2, REG_SP, s1 + 4);
4288                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4289                                 } else {
4290                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4291                                         M_ILD(REG_ITMP2, REG_SP, s1);
4292                                         M_IST(REG_ITMP2, REG_SP, stack_off + 4);
4293                                 }
4294                         }
4295                 } else { /* IS_FLT_DBL_TYPE(t) */
4296                         if (!md->params[p].inmemory) { /* in Arg Reg */
4297                                 s1 = rd->argfltregs[md->params[p].regoff];
4298                                 if (!IS_2_WORD_TYPE(t)) {
4299                                         M_IST(REG_ITMP1, REG_SP, stack_off);
4300                                         M_FST(s1, REG_SP, stack_off + 4);
4301                                 } else {
4302                                         M_DST(s1, REG_SP, stack_off);
4303                                 }
4304                         } else { /* on Stack */
4305                                 /* this should not happen */
4306                         }
4307                 }
4308         }
4309
4310         /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
4311 #if defined(__DARWIN__)
4312         for (p = 0; p < 8; p++) {
4313                 d = rd->argintregs[p];
4314                 M_ILD(d, REG_SP, LA_SIZE + p * 4);
4315         }
4316 #else
4317         /* LINUX */
4318         /* Set integer and float argument registers vor trace_args call */
4319         /* offset to saved integer argument registers                   */
4320         stack_off = LA_SIZE + 4 * 8 + 4;
4321         for (p = 0; (p < 4) && (p < md->paramcount); p++) {
4322                 t = md->paramtypes[p].type;
4323                 if (IS_INT_LNG_TYPE(t)) {
4324                         /* "stretch" int types */
4325                         if (!IS_2_WORD_TYPE(t)) {
4326                                 M_CLR(rd->argintregs[2 * p]);
4327                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off);
4328                                 stack_off += 4;
4329                         } else {
4330                                 M_ILD(rd->argintregs[2 * p + 1], REG_SP,stack_off + 4);
4331                                 M_ILD(rd->argintregs[2 * p], REG_SP,stack_off);
4332                                 stack_off += 8;
4333                         }
4334                 } else { /* Float/Dbl */
4335                         if (!md->params[p].inmemory) { /* Param in Arg Reg */
4336                                 /* use reserved Place on Stack (sp + 5 * 16) to copy  */
4337                                 /* float/double arg reg to int reg                    */
4338                                 s1 = rd->argfltregs[md->params[p].regoff];
4339                                 if (!IS_2_WORD_TYPE(t)) {
4340                                         M_FST(s1, REG_SP, 5 * 16);
4341                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP, 5 * 16);
4342                                         M_CLR(rd->argintregs[2 * p]);
4343                                 } else {
4344                                         M_DST(s1, REG_SP, 5 * 16);
4345                                         M_ILD(rd->argintregs[2 * p + 1], REG_SP,  5 * 16 + 4);
4346                                         M_ILD(rd->argintregs[2 * p], REG_SP, 5 * 16);
4347                                 }
4348                         }
4349                 }
4350         }
4351 #endif
4352
4353         /* put methodinfo pointer on Stackframe */
4354         p = dseg_addaddress(cd, m);
4355         M_ALD(REG_ITMP1, REG_PV, p);
4356 #if defined(__DARWIN__)
4357         M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
4358 #else
4359         M_AST(REG_ITMP1, REG_SP, LA_SIZE + 4 * 8);
4360 #endif
4361         p = dseg_addaddress(cd, builtin_trace_args);
4362         M_ALD(REG_ITMP2, REG_PV, p);
4363         M_MTCTR(REG_ITMP2);
4364         M_JSR;
4365
4366 #if defined(__DARWIN__)
4367         /* restore integer argument registers from the reserved stack space */
4368
4369         stack_off = LA_SIZE;
4370         for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM;
4371                  p++, stack_off += 8) {
4372                 t = md->paramtypes[p].type;
4373
4374                 if (IS_INT_LNG_TYPE(t)) {
4375                         if (!md->params[p].inmemory) {
4376                                 if (IS_2_WORD_TYPE(t)) {
4377                                         M_ILD(rd->argintregs[GET_HIGH_REG(md->params[p].regoff)]
4378                                                   , REG_SP, stack_off);
4379                                         M_ILD(rd->argintregs[GET_LOW_REG(md->params[p].regoff)]
4380                                                   , REG_SP, stack_off + 4);
4381                                 } else {
4382                                         M_ILD(rd->argintregs[md->params[p].regoff]
4383                                                   , REG_SP, stack_off + 4);
4384                                 }
4385                         }
4386                 }
4387         }
4388 #else
4389         /* LINUX */
4390         for (p = 0; p < 8; p++) {
4391                 d = rd->argintregs[p];
4392                 /* save integer argument registers */
4393                 M_ILD(d, REG_SP, LA_SIZE + 4 * 8 + 4 + p * 4);
4394         }
4395 #endif
4396
4397         if (!nativestub)
4398                 M_ILD(REG_ITMP3, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8 + 1 * 4);
4399
4400         M_LDA(REG_SP, REG_SP, stack_size);
4401
4402         if (!nativestub)
4403                 M_MTLR(REG_ITMP3);
4404 }
4405
4406
4407 /*
4408  * These are local overrides for various environment variables in Emacs.
4409  * Please do not remove this and leave it at the end of the file, where
4410  * Emacs will automagically detect them.
4411  * ---------------------------------------------------------------------
4412  * Local variables:
4413  * mode: c
4414  * indent-tabs-mode: t
4415  * c-basic-offset: 4
4416  * tab-width: 4
4417  * End:
4418  * vim:noexpandtab:sw=4:ts=4:
4419  */