1 /* src/vm/jit/mips/linux/md-os.c - machine dependent MIPS Linux functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
31 #include <sgidefs.h> /* required for _MIPS_SIM_ABI* defines (before signal.h) */
38 #include "vm/jit/mips/codegen.h"
39 #include "vm/jit/mips/md-abi.h"
41 #include "mm/gc-common.h"
42 #include "mm/memory.h"
44 #include "vm/exceptions.h"
45 #include "vm/signallocal.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/md.h"
49 #include "vm/jit/stacktrace.h"
52 /* md_init *********************************************************************
54 Do some machine dependent initialization.
56 *******************************************************************************/
60 /* The Boehm GC initialization blocks the SIGSEGV signal. So we do
61 a dummy allocation here to ensure that the GC is
64 #if defined(ENABLE_GC_BOEHM)
69 /* Turn off flush-to-zero */
73 n.fc_word = get_fpc_csr();
74 n.fc_struct.flush = 0;
75 set_fpc_csr(n.fc_word);
81 /* md_signal_handler_sigsegv ***************************************************
83 NullPointerException signal handler for hardware null pointer
86 *******************************************************************************/
88 void md_signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
107 _uc = (struct ucontext *) _p;
108 _mc = &_uc->uc_mcontext;
110 #if defined(__UCLIBC__)
111 _gregs = _mc->gpregs;
116 /* In glibc's ucontext.h the registers are defined as long long,
117 even for MIPS32, so we cast them. This is not the case for
120 pv = (u1 *) (ptrint) _gregs[REG_PV];
121 sp = (u1 *) (ptrint) _gregs[REG_SP];
122 ra = (u1 *) (ptrint) _gregs[REG_RA]; /* this is correct for leafs */
124 #if !defined(__UCLIBC__) && ((__GLIBC__ == 2) && (__GLIBC_MINOR__ < 5))
125 /* NOTE: We only need this for pre glibc-2.5. */
127 xpc = (u1 *) (ptrint) _mc->pc;
129 /* get the cause of this exception */
133 /* check the cause to find the faulting instruction */
135 /* TODO: use defines for that stuff */
137 switch (cause & 0x0000003c) {
139 /* TLBL: XPC is ok */
143 /* AdEL: XPC is of the following instruction */
148 xpc = (u1 *) (ptrint) _gregs[CTX_EPC];
151 /* get exception-throwing instruction */
153 mcode = *((u4 *) xpc);
155 d = M_ITYPE_GET_RT(mcode);
156 s1 = M_ITYPE_GET_RS(mcode);
157 disp = M_ITYPE_GET_IMM(mcode);
159 /* check for special-load */
161 if (s1 == REG_ZERO) {
162 /* we use the exception type as load displacement */
167 if (type == EXCEPTION_HARDWARE_COMPILER) {
168 /* The XPC is the RA minus 4, because the RA points to the
169 instruction after the call. */
175 /* This is a normal NPE: addr must be NULL and the NPE-type
183 /* Handle the type. */
185 p = signal_handle(type, val, pv, sp, ra, xpc, _p);
188 /* set registers (only if exception object ready) */
191 _gregs[REG_ITMP1_XPTR] = (intptr_t) p;
192 _gregs[REG_ITMP2_XPC] = (intptr_t) xpc;
194 #if defined(__UCLIBC__)
195 _gregs[CTX_EPC] = (intptr_t) asm_handle_exception;
197 _mc->pc = (intptr_t) asm_handle_exception;
201 #if defined(__UCLIBC__)
202 _gregs[CTX_EPC] = (intptr_t) xpc;
204 _mc->pc = (intptr_t) xpc;
212 case EXCEPTION_HARDWARE_COMPILER:
214 _gregs[REG_PV] = (uintptr_t) p;
215 #if defined(__UCLIBC__)
216 _gregs[CTX_EPC] = (uintptr_t) p;
218 _mc->pc = (uintptr_t) p;
223 /* Get and set the PV from the parent Java method. */
225 pv = md_codegen_get_pv_from_pc(ra);
227 _gregs[REG_PV] = (uintptr_t) pv;
229 /* Get the exception object. */
231 p = builtin_retrieve_exception();
237 case EXCEPTION_HARDWARE_PATCHER:
239 /* We set the PC again because the cause may have changed
242 #if defined(__UCLIBC__)
243 _gregs[CTX_EPC] = (uintptr_t) xpc;
245 _mc->pc = (uintptr_t) xpc;
253 _gregs[REG_ITMP1_XPTR] = (uintptr_t) p;
254 _gregs[REG_ITMP2_XPC] = (uintptr_t) xpc;
255 #if defined(__UCLIBC__)
256 _gregs[CTX_EPC] = (uintptr_t) asm_handle_exception;
258 _mc->pc = (uintptr_t) asm_handle_exception;
264 /* md_signal_handler_sigusr2 ***************************************************
268 *******************************************************************************/
270 void md_signal_handler_sigusr2(int sig, siginfo_t *siginfo, void *_p)
275 /* md_critical_section_restart *************************************************
277 Search the critical sections tree for a matching section and set
278 the PC to the restart point, if necessary.
280 *******************************************************************************/
282 #if defined(ENABLE_THREADS)
283 void md_critical_section_restart(ucontext_t *_uc)
289 _mc = &_uc->uc_mcontext;
291 #if defined(__UCLIBC__)
292 pc = (u1 *) (ptrint) _mc->gpregs[CTX_EPC];
294 pc = (u1 *) (ptrint) _mc->pc;
297 npc = critical_find_restart_point(pc);
300 #if defined(__UCLIBC__)
301 _mc->gpregs[CTX_EPC] = (ptrint) npc;
303 _mc->pc = (ptrint) npc;
311 * These are local overrides for various environment variables in Emacs.
312 * Please do not remove this and leave it at the end of the file, where
313 * Emacs will automagically detect them.
314 * ---------------------------------------------------------------------
317 * indent-tabs-mode: t
321 * vim:noexpandtab:sw=4:ts=4: