1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "vm/jit/mips/codegen.h"
37 #include "vm/jit/mips/md-abi.h"
39 #include "mm/memory.h"
41 #if defined(ENABLE_THREADS)
42 # include "threads/native/lock.h"
45 #include "vm/builtin.h"
46 #include "vm/exceptions.h"
47 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
49 #include "vm/jit/abi-asm.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/dseg.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
56 #include "vmcore/options.h"
59 /* emit_load *******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->vv.regoff * 8;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 #if SIZEOF_VOID_P == 8
88 M_LLD(tempreg, REG_SP, disp);
90 if (IS_2_WORD_TYPE(src->type))
91 M_LLD(tempreg, REG_SP, disp);
93 M_ILD(tempreg, REG_SP, disp);
100 reg = src->vv.regoff;
106 /* emit_load_low ***************************************************************
108 Emits a possible load of the low 32-bits of an operand.
110 *******************************************************************************/
112 #if SIZEOF_VOID_P == 4
113 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
119 assert(src->type == TYPE_LNG);
121 /* get required compiler data */
125 if (src->flags & INMEMORY) {
128 disp = src->vv.regoff * 8;
130 #if WORDS_BIGENDIAN == 1
131 M_ILD(tempreg, REG_SP, disp + 4);
133 M_ILD(tempreg, REG_SP, disp);
139 reg = GET_LOW_REG(src->vv.regoff);
143 #endif /* SIZEOF_VOID_P == 4 */
146 /* emit_load_high **************************************************************
148 Emits a possible load of the high 32-bits of an operand.
150 *******************************************************************************/
152 #if SIZEOF_VOID_P == 4
153 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
159 assert(src->type == TYPE_LNG);
161 /* get required compiler data */
165 if (src->flags & INMEMORY) {
168 disp = src->vv.regoff * 8;
170 #if WORDS_BIGENDIAN == 1
171 M_ILD(tempreg, REG_SP, disp);
173 M_ILD(tempreg, REG_SP, disp + 4);
179 reg = GET_HIGH_REG(src->vv.regoff);
183 #endif /* SIZEOF_VOID_P == 4 */
186 /* emit_store ******************************************************************
188 Emits a possible store to variable.
190 *******************************************************************************/
192 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
197 /* get required compiler data */
201 if (dst->flags & INMEMORY) {
204 disp = dst->vv.regoff * 8;
206 if (IS_FLT_DBL_TYPE(dst->type)) {
207 if (IS_2_WORD_TYPE(dst->type))
208 M_DST(d, REG_SP, disp);
210 M_FST(d, REG_SP, disp);
213 #if SIZEOF_VOID_P == 8
214 M_LST(d, REG_SP, disp);
216 if (IS_2_WORD_TYPE(dst->type))
217 M_LST(d, REG_SP, disp);
219 M_IST(d, REG_SP, disp);
226 /* emit_copy *******************************************************************
228 Generates a register/memory to register/memory copy.
230 *******************************************************************************/
232 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
237 /* get required compiler data */
241 if ((src->vv.regoff != dst->vv.regoff) ||
242 ((src->flags ^ dst->flags) & INMEMORY)) {
243 /* If one of the variables resides in memory, we can eliminate
244 the register move from/to the temporary register with the
245 order of getting the destination register and the load. */
247 if (IS_INMEMORY(src->flags)) {
248 #if SIZEOF_VOID_P == 4
249 if (IS_2_WORD_TYPE(src->type))
250 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
253 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
254 s1 = emit_load(jd, iptr, src, d);
257 s1 = emit_load(jd, iptr, src, REG_IFTMP);
258 #if SIZEOF_VOID_P == 4
259 if (IS_2_WORD_TYPE(src->type))
260 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
263 d = codegen_reg_of_var(iptr->opc, dst, s1);
267 if (IS_FLT_DBL_TYPE(src->type)) {
268 if (IS_2_WORD_TYPE(src->type))
274 #if SIZEOF_VOID_P == 8
277 if (IS_2_WORD_TYPE(src->type))
285 emit_store(jd, iptr, dst, d);
290 /* emit_iconst *****************************************************************
294 *******************************************************************************/
296 void emit_iconst(codegendata *cd, s4 d, s4 value)
300 if ((value >= -32768) && (value <= 32767))
301 M_IADD_IMM(REG_ZERO, value, d);
302 else if ((value >= 0) && (value <= 0xffff))
303 M_OR_IMM(REG_ZERO, value, d);
305 disp = dseg_add_s4(cd, value);
306 M_ILD(d, REG_PV, disp);
311 /* emit_lconst *****************************************************************
315 *******************************************************************************/
317 void emit_lconst(codegendata *cd, s4 d, s8 value)
321 #if SIZEOF_VOID_P == 8
322 if ((value >= -32768) && (value <= 32767))
323 M_LADD_IMM(REG_ZERO, value, d);
324 else if ((value >= 0) && (value <= 0xffff))
325 M_OR_IMM(REG_ZERO, value, d);
327 disp = dseg_add_s8(cd, value);
328 M_LLD(d, REG_PV, disp);
331 disp = dseg_add_s8(cd, value);
332 M_LLD(d, REG_PV, disp);
337 /* emit_arithmetic_check *******************************************************
339 Emit an ArithmeticException check.
341 *******************************************************************************/
343 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
345 if (INSTRUCTION_MUST_CHECK(iptr)) {
348 codegen_add_arithmeticexception_ref(cd);
355 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
356 codegen_add_arithmeticexception_ref(cd);
357 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
365 /* emit_arrayindexoutofbounds_check ********************************************
367 Emit an ArrayIndexOutOfBoundsException check.
369 *******************************************************************************/
371 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
373 if (INSTRUCTION_MUST_CHECK(iptr)) {
374 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
375 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
378 M_BEQZ(REG_ITMP3, 0);
379 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
382 M_BNEZ(REG_ITMP3, 6);
386 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
387 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
388 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
396 /* emit_arraystore_check *******************************************************
398 Emit an ArrayStoreException check.
400 *******************************************************************************/
402 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
404 if (INSTRUCTION_MUST_CHECK(iptr)) {
407 codegen_add_arraystoreexception_ref(cd);
414 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
415 codegen_add_arraystoreexception_ref(cd);
416 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
424 /* emit_classcast_check ********************************************************
426 Emit a ClassCastException check.
428 *******************************************************************************/
430 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
432 if (INSTRUCTION_MUST_CHECK(iptr)) {
435 codegen_add_classcastexception_ref(cd, s1);
452 vm_abort("emit_classcast_check: condition %d not found", condition);
458 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
459 codegen_add_classcastexception_ref(cd, s1);
460 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
468 /* emit_nullpointer_check ******************************************************
470 Emit a NullPointerException check.
472 *******************************************************************************/
474 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
476 if (INSTRUCTION_MUST_CHECK(iptr)) {
479 codegen_add_nullpointerexception_ref(cd);
486 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
487 codegen_add_nullpointerexception_ref(cd);
488 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
496 /* emit_exception_check ********************************************************
498 Emit an Exception check.
500 *******************************************************************************/
502 void emit_exception_check(codegendata *cd, instruction *iptr)
504 if (INSTRUCTION_MUST_CHECK(iptr)) {
506 M_BEQZ(REG_RESULT, 0);
507 codegen_add_fillinstacktrace_ref(cd);
510 M_BNEZ(REG_RESULT, 6);
514 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
515 codegen_add_fillinstacktrace_ref(cd);
516 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
524 /* emit_exception_stubs ********************************************************
526 Generates the code for the exception stubs.
528 *******************************************************************************/
530 void emit_exception_stubs(jitdata *jd)
540 /* get required compiler data */
545 /* generate exception stubs */
549 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
550 /* back-patch the branch to this exception code */
552 branchmpc = er->branchpos;
553 targetmpc = cd->mcodeptr - cd->mcodebase;
555 md_codegen_patch_branch(cd, branchmpc, targetmpc);
559 /* Check if the exception is an
560 ArrayIndexOutOfBoundsException. If so, move index register
564 M_MOV(er->reg, REG_ITMP1);
566 /* calcuate exception address */
568 M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
570 /* move function to call into REG_ITMP3 */
572 disp = dseg_add_functionptr(cd, er->function);
573 M_ALD(REG_ITMP3, REG_PV, disp);
575 if (targetdisp == 0) {
576 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
578 M_MOV(REG_PV, REG_A0);
579 M_MOV(REG_SP, REG_A1);
581 if (jd->isleafmethod)
582 M_MOV(REG_RA, REG_A2);
584 M_ALD(REG_A2, REG_SP, (cd->stackframesize - 1) * 8);
586 M_MOV(REG_ITMP2_XPC, REG_A3);
588 #if SIZEOF_VOID_P == 8
590 M_MOV(REG_ITMP1, REG_A4);
592 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
593 M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
595 if (jd->isleafmethod)
596 M_AST(REG_RA, REG_SP, 1 * 8);
598 M_ASUB_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
599 M_AST(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
601 if (jd->isleafmethod)
602 M_AST(REG_RA, REG_SP, 5*4 + 1 * 8);
604 M_AST(REG_ITMP1, REG_SP, 4 * 4);
607 M_JSR(REG_RA, REG_ITMP3);
609 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
611 #if SIZEOF_VOID_P == 8
612 if (jd->isleafmethod)
613 M_ALD(REG_RA, REG_SP, 1 * 8);
615 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
616 M_AADD_IMM(REG_SP, 2 * 8, REG_SP);
618 if (jd->isleafmethod)
619 M_ALD(REG_RA, REG_SP, 5*4 + 1 * 8);
621 M_ALD(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
622 M_AADD_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
625 disp = dseg_add_functionptr(cd, asm_handle_exception);
626 M_ALD(REG_ITMP3, REG_PV, disp);
631 disp = (((u4 *) cd->mcodebase) + targetdisp) -
632 (((u4 *) cd->mcodeptr) + 1);
641 /* emit_patcher_stubs **********************************************************
643 Generates the code for the patcher stubs.
645 *******************************************************************************/
647 void emit_patcher_stubs(jitdata *jd)
657 /* get required compiler data */
661 /* generate code patching stub call code */
665 /* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
666 /* pr = list_next_unsynced(cd->patchrefs, pr)) { */
667 for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
668 /* check code segment size */
672 /* Get machine code which is patched back in later. The
673 call is 2 instruction words long. */
675 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
677 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
678 MIPS causes a SIGSEGV and using the same code for both
679 architectures is much better. */
681 mcode[0] = ((u4 *) tmpmcodeptr)[0];
682 mcode[1] = ((u4 *) tmpmcodeptr)[1];
684 mcode[2] = ((u4 *) tmpmcodeptr)[2];
685 mcode[3] = ((u4 *) tmpmcodeptr)[3];
686 mcode[4] = ((u4 *) tmpmcodeptr)[4];
688 /* Patch in the call to call the following code (done at
691 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
692 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
694 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
696 /* if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) { */
697 /* Recalculate the displacement to be relative to PV. */
699 disp = savedmcodeptr - cd->mcodebase;
701 M_LUI(REG_ITMP3, disp >> 16);
702 M_OR_IMM(REG_ITMP3, disp, REG_ITMP3);
703 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
715 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
717 /* create stack frame */
719 M_ASUB_IMM(REG_SP, 8 * 8, REG_SP);
721 /* calculate return address and move it onto the stack */
723 M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
724 M_AST(REG_ITMP3, REG_SP, 7 * 8);
726 /* move pointer to java_objectheader onto stack */
728 #if defined(ENABLE_THREADS)
729 /* create a virtual java_objectheader */
731 (void) dseg_add_unique_address(cd, NULL); /* flcword */
732 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
733 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
735 M_LDA(REG_ITMP3, REG_PV, disp);
736 M_AST(REG_ITMP3, REG_SP, 6 * 8);
741 /* move machine code onto stack */
743 disp = dseg_add_s4(cd, mcode[0]);
744 M_ILD(REG_ITMP3, REG_PV, disp);
745 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 0);
747 disp = dseg_add_s4(cd, mcode[1]);
748 M_ILD(REG_ITMP3, REG_PV, disp);
749 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
751 disp = dseg_add_s4(cd, mcode[2]);
752 M_ILD(REG_ITMP3, REG_PV, disp);
753 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 0);
755 disp = dseg_add_s4(cd, mcode[3]);
756 M_ILD(REG_ITMP3, REG_PV, disp);
757 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 4);
759 disp = dseg_add_s4(cd, mcode[4]);
760 M_ILD(REG_ITMP3, REG_PV, disp);
761 M_IST(REG_ITMP3, REG_SP, 5 * 8 + 0);
763 /* move class/method/field reference onto stack */
765 disp = dseg_add_address(cd, pr->ref);
766 M_ALD(REG_ITMP3, REG_PV, disp);
767 M_AST(REG_ITMP3, REG_SP, 2 * 8);
769 /* move data segment displacement onto stack */
771 disp = dseg_add_s4(cd, pr->disp);
772 M_ILD(REG_ITMP3, REG_PV, disp);
773 M_IST(REG_ITMP3, REG_SP, 1 * 8);
775 /* move patcher function pointer onto stack */
777 disp = dseg_add_functionptr(cd, pr->patcher);
778 M_ALD(REG_ITMP3, REG_PV, disp);
779 M_AST(REG_ITMP3, REG_SP, 0 * 8);
781 if (targetdisp == 0) {
782 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
784 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
785 M_ALD(REG_ITMP3, REG_PV, disp);
790 disp = (((u4 *) cd->mcodebase) + targetdisp) -
791 (((u4 *) cd->mcodeptr) + 1);
800 /* emit_replacement_stubs ******************************************************
802 Generates the code for the replacement stubs.
804 *******************************************************************************/
806 #if defined(ENABLE_REPLACEMENT)
807 void emit_replacement_stubs(jitdata *jd)
818 /* get required compiler data */
823 rplp = code->rplpoints;
825 /* store beginning of replacement stubs */
827 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
829 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
830 /* do not generate stubs for non-trappable points */
832 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
835 /* check code segment size */
840 savedmcodeptr = cd->mcodeptr;
843 /* create stack frame - 16-byte aligned */
845 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
847 /* push address of `rplpoint` struct */
849 disp = dseg_add_address(cd, rplp);
850 M_ALD(REG_ITMP3, REG_PV, disp);
851 M_AST(REG_ITMP3, REG_SP, 0 * 8);
853 /* jump to replacement function */
855 disp = dseg_add_functionptr(cd, asm_replacement_out);
856 M_ALD(REG_ITMP3, REG_PV, disp);
858 M_NOP; /* delay slot */
860 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
863 #endif /* defined(ENABLE_REPLACEMENT) */
866 /* emit_verbosecall_enter ******************************************************
868 Generates the code for the call trace.
870 *******************************************************************************/
873 void emit_verbosecall_enter(jitdata *jd)
882 /* get required compiler data */
890 /* mark trace code */
894 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
895 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
897 /* save argument registers (we store the registers as address
898 types, so it's correct for MIPS32 too) */
900 for (i = 0; i < INT_ARG_CNT; i++)
901 M_AST(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
903 for (i = 0; i < FLT_ARG_CNT; i++)
904 M_DST(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
906 /* save temporary registers for leaf methods */
908 if (jd->isleafmethod) {
909 for (i = 0; i < INT_TMP_CNT; i++)
910 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
912 for (i = 0; i < FLT_TMP_CNT; i++)
913 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
916 /* Load float arguments into integer registers. MIPS32 has less
917 float argument registers than integer ones, we need to check
920 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
921 t = md->paramtypes[i].type;
923 if (IS_FLT_DBL_TYPE(t)) {
924 if (IS_2_WORD_TYPE(t)) {
925 M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
926 M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
929 M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
930 M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
935 #if SIZEOF_VOID_P == 4
936 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
937 t = md->paramtypes[i].type;
939 if (IS_INT_LNG_TYPE(t)) {
940 if (IS_2_WORD_TYPE(t)) {
941 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
942 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
945 # if WORDS_BIGENDIAN == 1
946 M_MOV(REG_ZERO, rd->argintregs[j]);
947 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
949 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
950 M_MOV(REG_ZERO, rd->argintregs[j + 1]);
958 disp = dseg_add_address(cd, m);
959 M_ALD(REG_ITMP1, REG_PV, disp);
960 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
961 disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
962 M_ALD(REG_ITMP3, REG_PV, disp);
963 M_JSR(REG_RA, REG_ITMP3);
966 /* restore argument registers */
968 for (i = 0; i < INT_ARG_CNT; i++)
969 M_ALD(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
971 for (i = 0; i < FLT_ARG_CNT; i++)
972 M_DLD(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
974 /* restore temporary registers for leaf methods */
976 if (jd->isleafmethod) {
977 for (i = 0; i < INT_TMP_CNT; i++)
978 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
980 for (i = 0; i < FLT_TMP_CNT; i++)
981 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
984 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
985 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
987 /* mark trace code */
991 #endif /* !defined(NDEBUG) */
994 /* emit_verbosecall_exit *******************************************************
996 Generates the code for the call trace.
998 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
1000 *******************************************************************************/
1002 #if !defined(NDEBUG)
1003 void emit_verbosecall_exit(jitdata *jd)
1011 /* get required compiler data */
1019 /* mark trace code */
1023 #if SIZEOF_VOID_P == 8
1024 M_ASUB_IMM(REG_SP, 4 * 8, REG_SP); /* keep stack 16-byte aligned */
1025 M_AST(REG_RA, REG_SP, 0 * 8);
1027 M_LST(REG_RESULT, REG_SP, 1 * 8);
1028 M_DST(REG_FRESULT, REG_SP, 2 * 8);
1030 M_MOV(REG_RESULT, REG_A0);
1031 M_DMOV(REG_FRESULT, REG_FA1);
1032 M_FMOV(REG_FRESULT, REG_FA2);
1034 disp = dseg_add_address(cd, m);
1035 M_ALD(REG_A4, REG_PV, disp);
1037 M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
1038 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
1040 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1041 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1043 switch (md->returntype.type) {
1045 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
1049 # if WORDS_BIGENDIAN == 1
1050 M_MOV(REG_ZERO, REG_A0);
1051 M_MOV(REG_RESULT, REG_A1);
1053 M_MOV(REG_RESULT, REG_A0);
1054 M_MOV(REG_ZERO, REG_A1);
1058 M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
1059 M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
1061 disp = dseg_add_address(cd, m);
1062 M_ALD(REG_ITMP1, REG_PV, disp);
1063 M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
1066 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
1067 M_ALD(REG_ITMP3, REG_PV, disp);
1068 M_JSR(REG_RA, REG_ITMP3);
1071 #if SIZEOF_VOID_P == 8
1072 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
1073 M_LLD(REG_RESULT, REG_SP, 1 * 8);
1075 M_ALD(REG_RA, REG_SP, 0 * 8);
1076 M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
1078 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1079 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1081 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
1082 M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
1085 /* mark trace code */
1089 #endif /* !defined(NDEBUG) */
1093 * These are local overrides for various environment variables in Emacs.
1094 * Please do not remove this and leave it at the end of the file, where
1095 * Emacs will automagically detect them.
1096 * ---------------------------------------------------------------------
1099 * indent-tabs-mode: t
1103 * vim:noexpandtab:sw=4:ts=4: