1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "vm/jit/mips/codegen.h"
37 #include "vm/jit/mips/md-abi.h"
39 #if defined(ENABLE_THREADS)
40 # include "threads/native/lock.h"
43 #include "vm/exceptions.h"
44 #include "vm/options.h"
45 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
46 #include "vm/jit/abi-asm.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
54 /* emit_load *******************************************************************
56 Emits a possible load of an operand.
58 *******************************************************************************/
60 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
66 /* get required compiler data */
70 if (src->flags & INMEMORY) {
73 disp = src->vv.regoff * 8;
75 if (IS_FLT_DBL_TYPE(src->type)) {
76 if (IS_2_WORD_TYPE(src->type))
77 M_DLD(tempreg, REG_SP, disp);
79 M_FLD(tempreg, REG_SP, disp);
82 #if SIZEOF_VOID_P == 8
83 M_LLD(tempreg, REG_SP, disp);
85 if (IS_2_WORD_TYPE(src->type))
86 M_LLD(tempreg, REG_SP, disp);
88 M_ILD(tempreg, REG_SP, disp);
101 /* emit_load_low ***************************************************************
103 Emits a possible load of the low 32-bits of an operand.
105 *******************************************************************************/
107 #if SIZEOF_VOID_P == 4
108 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
120 if (src->flags & INMEMORY) {
123 disp = src->vv.regoff * 8;
125 #if WORDS_BIGENDIAN == 1
126 M_ILD(tempreg, REG_SP, disp + 4);
128 M_ILD(tempreg, REG_SP, disp);
134 reg = GET_LOW_REG(src->vv.regoff);
138 #endif /* SIZEOF_VOID_P == 4 */
141 /* emit_load_high **************************************************************
143 Emits a possible load of the high 32-bits of an operand.
145 *******************************************************************************/
147 #if SIZEOF_VOID_P == 4
148 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
154 assert(src->type == TYPE_LNG);
156 /* get required compiler data */
160 if (src->flags & INMEMORY) {
163 disp = src->vv.regoff * 8;
165 #if WORDS_BIGENDIAN == 1
166 M_ILD(tempreg, REG_SP, disp);
168 M_ILD(tempreg, REG_SP, disp + 4);
174 reg = GET_HIGH_REG(src->vv.regoff);
178 #endif /* SIZEOF_VOID_P == 4 */
181 /* emit_store ******************************************************************
183 Emits a possible store to variable.
185 *******************************************************************************/
187 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
192 /* get required compiler data */
196 if (dst->flags & INMEMORY) {
199 disp = dst->vv.regoff * 8;
201 if (IS_FLT_DBL_TYPE(dst->type)) {
202 if (IS_2_WORD_TYPE(dst->type))
203 M_DST(d, REG_SP, disp);
205 M_FST(d, REG_SP, disp);
208 #if SIZEOF_VOID_P == 8
209 M_LST(d, REG_SP, disp);
211 if (IS_2_WORD_TYPE(dst->type))
212 M_LST(d, REG_SP, disp);
214 M_IST(d, REG_SP, disp);
221 /* emit_copy *******************************************************************
223 Generates a register/memory to register/memory copy.
225 *******************************************************************************/
227 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
232 /* get required compiler data */
236 if ((src->vv.regoff != dst->vv.regoff) ||
237 ((src->flags ^ dst->flags) & INMEMORY)) {
238 /* If one of the variables resides in memory, we can eliminate
239 the register move from/to the temporary register with the
240 order of getting the destination register and the load. */
242 if (IS_INMEMORY(src->flags)) {
243 #if SIZEOF_VOID_P == 4
244 if (IS_2_WORD_TYPE(src->type))
245 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
248 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
249 s1 = emit_load(jd, iptr, src, d);
252 s1 = emit_load(jd, iptr, src, REG_IFTMP);
253 #if SIZEOF_VOID_P == 4
254 if (IS_2_WORD_TYPE(src->type))
255 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
258 d = codegen_reg_of_var(iptr->opc, dst, s1);
262 if (IS_FLT_DBL_TYPE(src->type)) {
263 if (IS_2_WORD_TYPE(src->type))
269 #if SIZEOF_VOID_P == 8
272 if (IS_2_WORD_TYPE(src->type))
280 emit_store(jd, iptr, dst, d);
285 /* emit_iconst *****************************************************************
289 *******************************************************************************/
291 void emit_iconst(codegendata *cd, s4 d, s4 value)
295 if ((value >= -32768) && (value <= 32767))
296 M_IADD_IMM(REG_ZERO, value, d);
297 else if ((value >= 0) && (value <= 0xffff))
298 M_OR_IMM(REG_ZERO, value, d);
300 disp = dseg_add_s4(cd, value);
301 M_ILD(d, REG_PV, disp);
306 /* emit_lconst *****************************************************************
310 *******************************************************************************/
312 void emit_lconst(codegendata *cd, s4 d, s8 value)
316 #if SIZEOF_VOID_P == 8
317 if ((value >= -32768) && (value <= 32767))
318 M_LADD_IMM(REG_ZERO, value, d);
319 else if ((value >= 0) && (value <= 0xffff))
320 M_OR_IMM(REG_ZERO, value, d);
322 disp = dseg_add_s8(cd, value);
323 M_LLD(d, REG_PV, disp);
326 disp = dseg_add_s8(cd, value);
327 M_LLD(d, REG_PV, disp);
332 /* emit_arithmetic_check *******************************************************
334 Emit an ArithmeticException check.
336 *******************************************************************************/
338 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
340 if (INSTRUCTION_MUST_CHECK(iptr)) {
343 codegen_add_arithmeticexception_ref(cd);
350 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
351 codegen_add_arithmeticexception_ref(cd);
352 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
360 /* emit_arrayindexoutofbounds_check ********************************************
362 Emit an ArrayIndexOutOfBoundsException check.
364 *******************************************************************************/
366 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
368 if (INSTRUCTION_MUST_CHECK(iptr)) {
369 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
370 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
373 M_BEQZ(REG_ITMP3, 0);
374 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
377 M_BNEZ(REG_ITMP3, 6);
381 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
382 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
383 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
391 /* emit_arraystore_check *******************************************************
393 Emit an ArrayStoreException check.
395 *******************************************************************************/
397 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
399 if (INSTRUCTION_MUST_CHECK(iptr)) {
402 codegen_add_arraystoreexception_ref(cd);
409 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
410 codegen_add_arraystoreexception_ref(cd);
411 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
419 /* emit_classcast_check ********************************************************
421 Emit a ClassCastException check.
423 *******************************************************************************/
425 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
427 if (INSTRUCTION_MUST_CHECK(iptr)) {
430 codegen_add_classcastexception_ref(cd, s1);
447 vm_abort("emit_classcast_check: condition %d not found", condition);
453 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
454 codegen_add_classcastexception_ref(cd, s1);
455 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
463 /* emit_nullpointer_check ******************************************************
465 Emit a NullPointerException check.
467 *******************************************************************************/
469 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
471 if (INSTRUCTION_MUST_CHECK(iptr)) {
474 codegen_add_nullpointerexception_ref(cd);
481 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
482 codegen_add_nullpointerexception_ref(cd);
483 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
491 /* emit_exception_check ********************************************************
493 Emit an Exception check.
495 *******************************************************************************/
497 void emit_exception_check(codegendata *cd, instruction *iptr)
499 if (INSTRUCTION_MUST_CHECK(iptr)) {
501 M_BEQZ(REG_RESULT, 0);
502 codegen_add_fillinstacktrace_ref(cd);
505 M_BNEZ(REG_RESULT, 6);
509 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
510 codegen_add_fillinstacktrace_ref(cd);
511 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
519 /* emit_exception_stubs ********************************************************
521 Generates the code for the exception stubs.
523 *******************************************************************************/
525 void emit_exception_stubs(jitdata *jd)
535 /* get required compiler data */
540 /* generate exception stubs */
544 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
545 /* back-patch the branch to this exception code */
547 branchmpc = er->branchpos;
548 targetmpc = cd->mcodeptr - cd->mcodebase;
550 md_codegen_patch_branch(cd, branchmpc, targetmpc);
554 /* Check if the exception is an
555 ArrayIndexOutOfBoundsException. If so, move index register
559 M_MOV(er->reg, REG_ITMP1);
561 /* calcuate exception address */
563 M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
565 /* move function to call into REG_ITMP3 */
567 disp = dseg_add_functionptr(cd, er->function);
568 M_ALD(REG_ITMP3, REG_PV, disp);
570 if (targetdisp == 0) {
571 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
573 M_MOV(REG_PV, REG_A0);
574 M_MOV(REG_SP, REG_A1);
576 if (jd->isleafmethod)
577 M_MOV(REG_RA, REG_A2);
579 M_ALD(REG_A2, REG_SP, (cd->stackframesize - 1) * 8);
581 M_MOV(REG_ITMP2_XPC, REG_A3);
583 #if SIZEOF_VOID_P == 8
585 M_MOV(REG_ITMP1, REG_A4);
587 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
588 M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
590 if (jd->isleafmethod)
591 M_AST(REG_RA, REG_SP, 1 * 8);
593 M_ASUB_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
594 M_AST(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
596 if (jd->isleafmethod)
597 M_AST(REG_RA, REG_SP, 5*4 + 1 * 8);
599 M_AST(REG_ITMP1, REG_SP, 4 * 4);
602 M_JSR(REG_RA, REG_ITMP3);
604 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
606 #if SIZEOF_VOID_P == 8
607 if (jd->isleafmethod)
608 M_ALD(REG_RA, REG_SP, 1 * 8);
610 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
611 M_AADD_IMM(REG_SP, 2 * 8, REG_SP);
613 if (jd->isleafmethod)
614 M_ALD(REG_RA, REG_SP, 5*4 + 1 * 8);
616 M_ALD(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
617 M_AADD_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
620 disp = dseg_add_functionptr(cd, asm_handle_exception);
621 M_ALD(REG_ITMP3, REG_PV, disp);
626 disp = (((u4 *) cd->mcodebase) + targetdisp) -
627 (((u4 *) cd->mcodeptr) + 1);
636 /* emit_patcher_stubs **********************************************************
638 Generates the code for the patcher stubs.
640 *******************************************************************************/
642 void emit_patcher_stubs(jitdata *jd)
652 /* get required compiler data */
656 /* generate code patching stub call code */
660 /* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
661 /* pr = list_next_unsynced(cd->patchrefs, pr)) { */
662 for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
663 /* check code segment size */
667 /* Get machine code which is patched back in later. The
668 call is 2 instruction words long. */
670 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
672 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
673 MIPS causes a SIGSEGV and using the same code for both
674 architectures is much better. */
676 mcode[0] = ((u4 *) tmpmcodeptr)[0];
677 mcode[1] = ((u4 *) tmpmcodeptr)[1];
679 mcode[2] = ((u4 *) tmpmcodeptr)[2];
680 mcode[3] = ((u4 *) tmpmcodeptr)[3];
681 mcode[4] = ((u4 *) tmpmcodeptr)[4];
683 /* Patch in the call to call the following code (done at
686 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
687 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
689 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
691 /* if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) { */
692 /* Recalculate the displacement to be relative to PV. */
694 disp = savedmcodeptr - cd->mcodebase;
696 M_LUI(REG_ITMP3, disp >> 16);
697 M_OR_IMM(REG_ITMP3, disp, REG_ITMP3);
698 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
710 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
712 /* create stack frame */
714 M_ASUB_IMM(REG_SP, 8 * 8, REG_SP);
716 /* calculate return address and move it onto the stack */
718 M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
719 M_AST(REG_ITMP3, REG_SP, 7 * 8);
721 /* move pointer to java_objectheader onto stack */
723 #if defined(ENABLE_THREADS)
724 /* create a virtual java_objectheader */
726 (void) dseg_add_unique_address(cd, NULL); /* flcword */
727 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
728 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
730 M_LDA(REG_ITMP3, REG_PV, disp);
731 M_AST(REG_ITMP3, REG_SP, 6 * 8);
736 /* move machine code onto stack */
738 disp = dseg_add_s4(cd, mcode[0]);
739 M_ILD(REG_ITMP3, REG_PV, disp);
740 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 0);
742 disp = dseg_add_s4(cd, mcode[1]);
743 M_ILD(REG_ITMP3, REG_PV, disp);
744 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
746 disp = dseg_add_s4(cd, mcode[2]);
747 M_ILD(REG_ITMP3, REG_PV, disp);
748 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 0);
750 disp = dseg_add_s4(cd, mcode[3]);
751 M_ILD(REG_ITMP3, REG_PV, disp);
752 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 4);
754 disp = dseg_add_s4(cd, mcode[4]);
755 M_ILD(REG_ITMP3, REG_PV, disp);
756 M_IST(REG_ITMP3, REG_SP, 5 * 8 + 0);
758 /* move class/method/field reference onto stack */
760 disp = dseg_add_address(cd, pr->ref);
761 M_ALD(REG_ITMP3, REG_PV, disp);
762 M_AST(REG_ITMP3, REG_SP, 2 * 8);
764 /* move data segment displacement onto stack */
766 disp = dseg_add_s4(cd, pr->disp);
767 M_ILD(REG_ITMP3, REG_PV, disp);
768 M_IST(REG_ITMP3, REG_SP, 1 * 8);
770 /* move patcher function pointer onto stack */
772 disp = dseg_add_functionptr(cd, pr->patcher);
773 M_ALD(REG_ITMP3, REG_PV, disp);
774 M_AST(REG_ITMP3, REG_SP, 0 * 8);
776 if (targetdisp == 0) {
777 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
779 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
780 M_ALD(REG_ITMP3, REG_PV, disp);
785 disp = (((u4 *) cd->mcodebase) + targetdisp) -
786 (((u4 *) cd->mcodeptr) + 1);
795 /* emit_replacement_stubs ******************************************************
797 Generates the code for the replacement stubs.
799 *******************************************************************************/
801 #if defined(ENABLE_REPLACEMENT)
802 void emit_replacement_stubs(jitdata *jd)
813 /* get required compiler data */
818 rplp = code->rplpoints;
820 /* store beginning of replacement stubs */
822 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
824 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
825 /* do not generate stubs for non-trappable points */
827 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
830 /* check code segment size */
835 savedmcodeptr = cd->mcodeptr;
838 /* create stack frame - 16-byte aligned */
840 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
842 /* push address of `rplpoint` struct */
844 disp = dseg_add_address(cd, rplp);
845 M_ALD(REG_ITMP3, REG_PV, disp);
846 M_AST(REG_ITMP3, REG_SP, 0 * 8);
848 /* jump to replacement function */
850 disp = dseg_add_functionptr(cd, asm_replacement_out);
851 M_ALD(REG_ITMP3, REG_PV, disp);
853 M_NOP; /* delay slot */
855 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
858 #endif /* defined(ENABLE_REPLACEMENT) */
861 /* emit_verbosecall_enter ******************************************************
863 Generates the code for the call trace.
865 *******************************************************************************/
868 void emit_verbosecall_enter(jitdata *jd)
877 /* get required compiler data */
885 /* mark trace code */
889 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
890 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
892 /* save argument registers (we store the registers as address
893 types, so it's correct for MIPS32 too) */
895 for (i = 0; i < INT_ARG_CNT; i++)
896 M_AST(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
898 for (i = 0; i < FLT_ARG_CNT; i++)
899 M_DST(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
901 /* save temporary registers for leaf methods */
903 if (jd->isleafmethod) {
904 for (i = 0; i < INT_TMP_CNT; i++)
905 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
907 for (i = 0; i < FLT_TMP_CNT; i++)
908 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
911 /* Load float arguments into integer registers. MIPS32 has less
912 float argument registers than integer ones, we need to check
915 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
916 t = md->paramtypes[i].type;
918 if (IS_FLT_DBL_TYPE(t)) {
919 if (IS_2_WORD_TYPE(t)) {
920 M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
921 M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
924 M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
925 M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
930 #if SIZEOF_VOID_P == 4
931 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
932 t = md->paramtypes[i].type;
934 if (IS_INT_LNG_TYPE(t)) {
935 if (IS_2_WORD_TYPE(t)) {
936 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
937 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
940 # if WORDS_BIGENDIAN == 1
941 M_MOV(REG_ZERO, rd->argintregs[j]);
942 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
944 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
945 M_MOV(REG_ZERO, rd->argintregs[j + 1]);
953 disp = dseg_add_address(cd, m);
954 M_ALD(REG_ITMP1, REG_PV, disp);
955 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
956 disp = dseg_add_functionptr(cd, builtin_trace_args);
957 M_ALD(REG_ITMP3, REG_PV, disp);
958 M_JSR(REG_RA, REG_ITMP3);
961 /* restore argument registers */
963 for (i = 0; i < INT_ARG_CNT; i++)
964 M_ALD(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
966 for (i = 0; i < FLT_ARG_CNT; i++)
967 M_DLD(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
969 /* restore temporary registers for leaf methods */
971 if (jd->isleafmethod) {
972 for (i = 0; i < INT_TMP_CNT; i++)
973 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
975 for (i = 0; i < FLT_TMP_CNT; i++)
976 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
979 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
980 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
982 /* mark trace code */
986 #endif /* !defined(NDEBUG) */
989 /* emit_verbosecall_exit *******************************************************
991 Generates the code for the call trace.
993 *******************************************************************************/
996 void emit_verbosecall_exit(jitdata *jd)
1004 /* get required compiler data */
1012 /* mark trace code */
1016 #if SIZEOF_VOID_P == 8
1017 M_LDA(REG_SP, REG_SP, -4 * 8); /* keep stack 16-byte aligned */
1018 M_AST(REG_RA, REG_SP, 0 * 8);
1020 M_LST(REG_RESULT, REG_SP, 1 * 8);
1021 M_DST(REG_FRESULT, REG_SP, 2 * 8);
1023 M_LDA(REG_SP, REG_SP, -(8*4 + 4 * 8));
1024 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
1026 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1027 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1030 disp = dseg_add_address(cd, m);
1031 M_ALD(rd->argintregs[0], REG_PV, disp);
1033 #if SIZEOF_VOID_P == 8
1034 M_MOV(REG_RESULT, rd->argintregs[1]);
1035 M_DMOV(REG_FRESULT, rd->argfltregs[2]);
1036 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
1038 switch (md->returntype.type) {
1040 # if WORDS_BIGENDIAN == 1
1041 M_MOV(REG_RESULT, rd->argintregs[2]);
1042 M_MOV(REG_RESULT2, rd->argintregs[3]);
1044 M_MOV(REG_RESULT2, rd->argintregs[2]);
1045 M_MOV(REG_RESULT, rd->argintregs[3]);
1049 # if WORDS_BIGENDIAN == 1
1050 M_MOV(REG_ZERO, rd->argintregs[2]);
1051 M_MOV(REG_RESULT, rd->argintregs[3]);
1053 M_MOV(REG_RESULT, rd->argintregs[2]);
1054 M_MOV(REG_ZERO, rd->argintregs[3]);
1058 M_DST(REG_FRESULT, REG_SP, 4*4);
1059 M_FST(REG_FRESULT, REG_SP, 4*4 + 2 * 4);
1062 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
1063 M_ALD(REG_ITMP3, REG_PV, disp);
1064 M_JSR(REG_RA, REG_ITMP3);
1067 #if SIZEOF_VOID_P == 8
1068 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
1069 M_LLD(REG_RESULT, REG_SP, 1 * 8);
1071 M_ALD(REG_RA, REG_SP, 0 * 8);
1072 M_LDA(REG_SP, REG_SP, 4 * 8);
1074 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1075 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1077 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
1078 M_LDA(REG_SP, REG_SP, 8*4 + 4 * 8);
1081 /* mark trace code */
1085 #endif /* !defined(NDEBUG) */
1089 * These are local overrides for various environment variables in Emacs.
1090 * Please do not remove this and leave it at the end of the file, where
1091 * Emacs will automagically detect them.
1092 * ---------------------------------------------------------------------
1095 * indent-tabs-mode: t
1099 * vim:noexpandtab:sw=4:ts=4: