1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
42 #include "vm/jit/mips/codegen.h"
44 #if defined(ENABLE_THREADS)
45 # include "threads/native/lock.h"
48 #include "vm/exceptions.h"
49 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
50 #include "vm/jit/abi-asm.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/dseg.h"
53 #include "vm/jit/emit-common.h"
54 #include "vm/jit/jit.h"
55 #include "vm/jit/replace.h"
58 /* emit_load *******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (src->flags & INMEMORY) {
77 disp = src->vv.regoff * 8;
79 if (IS_FLT_DBL_TYPE(src->type)) {
80 if (IS_2_WORD_TYPE(src->type))
81 M_DLD(tempreg, REG_SP, disp);
83 M_FLD(tempreg, REG_SP, disp);
86 M_LLD(tempreg, REG_SP, disp);
97 /* emit_store ******************************************************************
99 Emits a possible store to variable.
101 *******************************************************************************/
103 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
108 /* get required compiler data */
112 if (dst->flags & INMEMORY) {
115 disp = dst->vv.regoff * 8;
117 if (IS_FLT_DBL_TYPE(dst->type)) {
118 if (IS_2_WORD_TYPE(dst->type))
119 M_DST(d, REG_SP, disp);
121 M_FST(d, REG_SP, disp);
124 M_LST(d, REG_SP, disp);
129 /* emit_copy *******************************************************************
131 Generates a register/memory to register/memory copy.
133 *******************************************************************************/
135 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
141 /* get required compiler data */
146 if ((src->vv.regoff != dst->vv.regoff) ||
147 ((src->flags ^ dst->flags) & INMEMORY)) {
149 /* If one of the variables resides in memory, we can eliminate
150 the register move from/to the temporary register with the
151 order of getting the destination register and the load. */
153 if (IS_INMEMORY(src->flags)) {
154 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
155 s1 = emit_load(jd, iptr, src, d);
158 s1 = emit_load(jd, iptr, src, REG_IFTMP);
159 d = codegen_reg_of_var(iptr->opc, dst, s1);
163 if (IS_FLT_DBL_TYPE(src->type)) {
164 if (IS_2_WORD_TYPE(src->type))
173 emit_store(jd, iptr, dst, d);
178 /* emit_iconst *****************************************************************
182 *******************************************************************************/
184 void emit_iconst(codegendata *cd, s4 d, s4 value)
188 if ((value >= -32768) && (value <= 32767))
189 M_IADD_IMM(REG_ZERO, value, d);
190 else if ((value >= 0) && (value <= 0xffff))
191 M_OR_IMM(REG_ZERO, value, d);
193 disp = dseg_adds4(cd, value);
194 M_ILD(d, REG_PV, disp);
199 /* emit_lconst *****************************************************************
203 *******************************************************************************/
205 void emit_lconst(codegendata *cd, s4 d, s8 value)
209 if ((value >= -32768) && (value <= 32767))
210 M_LADD_IMM(REG_ZERO, value, d);
211 else if ((value >= 0) && (value <= 0xffff))
212 M_OR_IMM(REG_ZERO, value, d);
214 disp = dseg_adds8(cd, value);
215 M_LLD(d, REG_PV, disp);
220 /* emit_exception_stubs ********************************************************
222 Generates the code for the exception stubs.
224 *******************************************************************************/
226 void emit_exception_stubs(jitdata *jd)
234 /* get required compiler data */
239 /* generate exception stubs */
243 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
244 gen_resolvebranch(cd->mcodebase + eref->branchpos,
245 eref->branchpos, cd->mcodeptr - cd->mcodebase);
249 /* Check if the exception is an
250 ArrayIndexOutOfBoundsException. If so, move index register
254 M_MOV(eref->reg, REG_ITMP1);
256 /* calcuate exception address */
258 M_LDA(REG_ITMP2_XPC, REG_PV, eref->branchpos - 4);
260 /* move function to call into REG_ITMP3 */
262 disp = dseg_addaddress(cd, eref->function);
263 M_ALD(REG_ITMP3, REG_PV, disp);
265 if (targetdisp == 0) {
266 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
268 M_MOV(REG_PV, rd->argintregs[0]);
269 M_MOV(REG_SP, rd->argintregs[1]);
271 if (jd->isleafmethod)
272 M_MOV(REG_RA, rd->argintregs[2]);
274 M_ALD(rd->argintregs[2], REG_SP, (cd->stackframesize - 1) * 8);
276 M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
277 M_MOV(REG_ITMP1, rd->argintregs[4]);
279 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
280 M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
282 if (jd->isleafmethod)
283 M_AST(REG_RA, REG_SP, 1 * 8);
285 M_JSR(REG_RA, REG_ITMP3);
287 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
289 if (jd->isleafmethod)
290 M_ALD(REG_RA, REG_SP, 1 * 8);
292 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
293 M_AADD_IMM(REG_SP, 2 * 8, REG_SP);
295 disp = dseg_addaddress(cd, asm_handle_exception);
296 M_ALD(REG_ITMP3, REG_PV, disp);
301 disp = (((u4 *) cd->mcodebase) + targetdisp) -
302 (((u4 *) cd->mcodeptr) + 1);
311 /* emit_patcher_stubs **********************************************************
313 Generates the code for the patcher stubs.
315 *******************************************************************************/
317 void emit_patcher_stubs(jitdata *jd)
327 /* get required compiler data */
331 /* generate code patching stub call code */
335 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
336 /* check code segment size */
340 /* Get machine code which is patched back in later. The
341 call is 2 instruction words long. */
343 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
345 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
346 MIPS causes a SIGSEGV and using the same code for both
347 architectures is much better. */
349 mcode[0] = ((u4 *) tmpmcodeptr)[0];
350 mcode[1] = ((u4 *) tmpmcodeptr)[1];
352 /* Patch in the call to call the following code (done at
355 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
356 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
358 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
360 if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) {
362 new_internalerror("Jump offset is out of range: %d > +/-%d",
370 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
372 /* create stack frame */
374 M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
376 /* calculate return address and move it onto the stack */
378 M_LDA(REG_ITMP3, REG_PV, pref->branchpos);
379 M_AST(REG_ITMP3, REG_SP, 5 * 8);
381 /* move pointer to java_objectheader onto stack */
383 #if defined(ENABLE_THREADS)
384 /* create a virtual java_objectheader */
386 (void) dseg_addaddress(cd, NULL); /* flcword */
387 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
388 disp = dseg_addaddress(cd, NULL); /* vftbl */
390 M_LDA(REG_ITMP3, REG_PV, disp);
391 M_AST(REG_ITMP3, REG_SP, 4 * 8);
396 /* move machine code onto stack */
398 disp = dseg_adds4(cd, mcode[0]);
399 M_ILD(REG_ITMP3, REG_PV, disp);
400 M_IST(REG_ITMP3, REG_SP, 3 * 8);
402 disp = dseg_adds4(cd, mcode[1]);
403 M_ILD(REG_ITMP3, REG_PV, disp);
404 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
406 /* move class/method/field reference onto stack */
408 disp = dseg_addaddress(cd, pref->ref);
409 M_ALD(REG_ITMP3, REG_PV, disp);
410 M_AST(REG_ITMP3, REG_SP, 2 * 8);
412 /* move data segment displacement onto stack */
414 disp = dseg_adds4(cd, pref->disp);
415 M_ILD(REG_ITMP3, REG_PV, disp);
416 M_IST(REG_ITMP3, REG_SP, 1 * 8);
418 /* move patcher function pointer onto stack */
420 disp = dseg_addaddress(cd, pref->patcher);
421 M_ALD(REG_ITMP3, REG_PV, disp);
422 M_AST(REG_ITMP3, REG_SP, 0 * 8);
424 if (targetdisp == 0) {
425 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
427 disp = dseg_addaddress(cd, asm_patcher_wrapper);
428 M_ALD(REG_ITMP3, REG_PV, disp);
433 disp = (((u4 *) cd->mcodebase) + targetdisp) -
434 (((u4 *) cd->mcodeptr) + 1);
443 /* emit_replacement_stubs ******************************************************
445 Generates the code for the replacement stubs.
447 *******************************************************************************/
449 void emit_replacement_stubs(jitdata *jd)
458 /* get required compiler data */
463 rplp = code->rplpoints;
465 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
466 /* check code segment size */
470 /* note start of stub code */
472 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
474 /* make machine code for patching */
476 savedmcodeptr = cd->mcodeptr;
477 cd->mcodeptr = (u1 *) &(rplp->mcode);
479 disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
481 if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) {
483 new_internalerror("Jump offset is out of range: %d > +/-%d",
489 M_NOP; /* delay slot */
491 cd->mcodeptr = savedmcodeptr;
493 /* create stack frame - 16-byte aligned */
495 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
497 /* push address of `rplpoint` struct */
499 disp = dseg_addaddress(cd, rplp);
500 M_ALD(REG_ITMP3, REG_PV, disp);
501 M_AST(REG_ITMP3, REG_SP, 0 * 8);
503 /* jump to replacement function */
505 disp = dseg_addaddress(cd, asm_replacement_out);
506 M_ALD(REG_ITMP3, REG_PV, disp);
508 M_NOP; /* delay slot */
513 /* emit_verbosecall_enter ******************************************************
515 Generates the code for the call trace.
517 *******************************************************************************/
520 void emit_verbosecall_enter(jitdata *jd)
529 /* get required compiler data */
537 /* mark trace code */
541 M_LDA(REG_SP, REG_SP, -(2 + ARG_CNT + TMP_CNT) * 8);
542 M_AST(REG_RA, REG_SP, 1 * 8);
544 /* save argument registers */
546 for (i = 0; i < INT_ARG_CNT; i++)
547 M_LST(rd->argintregs[i], REG_SP, (2 + i) * 8);
549 for (i = 0; i < FLT_ARG_CNT; i++)
550 M_DST(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
552 /* save temporary registers for leaf methods */
554 if (jd->isleafmethod) {
555 for (i = 0; i < INT_TMP_CNT; i++)
556 M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
558 for (i = 0; i < FLT_TMP_CNT; i++)
559 M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
562 /* load float arguments into integer registers */
564 for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
565 t = md->paramtypes[i].type;
567 if (IS_FLT_DBL_TYPE(t)) {
568 if (IS_2_WORD_TYPE(t)) {
569 M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
570 M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
573 M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
574 M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
579 disp = dseg_addaddress(cd, m);
580 M_ALD(REG_ITMP1, REG_PV, disp);
581 M_AST(REG_ITMP1, REG_SP, 0 * 8);
582 disp = dseg_addaddress(cd, builtin_trace_args);
583 M_ALD(REG_ITMP3, REG_PV, disp);
584 M_JSR(REG_RA, REG_ITMP3);
587 /* restore argument registers */
589 for (i = 0; i < INT_ARG_CNT; i++)
590 M_LLD(rd->argintregs[i], REG_SP, (2 + i) * 8);
592 for (i = 0; i < FLT_ARG_CNT; i++)
593 M_DLD(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
595 /* restore temporary registers for leaf methods */
597 if (jd->isleafmethod) {
598 for (i = 0; i < INT_TMP_CNT; i++)
599 M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
601 for (i = 0; i < FLT_TMP_CNT; i++)
602 M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
605 M_ALD(REG_RA, REG_SP, 1 * 8);
606 M_LDA(REG_SP, REG_SP, (2 + ARG_CNT + TMP_CNT) * 8);
608 /* mark trace code */
612 #endif /* !defined(NDEBUG) */
615 /* emit_verbosecall_exit *******************************************************
617 Generates the code for the call trace.
619 *******************************************************************************/
622 void emit_verbosecall_exit(jitdata *jd)
629 /* get required compiler data */
635 /* mark trace code */
639 M_LDA(REG_SP, REG_SP, -4 * 8); /* keep stack 16-byte aligned */
640 M_LST(REG_RA, REG_SP, 0 * 8);
642 M_LST(REG_RESULT, REG_SP, 1 * 8);
643 M_DST(REG_FRESULT, REG_SP, 2 * 8);
645 disp = dseg_addaddress(cd, m);
646 M_ALD(rd->argintregs[0], REG_PV, disp);
648 M_MOV(REG_RESULT, rd->argintregs[1]);
649 M_DMOV(REG_FRESULT, rd->argfltregs[2]);
650 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
652 disp = dseg_addaddress(cd, builtin_displaymethodstop);
653 M_ALD(REG_ITMP3, REG_PV, disp);
654 M_JSR(REG_RA, REG_ITMP3);
657 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
658 M_LLD(REG_RESULT, REG_SP, 1 * 8);
660 M_LLD(REG_RA, REG_SP, 0 * 8);
661 M_LDA(REG_SP, REG_SP, 4 * 8);
663 /* mark trace code */
667 #endif /* !defined(NDEBUG) */
671 * These are local overrides for various environment variables in Emacs.
672 * Please do not remove this and leave it at the end of the file, where
673 * Emacs will automagically detect them.
674 * ---------------------------------------------------------------------
677 * indent-tabs-mode: t
681 * vim:noexpandtab:sw=4:ts=4: