1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
42 #include "vm/jit/mips/codegen.h"
43 #include "vm/jit/mips/md-abi.h"
45 #if defined(ENABLE_THREADS)
46 # include "threads/native/lock.h"
49 #include "vm/exceptions.h"
50 #include "vm/options.h"
51 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
52 #include "vm/jit/abi-asm.h"
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/dseg.h"
55 #include "vm/jit/emit-common.h"
56 #include "vm/jit/jit.h"
57 #include "vm/jit/replace.h"
60 /* emit_load *******************************************************************
62 Emits a possible load of an operand.
64 *******************************************************************************/
66 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
72 /* get required compiler data */
76 if (src->flags & INMEMORY) {
79 disp = src->vv.regoff * 8;
81 if (IS_FLT_DBL_TYPE(src->type)) {
82 if (IS_2_WORD_TYPE(src->type))
83 M_DLD(tempreg, REG_SP, disp);
85 M_FLD(tempreg, REG_SP, disp);
88 #if SIZEOF_VOID_P == 8
89 M_LLD(tempreg, REG_SP, disp);
91 if (IS_2_WORD_TYPE(src->type))
92 M_LLD(tempreg, REG_SP, disp);
94 M_ILD(tempreg, REG_SP, disp);
101 reg = src->vv.regoff;
107 /* emit_load_low ***************************************************************
109 Emits a possible load of the low 32-bits of an operand.
111 *******************************************************************************/
113 #if SIZEOF_VOID_P == 4
114 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
120 assert(src->type == TYPE_LNG);
122 /* get required compiler data */
126 if (src->flags & INMEMORY) {
129 disp = src->vv.regoff * 8;
131 #if WORDS_BIGENDIAN == 1
132 M_ILD(tempreg, REG_SP, disp + 4);
134 M_ILD(tempreg, REG_SP, disp);
140 reg = GET_LOW_REG(src->vv.regoff);
144 #endif /* SIZEOF_VOID_P == 4 */
147 /* emit_load_high **************************************************************
149 Emits a possible load of the high 32-bits of an operand.
151 *******************************************************************************/
153 #if SIZEOF_VOID_P == 4
154 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
160 assert(src->type == TYPE_LNG);
162 /* get required compiler data */
166 if (src->flags & INMEMORY) {
169 disp = src->vv.regoff * 8;
171 #if WORDS_BIGENDIAN == 1
172 M_ILD(tempreg, REG_SP, disp);
174 M_ILD(tempreg, REG_SP, disp + 4);
180 reg = GET_HIGH_REG(src->vv.regoff);
184 #endif /* SIZEOF_VOID_P == 4 */
187 /* emit_store ******************************************************************
189 Emits a possible store to variable.
191 *******************************************************************************/
193 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
198 /* get required compiler data */
202 if (dst->flags & INMEMORY) {
205 disp = dst->vv.regoff * 8;
207 if (IS_FLT_DBL_TYPE(dst->type)) {
208 if (IS_2_WORD_TYPE(dst->type))
209 M_DST(d, REG_SP, disp);
211 M_FST(d, REG_SP, disp);
214 #if SIZEOF_VOID_P == 8
215 M_LST(d, REG_SP, disp);
217 if (IS_2_WORD_TYPE(dst->type))
218 M_LST(d, REG_SP, disp);
220 M_IST(d, REG_SP, disp);
227 /* emit_copy *******************************************************************
229 Generates a register/memory to register/memory copy.
231 *******************************************************************************/
233 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
238 /* get required compiler data */
242 if ((src->vv.regoff != dst->vv.regoff) ||
243 ((src->flags ^ dst->flags) & INMEMORY)) {
244 /* If one of the variables resides in memory, we can eliminate
245 the register move from/to the temporary register with the
246 order of getting the destination register and the load. */
248 if (IS_INMEMORY(src->flags)) {
249 #if SIZEOF_VOID_P == 4
250 if (IS_2_WORD_TYPE(src->type))
251 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
254 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
255 s1 = emit_load(jd, iptr, src, d);
258 s1 = emit_load(jd, iptr, src, REG_IFTMP);
259 #if SIZEOF_VOID_P == 4
260 if (IS_2_WORD_TYPE(src->type))
261 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
264 d = codegen_reg_of_var(iptr->opc, dst, s1);
268 if (IS_FLT_DBL_TYPE(src->type)) {
269 if (IS_2_WORD_TYPE(src->type))
275 #if SIZEOF_VOID_P == 8
278 if (IS_2_WORD_TYPE(src->type))
286 emit_store(jd, iptr, dst, d);
291 /* emit_iconst *****************************************************************
295 *******************************************************************************/
297 void emit_iconst(codegendata *cd, s4 d, s4 value)
301 if ((value >= -32768) && (value <= 32767))
302 M_IADD_IMM(REG_ZERO, value, d);
303 else if ((value >= 0) && (value <= 0xffff))
304 M_OR_IMM(REG_ZERO, value, d);
306 disp = dseg_add_s4(cd, value);
307 M_ILD(d, REG_PV, disp);
312 /* emit_lconst *****************************************************************
316 *******************************************************************************/
318 void emit_lconst(codegendata *cd, s4 d, s8 value)
322 #if SIZEOF_VOID_P == 8
323 if ((value >= -32768) && (value <= 32767))
324 M_LADD_IMM(REG_ZERO, value, d);
325 else if ((value >= 0) && (value <= 0xffff))
326 M_OR_IMM(REG_ZERO, value, d);
328 disp = dseg_add_s8(cd, value);
329 M_LLD(d, REG_PV, disp);
332 disp = dseg_add_s8(cd, value);
333 M_LLD(d, REG_PV, disp);
338 /* emit_arithmetic_check *******************************************************
340 Emit an ArithmeticException check.
342 *******************************************************************************/
344 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
346 if (INSTRUCTION_MUST_CHECK(iptr)) {
349 codegen_add_arithmeticexception_ref(cd);
356 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
357 codegen_add_arithmeticexception_ref(cd);
358 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
366 /* emit_arrayindexoutofbounds_check ********************************************
368 Emit an ArrayIndexOutOfBoundsException check.
370 *******************************************************************************/
372 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
374 if (INSTRUCTION_MUST_CHECK(iptr)) {
375 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
376 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
379 M_BEQZ(REG_ITMP3, 0);
380 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
383 M_BNEZ(REG_ITMP3, 6);
387 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
388 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
389 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
397 /* emit_arraystore_check *******************************************************
399 Emit an ArrayStoreException check.
401 *******************************************************************************/
403 void emit_arraystore_check(codegendata *cd, instruction *iptr, s4 reg)
405 if (INSTRUCTION_MUST_CHECK(iptr)) {
408 codegen_add_arraystoreexception_ref(cd);
415 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
416 codegen_add_arraystoreexception_ref(cd);
417 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
425 /* emit_classcast_check ********************************************************
427 Emit a ClassCastException check.
429 *******************************************************************************/
431 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
433 if (INSTRUCTION_MUST_CHECK(iptr)) {
436 codegen_add_classcastexception_ref(cd, s1);
453 vm_abort("emit_classcast_check: condition %d not found", condition);
459 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
460 codegen_add_classcastexception_ref(cd, s1);
461 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
469 /* emit_nullpointer_check ******************************************************
471 Emit a NullPointerException check.
473 *******************************************************************************/
475 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
477 if (INSTRUCTION_MUST_CHECK(iptr)) {
480 codegen_add_nullpointerexception_ref(cd);
487 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
488 codegen_add_nullpointerexception_ref(cd);
489 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
497 /* emit_exception_check ********************************************************
499 Emit an Exception check.
501 *******************************************************************************/
503 void emit_exception_check(codegendata *cd, instruction *iptr)
505 if (INSTRUCTION_MUST_CHECK(iptr)) {
507 M_BEQZ(REG_RESULT, 0);
508 codegen_add_fillinstacktrace_ref(cd);
511 M_BNEZ(REG_RESULT, 6);
515 M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
516 codegen_add_fillinstacktrace_ref(cd);
517 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
525 /* emit_exception_stubs ********************************************************
527 Generates the code for the exception stubs.
529 *******************************************************************************/
531 void emit_exception_stubs(jitdata *jd)
541 /* get required compiler data */
546 /* generate exception stubs */
550 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
551 /* back-patch the branch to this exception code */
553 branchmpc = er->branchpos;
554 targetmpc = cd->mcodeptr - cd->mcodebase;
556 md_codegen_patch_branch(cd, branchmpc, targetmpc);
560 /* Check if the exception is an
561 ArrayIndexOutOfBoundsException. If so, move index register
565 M_MOV(er->reg, REG_ITMP1);
567 /* calcuate exception address */
569 M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
571 /* move function to call into REG_ITMP3 */
573 disp = dseg_add_functionptr(cd, er->function);
574 M_ALD(REG_ITMP3, REG_PV, disp);
576 if (targetdisp == 0) {
577 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
579 M_MOV(REG_PV, REG_A0);
580 M_MOV(REG_SP, REG_A1);
582 if (jd->isleafmethod)
583 M_MOV(REG_RA, REG_A2);
585 M_ALD(REG_A2, REG_SP, (cd->stackframesize - 1) * 8);
587 M_MOV(REG_ITMP2_XPC, REG_A3);
589 #if SIZEOF_VOID_P == 8
591 M_MOV(REG_ITMP1, REG_A4);
593 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
594 M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
596 if (jd->isleafmethod)
597 M_AST(REG_RA, REG_SP, 1 * 8);
599 M_ASUB_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
600 M_AST(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
602 if (jd->isleafmethod)
603 M_AST(REG_RA, REG_SP, 5*4 + 1 * 8);
605 M_AST(REG_ITMP1, REG_SP, 4 * 4);
608 M_JSR(REG_RA, REG_ITMP3);
610 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
612 #if SIZEOF_VOID_P == 8
613 if (jd->isleafmethod)
614 M_ALD(REG_RA, REG_SP, 1 * 8);
616 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
617 M_AADD_IMM(REG_SP, 2 * 8, REG_SP);
619 if (jd->isleafmethod)
620 M_ALD(REG_RA, REG_SP, 5*4 + 1 * 8);
622 M_ALD(REG_ITMP2_XPC, REG_SP, 5*4 + 0 * 8);
623 M_AADD_IMM(REG_SP, 5*4 + 2 * 8, REG_SP);
626 disp = dseg_add_functionptr(cd, asm_handle_exception);
627 M_ALD(REG_ITMP3, REG_PV, disp);
632 disp = (((u4 *) cd->mcodebase) + targetdisp) -
633 (((u4 *) cd->mcodeptr) + 1);
642 /* emit_patcher_stubs **********************************************************
644 Generates the code for the patcher stubs.
646 *******************************************************************************/
648 void emit_patcher_stubs(jitdata *jd)
658 /* get required compiler data */
662 /* generate code patching stub call code */
666 /* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
667 /* pr = list_next_unsynced(cd->patchrefs, pr)) { */
668 for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
669 /* check code segment size */
673 /* Get machine code which is patched back in later. The
674 call is 2 instruction words long. */
676 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
678 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
679 MIPS causes a SIGSEGV and using the same code for both
680 architectures is much better. */
682 mcode[0] = ((u4 *) tmpmcodeptr)[0];
683 mcode[1] = ((u4 *) tmpmcodeptr)[1];
685 mcode[2] = ((u4 *) tmpmcodeptr)[2];
686 mcode[3] = ((u4 *) tmpmcodeptr)[3];
687 mcode[4] = ((u4 *) tmpmcodeptr)[4];
689 /* Patch in the call to call the following code (done at
692 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
693 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
695 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
697 /* if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) { */
698 /* Recalculate the displacement to be relative to PV. */
700 disp = savedmcodeptr - cd->mcodebase;
702 M_LUI(REG_ITMP3, disp >> 16);
703 M_OR_IMM(REG_ITMP3, disp, REG_ITMP3);
704 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
716 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
718 /* create stack frame */
720 M_ASUB_IMM(REG_SP, 8 * 8, REG_SP);
722 /* calculate return address and move it onto the stack */
724 M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
725 M_AST(REG_ITMP3, REG_SP, 7 * 8);
727 /* move pointer to java_objectheader onto stack */
729 #if defined(ENABLE_THREADS)
730 /* create a virtual java_objectheader */
732 (void) dseg_add_unique_address(cd, NULL); /* flcword */
733 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
734 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
736 M_LDA(REG_ITMP3, REG_PV, disp);
737 M_AST(REG_ITMP3, REG_SP, 6 * 8);
742 /* move machine code onto stack */
744 disp = dseg_add_s4(cd, mcode[0]);
745 M_ILD(REG_ITMP3, REG_PV, disp);
746 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 0);
748 disp = dseg_add_s4(cd, mcode[1]);
749 M_ILD(REG_ITMP3, REG_PV, disp);
750 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
752 disp = dseg_add_s4(cd, mcode[2]);
753 M_ILD(REG_ITMP3, REG_PV, disp);
754 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 0);
756 disp = dseg_add_s4(cd, mcode[3]);
757 M_ILD(REG_ITMP3, REG_PV, disp);
758 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 4);
760 disp = dseg_add_s4(cd, mcode[4]);
761 M_ILD(REG_ITMP3, REG_PV, disp);
762 M_IST(REG_ITMP3, REG_SP, 5 * 8 + 0);
764 /* move class/method/field reference onto stack */
766 disp = dseg_add_address(cd, pr->ref);
767 M_ALD(REG_ITMP3, REG_PV, disp);
768 M_AST(REG_ITMP3, REG_SP, 2 * 8);
770 /* move data segment displacement onto stack */
772 disp = dseg_add_s4(cd, pr->disp);
773 M_ILD(REG_ITMP3, REG_PV, disp);
774 M_IST(REG_ITMP3, REG_SP, 1 * 8);
776 /* move patcher function pointer onto stack */
778 disp = dseg_add_address(cd, pr->patcher);
779 M_ALD(REG_ITMP3, REG_PV, disp);
780 M_AST(REG_ITMP3, REG_SP, 0 * 8);
782 if (targetdisp == 0) {
783 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
785 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
786 M_ALD(REG_ITMP3, REG_PV, disp);
791 disp = (((u4 *) cd->mcodebase) + targetdisp) -
792 (((u4 *) cd->mcodeptr) + 1);
801 /* emit_replacement_stubs ******************************************************
803 Generates the code for the replacement stubs.
805 *******************************************************************************/
807 #if defined(ENABLE_REPLACEMENT)
808 void emit_replacement_stubs(jitdata *jd)
819 /* get required compiler data */
824 rplp = code->rplpoints;
826 /* store beginning of replacement stubs */
828 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
830 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
831 /* do not generate stubs for non-trappable points */
833 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
836 /* check code segment size */
841 savedmcodeptr = cd->mcodeptr;
844 /* create stack frame - 16-byte aligned */
846 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
848 /* push address of `rplpoint` struct */
850 disp = dseg_add_address(cd, rplp);
851 M_ALD(REG_ITMP3, REG_PV, disp);
852 M_AST(REG_ITMP3, REG_SP, 0 * 8);
854 /* jump to replacement function */
856 disp = dseg_add_functionptr(cd, asm_replacement_out);
857 M_ALD(REG_ITMP3, REG_PV, disp);
859 M_NOP; /* delay slot */
861 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
864 #endif /* defined(ENABLE_REPLACEMENT) */
867 /* emit_verbosecall_enter ******************************************************
869 Generates the code for the call trace.
871 *******************************************************************************/
874 void emit_verbosecall_enter(jitdata *jd)
883 /* get required compiler data */
891 /* mark trace code */
895 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
896 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
898 /* save argument registers (we store the registers as address
899 types, so it's correct for MIPS32 too) */
901 for (i = 0; i < INT_ARG_CNT; i++)
902 M_AST(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
904 for (i = 0; i < FLT_ARG_CNT; i++)
905 M_DST(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
907 /* save temporary registers for leaf methods */
909 if (jd->isleafmethod) {
910 for (i = 0; i < INT_TMP_CNT; i++)
911 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
913 for (i = 0; i < FLT_TMP_CNT; i++)
914 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
917 /* Load float arguments into integer registers. MIPS32 has less
918 float argument registers than integer ones, we need to check
921 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
922 t = md->paramtypes[i].type;
924 if (IS_FLT_DBL_TYPE(t)) {
925 if (IS_2_WORD_TYPE(t)) {
926 M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
927 M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
930 M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
931 M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
936 #if SIZEOF_VOID_P == 4
937 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
938 t = md->paramtypes[i].type;
940 if (IS_INT_LNG_TYPE(t)) {
941 if (IS_2_WORD_TYPE(t)) {
942 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
943 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
946 # if WORDS_BIGENDIAN == 1
947 M_MOV(REG_ZERO, rd->argintregs[j]);
948 M_ILD(rd->argintregs[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
950 M_ILD(rd->argintregs[j], REG_SP, PA_SIZE + (2 + i) * 8);
951 M_MOV(REG_ZERO, rd->argintregs[j + 1]);
959 disp = dseg_add_address(cd, m);
960 M_ALD(REG_ITMP1, REG_PV, disp);
961 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
962 disp = dseg_add_functionptr(cd, builtin_trace_args);
963 M_ALD(REG_ITMP3, REG_PV, disp);
964 M_JSR(REG_RA, REG_ITMP3);
967 /* restore argument registers */
969 for (i = 0; i < INT_ARG_CNT; i++)
970 M_ALD(rd->argintregs[i], REG_SP, PA_SIZE + (2 + i) * 8);
972 for (i = 0; i < FLT_ARG_CNT; i++)
973 M_DLD(rd->argfltregs[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
975 /* restore temporary registers for leaf methods */
977 if (jd->isleafmethod) {
978 for (i = 0; i < INT_TMP_CNT; i++)
979 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
981 for (i = 0; i < FLT_TMP_CNT; i++)
982 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
985 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
986 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
988 /* mark trace code */
992 #endif /* !defined(NDEBUG) */
995 /* emit_verbosecall_exit *******************************************************
997 Generates the code for the call trace.
999 *******************************************************************************/
1001 #if !defined(NDEBUG)
1002 void emit_verbosecall_exit(jitdata *jd)
1010 /* get required compiler data */
1018 /* mark trace code */
1022 #if SIZEOF_VOID_P == 8
1023 M_LDA(REG_SP, REG_SP, -4 * 8); /* keep stack 16-byte aligned */
1024 M_AST(REG_RA, REG_SP, 0 * 8);
1026 M_LST(REG_RESULT, REG_SP, 1 * 8);
1027 M_DST(REG_FRESULT, REG_SP, 2 * 8);
1029 M_LDA(REG_SP, REG_SP, -(8*4 + 4 * 8));
1030 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
1032 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1033 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1036 disp = dseg_add_address(cd, m);
1037 M_ALD(rd->argintregs[0], REG_PV, disp);
1039 #if SIZEOF_VOID_P == 8
1040 M_MOV(REG_RESULT, rd->argintregs[1]);
1041 M_DMOV(REG_FRESULT, rd->argfltregs[2]);
1042 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
1044 switch (md->returntype.type) {
1046 # if WORDS_BIGENDIAN == 1
1047 M_MOV(REG_RESULT, rd->argintregs[2]);
1048 M_MOV(REG_RESULT2, rd->argintregs[3]);
1050 M_MOV(REG_RESULT2, rd->argintregs[2]);
1051 M_MOV(REG_RESULT, rd->argintregs[3]);
1055 # if WORDS_BIGENDIAN == 1
1056 M_MOV(REG_ZERO, rd->argintregs[2]);
1057 M_MOV(REG_RESULT, rd->argintregs[3]);
1059 M_MOV(REG_RESULT, rd->argintregs[2]);
1060 M_MOV(REG_ZERO, rd->argintregs[3]);
1064 M_DST(REG_FRESULT, REG_SP, 4*4);
1065 M_FST(REG_FRESULT, REG_SP, 4*4 + 2 * 4);
1068 disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
1069 M_ALD(REG_ITMP3, REG_PV, disp);
1070 M_JSR(REG_RA, REG_ITMP3);
1073 #if SIZEOF_VOID_P == 8
1074 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
1075 M_LLD(REG_RESULT, REG_SP, 1 * 8);
1077 M_ALD(REG_RA, REG_SP, 0 * 8);
1078 M_LDA(REG_SP, REG_SP, 4 * 8);
1080 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1081 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1083 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
1084 M_LDA(REG_SP, REG_SP, 8*4 + 4 * 8);
1087 /* mark trace code */
1091 #endif /* !defined(NDEBUG) */
1095 * These are local overrides for various environment variables in Emacs.
1096 * Please do not remove this and leave it at the end of the file, where
1097 * Emacs will automagically detect them.
1098 * ---------------------------------------------------------------------
1101 * indent-tabs-mode: t
1105 * vim:noexpandtab:sw=4:ts=4: