src/vm/jit/mips/emit.c

   1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29
  30 #include "vm/types.h"
  31
  32 #include "vm/jit/mips/codegen.h"
  33 #include "vm/jit/mips/md-abi.h"
  34
  35 #include "mm/memory.h"
  36
  37 #include "threads/lock.hpp"
  38
  39 #include "vm/jit/builtin.hpp"
  40 #include "vm/options.h"
  41
  42 #include "vm/jit/abi.h"
  43 #include "vm/jit/abi-asm.h"
  44 #include "vm/jit/asmpart.h"
  45 #include "vm/jit/dseg.h"
  46 #include "vm/jit/emit-common.hpp"
  47 #include "vm/jit/jit.hpp"
  48 #include "vm/jit/patcher-common.hpp"
  49 #include "vm/jit/replace.hpp"
  50 #include "vm/jit/trap.h"
  51
  52
  53 /* emit_load *******************************************************************
  54
  55    Emits a possible load of an operand.
  56
  57 *******************************************************************************/
  58
  59 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  60 {
  61         codegendata  *cd;
  62         s4            disp;
  63         s4            reg;
  64
  65         /* get required compiler data */
  66
  67         cd = jd->cd;
  68
  69         if (src->flags & INMEMORY) {
  70                 COUNT_SPILLS;
  71
  72                 disp = src->vv.regoff;
  73
  74                 switch (src->type) {
  75 #if SIZEOF_VOID_P == 8
  76                 case TYPE_INT:
  77                 case TYPE_LNG:
  78                 case TYPE_ADR:
  79                         M_LLD(tempreg, REG_SP, disp);
  80                         break;
  81 #else
  82                 case TYPE_INT:
  83                 case TYPE_ADR:
  84                         M_ILD(tempreg, REG_SP, disp);
  85                         break;
  86                 case TYPE_LNG:
  87                         M_LLD(tempreg, REG_SP, disp);
  88                         break;
  89 #endif
  90                 case TYPE_FLT:
  91                         M_FLD(tempreg, REG_SP, disp);
  92                         break;
  93                 case TYPE_DBL:
  94                         M_DLD(tempreg, REG_SP, disp);
  95                         break;
  96                 default:
  97                         vm_abort("emit_load: unknown type %d", src->type);
  98                 }
  99
 100                 reg = tempreg;
 101         }
 102         else
 103                 reg = src->vv.regoff;
 104
 105         return reg;
 106 }
 107
 108
 109 /* emit_load_low ***************************************************************
 110
 111    Emits a possible load of the low 32-bits of an operand.
 112
 113 *******************************************************************************/
 114
 115 #if SIZEOF_VOID_P == 4
 116 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 117 {
 118         codegendata  *cd;
 119         s4            disp;
 120         s4            reg;
 121
 122         assert(src->type == TYPE_LNG);
 123
 124         /* get required compiler data */
 125
 126         cd = jd->cd;
 127
 128         if (src->flags & INMEMORY) {
 129                 COUNT_SPILLS;
 130
 131                 disp = src->vv.regoff;
 132
 133 #if WORDS_BIGENDIAN == 1
 134                 M_ILD(tempreg, REG_SP, disp + 4);
 135 #else
 136                 M_ILD(tempreg, REG_SP, disp);
 137 #endif
 138
 139                 reg = tempreg;
 140         }
 141         else
 142                 reg = GET_LOW_REG(src->vv.regoff);
 143
 144         return reg;
 145 }
 146 #endif /* SIZEOF_VOID_P == 4 */
 147
 148
 149 /* emit_load_high **************************************************************
 150
 151    Emits a possible load of the high 32-bits of an operand.
 152
 153 *******************************************************************************/
 154
 155 #if SIZEOF_VOID_P == 4
 156 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 157 {
 158         codegendata  *cd;
 159         s4            disp;
 160         s4            reg;
 161
 162         assert(src->type == TYPE_LNG);
 163
 164         /* get required compiler data */
 165
 166         cd = jd->cd;
 167
 168         if (src->flags & INMEMORY) {
 169                 COUNT_SPILLS;
 170
 171                 disp = src->vv.regoff;
 172
 173 #if WORDS_BIGENDIAN == 1
 174                 M_ILD(tempreg, REG_SP, disp);
 175 #else
 176                 M_ILD(tempreg, REG_SP, disp + 4);
 177 #endif
 178
 179                 reg = tempreg;
 180         }
 181         else
 182                 reg = GET_HIGH_REG(src->vv.regoff);
 183
 184         return reg;
 185 }
 186 #endif /* SIZEOF_VOID_P == 4 */
 187
 188
 189 /* emit_store ******************************************************************
 190
 191    Emits a possible store to variable.
 192
 193 *******************************************************************************/
 194
 195 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 196 {
 197         codegendata  *cd;
 198         s4            disp;
 199
 200         /* get required compiler data */
 201
 202         cd = jd->cd;
 203
 204         if (dst->flags & INMEMORY) {
 205                 COUNT_SPILLS;
 206
 207                 disp = dst->vv.regoff;
 208
 209                 switch (dst->type) {
 210 #if SIZEOF_VOID_P == 8
 211                 case TYPE_INT:
 212                 case TYPE_LNG:
 213                 case TYPE_ADR:
 214                         M_LST(d, REG_SP, disp);
 215                         break;
 216 #else
 217                 case TYPE_INT:
 218                 case TYPE_ADR:
 219                         M_IST(d, REG_SP, disp);
 220                         break;
 221                 case TYPE_LNG:
 222                         M_LST(d, REG_SP, disp);
 223                         break;
 224 #endif
 225                 case TYPE_FLT:
 226                         M_FST(d, REG_SP, disp);
 227                         break;
 228                 case TYPE_DBL:
 229                         M_DST(d, REG_SP, disp);
 230                         break;
 231                 default:
 232                         vm_abort("emit_store: unknown type %d", dst->type);
 233                 }
 234         }
 235 }
 236
 237
 238 /* emit_copy *******************************************************************
 239
 240    Generates a register/memory to register/memory copy.
 241
 242 *******************************************************************************/
 243
 244 void emit_copy(jitdata *jd, instruction *iptr)
 245 {
 246         codegendata *cd;
 247         varinfo     *src;
 248         varinfo     *dst;
 249         s4           s1, d;
 250
 251         /* get required compiler data */
 252
 253         cd = jd->cd;
 254
 255         /* get source and destination variables */
 256
 257         src = VAROP(iptr->s1);
 258         dst = VAROP(iptr->dst);
 259
 260         if ((src->vv.regoff != dst->vv.regoff) ||
 261                 ((src->flags ^ dst->flags) & INMEMORY)) {
 262
 263                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 264                         /* emit nothing, as the value won't be used anyway */
 265                         return;
 266                 }
 267
 268                 /* If one of the variables resides in memory, we can eliminate
 269                    the register move from/to the temporary register with the
 270                    order of getting the destination register and the load. */
 271
 272                 if (IS_INMEMORY(src->flags)) {
 273 #if SIZEOF_VOID_P == 4
 274                         if (IS_2_WORD_TYPE(src->type))
 275                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 276                         else
 277 #endif
 278                                 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 279                         s1 = emit_load(jd, iptr, src, d);
 280                 }
 281                 else {
 282                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 283 #if SIZEOF_VOID_P == 4
 284                         if (IS_2_WORD_TYPE(src->type))
 285                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 286                         else
 287 #endif
 288                                 d = codegen_reg_of_var(iptr->opc, dst, s1);
 289                 }
 290
 291                 if (s1 != d) {
 292                         switch (dst->type) {
 293 #if SIZEOF_VOID_P == 8
 294                         case TYPE_INT:
 295                         case TYPE_LNG:
 296                         case TYPE_ADR:
 297                                 M_MOV(s1, d);
 298                                 break;
 299 #else
 300                         case TYPE_INT:
 301                         case TYPE_ADR:
 302                                 M_MOV(s1, d);
 303                                 break;
 304                         case TYPE_LNG:
 305                                 M_LNGMOVE(s1, d);
 306                                 break;
 307 #endif
 308                         case TYPE_FLT:
 309                                 M_FMOV(s1, d);
 310                                 break;
 311                         case TYPE_DBL:
 312                                 M_DMOV(s1, d);
 313                                 break;
 314                         default:
 315                                 vm_abort("emit_copy: unknown type %d", dst->type);
 316                         }
 317                 }
 318
 319                 emit_store(jd, iptr, dst, d);
 320         }
 321 }
 322
 323
 324 /* emit_iconst *****************************************************************
 325
 326    XXX
 327
 328 *******************************************************************************/
 329
 330 void emit_iconst(codegendata *cd, s4 d, s4 value)
 331 {
 332         s4 disp;
 333
 334     if ((value >= -32768) && (value <= 32767))
 335         M_IADD_IMM(REG_ZERO, value, d);
 336         else if ((value >= 0) && (value <= 0xffff))
 337         M_OR_IMM(REG_ZERO, value, d);
 338         else {
 339         disp = dseg_add_s4(cd, value);
 340         M_ILD(d, REG_PV, disp);
 341     }
 342 }
 343
 344
 345 /* emit_lconst *****************************************************************
 346
 347    XXX
 348
 349 *******************************************************************************/
 350
 351 void emit_lconst(codegendata *cd, s4 d, s8 value)
 352 {
 353         s4 disp;
 354
 355 #if SIZEOF_VOID_P == 8
 356         if ((value >= -32768) && (value <= 32767))
 357                 M_LADD_IMM(REG_ZERO, value, d);
 358         else if ((value >= 0) && (value <= 0xffff))
 359                 M_OR_IMM(REG_ZERO, value, d);
 360         else {
 361                 disp = dseg_add_s8(cd, value);
 362                 M_LLD(d, REG_PV, disp);
 363         }
 364 #else
 365         disp = dseg_add_s8(cd, value);
 366         M_LLD(d, REG_PV, disp);
 367 #endif
 368 }
 369
 370
 371 /* emit_branch *****************************************************************
 372
 373    Emits the code for conditional and unconditional branchs.
 374
 375    NOTE: The reg argument may contain two packed registers.
 376
 377 *******************************************************************************/
 378
 379 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 380 {
 381         // Calculate the displacements.
 382         int32_t checkdisp  = (disp - 4);
 383         int32_t branchdisp = (disp - 4) >> 2;
 384
 385         /* check which branch to generate */
 386
 387         if (condition == BRANCH_UNCONDITIONAL) {
 388                 // Check displacement for overflow.
 389                 if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
 390                         /* if the long-branches flag isn't set yet, do it */
 391
 392                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 393                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 394                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 395                         }
 396
 397                         // Calculate the offset relative to PV.
 398                         int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
 399                         int32_t offset     = currentrpc + disp;
 400
 401                         // Sanity check.
 402                         assert(offset % 4 == 0);
 403
 404                         // Do the long-branch.
 405                         M_LUI(REG_ITMP3, offset >> 16);
 406                         M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
 407                         M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
 408                         M_JMP(REG_ITMP3);
 409                         M_NOP;
 410                         M_NOP; // This nop is to have 6 instructions (see BRANCH_NOPS).
 411                 }
 412                 else {
 413                         M_BR(branchdisp);
 414                         M_NOP;
 415                 }
 416         }
 417         else {
 418                 // Check displacement for overflow.
 419                 if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
 420                         /* if the long-branches flag isn't set yet, do it */
 421
 422                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 423                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 424                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 425                         }
 426
 427                         // Calculate the offset relative to PV before we generate
 428                         // new code.
 429                         int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
 430                         int32_t offset     = currentrpc + disp;
 431
 432                         // Sanity check.
 433                         assert(offset % 4 == 0);
 434
 435                         switch (condition) {
 436                         case BRANCH_EQ:
 437                                 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
 438                                 break;
 439                         case BRANCH_NE:
 440                                 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
 441                                 break;
 442                         case BRANCH_LT:
 443                                 M_BGEZ(reg, 5);
 444                                 break;
 445                         case BRANCH_GE:
 446                                 M_BLTZ(reg, 5);
 447                                 break;
 448                         case BRANCH_GT:
 449                                 M_BLEZ(reg, 5);
 450                                 break;
 451                         case BRANCH_LE:
 452                                 M_BGTZ(reg, 5);
 453                                 break;
 454                         default:
 455                                 vm_abort("emit_branch: unknown condition %d", condition);
 456                         }
 457
 458                         // The actual branch code which is over-jumped.  NOTE: We
 459                         // don't use a branch delay slot for the conditional
 460                         // branch.
 461
 462                         // Do the long-branch.
 463                         M_LUI(REG_ITMP3, offset >> 16);
 464                         M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
 465                         M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
 466                         M_JMP(REG_ITMP3);
 467                         M_NOP;
 468                 }
 469                 else {
 470                         switch (condition) {
 471                         case BRANCH_EQ:
 472                                 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
 473                                 break;
 474                         case BRANCH_NE:
 475                                 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
 476                                 break;
 477                         case BRANCH_LT:
 478                                 M_BLTZ(reg, branchdisp);
 479                                 break;
 480                         case BRANCH_GE:
 481                                 M_BGEZ(reg, branchdisp);
 482                                 break;
 483                         case BRANCH_GT:
 484                                 M_BGTZ(reg, branchdisp);
 485                                 break;
 486                         case BRANCH_LE:
 487                                 M_BLEZ(reg, branchdisp);
 488                                 break;
 489                         default:
 490                                 vm_abort("emit_branch: unknown condition %d", condition);
 491                         }
 492
 493                         /* branch delay */
 494                         M_NOP;
 495                 }
 496         }
 497 }
 498
 499
 500 /* emit_arithmetic_check *******************************************************
 501
 502    Emit an ArithmeticException check.
 503
 504 *******************************************************************************/
 505
 506 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 507 {
 508         if (INSTRUCTION_MUST_CHECK(iptr)) {
 509                 M_BNEZ(reg, 2);
 510                 M_NOP;
 511                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 512         }
 513 }
 514
 515
 516 /* emit_arrayindexoutofbounds_check ********************************************
 517
 518    Emit an ArrayIndexOutOfBoundsException check.
 519
 520 *******************************************************************************/
 521
 522 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 523 {
 524         if (INSTRUCTION_MUST_CHECK(iptr)) {
 525                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
 526                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
 527                 M_BNEZ(REG_ITMP3, 2);
 528                 M_NOP;
 529                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 530         }
 531 }
 532
 533
 534 /* emit_arraystore_check *******************************************************
 535
 536    Emit an ArrayStoreException check.
 537
 538 *******************************************************************************/
 539
 540 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 541 {
 542         if (INSTRUCTION_MUST_CHECK(iptr)) {
 543                 M_BNEZ(REG_RESULT, 2);
 544                 M_NOP;
 545                 M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_ArrayStoreException);
 546         }
 547 }
 548
 549
 550 /* emit_classcast_check ********************************************************
 551
 552    Emit a ClassCastException check.
 553
 554 *******************************************************************************/
 555
 556 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 557 {
 558         if (INSTRUCTION_MUST_CHECK(iptr)) {
 559                 switch (condition) {
 560                 case ICMD_IFEQ:
 561                         M_BNEZ(reg, 2);
 562                         break;
 563
 564                 case ICMD_IFNE:
 565                         M_BEQZ(reg, 2);
 566                         break;
 567
 568                 case ICMD_IFLE:
 569                         M_BGTZ(reg, 2);
 570                         break;
 571
 572                 default:
 573                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 574                 }
 575
 576                 M_NOP;
 577                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
 578         }
 579 }
 580
 581
 582 /* emit_nullpointer_check ******************************************************
 583
 584    Emit a NullPointerException check.
 585
 586 *******************************************************************************/
 587
 588 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 589 {
 590         if (INSTRUCTION_MUST_CHECK(iptr)) {
 591                 M_BNEZ(reg, 2);
 592                 M_NOP;
 593                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 594         }
 595 }
 596
 597
 598 /* emit_exception_check ********************************************************
 599
 600    Emit an Exception check.
 601
 602 *******************************************************************************/
 603
 604 void emit_exception_check(codegendata *cd, instruction *iptr)
 605 {
 606         if (INSTRUCTION_MUST_CHECK(iptr)) {
 607                 M_BNEZ(REG_RESULT, 2);
 608                 M_NOP;
 609                 M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_CHECK_EXCEPTION);
 610         }
 611 }
 612
 613
 614 /* emit_trap_compiler **********************************************************
 615
 616    Emit a trap instruction which calls the JIT compiler.
 617
 618 *******************************************************************************/
 619
 620 void emit_trap_compiler(codegendata *cd)
 621 {
 622         M_ALD_INTERN(REG_METHODPTR, REG_ZERO, TRAP_COMPILER);
 623 }
 624
 625
 626 /* emit_trap *******************************************************************
 627
 628    Emit a trap instruction and return the original machine code.
 629
 630 *******************************************************************************/
 631
 632 uint32_t emit_trap(codegendata *cd)
 633 {
 634         // Get machine code which is patched back in later. The trap is 1
 635         // instruction word long.
 636         uint32_t mcode = *((uint32_t*) cd->mcodeptr);
 637
 638         M_RESERVED;
 639
 640         return mcode;
 641 }
 642
 643
 644 /* emit_verbosecall_enter ******************************************************
 645
 646    Generates the code for the call trace.
 647
 648 *******************************************************************************/
 649
 650 #if !defined(NDEBUG)
 651 void emit_verbosecall_enter(jitdata *jd)
 652 {
 653         methodinfo   *m;
 654         codeinfo     *code;
 655         codegendata  *cd;
 656         registerdata *rd;
 657         methoddesc   *md;
 658         s4            disp;
 659         s4            i, j, t;
 660
 661         /* get required compiler data */
 662
 663         m    = jd->m;
 664         code = jd->code;
 665         cd   = jd->cd;
 666         rd   = jd->rd;
 667
 668         md = m->parseddesc;
 669
 670         /* mark trace code */
 671
 672         M_NOP;
 673
 674         M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
 675         M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
 676
 677         /* save argument registers (we store the registers as address
 678            types, so it's correct for MIPS32 too) */
 679
 680         for (i = 0; i < INT_ARG_CNT; i++)
 681                 M_AST(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
 682
 683         for (i = 0; i < FLT_ARG_CNT; i++)
 684                 M_DST(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
 685
 686         /* save temporary registers for leaf methods */
 687
 688         if (code_is_leafmethod(code)) {
 689                 for (i = 0; i < INT_TMP_CNT; i++)
 690                         M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
 691
 692                 for (i = 0; i < FLT_TMP_CNT; i++)
 693                         M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 694         }
 695
 696         /* Load float arguments into integer registers.  MIPS32 has less
 697            float argument registers than integer ones, we need to check
 698            that. */
 699
 700         for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
 701                 t = md->paramtypes[i].type;
 702
 703                 if (IS_FLT_DBL_TYPE(t)) {
 704                         if (IS_2_WORD_TYPE(t)) {
 705                                 M_DST(abi_registers_float_argument[i], REG_SP, 0 * 8);
 706                                 M_LLD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
 707                         }
 708                         else {
 709                                 M_FST(abi_registers_float_argument[i], REG_SP, 0 * 8);
 710                                 M_ILD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
 711                         }
 712                 }
 713         }
 714
 715 #if SIZEOF_VOID_P == 4
 716                 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
 717                         t = md->paramtypes[i].type;
 718
 719                         if (IS_INT_LNG_TYPE(t)) {
 720                                 if (IS_2_WORD_TYPE(t)) {
 721                                         M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
 722                                         M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
 723                                 }
 724                                 else {
 725 # if WORDS_BIGENDIAN == 1
 726                                         M_MOV(REG_ZERO, abi_registers_integer_argument[j]);
 727                                         M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
 728 # else
 729                                         M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
 730                                         M_MOV(REG_ZERO, abi_registers_integer_argument[j + 1]);
 731 # endif
 732                                 }
 733                                 j += 2;
 734                         }
 735                 }
 736 #endif
 737
 738         disp = dseg_add_address(cd, m);
 739         M_ALD(REG_ITMP1, REG_PV, disp);
 740         M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
 741         disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
 742         M_ALD(REG_ITMP3, REG_PV, disp);
 743         M_JSR(REG_RA, REG_ITMP3);
 744         M_NOP;
 745
 746         /* restore argument registers */
 747
 748         for (i = 0; i < INT_ARG_CNT; i++)
 749                 M_ALD(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
 750
 751         for (i = 0; i < FLT_ARG_CNT; i++)
 752                 M_DLD(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
 753
 754         /* restore temporary registers for leaf methods */
 755
 756         if (code_is_leafmethod(code)) {
 757                 for (i = 0; i < INT_TMP_CNT; i++)
 758                         M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
 759
 760                 for (i = 0; i < FLT_TMP_CNT; i++)
 761                         M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
 762         }
 763
 764         M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
 765         M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
 766
 767         /* mark trace code */
 768
 769         M_NOP;
 770 }
 771 #endif /* !defined(NDEBUG) */
 772
 773
 774 /* emit_verbosecall_exit *******************************************************
 775
 776    Generates the code for the call trace.
 777
 778    void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
 779
 780 *******************************************************************************/
 781
 782 #if !defined(NDEBUG)
 783 void emit_verbosecall_exit(jitdata *jd)
 784 {
 785         methodinfo   *m;
 786         codegendata  *cd;
 787         registerdata *rd;
 788         methoddesc   *md;
 789         s4            disp;
 790
 791         /* get required compiler data */
 792
 793         m  = jd->m;
 794         cd = jd->cd;
 795         rd = jd->rd;
 796
 797         md = m->parseddesc;
 798
 799         /* mark trace code */
 800
 801         M_NOP;
 802
 803 #if SIZEOF_VOID_P == 8
 804         M_ASUB_IMM(REG_SP, 4 * 8, REG_SP);          /* keep stack 16-byte aligned */
 805         M_AST(REG_RA, REG_SP, 0 * 8);
 806
 807         M_LST(REG_RESULT, REG_SP, 1 * 8);
 808         M_DST(REG_FRESULT, REG_SP, 2 * 8);
 809
 810         M_MOV(REG_RESULT, REG_A0);
 811         M_DMOV(REG_FRESULT, REG_FA1);
 812         M_FMOV(REG_FRESULT, REG_FA2);
 813
 814         disp = dseg_add_address(cd, m);
 815         M_ALD(REG_A4, REG_PV, disp);
 816 #else
 817         M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
 818         M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
 819
 820         M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
 821         M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
 822
 823         switch (md->returntype.type) {
 824         case TYPE_LNG:
 825                 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
 826                 break;
 827
 828         default:
 829 # if WORDS_BIGENDIAN == 1
 830                 M_MOV(REG_ZERO, REG_A0);
 831                 M_MOV(REG_RESULT, REG_A1);
 832 # else
 833                 M_MOV(REG_RESULT, REG_A0);
 834                 M_MOV(REG_ZERO, REG_A1);
 835 # endif
 836         }
 837
 838         M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
 839         M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
 840
 841         disp = dseg_add_address(cd, m);
 842         M_ALD(REG_ITMP1, REG_PV, disp);
 843         M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
 844 #endif
 845
 846         disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
 847         M_ALD(REG_ITMP3, REG_PV, disp);
 848         M_JSR(REG_RA, REG_ITMP3);
 849         M_NOP;
 850
 851 #if SIZEOF_VOID_P == 8
 852         M_DLD(REG_FRESULT, REG_SP, 2 * 8);
 853         M_LLD(REG_RESULT, REG_SP, 1 * 8);
 854
 855         M_ALD(REG_RA, REG_SP, 0 * 8);
 856         M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
 857 #else
 858         M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
 859         M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
 860
 861         M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
 862         M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
 863 #endif
 864
 865         /* mark trace code */
 866
 867         M_NOP;
 868 }
 869 #endif /* !defined(NDEBUG) */
 870
 871
 872 /*
 873  * These are local overrides for various environment variables in Emacs.
 874  * Please do not remove this and leave it at the end of the file, where
 875  * Emacs will automagically detect them.
 876  * ---------------------------------------------------------------------
 877  * Local variables:
 878  * mode: c
 879  * indent-tabs-mode: t
 880  * c-basic-offset: 4
 881  * tab-width: 4
 882  * End:
 883  * vim:noexpandtab:sw=4:ts=4:
 884  */