src/vm/jit/mips/emit.c

   1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
   2
   3    Copyright (C) 1996-2005, 2006, 2007, 2008
   4    CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
   5
   6    This file is part of CACAO.
   7
   8    This program is free software; you can redistribute it and/or
   9    modify it under the terms of the GNU General Public License as
  10    published by the Free Software Foundation; either version 2, or (at
  11    your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful, but
  14    WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16    General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21    02110-1301, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27
  28 #include <assert.h>
  29
  30 #include "vm/types.h"
  31
  32 #include "vm/jit/mips/codegen.h"
  33 #include "vm/jit/mips/md-abi.h"
  34
  35 #include "mm/memory.hpp"
  36
  37 #include "threads/lock.hpp"
  38
  39 #include "vm/jit/builtin.hpp"
  40 #include "vm/options.h"
  41
  42 #include "vm/jit/abi.h"
  43 #include "vm/jit/abi-asm.h"
  44 #include "vm/jit/asmpart.h"
  45 #include "vm/jit/dseg.h"
  46 #include "vm/jit/emit-common.hpp"
  47 #include "vm/jit/jit.hpp"
  48 #include "vm/jit/patcher-common.hpp"
  49 #include "vm/jit/replace.hpp"
  50 #include "vm/jit/trace.hpp"
  51 #include "vm/jit/trap.hpp"
  52
  53
  54 /* emit_load *******************************************************************
  55
  56    Emits a possible load of an operand.
  57
  58 *******************************************************************************/
  59
  60 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
  61 {
  62         codegendata  *cd;
  63         s4            disp;
  64         s4            reg;
  65
  66         /* get required compiler data */
  67
  68         cd = jd->cd;
  69
  70         if (src->flags & INMEMORY) {
  71                 COUNT_SPILLS;
  72
  73                 disp = src->vv.regoff;
  74
  75                 switch (src->type) {
  76 #if SIZEOF_VOID_P == 8
  77                 case TYPE_INT:
  78                 case TYPE_LNG:
  79                 case TYPE_ADR:
  80                         M_LLD(tempreg, REG_SP, disp);
  81                         break;
  82 #else
  83                 case TYPE_INT:
  84                 case TYPE_ADR:
  85                         M_ILD(tempreg, REG_SP, disp);
  86                         break;
  87                 case TYPE_LNG:
  88                         M_LLD(tempreg, REG_SP, disp);
  89                         break;
  90 #endif
  91                 case TYPE_FLT:
  92                         M_FLD(tempreg, REG_SP, disp);
  93                         break;
  94                 case TYPE_DBL:
  95                         M_DLD(tempreg, REG_SP, disp);
  96                         break;
  97                 default:
  98                         vm_abort("emit_load: unknown type %d", src->type);
  99                 }
 100
 101                 reg = tempreg;
 102         }
 103         else
 104                 reg = src->vv.regoff;
 105
 106         return reg;
 107 }
 108
 109
 110 /* emit_load_low ***************************************************************
 111
 112    Emits a possible load of the low 32-bits of an operand.
 113
 114 *******************************************************************************/
 115
 116 #if SIZEOF_VOID_P == 4
 117 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 118 {
 119         codegendata  *cd;
 120         s4            disp;
 121         s4            reg;
 122
 123         assert(src->type == TYPE_LNG);
 124
 125         /* get required compiler data */
 126
 127         cd = jd->cd;
 128
 129         if (src->flags & INMEMORY) {
 130                 COUNT_SPILLS;
 131
 132                 disp = src->vv.regoff;
 133
 134 #if WORDS_BIGENDIAN == 1
 135                 M_ILD(tempreg, REG_SP, disp + 4);
 136 #else
 137                 M_ILD(tempreg, REG_SP, disp);
 138 #endif
 139
 140                 reg = tempreg;
 141         }
 142         else
 143                 reg = GET_LOW_REG(src->vv.regoff);
 144
 145         return reg;
 146 }
 147 #endif /* SIZEOF_VOID_P == 4 */
 148
 149
 150 /* emit_load_high **************************************************************
 151
 152    Emits a possible load of the high 32-bits of an operand.
 153
 154 *******************************************************************************/
 155
 156 #if SIZEOF_VOID_P == 4
 157 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
 158 {
 159         codegendata  *cd;
 160         s4            disp;
 161         s4            reg;
 162
 163         assert(src->type == TYPE_LNG);
 164
 165         /* get required compiler data */
 166
 167         cd = jd->cd;
 168
 169         if (src->flags & INMEMORY) {
 170                 COUNT_SPILLS;
 171
 172                 disp = src->vv.regoff;
 173
 174 #if WORDS_BIGENDIAN == 1
 175                 M_ILD(tempreg, REG_SP, disp);
 176 #else
 177                 M_ILD(tempreg, REG_SP, disp + 4);
 178 #endif
 179
 180                 reg = tempreg;
 181         }
 182         else
 183                 reg = GET_HIGH_REG(src->vv.regoff);
 184
 185         return reg;
 186 }
 187 #endif /* SIZEOF_VOID_P == 4 */
 188
 189
 190 /* emit_store ******************************************************************
 191
 192    Emits a possible store to variable.
 193
 194 *******************************************************************************/
 195
 196 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 197 {
 198         codegendata  *cd;
 199         s4            disp;
 200
 201         /* get required compiler data */
 202
 203         cd = jd->cd;
 204
 205         if (dst->flags & INMEMORY) {
 206                 COUNT_SPILLS;
 207
 208                 disp = dst->vv.regoff;
 209
 210                 switch (dst->type) {
 211 #if SIZEOF_VOID_P == 8
 212                 case TYPE_INT:
 213                 case TYPE_LNG:
 214                 case TYPE_ADR:
 215                         M_LST(d, REG_SP, disp);
 216                         break;
 217 #else
 218                 case TYPE_INT:
 219                 case TYPE_ADR:
 220                         M_IST(d, REG_SP, disp);
 221                         break;
 222                 case TYPE_LNG:
 223                         M_LST(d, REG_SP, disp);
 224                         break;
 225 #endif
 226                 case TYPE_FLT:
 227                         M_FST(d, REG_SP, disp);
 228                         break;
 229                 case TYPE_DBL:
 230                         M_DST(d, REG_SP, disp);
 231                         break;
 232                 default:
 233                         vm_abort("emit_store: unknown type %d", dst->type);
 234                 }
 235         }
 236 }
 237
 238
 239 /* emit_copy *******************************************************************
 240
 241    Generates a register/memory to register/memory copy.
 242
 243 *******************************************************************************/
 244
 245 void emit_copy(jitdata *jd, instruction *iptr)
 246 {
 247         codegendata *cd;
 248         varinfo     *src;
 249         varinfo     *dst;
 250         s4           s1, d;
 251
 252         /* get required compiler data */
 253
 254         cd = jd->cd;
 255
 256         /* get source and destination variables */
 257
 258         src = VAROP(iptr->s1);
 259         dst = VAROP(iptr->dst);
 260
 261         if ((src->vv.regoff != dst->vv.regoff) ||
 262                 ((src->flags ^ dst->flags) & INMEMORY)) {
 263
 264                 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
 265                         /* emit nothing, as the value won't be used anyway */
 266                         return;
 267                 }
 268
 269                 /* If one of the variables resides in memory, we can eliminate
 270                    the register move from/to the temporary register with the
 271                    order of getting the destination register and the load. */
 272
 273                 if (IS_INMEMORY(src->flags)) {
 274 #if SIZEOF_VOID_P == 4
 275                         if (IS_2_WORD_TYPE(src->type))
 276                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 277                         else
 278 #endif
 279                                 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
 280                         s1 = emit_load(jd, iptr, src, d);
 281                 }
 282                 else {
 283                         s1 = emit_load(jd, iptr, src, REG_IFTMP);
 284 #if SIZEOF_VOID_P == 4
 285                         if (IS_2_WORD_TYPE(src->type))
 286                                 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
 287                         else
 288 #endif
 289                                 d = codegen_reg_of_var(iptr->opc, dst, s1);
 290                 }
 291
 292                 if (s1 != d) {
 293                         switch (dst->type) {
 294 #if SIZEOF_VOID_P == 8
 295                         case TYPE_INT:
 296                         case TYPE_LNG:
 297                         case TYPE_ADR:
 298                                 M_MOV(s1, d);
 299                                 break;
 300 #else
 301                         case TYPE_INT:
 302                         case TYPE_ADR:
 303                                 M_MOV(s1, d);
 304                                 break;
 305                         case TYPE_LNG:
 306                                 M_LNGMOVE(s1, d);
 307                                 break;
 308 #endif
 309                         case TYPE_FLT:
 310                                 M_FMOV(s1, d);
 311                                 break;
 312                         case TYPE_DBL:
 313                                 M_DMOV(s1, d);
 314                                 break;
 315                         default:
 316                                 vm_abort("emit_copy: unknown type %d", dst->type);
 317                         }
 318                 }
 319
 320                 emit_store(jd, iptr, dst, d);
 321         }
 322 }
 323
 324
 325 /* emit_iconst *****************************************************************
 326
 327    XXX
 328
 329 *******************************************************************************/
 330
 331 void emit_iconst(codegendata *cd, s4 d, s4 value)
 332 {
 333         s4 disp;
 334
 335     if ((value >= -32768) && (value <= 32767))
 336         M_IADD_IMM(REG_ZERO, value, d);
 337         else if ((value >= 0) && (value <= 0xffff))
 338         M_OR_IMM(REG_ZERO, value, d);
 339         else {
 340         disp = dseg_add_s4(cd, value);
 341         M_ILD(d, REG_PV, disp);
 342     }
 343 }
 344
 345
 346 /* emit_lconst *****************************************************************
 347
 348    XXX
 349
 350 *******************************************************************************/
 351
 352 void emit_lconst(codegendata *cd, s4 d, s8 value)
 353 {
 354         s4 disp;
 355
 356 #if SIZEOF_VOID_P == 8
 357         if ((value >= -32768) && (value <= 32767))
 358                 M_LADD_IMM(REG_ZERO, value, d);
 359         else if ((value >= 0) && (value <= 0xffff))
 360                 M_OR_IMM(REG_ZERO, value, d);
 361         else {
 362                 disp = dseg_add_s8(cd, value);
 363                 M_LLD(d, REG_PV, disp);
 364         }
 365 #else
 366         disp = dseg_add_s8(cd, value);
 367         M_LLD(d, REG_PV, disp);
 368 #endif
 369 }
 370
 371
 372 /* emit_branch *****************************************************************
 373
 374    Emits the code for conditional and unconditional branchs.
 375
 376    NOTE: The reg argument may contain two packed registers.
 377
 378 *******************************************************************************/
 379
 380 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
 381 {
 382         // Calculate the displacements.
 383         int32_t checkdisp  = (disp - 4);
 384         int32_t branchdisp = (disp - 4) >> 2;
 385
 386         /* check which branch to generate */
 387
 388         if (condition == BRANCH_UNCONDITIONAL) {
 389                 // Check displacement for overflow.
 390                 if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
 391                         /* if the long-branches flag isn't set yet, do it */
 392
 393                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 394                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 395                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 396                         }
 397
 398                         // Calculate the offset relative to PV.
 399                         int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
 400                         int32_t offset     = currentrpc + disp;
 401
 402                         // Sanity check.
 403                         assert(offset % 4 == 0);
 404
 405                         // Do the long-branch.
 406                         M_LUI(REG_ITMP3, offset >> 16);
 407                         M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
 408                         M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
 409                         M_JMP(REG_ITMP3);
 410                         M_NOP;
 411                         M_NOP; // This nop is to have 6 instructions (see BRANCH_NOPS).
 412                 }
 413                 else {
 414                         M_BR(branchdisp);
 415                         M_NOP;
 416                 }
 417         }
 418         else {
 419                 // Check displacement for overflow.
 420                 if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
 421                         /* if the long-branches flag isn't set yet, do it */
 422
 423                         if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
 424                                 cd->flags |= (CODEGENDATA_FLAG_ERROR |
 425                                                           CODEGENDATA_FLAG_LONGBRANCHES);
 426                         }
 427
 428                         // Calculate the offset relative to PV before we generate
 429                         // new code.
 430                         int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
 431                         int32_t offset     = currentrpc + disp;
 432
 433                         // Sanity check.
 434                         assert(offset % 4 == 0);
 435
 436                         switch (condition) {
 437                         case BRANCH_EQ:
 438                                 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
 439                                 break;
 440                         case BRANCH_NE:
 441                                 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
 442                                 break;
 443                         case BRANCH_LT:
 444                                 M_BGEZ(reg, 5);
 445                                 break;
 446                         case BRANCH_GE:
 447                                 M_BLTZ(reg, 5);
 448                                 break;
 449                         case BRANCH_GT:
 450                                 M_BLEZ(reg, 5);
 451                                 break;
 452                         case BRANCH_LE:
 453                                 M_BGTZ(reg, 5);
 454                                 break;
 455                         default:
 456                                 vm_abort("emit_branch: unknown condition %d", condition);
 457                         }
 458
 459                         // The actual branch code which is over-jumped.  NOTE: We
 460                         // don't use a branch delay slot for the conditional
 461                         // branch.
 462
 463                         // Do the long-branch.
 464                         M_LUI(REG_ITMP3, offset >> 16);
 465                         M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
 466                         M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
 467                         M_JMP(REG_ITMP3);
 468                         M_NOP;
 469                 }
 470                 else {
 471                         switch (condition) {
 472                         case BRANCH_EQ:
 473                                 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
 474                                 break;
 475                         case BRANCH_NE:
 476                                 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
 477                                 break;
 478                         case BRANCH_LT:
 479                                 M_BLTZ(reg, branchdisp);
 480                                 break;
 481                         case BRANCH_GE:
 482                                 M_BGEZ(reg, branchdisp);
 483                                 break;
 484                         case BRANCH_GT:
 485                                 M_BGTZ(reg, branchdisp);
 486                                 break;
 487                         case BRANCH_LE:
 488                                 M_BLEZ(reg, branchdisp);
 489                                 break;
 490                         default:
 491                                 vm_abort("emit_branch: unknown condition %d", condition);
 492                         }
 493
 494                         /* branch delay */
 495                         M_NOP;
 496                 }
 497         }
 498 }
 499
 500
 501 /* emit_arithmetic_check *******************************************************
 502
 503    Emit an ArithmeticException check.
 504
 505 *******************************************************************************/
 506
 507 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 508 {
 509         if (INSTRUCTION_MUST_CHECK(iptr)) {
 510                 M_BNEZ(reg, 2);
 511                 M_NOP;
 512                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
 513         }
 514 }
 515
 516
 517 /* emit_arrayindexoutofbounds_check ********************************************
 518
 519    Emit an ArrayIndexOutOfBoundsException check.
 520
 521 *******************************************************************************/
 522
 523 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 524 {
 525         if (INSTRUCTION_MUST_CHECK(iptr)) {
 526                 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
 527                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
 528                 M_BNEZ(REG_ITMP3, 2);
 529                 M_NOP;
 530                 M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
 531         }
 532 }
 533
 534
 535 /* emit_arraystore_check *******************************************************
 536
 537    Emit an ArrayStoreException check.
 538
 539 *******************************************************************************/
 540
 541 void emit_arraystore_check(codegendata *cd, instruction *iptr)
 542 {
 543         if (INSTRUCTION_MUST_CHECK(iptr)) {
 544                 M_BNEZ(REG_RESULT, 2);
 545                 M_NOP;
 546                 M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_ArrayStoreException);
 547         }
 548 }
 549
 550
 551 /* emit_classcast_check ********************************************************
 552
 553    Emit a ClassCastException check.
 554
 555 *******************************************************************************/
 556
 557 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
 558 {
 559         if (INSTRUCTION_MUST_CHECK(iptr)) {
 560                 switch (condition) {
 561                 case ICMD_IFEQ:
 562                         M_BNEZ(reg, 2);
 563                         break;
 564
 565                 case ICMD_IFNE:
 566                         M_BEQZ(reg, 2);
 567                         break;
 568
 569                 case ICMD_IFLE:
 570                         M_BGTZ(reg, 2);
 571                         break;
 572
 573                 default:
 574                         vm_abort("emit_classcast_check: unknown condition %d", condition);
 575                 }
 576
 577                 M_NOP;
 578                 M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
 579         }
 580 }
 581
 582
 583 /* emit_nullpointer_check ******************************************************
 584
 585    Emit a NullPointerException check.
 586
 587 *******************************************************************************/
 588
 589 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
 590 {
 591         if (INSTRUCTION_MUST_CHECK(iptr)) {
 592                 M_BNEZ(reg, 2);
 593                 M_NOP;
 594                 M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
 595         }
 596 }
 597
 598
 599 /* emit_exception_check ********************************************************
 600
 601    Emit an Exception check.
 602
 603 *******************************************************************************/
 604
 605 void emit_exception_check(codegendata *cd, instruction *iptr)
 606 {
 607         if (INSTRUCTION_MUST_CHECK(iptr)) {
 608                 M_BNEZ(REG_RESULT, 2);
 609                 M_NOP;
 610                 M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_CHECK_EXCEPTION);
 611         }
 612 }
 613
 614
 615 /* emit_trap_compiler **********************************************************
 616
 617    Emit a trap instruction which calls the JIT compiler.
 618
 619 *******************************************************************************/
 620
 621 void emit_trap_compiler(codegendata *cd)
 622 {
 623         M_ALD_INTERN(REG_METHODPTR, REG_ZERO, TRAP_COMPILER);
 624 }
 625
 626
 627 /* emit_trap *******************************************************************
 628
 629    Emit a trap instruction and return the original machine code.
 630
 631 *******************************************************************************/
 632
 633 uint32_t emit_trap(codegendata *cd)
 634 {
 635         // Get machine code which is patched back in later. The trap is 1
 636         // instruction word long.
 637         uint32_t mcode = *((uint32_t*) cd->mcodeptr);
 638
 639         M_RESERVED;
 640
 641         return mcode;
 642 }
 643
 644
 645 /* emit_verbosecall_enter ******************************************************
 646
 647    Generates the code for the call trace.
 648
 649 *******************************************************************************/
 650
 651 #if !defined(NDEBUG)
 652 void emit_verbosecall_enter(jitdata *jd)
 653 {
 654         methodinfo   *m;
 655         codeinfo     *code;
 656         codegendata  *cd;
 657         registerdata *rd;
 658         methoddesc   *md;
 659         s4            disp;
 660         s4            i, s;
 661
 662         /* get required compiler data */
 663
 664         m    = jd->m;
 665         code = jd->code;
 666         cd   = jd->cd;
 667         rd   = jd->rd;
 668
 669         md = m->parseddesc;
 670
 671         /* mark trace code */
 672
 673         M_NOP;
 674
 675         /* keep stack 16-byte aligned */
 676
 677         M_LDA(REG_SP, REG_SP, -(PA_SIZE + (md->paramcount + 2 + TMP_CNT) * 8));
 678         M_AST(REG_RA, REG_SP, PA_SIZE + md->paramcount * 8);
 679
 680         /* save argument registers (we store the registers as address
 681            types, so it's correct for MIPS32 too) */
 682
 683         for (i = 0; i < md->paramcount; i++) {
 684                 if (!md->params[i].inmemory) {
 685                         s = md->params[i].regoff;
 686                         switch (md->paramtypes[i].type) {
 687                         case TYPE_ADR:
 688                         case TYPE_INT:
 689                                 M_AST(s, REG_SP, PA_SIZE + i * 8);
 690                                 break;
 691                         case TYPE_LNG:
 692                                 M_LST(s, REG_SP, PA_SIZE + i * 8);
 693                                 break;
 694                         case TYPE_FLT:
 695                                 M_FST(s, REG_SP, PA_SIZE + i * 8);
 696                                 break;
 697                         case TYPE_DBL:
 698                                 M_DST(s, REG_SP, PA_SIZE + i * 8);
 699                                 break;
 700                         }
 701                 }
 702         }
 703
 704         /* save temporary registers for leaf methods */
 705
 706         if (code_is_leafmethod(code)) {
 707                 for (i = 0; i < INT_TMP_CNT; i++)
 708                         M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (md->paramcount + 2 + i) * 8);
 709
 710                 for (i = 0; i < FLT_TMP_CNT; i++)
 711                         M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (md->paramcount + 2 + INT_TMP_CNT + i) * 8);
 712         }
 713
 714         disp = dseg_add_address(cd, m);
 715         M_ALD(REG_A0, REG_PV, disp);
 716         M_LDA(REG_A1, REG_SP, PA_SIZE);
 717         M_LDA(REG_A2, REG_SP, PA_SIZE + (md->paramcount + 2 + TMP_CNT) * 8 + cd->stackframesize * 8);
 718         disp = dseg_add_functionptr(cd, trace_java_call_enter);
 719         M_ALD(REG_ITMP3, REG_PV, disp);
 720         M_JSR(REG_RA, REG_ITMP3);
 721         M_NOP;
 722
 723         /* restore argument registers */
 724
 725         for (i = 0; i < md->paramcount; i++) {
 726                 if (!md->params[i].inmemory) {
 727                         s = md->params[i].regoff;
 728                         switch (md->paramtypes[i].type) {
 729                         case TYPE_ADR:
 730                         case TYPE_INT:
 731                                 M_ALD(s, REG_SP, PA_SIZE + i * 8);
 732                                 break;
 733                         case TYPE_LNG:
 734                                 M_LLD(s, REG_SP, PA_SIZE + i * 8);
 735                                 break;
 736                         case TYPE_FLT:
 737                                 M_FLD(s, REG_SP, PA_SIZE + i * 8);
 738                                 break;
 739                         case TYPE_DBL:
 740                                 M_DLD(s, REG_SP, PA_SIZE + i * 8);
 741                                 break;
 742                         }
 743                 }
 744         }
 745
 746         /* restore temporary registers for leaf methods */
 747
 748         if (code_is_leafmethod(code)) {
 749                 for (i = 0; i < INT_TMP_CNT; i++)
 750                         M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (md->paramcount + 2 + i) * 8);
 751
 752                 for (i = 0; i < FLT_TMP_CNT; i++)
 753                         M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (md->paramcount + 2 + INT_TMP_CNT + i) * 8);
 754         }
 755
 756         /* keep stack 16-byte aligned */
 757
 758         M_ALD(REG_RA, REG_SP, PA_SIZE + md->paramcount * 8);
 759         M_LDA(REG_SP, REG_SP, PA_SIZE + (md->paramcount + 2 + TMP_CNT) * 8);
 760
 761         /* mark trace code */
 762
 763         M_NOP;
 764 }
 765 #endif /* !defined(NDEBUG) */
 766
 767
 768 /* emit_verbosecall_exit *******************************************************
 769
 770    Generates the code for the call trace.
 771
 772 *******************************************************************************/
 773
 774 #if !defined(NDEBUG)
 775 void emit_verbosecall_exit(jitdata *jd)
 776 {
 777         methodinfo   *m;
 778         codegendata  *cd;
 779         registerdata *rd;
 780         methoddesc   *md;
 781         s4            disp;
 782
 783         /* get required compiler data */
 784
 785         m  = jd->m;
 786         cd = jd->cd;
 787         rd = jd->rd;
 788
 789         md = m->parseddesc;
 790
 791         /* mark trace code */
 792
 793         M_NOP;
 794
 795         /* keep stack 16-byte aligned */
 796
 797 #if SIZEOF_VOID_P == 8
 798         assert(0); // XXX: Revisit this code for MIPS64!
 799 #endif
 800         M_ASUB_IMM(REG_SP, PA_SIZE + 2 * 8, REG_SP);
 801         M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
 802
 803         /* save return value */
 804
 805         switch (md->returntype.type) {
 806         case TYPE_ADR:
 807         case TYPE_INT:
 808                 M_AST(REG_RESULT, REG_SP, PA_SIZE + 0 * 8);
 809                 break;
 810         case TYPE_LNG:
 811 #if SIZEOF_VOID_P == 8
 812                 M_LST(REG_RESULT, REG_SP, PA_SIZE + 0 * 8);
 813 #else
 814                 M_LST(REG_RESULT_PACKED, REG_SP, PA_SIZE + 0 * 8);
 815 #endif
 816                 break;
 817         case TYPE_FLT:
 818                 M_FST(REG_FRESULT, REG_SP, PA_SIZE + 0 * 8);
 819                 break;
 820         case TYPE_DBL:
 821                 M_DST(REG_FRESULT, REG_SP, PA_SIZE + 0 * 8);
 822         }
 823
 824         disp = dseg_add_address(cd, m);
 825         M_ALD(REG_A0, REG_PV, disp);
 826         M_AADD_IMM(REG_SP, PA_SIZE, REG_A1);
 827         disp = dseg_add_functionptr(cd, trace_java_call_exit);
 828         M_ALD(REG_ITMP3, REG_PV, disp);
 829         M_JSR(REG_RA, REG_ITMP3);
 830         M_NOP;
 831
 832         /* restore return value */
 833
 834         switch (md->returntype.type) {
 835         case TYPE_ADR:
 836         case TYPE_INT:
 837                 M_ALD(REG_RESULT, REG_SP, PA_SIZE + 0 * 8);
 838                 break;
 839         case TYPE_LNG:
 840 #if SIZEOF_VOID_P == 8
 841                 M_LLD(REG_RESULT, REG_SP, PA_SIZE + 0 * 8);
 842 #else
 843                 M_LLD(REG_RESULT_PACKED, REG_SP, PA_SIZE + 0 * 8);
 844 #endif
 845                 break;
 846         case TYPE_FLT:
 847                 M_FLD(REG_FRESULT, REG_SP, PA_SIZE + 0 * 8);
 848                 break;
 849         case TYPE_DBL:
 850                 M_DLD(REG_FRESULT, REG_SP, PA_SIZE + 0 * 8);
 851         }
 852
 853         /* keep stack 16-byte aligned */
 854
 855         M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
 856         M_AADD_IMM(REG_SP, PA_SIZE + 2 * 8, REG_SP);
 857
 858         /* mark trace code */
 859
 860         M_NOP;
 861 }
 862 #endif /* !defined(NDEBUG) */
 863
 864
 865 /*
 866  * These are local overrides for various environment variables in Emacs.
 867  * Please do not remove this and leave it at the end of the file, where
 868  * Emacs will automagically detect them.
 869  * ---------------------------------------------------------------------
 870  * Local variables:
 871  * mode: c
 872  * indent-tabs-mode: t
 873  * c-basic-offset: 4
 874  * tab-width: 4
 875  * End:
 876  * vim:noexpandtab:sw=4:ts=4:
 877  */