1 /* src/vm/jit/mips/emit.c - MIPS code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
36 #include "vm/jit/mips/codegen.h"
37 #include "vm/jit/mips/md-abi.h"
39 #include "mm/memory.h"
41 #include "threads/lock-common.h"
43 #include "vm/builtin.h"
44 #include "vm/exceptions.h"
45 #include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
47 #include "vm/jit/abi.h"
48 #include "vm/jit/abi-asm.h"
49 #include "vm/jit/asmpart.h"
50 #include "vm/jit/dseg.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/replace.h"
55 #include "vmcore/options.h"
58 /* emit_load *******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (src->flags & INMEMORY) {
77 disp = src->vv.regoff * 8;
80 #if SIZEOF_VOID_P == 8
84 M_LLD(tempreg, REG_SP, disp);
89 M_ILD(tempreg, REG_SP, disp);
92 M_LLD(tempreg, REG_SP, disp);
96 M_FLD(tempreg, REG_SP, disp);
99 M_DLD(tempreg, REG_SP, disp);
102 vm_abort("emit_load: unknown type %d", src->type);
108 reg = src->vv.regoff;
114 /* emit_load_low ***************************************************************
116 Emits a possible load of the low 32-bits of an operand.
118 *******************************************************************************/
120 #if SIZEOF_VOID_P == 4
121 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
127 assert(src->type == TYPE_LNG);
129 /* get required compiler data */
133 if (src->flags & INMEMORY) {
136 disp = src->vv.regoff * 8;
138 #if WORDS_BIGENDIAN == 1
139 M_ILD(tempreg, REG_SP, disp + 4);
141 M_ILD(tempreg, REG_SP, disp);
147 reg = GET_LOW_REG(src->vv.regoff);
151 #endif /* SIZEOF_VOID_P == 4 */
154 /* emit_load_high **************************************************************
156 Emits a possible load of the high 32-bits of an operand.
158 *******************************************************************************/
160 #if SIZEOF_VOID_P == 4
161 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
167 assert(src->type == TYPE_LNG);
169 /* get required compiler data */
173 if (src->flags & INMEMORY) {
176 disp = src->vv.regoff * 8;
178 #if WORDS_BIGENDIAN == 1
179 M_ILD(tempreg, REG_SP, disp);
181 M_ILD(tempreg, REG_SP, disp + 4);
187 reg = GET_HIGH_REG(src->vv.regoff);
191 #endif /* SIZEOF_VOID_P == 4 */
194 /* emit_store ******************************************************************
196 Emits a possible store to variable.
198 *******************************************************************************/
200 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
205 /* get required compiler data */
209 if (dst->flags & INMEMORY) {
212 disp = dst->vv.regoff * 8;
215 #if SIZEOF_VOID_P == 8
219 M_LST(d, REG_SP, disp);
224 M_IST(d, REG_SP, disp);
227 M_LST(d, REG_SP, disp);
231 M_FST(d, REG_SP, disp);
234 M_DST(d, REG_SP, disp);
237 vm_abort("emit_store: unknown type %d", dst->type);
243 /* emit_copy *******************************************************************
245 Generates a register/memory to register/memory copy.
247 *******************************************************************************/
249 void emit_copy(jitdata *jd, instruction *iptr)
256 /* get required compiler data */
260 /* get source and destination variables */
262 src = VAROP(iptr->s1);
263 dst = VAROP(iptr->dst);
265 if ((src->vv.regoff != dst->vv.regoff) ||
266 ((src->flags ^ dst->flags) & INMEMORY)) {
268 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
269 /* emit nothing, as the value won't be used anyway */
273 /* If one of the variables resides in memory, we can eliminate
274 the register move from/to the temporary register with the
275 order of getting the destination register and the load. */
277 if (IS_INMEMORY(src->flags)) {
278 #if SIZEOF_VOID_P == 4
279 if (IS_2_WORD_TYPE(src->type))
280 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
283 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
284 s1 = emit_load(jd, iptr, src, d);
287 s1 = emit_load(jd, iptr, src, REG_IFTMP);
288 #if SIZEOF_VOID_P == 4
289 if (IS_2_WORD_TYPE(src->type))
290 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
293 d = codegen_reg_of_var(iptr->opc, dst, s1);
298 #if SIZEOF_VOID_P == 8
320 vm_abort("emit_copy: unknown type %d", dst->type);
324 emit_store(jd, iptr, dst, d);
329 /* emit_iconst *****************************************************************
333 *******************************************************************************/
335 void emit_iconst(codegendata *cd, s4 d, s4 value)
339 if ((value >= -32768) && (value <= 32767))
340 M_IADD_IMM(REG_ZERO, value, d);
341 else if ((value >= 0) && (value <= 0xffff))
342 M_OR_IMM(REG_ZERO, value, d);
344 disp = dseg_add_s4(cd, value);
345 M_ILD(d, REG_PV, disp);
350 /* emit_lconst *****************************************************************
354 *******************************************************************************/
356 void emit_lconst(codegendata *cd, s4 d, s8 value)
360 #if SIZEOF_VOID_P == 8
361 if ((value >= -32768) && (value <= 32767))
362 M_LADD_IMM(REG_ZERO, value, d);
363 else if ((value >= 0) && (value <= 0xffff))
364 M_OR_IMM(REG_ZERO, value, d);
366 disp = dseg_add_s8(cd, value);
367 M_LLD(d, REG_PV, disp);
370 disp = dseg_add_s8(cd, value);
371 M_LLD(d, REG_PV, disp);
376 /* emit_branch *****************************************************************
378 Emits the code for conditional and unconditional branchs.
380 NOTE: The reg argument may contain two packed registers.
382 *******************************************************************************/
384 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
389 /* calculate the different displacements */
391 checkdisp = (disp - 4);
392 branchdisp = (disp - 4) >> 2;
394 /* check which branch to generate */
396 if (condition == BRANCH_UNCONDITIONAL) {
397 /* check displacement for overflow */
399 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
400 /* if the long-branches flag isn't set yet, do it */
402 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
403 cd->flags |= (CODEGENDATA_FLAG_ERROR |
404 CODEGENDATA_FLAG_LONGBRANCHES);
407 vm_abort("emit_branch: emit unconditional long-branch code");
415 /* and displacement for overflow */
417 if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
418 /* if the long-branches flag isn't set yet, do it */
420 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
421 cd->flags |= (CODEGENDATA_FLAG_ERROR |
422 CODEGENDATA_FLAG_LONGBRANCHES);
427 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
430 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
445 vm_abort("emit_branch: unknown condition %d", condition);
448 /* The actual branch code which is over-jumped (NOTE: we
449 don't use a branch delay slot here). */
451 M_LUI(REG_ITMP3, branchdisp >> 16);
452 M_OR_IMM(REG_ITMP3, branchdisp, REG_ITMP3);
453 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
461 M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
464 M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
467 M_BLTZ(reg, branchdisp);
470 M_BGEZ(reg, branchdisp);
473 M_BGTZ(reg, branchdisp);
476 M_BLEZ(reg, branchdisp);
479 vm_abort("emit_branch: unknown condition %d", condition);
489 /* emit_arithmetic_check *******************************************************
491 Emit an ArithmeticException check.
493 *******************************************************************************/
495 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
497 if (INSTRUCTION_MUST_CHECK(iptr)) {
500 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
505 /* emit_arrayindexoutofbounds_check ********************************************
507 Emit an ArrayIndexOutOfBoundsException check.
509 *******************************************************************************/
511 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
513 if (INSTRUCTION_MUST_CHECK(iptr)) {
514 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
515 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
516 M_BNEZ(REG_ITMP3, 2);
518 M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
523 /* emit_classcast_check ********************************************************
525 Emit a ClassCastException check.
527 *******************************************************************************/
529 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
531 if (INSTRUCTION_MUST_CHECK(iptr)) {
546 vm_abort("emit_classcast_check: unknown condition %d", condition);
550 M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
555 /* emit_nullpointer_check ******************************************************
557 Emit a NullPointerException check.
559 *******************************************************************************/
561 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
563 if (INSTRUCTION_MUST_CHECK(iptr)) {
566 M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
571 /* emit_exception_check ********************************************************
573 Emit an Exception check.
575 *******************************************************************************/
577 void emit_exception_check(codegendata *cd, instruction *iptr)
579 if (INSTRUCTION_MUST_CHECK(iptr)) {
580 M_BNEZ(REG_RESULT, 2);
582 M_ALD_INTERN(REG_RESULT, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
587 /* emit_patcher_stubs **********************************************************
589 Generates the code for the patcher stubs.
591 *******************************************************************************/
593 void emit_patcher_stubs(jitdata *jd)
603 /* get required compiler data */
607 /* generate code patching stub call code */
611 /* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
612 /* pr = list_next_unsynced(cd->patchrefs, pr)) { */
613 for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
614 /* check code segment size */
618 /* Get machine code which is patched back in later. The
619 call is 2 instruction words long. */
621 tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
623 /* We use 2 loads here as an unaligned 8-byte read on 64-bit
624 MIPS causes a SIGSEGV and using the same code for both
625 architectures is much better. */
627 mcode[0] = ((u4 *) tmpmcodeptr)[0];
628 mcode[1] = ((u4 *) tmpmcodeptr)[1];
630 mcode[2] = ((u4 *) tmpmcodeptr)[2];
631 mcode[3] = ((u4 *) tmpmcodeptr)[3];
632 mcode[4] = ((u4 *) tmpmcodeptr)[4];
634 /* Patch in the call to call the following code (done at
637 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
638 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
640 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
642 /* if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) { */
643 /* Recalculate the displacement to be relative to PV. */
645 disp = savedmcodeptr - cd->mcodebase;
647 M_LUI(REG_ITMP3, disp >> 16);
648 M_OR_IMM(REG_ITMP3, disp, REG_ITMP3);
649 M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
661 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
663 /* create stack frame */
665 M_ASUB_IMM(REG_SP, 8 * 8, REG_SP);
667 /* calculate return address and move it onto the stack */
669 M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
670 M_AST(REG_ITMP3, REG_SP, 7 * 8);
672 /* move pointer to java_objectheader onto stack */
674 #if defined(ENABLE_THREADS)
675 /* create a virtual java_objectheader */
677 (void) dseg_add_unique_address(cd, NULL); /* flcword */
678 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
679 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
681 M_LDA(REG_ITMP3, REG_PV, disp);
682 M_AST(REG_ITMP3, REG_SP, 6 * 8);
687 /* move machine code onto stack */
689 disp = dseg_add_s4(cd, mcode[0]);
690 M_ILD(REG_ITMP3, REG_PV, disp);
691 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 0);
693 disp = dseg_add_s4(cd, mcode[1]);
694 M_ILD(REG_ITMP3, REG_PV, disp);
695 M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
697 disp = dseg_add_s4(cd, mcode[2]);
698 M_ILD(REG_ITMP3, REG_PV, disp);
699 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 0);
701 disp = dseg_add_s4(cd, mcode[3]);
702 M_ILD(REG_ITMP3, REG_PV, disp);
703 M_IST(REG_ITMP3, REG_SP, 4 * 8 + 4);
705 disp = dseg_add_s4(cd, mcode[4]);
706 M_ILD(REG_ITMP3, REG_PV, disp);
707 M_IST(REG_ITMP3, REG_SP, 5 * 8 + 0);
709 /* move class/method/field reference onto stack */
711 disp = dseg_add_address(cd, pr->ref);
712 M_ALD(REG_ITMP3, REG_PV, disp);
713 M_AST(REG_ITMP3, REG_SP, 2 * 8);
715 /* move data segment displacement onto stack */
717 disp = dseg_add_s4(cd, pr->disp);
718 M_ILD(REG_ITMP3, REG_PV, disp);
719 M_IST(REG_ITMP3, REG_SP, 1 * 8);
721 /* move patcher function pointer onto stack */
723 disp = dseg_add_functionptr(cd, pr->patcher);
724 M_ALD(REG_ITMP3, REG_PV, disp);
725 M_AST(REG_ITMP3, REG_SP, 0 * 8);
727 if (targetdisp == 0) {
728 targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
730 disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
731 M_ALD(REG_ITMP3, REG_PV, disp);
736 disp = (((u4 *) cd->mcodebase) + targetdisp) -
737 (((u4 *) cd->mcodeptr) + 1);
746 /* emit_replacement_stubs ******************************************************
748 Generates the code for the replacement stubs.
750 *******************************************************************************/
752 #if defined(ENABLE_REPLACEMENT)
753 void emit_replacement_stubs(jitdata *jd)
764 /* get required compiler data */
769 rplp = code->rplpoints;
771 /* store beginning of replacement stubs */
773 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
775 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
776 /* do not generate stubs for non-trappable points */
778 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
781 /* check code segment size */
786 savedmcodeptr = cd->mcodeptr;
789 /* create stack frame - 16-byte aligned */
791 M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
793 /* push address of `rplpoint` struct */
795 disp = dseg_add_address(cd, rplp);
796 M_ALD(REG_ITMP3, REG_PV, disp);
797 M_AST(REG_ITMP3, REG_SP, 0 * 8);
799 /* jump to replacement function */
801 disp = dseg_add_functionptr(cd, asm_replacement_out);
802 M_ALD(REG_ITMP3, REG_PV, disp);
804 M_NOP; /* delay slot */
806 assert((cd->mcodeptr - savedmcodeptr) == 4*REPLACEMENT_STUB_SIZE);
809 #endif /* defined(ENABLE_REPLACEMENT) */
812 /* emit_verbosecall_enter ******************************************************
814 Generates the code for the call trace.
816 *******************************************************************************/
819 void emit_verbosecall_enter(jitdata *jd)
828 /* get required compiler data */
836 /* mark trace code */
840 M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
841 M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
843 /* save argument registers (we store the registers as address
844 types, so it's correct for MIPS32 too) */
846 for (i = 0; i < INT_ARG_CNT; i++)
847 M_AST(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
849 for (i = 0; i < FLT_ARG_CNT; i++)
850 M_DST(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
852 /* save temporary registers for leaf methods */
854 if (jd->isleafmethod) {
855 for (i = 0; i < INT_TMP_CNT; i++)
856 M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
858 for (i = 0; i < FLT_TMP_CNT; i++)
859 M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
862 /* Load float arguments into integer registers. MIPS32 has less
863 float argument registers than integer ones, we need to check
866 for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
867 t = md->paramtypes[i].type;
869 if (IS_FLT_DBL_TYPE(t)) {
870 if (IS_2_WORD_TYPE(t)) {
871 M_DST(abi_registers_float_argument[i], REG_SP, 0 * 8);
872 M_LLD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
875 M_FST(abi_registers_float_argument[i], REG_SP, 0 * 8);
876 M_ILD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
881 #if SIZEOF_VOID_P == 4
882 for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
883 t = md->paramtypes[i].type;
885 if (IS_INT_LNG_TYPE(t)) {
886 if (IS_2_WORD_TYPE(t)) {
887 M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
888 M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
891 # if WORDS_BIGENDIAN == 1
892 M_MOV(REG_ZERO, abi_registers_integer_argument[j]);
893 M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
895 M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
896 M_MOV(REG_ZERO, abi_registers_integer_argument[j + 1]);
904 disp = dseg_add_address(cd, m);
905 M_ALD(REG_ITMP1, REG_PV, disp);
906 M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
907 disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
908 M_ALD(REG_ITMP3, REG_PV, disp);
909 M_JSR(REG_RA, REG_ITMP3);
912 /* restore argument registers */
914 for (i = 0; i < INT_ARG_CNT; i++)
915 M_ALD(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
917 for (i = 0; i < FLT_ARG_CNT; i++)
918 M_DLD(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
920 /* restore temporary registers for leaf methods */
922 if (jd->isleafmethod) {
923 for (i = 0; i < INT_TMP_CNT; i++)
924 M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
926 for (i = 0; i < FLT_TMP_CNT; i++)
927 M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
930 M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
931 M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
933 /* mark trace code */
937 #endif /* !defined(NDEBUG) */
940 /* emit_verbosecall_exit *******************************************************
942 Generates the code for the call trace.
944 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
946 *******************************************************************************/
949 void emit_verbosecall_exit(jitdata *jd)
957 /* get required compiler data */
965 /* mark trace code */
969 #if SIZEOF_VOID_P == 8
970 M_ASUB_IMM(REG_SP, 4 * 8, REG_SP); /* keep stack 16-byte aligned */
971 M_AST(REG_RA, REG_SP, 0 * 8);
973 M_LST(REG_RESULT, REG_SP, 1 * 8);
974 M_DST(REG_FRESULT, REG_SP, 2 * 8);
976 M_MOV(REG_RESULT, REG_A0);
977 M_DMOV(REG_FRESULT, REG_FA1);
978 M_FMOV(REG_FRESULT, REG_FA2);
980 disp = dseg_add_address(cd, m);
981 M_ALD(REG_A4, REG_PV, disp);
983 M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
984 M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
986 M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
987 M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
989 switch (md->returntype.type) {
991 M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
995 # if WORDS_BIGENDIAN == 1
996 M_MOV(REG_ZERO, REG_A0);
997 M_MOV(REG_RESULT, REG_A1);
999 M_MOV(REG_RESULT, REG_A0);
1000 M_MOV(REG_ZERO, REG_A1);
1004 M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
1005 M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
1007 disp = dseg_add_address(cd, m);
1008 M_ALD(REG_ITMP1, REG_PV, disp);
1009 M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
1012 disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
1013 M_ALD(REG_ITMP3, REG_PV, disp);
1014 M_JSR(REG_RA, REG_ITMP3);
1017 #if SIZEOF_VOID_P == 8
1018 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
1019 M_LLD(REG_RESULT, REG_SP, 1 * 8);
1021 M_ALD(REG_RA, REG_SP, 0 * 8);
1022 M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
1024 M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
1025 M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
1027 M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
1028 M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
1031 /* mark trace code */
1035 #endif /* !defined(NDEBUG) */
1039 * These are local overrides for various environment variables in Emacs.
1040 * Please do not remove this and leave it at the end of the file, where
1041 * Emacs will automagically detect them.
1042 * ---------------------------------------------------------------------
1045 * indent-tabs-mode: t
1049 * vim:noexpandtab:sw=4:ts=4: