src/vm/jit/mips/codegen.c

   1 /* jit/mips/codegen.c - machine code generator for mips
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    Contains the codegenerator for an MIPS (R4000 or higher) processor.
  32    This module generates MIPS machine code for a sequence of
  33    intermediate code commands (ICMDs).
  34
  35    $Id: codegen.c 1271 2004-07-03 10:35:42Z stefan $
  36
  37 */
  38
  39
  40 #include <stdio.h>
  41 #include <signal.h>
  42 #include <unistd.h>
  43 #include <sys/mman.h>
  44 #include "types.h"
  45 #include "main.h"
  46 #include "codegen.h"
  47 #include "jit.h"
  48 #include "reg.h"
  49 #include "builtin.h"
  50 #include "asmpart.h"
  51 #include "jni.h"
  52 #include "loader.h"
  53 #include "tables.h"
  54 #include "native.h"
  55
  56 /* include independent code generation stuff */
  57 #include "codegen.inc"
  58 #include "reg.inc"
  59
  60
  61 /* *****************************************************************************
  62
  63 Datatypes and Register Allocations:
  64 -----------------------------------
  65
  66 On 64-bit-machines (like the MIPS) all operands are stored in the
  67 registers in a 64-bit form, even when the correspondig JavaVM operands
  68 only need 32 bits. This is done by a canonical representation:
  69
  70 32-bit integers are allways stored as sign-extended 64-bit values (this
  71 approach is directly supported by the MIPS architecture and is very easy
  72 to implement).
  73
  74 32-bit-floats are stored in a 64-bit double precision register by simply
  75 expanding the exponent and mantissa with zeroes. (also supported by the
  76 architecture)
  77
  78
  79 Stackframes:
  80
  81 The calling conventions and the layout of the stack is  explained in detail
  82 in the documention file: calling.doc
  83
  84 *******************************************************************************/
  85
  86
  87 /* register descripton - array ************************************************/
  88
  89 /* #define REG_RES   0         reserved register for OS or code generator     */
  90 /* #define REG_RET   1         return value register                          */
  91 /* #define REG_EXC   2         exception value register (only old jit)        */
  92 /* #define REG_SAV   3         (callee) saved register                        */
  93 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  94 /* #define REG_ARG   5         argument register (caller saved)               */
  95
  96 /* #define REG_END   -1        last entry in tables */
  97
  98 int nregdescint[] = {
  99         REG_RES, REG_RES, REG_RET, REG_RES, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
 100         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 101         REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 102         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 103         REG_END };
 104
 105 /* for use of reserved registers, see comment above */
 106
 107 int nregdescfloat[] = {
 108         REG_RET, REG_RES, REG_RES, REG_RES, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 109         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
 110         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 111         REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP,
 112         REG_END };
 113
 114 /* for use of reserved registers, see comment above */
 115
 116
 117 /* parameter allocation mode */
 118
 119 int nreg_parammode = PARAMMODE_NUMBERED;
 120
 121    /* parameter-registers will be allocated by assigning the
 122       1. parameter:   int/float-reg a0
 123       2. parameter:   int/float-reg a1
 124       3. parameter:   int/float-reg a2 ....
 125    */
 126
 127
 128 /* stackframe-infos ***********************************************************/
 129
 130 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 131
 132 /* -> see file 'calling.doc' */
 133
 134
 135 /* additional functions and macros to generate code ***************************/
 136
 137 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 138 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 139
 140
 141 #ifdef STATISTICS
 142 #define COUNT_SPILLS count_spills++
 143 #else
 144 #define COUNT_SPILLS
 145 #endif
 146
 147
 148 /* gen_nullptr_check(objreg) */
 149
 150 #define gen_nullptr_check(objreg) \
 151     if (checknull) { \
 152         M_BEQZ((objreg), 0); \
 153         codegen_addxnullrefs(mcodeptr); \
 154         M_NOP; \
 155     }
 156
 157
 158 /* MCODECHECK(icnt) */
 159
 160 #define MCODECHECK(icnt) \
 161         if ((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1 *) mcodeptr)
 162
 163 /* M_INTMOVE:
 164      generates an integer-move from register a to b.
 165      if a and b are the same int-register, no code will be generated.
 166 */
 167
 168 #define M_INTMOVE(a,b) if (a != b) { M_MOV(a, b); }
 169
 170
 171 /* M_FLTMOVE:
 172     generates a floating-point-move from register a to b.
 173     if a and b are the same float-register, no code will be generated
 174 */
 175
 176 #define M_FLTMOVE(a,b) if (a != b) { M_DMOV(a, b); }
 177
 178 #define M_TFLTMOVE(t,a,b) \
 179         {if(a!=b) \
 180                 if ((t)==TYPE_DBL) \
 181                     {M_DMOV(a,b);} \
 182                 else {M_FMOV(a,b);} \
 183         }
 184
 185 #define M_TFLD(t,a,b,disp) \
 186     if ((t)==TYPE_DBL) \
 187           {M_DLD(a,b,disp);} \
 188     else \
 189           {M_FLD(a,b,disp);}
 190
 191 #define M_TFST(t,a,b,disp) \
 192     if ((t)==TYPE_DBL) \
 193           {M_DST(a,b,disp);} \
 194     else \
 195           {M_FST(a,b,disp);}
 196
 197 #define M_CCFLTMOVE(t1,t2,a,b) \
 198         if ((t1)==(t2)) \
 199           {M_TFLTMOVE(t1,a,b);} \
 200         else \
 201           if ((t1)==TYPE_DBL) \
 202                 {M_CVTDF(a,b);} \
 203           else \
 204                 {M_CVTFD(a,b);}
 205
 206 #define M_CCFLD(t1,t2,a,b,disp) \
 207     if ((t1)==(t2)) \
 208           {M_DLD(a,b,disp);} \
 209         else { \
 210           M_DLD(REG_FTMP1,b,disp); \
 211           if ((t1)==TYPE_DBL) \
 212             {M_CVTDF(REG_FTMP1,a);} \
 213           else \
 214             {M_CVTFD(REG_FTMP1,a);} \
 215         }
 216
 217 #define M_CCFST(t1,t2,a,b,disp) \
 218     if ((t1)==(t2)) \
 219           {M_DST(a,b,disp);} \
 220         else { \
 221           if ((t1)==TYPE_DBL) \
 222             {M_CVTDF(a,REG_FTMP1);} \
 223           else \
 224             {M_CVTFD(a,REG_FTMP1);} \
 225           M_DST(REG_FTMP1,b,disp); \
 226         }
 227
 228
 229 /* var_to_reg_xxx:
 230     this function generates code to fetch data from a pseudo-register
 231     into a real register.
 232     If the pseudo-register has actually been assigned to a real
 233     register, no code will be emitted, since following operations
 234     can use this register directly.
 235
 236     v: pseudoregister to be fetched from
 237     tempregnum: temporary register to be used if v is actually spilled to ram
 238
 239     return: the register number, where the operand can be found after
 240             fetching (this wil be either tempregnum or the register
 241             number allready given to v)
 242 */
 243
 244 #define var_to_reg_int(regnr,v,tempnr) { \
 245         if ((v)->flags & INMEMORY) \
 246                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 247         else regnr=(v)->regoff; \
 248 }
 249
 250
 251 #define var_to_reg_flt(regnr,v,tempnr) { \
 252         if ((v)->flags & INMEMORY) \
 253                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 254         else regnr=(v)->regoff; \
 255 }
 256
 257
 258 /* reg_of_var:
 259     This function determines a register, to which the result of an operation
 260     should go, when it is ultimatively intended to store the result in
 261     pseudoregister v.
 262     If v is assigned to an actual register, this register will be returned.
 263     Otherwise (when v is spilled) this function returns tempregnum.
 264     If not already done, regoff and flags are set in the stack location.
 265 */
 266
 267 static int reg_of_var(stackptr v, int tempregnum)
 268 {
 269         varinfo      *var;
 270
 271         switch (v->varkind) {
 272                 case TEMPVAR:
 273                         if (!(v->flags & INMEMORY))
 274                                 return(v->regoff);
 275                         break;
 276                 case STACKVAR:
 277                         var = &(interfaces[v->varnum][v->type]);
 278                         v->regoff = var->regoff;
 279                         if (!(var->flags & INMEMORY))
 280                                 return(var->regoff);
 281                         break;
 282                 case LOCALVAR:
 283                         var = &(locals[v->varnum][v->type]);
 284                         v->regoff = var->regoff;
 285                         if (!(var->flags & INMEMORY))
 286                                 return(var->regoff);
 287                         break;
 288                 case ARGVAR:
 289                         v->regoff = v->varnum;
 290                         if (IS_FLT_DBL_TYPE(v->type)) {
 291                                 if (v->varnum < fltreg_argnum) {
 292                                         v->regoff = argfltregs[v->varnum];
 293                                         return(argfltregs[v->varnum]);
 294                                         }
 295                                 }
 296                         else
 297                                 if (v->varnum < intreg_argnum) {
 298                                         v->regoff = argintregs[v->varnum];
 299                                         return(argintregs[v->varnum]);
 300                                         }
 301                         v->regoff -= intreg_argnum;
 302                         break;
 303                 }
 304         v->flags |= INMEMORY;
 305         return tempregnum;
 306 }
 307
 308
 309 /* store_reg_to_var_xxx:
 310     This function generates the code to store the result of an operation
 311     back into a spilled pseudo-variable.
 312     If the pseudo-variable has not been spilled in the first place, this
 313     function will generate nothing.
 314
 315     v ............ Pseudovariable
 316     tempregnum ... Number of the temporary registers as returned by
 317                    reg_of_var.
 318 */
 319
 320 #define store_reg_to_var_int(sptr, tempregnum) {       \
 321         if ((sptr)->flags & INMEMORY) {                    \
 322                 COUNT_SPILLS;                                  \
 323                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 324                 }                                              \
 325         }
 326
 327 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 328         if ((sptr)->flags & INMEMORY) {                    \
 329                 COUNT_SPILLS;                                  \
 330                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 331                 }                                              \
 332         }
 333
 334
 335 /* NullPointerException handlers and exception handling initialisation        */
 336
 337 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 338 void thread_restartcriticalsection(ucontext_t *uc)
 339 {
 340         void *critical;
 341         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.gregs[CTX_EPC])) != NULL)
 342                 uc->uc_mcontext.gregs[CTX_EPC] = (u8) critical;
 343 }
 344 #endif
 345
 346 /* NullPointerException signal handler for hardware null pointer check */
 347
 348 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 349 {
 350         sigset_t nsig;
 351         int      instr;
 352         long     faultaddr;
 353         java_objectheader *xptr;
 354
 355         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 356
 357         instr = *((int*)(sigctx->sc_pc));
 358         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 359
 360         if (faultaddr == 0) {
 361                 sigemptyset(&nsig);
 362                 sigaddset(&nsig, sig);
 363                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 364
 365                 xptr = new_exception(string_java_lang_NullPointerException);
 366
 367
 368                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 369                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 370                 sigctx->sc_pc = (u8) asm_handle_exception;
 371
 372         } else {
 373         faultaddr += (long) ((instr << 16) >> 16);
 374                 fprintf(stderr, "faulting address: 0x%lx at 0x%lx\n", (long) faultaddr, (long) sigctx->sc_pc);
 375                 panic("Stack overflow");
 376         }
 377 }
 378
 379
 380 #include <sys/fpu.h>
 381
 382 void init_exceptions(void)
 383 {
 384         struct sigaction sa;
 385         sigset_t unblockmask;
 386
 387         /* The Boehm GC initialization blocks the SIGSEGV signal. So we do a
 388            dummy allocation here to ensure that the GC is initialized.
 389         */
 390         heap_allocate(1, 0, NULL);
 391
 392         /* install signal handlers we need to convert to exceptions */
 393
 394         sigemptyset(&unblockmask);
 395         sa.sa_flags = 0;
 396         sa.sa_sigaction = catch_NullPointerException;
 397         sigemptyset(&sa.sa_mask);
 398
 399         if (!checknull) {
 400 #if defined(SIGSEGV)
 401                 sigaction(SIGSEGV, &sa, NULL);
 402                 sigaddset(&unblockmask, SIGSEGV);
 403 #endif
 404
 405 #if defined(SIGBUS)
 406                 sigaction(SIGBUS, &sa, NULL);
 407                 sigaddset(&unblockmask, SIGBUS);
 408 #endif
 409         }
 410
 411         sigprocmask(SIG_UNBLOCK, &unblockmask, NULL);
 412
 413         /* Turn off flush-to-zero */
 414         {
 415                 union fpc_csr n;
 416                 n.fc_word = get_fpc_csr();
 417                 n.fc_struct.flush = 0;
 418                 set_fpc_csr(n.fc_word);
 419         }
 420 }
 421
 422
 423 /* function gen_mcode **********************************************************
 424
 425         generates machine code
 426
 427 *******************************************************************************/
 428
 429 void codegen()
 430 {
 431         int  len, s1, s2, s3, d;
 432         s4   a;
 433         s4          *mcodeptr;
 434         stackptr    src;
 435         varinfo     *var;
 436         basicblock  *bptr;
 437         instruction *iptr;
 438         xtable *ex;
 439
 440         {
 441         int p, pa, t, l, r;
 442
 443         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 444
 445         /* space to save used callee saved registers */
 446
 447         savedregs_num += (savintregcnt - maxsavintreguse);
 448         savedregs_num += (savfltregcnt - maxsavfltreguse);
 449
 450         parentargs_base = maxmemuse + savedregs_num;
 451
 452 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 453
 454         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 455                 parentargs_base++;
 456
 457 #endif
 458
 459         /* adjust frame size for 16 byte alignment */
 460
 461         if (parentargs_base & 1)
 462                 parentargs_base++;
 463
 464         /* create method header */
 465
 466 #if POINTERSIZE==4
 467         (void) dseg_addaddress(method);                         /* Filler         */
 468 #endif
 469         (void) dseg_addaddress(method);                         /* MethodPointer  */
 470         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 471
 472 #if defined(USE_THREADS)
 473
 474         /* IsSync contains the offset relative to the stack pointer for the
 475            argument of monitor_exit used in the exception handler. Since the
 476            offset could be zero and give a wrong meaning of the flag it is
 477            offset by one.
 478         */
 479
 480         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 481                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 482         else
 483
 484 #endif
 485
 486                 (void) dseg_adds4(0);                               /* IsSync         */
 487
 488         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 489         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 490         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 491         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 492
 493         /* create exception table */
 494
 495         for (ex = extable; ex != NULL; ex = ex->down) {
 496                 dseg_addtarget(ex->start);
 497                 dseg_addtarget(ex->end);
 498                 dseg_addtarget(ex->handler);
 499                 (void) dseg_addaddress(ex->catchtype);
 500         }
 501
 502         /* initialize mcode variables */
 503
 504         mcodeptr = (s4*) mcodebase;
 505         mcodeend = (s4*) (mcodebase + mcodesize);
 506         MCODECHECK(128 + mparamcount);
 507
 508         /* create stack frame (if necessary) */
 509
 510         if (parentargs_base)
 511                 {M_LDA(REG_SP, REG_SP, -parentargs_base * 8);}
 512
 513         /* save return address and used callee saved registers */
 514
 515         p = parentargs_base;
 516         if (!isleafmethod)
 517                 {p--; M_LST(REG_RA, REG_SP, 8*p);}
 518         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 519                 {p--; M_LST(savintregs[r], REG_SP, 8 * p);}
 520         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 521                 {p--; M_DST(savfltregs[r], REG_SP, 8 * p);}
 522
 523         /* save monitorenter argument */
 524
 525 #if defined(USE_THREADS)
 526         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 527                 if (method->flags & ACC_STATIC) {
 528                         p = dseg_addaddress(class);
 529                         M_ALD(REG_ITMP1, REG_PV, p);
 530                         M_AST(REG_ITMP1, REG_SP, maxmemuse * 8);
 531
 532                 } else {
 533                         M_AST(argintregs[0], REG_SP, maxmemuse * 8);
 534                 }
 535         }
 536 #endif
 537
 538         /* copy argument registers to stack and call trace function with pointer
 539            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 540         */
 541
 542         if (runverbose) {
 543                 M_LDA(REG_SP, REG_SP, -(18 * 8));
 544                 M_LST(REG_RA, REG_SP, 1 * 8);
 545
 546                 /* save integer argument registers */
 547                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 548                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
 549                 }
 550
 551                 /* save and copy float arguments into integer registers */
 552                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 553                         t = mparamtypes[p];
 554
 555                         if (IS_FLT_DBL_TYPE(t)) {
 556                                 if (IS_2_WORD_TYPE(t)) {
 557                                         M_DST(argfltregs[p], REG_SP, (10 + p) * 8);
 558                                         M_LLD(argintregs[p], REG_SP, (10 + p) * 8);
 559
 560                                 } else {
 561                                         M_FST(argfltregs[p], REG_SP, (10 + p) * 8);
 562                                         M_ILD(argintregs[p], REG_SP, (10 + p) * 8);
 563                                 }
 564
 565                         } else {
 566                                 M_DST(argfltregs[p], REG_SP, (10 + p) * 8);
 567                         }
 568                 }
 569
 570                 p = dseg_addaddress(method);
 571                 M_ALD(REG_ITMP1, REG_PV, p);
 572                 M_LST(REG_ITMP1, REG_SP, 0);
 573                 p = dseg_addaddress((void *) builtin_trace_args);
 574                 M_ALD(REG_ITMP3, REG_PV, p);
 575                 M_JSR(REG_RA, REG_ITMP3);
 576                 M_NOP;
 577
 578                 M_LLD(REG_RA, REG_SP, 1 * 8);
 579
 580                 for (p = 0; p < mparamcount && p < INT_ARG_CNT; p++) {
 581                         M_LLD(argintregs[p], REG_SP, (2 + p) * 8);
 582                 }
 583
 584                 for (p = 0; p < mparamcount && p < FLT_ARG_CNT; p++) {
 585                         t = mparamtypes[p];
 586
 587                         if (IS_FLT_DBL_TYPE(t)) {
 588                                 if (IS_2_WORD_TYPE(t)) {
 589                                         M_DLD(argfltregs[p], REG_SP, (10 + p) * 8);
 590                                 } else {
 591                                         M_FLD(argfltregs[p], REG_SP, (10 + p) * 8);
 592                                 }
 593                         } else {
 594                                 M_DLD(argfltregs[p], REG_SP, (10 + p) * 8);
 595                         }
 596                 }
 597
 598                 M_LDA(REG_SP, REG_SP, 18 * 8);
 599         }
 600
 601         /* take arguments out of register or stack frame */
 602
 603         for (p = 0, l = 0; p < mparamcount; p++) {
 604                 t = mparamtypes[p];
 605                 var = &(locals[l][t]);
 606                 l++;
 607                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 608                         l++;
 609                 if (var->type < 0)
 610                         continue;
 611                 r = var->regoff;
 612                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 613                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 614                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 615                                         {M_INTMOVE (argintregs[p], r);}
 616                                 else                                 /* reg arg -> spilled    */
 617                                         M_LST (argintregs[p], REG_SP, 8 * r);
 618                                 }
 619                         else {                                   /* stack arguments       */
 620                                 pa = p - INT_ARG_CNT;
 621                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 622                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 623                                 else {                               /* stack arg -> spilled  */
 624                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 625                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 626                                         }
 627                                 }
 628                         }
 629                 else {                                       /* floating args         */
 630                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 631                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 632                                         {M_TFLTMOVE (var->type, argfltregs[p], r);}
 633                                 else                                             /* reg arg -> spilled    */
 634                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 635                                 }
 636                         else {                                   /* stack arguments       */
 637                                 pa = p - FLT_ARG_CNT;
 638                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 639                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 640                                 } else {                             /* stack-arg -> spilled  */
 641                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 642                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 643                                         }
 644                                 }
 645                         }
 646                 }  /* end for */
 647
 648         /* call trace function */
 649
 650 #if 0
 651         if (runverbose && !isleafmethod) {
 652                 M_LDA (REG_SP, REG_SP, -8);
 653                 p = dseg_addaddress (method);
 654                 M_ALD(REG_ITMP1, REG_PV, p);
 655                 M_AST(REG_ITMP1, REG_SP, 0);
 656                 p = dseg_addaddress ((void*) (builtin_trace_args));
 657                 M_ALD(REG_ITMP3, REG_PV, p);
 658                 M_JSR(REG_RA, REG_ITMP3);
 659                 M_NOP;
 660                 M_LDA(REG_SP, REG_SP, 8);
 661                 }
 662 #endif
 663
 664         /* call monitorenter function */
 665
 666 #if defined(USE_THREADS)
 667         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 668                 s4 disp;
 669                 s8 func_enter = (method->flags & ACC_STATIC) ?
 670                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 671                 p = dseg_addaddress((void *) func_enter);
 672                 M_ALD(REG_ITMP3, REG_PV, p);
 673                 M_JSR(REG_RA, REG_ITMP3);
 674                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);
 675                 disp = -(s4)((u1 *) mcodeptr - mcodebase);
 676                 M_LDA(REG_PV, REG_RA, disp);
 677         }
 678 #endif
 679         }
 680
 681         /* end of header generation */
 682
 683         /* walk through all basic blocks */
 684         for (bptr = block; bptr != NULL; bptr = bptr->next) {
 685
 686                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 687
 688                 if (bptr->flags >= BBREACHED) {
 689
 690                 /* branch resolving */
 691
 692                 {
 693                 branchref *brefs;
 694                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 695                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 696                                           brefs->branchpos, bptr->mpc);
 697                         }
 698                 }
 699
 700                 /* copy interface registers to their destination */
 701
 702                 src = bptr->instack;
 703                 len = bptr->indepth;
 704                 MCODECHECK(64+len);
 705                 while (src != NULL) {
 706                         len--;
 707                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 708                                 d = reg_of_var(src, REG_ITMP1);
 709                                 M_INTMOVE(REG_ITMP1, d);
 710                                 store_reg_to_var_int(src, d);
 711                                 }
 712                         else {
 713                                 d = reg_of_var(src, REG_IFTMP);
 714                                 if ((src->varkind != STACKVAR)) {
 715                                         s2 = src->type;
 716                                         if (IS_FLT_DBL_TYPE(s2)) {
 717                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 718                                                         s1 = interfaces[len][s2].regoff;
 719                                                         M_TFLTMOVE(s2,s1,d);
 720                                                         }
 721                                                 else {
 722                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 723                                                         }
 724                                                 store_reg_to_var_flt(src, d);
 725                                                 }
 726                                         else {
 727                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 728                                                         s1 = interfaces[len][s2].regoff;
 729                                                         M_INTMOVE(s1,d);
 730                                                         }
 731                                                 else {
 732                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 733                                                         }
 734                                                 store_reg_to_var_int(src, d);
 735                                                 }
 736                                         }
 737                                 }
 738                         src = src->prev;
 739                         }
 740
 741                 /* walk through all instructions */
 742
 743                 src = bptr->instack;
 744                 len = bptr->icount;
 745                 for (iptr = bptr->iinstr;
 746                     len > 0;
 747                     src = iptr->dst, len--, iptr++) {
 748
 749         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 750         switch (iptr->opc) {
 751
 752                 case ICMD_NOP:        /* ...  ==> ...                                 */
 753                         break;
 754
 755                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 756
 757                         var_to_reg_int(s1, src, REG_ITMP1);
 758                         M_BEQZ(s1, 0);
 759                         codegen_addxnullrefs(mcodeptr);
 760                         M_NOP;
 761                         break;
 762
 763                 /* constant operations ************************************************/
 764
 765 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 766                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 767                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 768
 769 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 770                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 771                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 772
 773                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 774                                       /* op1 = 0, val.i = constant                    */
 775
 776                         d = reg_of_var(iptr->dst, REG_ITMP1);
 777                         ICONST(d, iptr->val.i);
 778                         store_reg_to_var_int(iptr->dst, d);
 779                         break;
 780
 781                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 782                                       /* op1 = 0, val.l = constant                    */
 783
 784                         d = reg_of_var(iptr->dst, REG_ITMP1);
 785                         LCONST(d, iptr->val.l);
 786                         store_reg_to_var_int(iptr->dst, d);
 787                         break;
 788
 789                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 790                                       /* op1 = 0, val.f = constant                    */
 791
 792                         d = reg_of_var (iptr->dst, REG_FTMP1);
 793                         a = dseg_addfloat (iptr->val.f);
 794                         M_FLD(d, REG_PV, a);
 795                         store_reg_to_var_flt (iptr->dst, d);
 796                         break;
 797
 798                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 799                                       /* op1 = 0, val.d = constant                    */
 800
 801                         d = reg_of_var (iptr->dst, REG_FTMP1);
 802                         a = dseg_adddouble (iptr->val.d);
 803                         M_DLD(d, REG_PV, a);
 804                         store_reg_to_var_flt (iptr->dst, d);
 805                         break;
 806
 807                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 808                                       /* op1 = 0, val.a = constant                    */
 809
 810                         d = reg_of_var(iptr->dst, REG_ITMP1);
 811                         if (iptr->val.a) {
 812                                 a = dseg_addaddress (iptr->val.a);
 813                                 M_ALD(d, REG_PV, a);
 814                                 }
 815                         else {
 816                                 M_INTMOVE(REG_ZERO, d);
 817                                 }
 818                         store_reg_to_var_int(iptr->dst, d);
 819                         break;
 820
 821
 822                 /* load/store operations **********************************************/
 823
 824                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 825                 case ICMD_LLOAD:      /* op1 = local variable                         */
 826                 case ICMD_ALOAD:
 827
 828                         d = reg_of_var(iptr->dst, REG_ITMP1);
 829                         if ((iptr->dst->varkind == LOCALVAR) &&
 830                             (iptr->dst->varnum == iptr->op1))
 831                                 break;
 832                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 833                         if (var->flags & INMEMORY)
 834                                 M_LLD(d, REG_SP, 8 * var->regoff);
 835                         else
 836                                 {M_INTMOVE(var->regoff,d);}
 837                         store_reg_to_var_int(iptr->dst, d);
 838                         break;
 839
 840                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 841                 case ICMD_DLOAD:      /* op1 = local variable                         */
 842
 843                         d = reg_of_var(iptr->dst, REG_FTMP1);
 844                         if ((iptr->dst->varkind == LOCALVAR) &&
 845                             (iptr->dst->varnum == iptr->op1))
 846                                 break;
 847                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 848                         {
 849                                 int t2 = ((iptr->opc == ICMD_FLOAD) ? TYPE_FLT : TYPE_DBL);
 850                                 if (var->flags & INMEMORY)
 851                                         {M_CCFLD(var->type,t2,d, REG_SP, 8 * var->regoff);}
 852                                 else
 853                                         {M_CCFLTMOVE(var->type,t2,var->regoff,d);}
 854                         }
 855                         store_reg_to_var_flt(iptr->dst, d);
 856                         break;
 857
 858
 859                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 860                 case ICMD_LSTORE:     /* op1 = local variable                         */
 861                 case ICMD_ASTORE:
 862
 863                         if ((src->varkind == LOCALVAR) &&
 864                             (src->varnum == iptr->op1))
 865                                 break;
 866                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 867                         if (var->flags & INMEMORY) {
 868                                 var_to_reg_int(s1, src, REG_ITMP1);
 869                                 M_LST(s1, REG_SP, 8 * var->regoff);
 870                                 }
 871                         else {
 872                                 var_to_reg_int(s1, src, var->regoff);
 873                                 M_INTMOVE(s1, var->regoff);
 874                                 }
 875                         break;
 876
 877                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 878                 case ICMD_DSTORE:     /* op1 = local variable                         */
 879
 880                         if ((src->varkind == LOCALVAR) &&
 881                             (src->varnum == iptr->op1))
 882                                 break;
 883                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 884                         {
 885                                 int t1 = ((iptr->opc == ICMD_FSTORE) ? TYPE_FLT : TYPE_DBL);
 886                                 if (var->flags & INMEMORY) {
 887                                         var_to_reg_flt(s1, src, REG_FTMP1);
 888                                         M_CCFST(t1,var->type,s1, REG_SP, 8 * var->regoff);
 889                                         }
 890                                 else {
 891                                         var_to_reg_flt(s1, src, var->regoff);
 892                                         M_CCFLTMOVE(t1,var->type,s1, var->regoff);
 893                                         }
 894                         }
 895                         break;
 896
 897
 898                 /* pop/dup/swap operations ********************************************/
 899
 900                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 901
 902                 case ICMD_POP:        /* ..., value  ==> ...                          */
 903                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 904                         break;
 905
 906 #define M_COPY(from,to) \
 907                         d = reg_of_var(to, REG_IFTMP); \
 908                         if ((from->regoff != to->regoff) || \
 909                             ((from->flags ^ to->flags) & INMEMORY)) { \
 910                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 911                                         var_to_reg_flt(s1, from, d); \
 912                                         M_TFLTMOVE(from->type,s1,d); \
 913                                         store_reg_to_var_flt(to, d); \
 914                                         }\
 915                                 else { \
 916                                         var_to_reg_int(s1, from, d); \
 917                                         M_INTMOVE(s1,d); \
 918                                         store_reg_to_var_int(to, d); \
 919                                         }\
 920                                 }
 921
 922                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 923                         M_COPY(src, iptr->dst);
 924                         break;
 925
 926                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 927
 928                         M_COPY(src,       iptr->dst->prev->prev);
 929
 930                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 931
 932                         M_COPY(src,       iptr->dst);
 933                         M_COPY(src->prev, iptr->dst->prev);
 934                         break;
 935
 936                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 937
 938                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 939
 940                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 941
 942                         M_COPY(src,             iptr->dst);
 943                         M_COPY(src->prev,       iptr->dst->prev);
 944                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 945                         M_COPY(src, iptr->dst->prev->prev->prev);
 946                         break;
 947
 948                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 949
 950                         M_COPY(src,                   iptr->dst);
 951                         M_COPY(src->prev,             iptr->dst->prev);
 952                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 953                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 954                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 955                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 956                         break;
 957
 958                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 959
 960                         M_COPY(src, iptr->dst->prev);
 961                         M_COPY(src->prev, iptr->dst);
 962                         break;
 963
 964
 965                 /* integer operations *************************************************/
 966
 967                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(iptr->dst, REG_ITMP3);
 971                         M_ISUB(REG_ZERO, s1, d);
 972                         store_reg_to_var_int(iptr->dst, d);
 973                         break;
 974
 975                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 976
 977                         var_to_reg_int(s1, src, REG_ITMP1);
 978                         d = reg_of_var(iptr->dst, REG_ITMP3);
 979                         M_LSUB(REG_ZERO, s1, d);
 980                         store_reg_to_var_int(iptr->dst, d);
 981                         break;
 982
 983                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(iptr->dst, REG_ITMP3);
 987                         M_INTMOVE(s1, d);
 988                         store_reg_to_var_int(iptr->dst, d);
 989                         break;
 990
 991                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 992
 993                         var_to_reg_int(s1, src, REG_ITMP1);
 994                         d = reg_of_var(iptr->dst, REG_ITMP3);
 995                         M_ISLL_IMM(s1, 0, d );
 996                         store_reg_to_var_int(iptr->dst, d);
 997                         break;
 998
 999                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
1000
1001                         var_to_reg_int(s1, src, REG_ITMP1);
1002                         d = reg_of_var(iptr->dst, REG_ITMP3);
1003                         M_LSLL_IMM(s1, 56, d);
1004                         M_LSRA_IMM( d, 56, d);
1005                         store_reg_to_var_int(iptr->dst, d);
1006                         break;
1007
1008                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
1009
1010                         var_to_reg_int(s1, src, REG_ITMP1);
1011                         d = reg_of_var(iptr->dst, REG_ITMP3);
1012             M_CZEXT(s1, d);
1013                         store_reg_to_var_int(iptr->dst, d);
1014                         break;
1015
1016                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
1017
1018                         var_to_reg_int(s1, src, REG_ITMP1);
1019                         d = reg_of_var(iptr->dst, REG_ITMP3);
1020                         M_LSLL_IMM(s1, 48, d);
1021                         M_LSRA_IMM( d, 48, d);
1022                         store_reg_to_var_int(iptr->dst, d);
1023                         break;
1024
1025
1026                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1027
1028                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1029                         var_to_reg_int(s2, src, REG_ITMP2);
1030                         d = reg_of_var(iptr->dst, REG_ITMP3);
1031                         M_IADD(s1, s2, d);
1032                         store_reg_to_var_int(iptr->dst, d);
1033                         break;
1034
1035                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1036                                       /* val.i = constant                             */
1037
1038                         var_to_reg_int(s1, src, REG_ITMP1);
1039                         d = reg_of_var(iptr->dst, REG_ITMP3);
1040                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
1041                                 M_IADD_IMM(s1, iptr->val.i, d);
1042                                 }
1043                         else {
1044                                 ICONST(REG_ITMP2, iptr->val.i);
1045                                 M_IADD(s1, REG_ITMP2, d);
1046                                 }
1047                         store_reg_to_var_int(iptr->dst, d);
1048                         break;
1049
1050                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1051
1052                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1053                         var_to_reg_int(s2, src, REG_ITMP2);
1054                         d = reg_of_var(iptr->dst, REG_ITMP3);
1055                         M_LADD(s1, s2, d);
1056                         store_reg_to_var_int(iptr->dst, d);
1057                         break;
1058
1059                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1060                                       /* val.l = constant                             */
1061
1062                         var_to_reg_int(s1, src, REG_ITMP1);
1063                         d = reg_of_var(iptr->dst, REG_ITMP3);
1064                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
1065                                 M_LADD_IMM(s1, iptr->val.l, d);
1066                                 }
1067                         else {
1068                                 LCONST(REG_ITMP2, iptr->val.l);
1069                                 M_LADD(s1, REG_ITMP2, d);
1070                                 }
1071                         store_reg_to_var_int(iptr->dst, d);
1072                         break;
1073
1074                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1075
1076                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1077                         var_to_reg_int(s2, src, REG_ITMP2);
1078                         d = reg_of_var(iptr->dst, REG_ITMP3);
1079                         M_ISUB(s1, s2, d);
1080                         store_reg_to_var_int(iptr->dst, d);
1081                         break;
1082
1083                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1084                                       /* val.i = constant                             */
1085
1086                         var_to_reg_int(s1, src, REG_ITMP1);
1087                         d = reg_of_var(iptr->dst, REG_ITMP3);
1088                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
1089                                 M_IADD_IMM(s1, -iptr->val.i, d);
1090                                 }
1091                         else {
1092                                 ICONST(REG_ITMP2, iptr->val.i);
1093                                 M_ISUB(s1, REG_ITMP2, d);
1094                                 }
1095                         store_reg_to_var_int(iptr->dst, d);
1096                         break;
1097
1098                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1099
1100                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1101                         var_to_reg_int(s2, src, REG_ITMP2);
1102                         d = reg_of_var(iptr->dst, REG_ITMP3);
1103                         M_LSUB(s1, s2, d);
1104                         store_reg_to_var_int(iptr->dst, d);
1105                         break;
1106
1107                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1108                                       /* val.l = constant                             */
1109
1110                         var_to_reg_int(s1, src, REG_ITMP1);
1111                         d = reg_of_var(iptr->dst, REG_ITMP3);
1112                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
1113                                 M_LADD_IMM(s1, -iptr->val.l, d);
1114                                 }
1115                         else {
1116                                 LCONST(REG_ITMP2, iptr->val.l);
1117                                 M_LSUB(s1, REG_ITMP2, d);
1118                                 }
1119                         store_reg_to_var_int(iptr->dst, d);
1120                         break;
1121
1122                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1123
1124                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1125                         var_to_reg_int(s2, src, REG_ITMP2);
1126                         d = reg_of_var(iptr->dst, REG_ITMP3);
1127                         M_IMUL(s1, s2);
1128                         M_MFLO(d);
1129                         M_NOP;
1130                         M_NOP;
1131                         store_reg_to_var_int(iptr->dst, d);
1132                         break;
1133
1134                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1135                                       /* val.i = constant                             */
1136
1137                         var_to_reg_int(s1, src, REG_ITMP1);
1138                         d = reg_of_var(iptr->dst, REG_ITMP3);
1139                         ICONST(REG_ITMP2, iptr->val.i);
1140                         M_IMUL(s1, REG_ITMP2);
1141                         M_MFLO(d);
1142                         M_NOP;
1143                         M_NOP;
1144                         store_reg_to_var_int(iptr->dst, d);
1145                         break;
1146
1147                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1148
1149                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1150                         var_to_reg_int(s2, src, REG_ITMP2);
1151                         d = reg_of_var(iptr->dst, REG_ITMP3);
1152                         M_LMUL(s1, s2);
1153                         M_MFLO(d);
1154                         M_NOP;
1155                         M_NOP;
1156                         store_reg_to_var_int(iptr->dst, d);
1157                         break;
1158
1159                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1160                                       /* val.l = constant                             */
1161
1162                         var_to_reg_int(s1, src, REG_ITMP1);
1163                         d = reg_of_var(iptr->dst, REG_ITMP3);
1164                         LCONST(REG_ITMP2, iptr->val.l);
1165                         M_LMUL(s1, REG_ITMP2);
1166                         M_MFLO(d);
1167                         M_NOP;
1168                         M_NOP;
1169                         store_reg_to_var_int(iptr->dst, d);
1170                         break;
1171
1172                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1173
1174                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1175                         var_to_reg_int(s2, src, REG_ITMP2);
1176                         d = reg_of_var(iptr->dst, REG_ITMP3);
1177                         M_IDIV(s1, s2);
1178                         M_MFLO(d);
1179                         M_NOP;
1180                         M_NOP;
1181                         store_reg_to_var_int(iptr->dst, d);
1182                         break;
1183 #if 0
1184                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
1185                                       /* val.i = constant                             */
1186
1187                         var_to_reg_int(s1, src, REG_ITMP1);
1188                         d = reg_of_var(iptr->dst, REG_ITMP3);
1189                         ICONST(REG_ITMP2, iptr->val.i);
1190                         M_IDIV(s1, REG_ITMP2);
1191                         M_MFLO(d);
1192                         M_NOP;
1193                         M_NOP;
1194                         store_reg_to_var_int(iptr->dst, d);
1195                         break;
1196 #endif
1197                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1198
1199                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1200                         var_to_reg_int(s2, src, REG_ITMP2);
1201                         d = reg_of_var(iptr->dst, REG_ITMP3);
1202                         M_LDIV(s1, s2);
1203                         M_MFLO(d);
1204                         M_NOP;
1205                         M_NOP;
1206                         store_reg_to_var_int(iptr->dst, d);
1207                         break;
1208 #if 0
1209                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
1210                                       /* val.l = constant                             */
1211
1212                         var_to_reg_int(s1, src, REG_ITMP1);
1213                         d = reg_of_var(iptr->dst, REG_ITMP3);
1214                         LCONST(REG_ITMP2, iptr->val.l);
1215                         M_LDIV(s1, REG_ITMP2);
1216                         M_MFLO(d);
1217                         M_NOP;
1218                         M_NOP;
1219                         store_reg_to_var_int(iptr->dst, d);
1220                         break;
1221 #endif
1222                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1223
1224                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1225                         var_to_reg_int(s2, src, REG_ITMP2);
1226                         d = reg_of_var(iptr->dst, REG_ITMP3);
1227                         M_IDIV(s1, s2);
1228                         M_MFHI(d);
1229                         M_NOP;
1230                         M_NOP;
1231                         store_reg_to_var_int(iptr->dst, d);
1232                         break;
1233 #if 0
1234                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1235                                       /* val.i = constant                             */
1236
1237                         var_to_reg_int(s1, src, REG_ITMP1);
1238                         d = reg_of_var(iptr->dst, REG_ITMP3);
1239                         ICONST(REG_ITMP2, iptr->val.i);
1240                         M_IDIV(s1, REG_ITMP2);
1241                         M_MFHI(d);
1242                         M_NOP;
1243                         M_NOP;
1244                         store_reg_to_var_int(iptr->dst, d);
1245                         break;
1246 #endif
1247                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1248
1249                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1250                         var_to_reg_int(s2, src, REG_ITMP2);
1251                         d = reg_of_var(iptr->dst, REG_ITMP3);
1252                         M_LDIV(s1, s2);
1253                         M_MFHI(d);
1254                         M_NOP;
1255                         M_NOP;
1256                         store_reg_to_var_int(iptr->dst, d);
1257                         break;
1258 #if 0
1259                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1260                                       /* val.l = constant                             */
1261
1262                         var_to_reg_int(s1, src, REG_ITMP1);
1263                         d = reg_of_var(iptr->dst, REG_ITMP3);
1264                         LCONST(REG_ITMP2, iptr->val.l);
1265                         M_LDIV(s1, REG_ITMP2);
1266                         M_MFHI(d);
1267                         M_NOP;
1268                         M_NOP;
1269                         store_reg_to_var_int(iptr->dst, d);
1270                         break;
1271 #endif
1272                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1273                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1274
1275                         var_to_reg_int(s1, src, REG_ITMP1);
1276                         d = reg_of_var(iptr->dst, REG_ITMP3);
1277                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1278                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1279                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1280                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1281                         store_reg_to_var_int(iptr->dst, d);
1282                         break;
1283
1284                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1285
1286                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1287                         var_to_reg_int(s2, src, REG_ITMP2);
1288                         d = reg_of_var(iptr->dst, REG_ITMP3);
1289                         M_ISLL(s1, s2, d);
1290                         store_reg_to_var_int(iptr->dst, d);
1291                         break;
1292
1293                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1294                                       /* val.i = constant                             */
1295
1296                         var_to_reg_int(s1, src, REG_ITMP1);
1297                         d = reg_of_var(iptr->dst, REG_ITMP3);
1298                         M_ISLL_IMM(s1, iptr->val.i, d);
1299                         store_reg_to_var_int(iptr->dst, d);
1300                         break;
1301
1302                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1303
1304                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1305                         var_to_reg_int(s2, src, REG_ITMP2);
1306                         d = reg_of_var(iptr->dst, REG_ITMP3);
1307                         M_ISRA(s1, s2, d);
1308                         store_reg_to_var_int(iptr->dst, d);
1309                         break;
1310
1311                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1312                                       /* val.i = constant                             */
1313
1314                         var_to_reg_int(s1, src, REG_ITMP1);
1315                         d = reg_of_var(iptr->dst, REG_ITMP3);
1316                         M_ISRA_IMM(s1, iptr->val.i, d);
1317                         store_reg_to_var_int(iptr->dst, d);
1318                         break;
1319
1320                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1321
1322                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1323                         var_to_reg_int(s2, src, REG_ITMP2);
1324                         d = reg_of_var(iptr->dst, REG_ITMP3);
1325                         M_ISRL(s1, s2, d);
1326                         store_reg_to_var_int(iptr->dst, d);
1327                         break;
1328
1329                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1330                                       /* val.i = constant                             */
1331
1332                         var_to_reg_int(s1, src, REG_ITMP1);
1333                         d = reg_of_var(iptr->dst, REG_ITMP3);
1334                         M_ISRL_IMM(s1, iptr->val.i, d);
1335                         store_reg_to_var_int(iptr->dst, d);
1336                         break;
1337
1338                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1339
1340                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1341                         var_to_reg_int(s2, src, REG_ITMP2);
1342                         d = reg_of_var(iptr->dst, REG_ITMP3);
1343                         M_LSLL(s1, s2, d);
1344                         store_reg_to_var_int(iptr->dst, d);
1345                         break;
1346
1347                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1348                                       /* val.i = constant                             */
1349
1350                         var_to_reg_int(s1, src, REG_ITMP1);
1351                         d = reg_of_var(iptr->dst, REG_ITMP3);
1352                         M_LSLL_IMM(s1, iptr->val.i, d);
1353                         store_reg_to_var_int(iptr->dst, d);
1354                         break;
1355
1356                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1357
1358                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1359                         var_to_reg_int(s2, src, REG_ITMP2);
1360                         d = reg_of_var(iptr->dst, REG_ITMP3);
1361                         M_LSRA(s1, s2, d);
1362                         store_reg_to_var_int(iptr->dst, d);
1363                         break;
1364
1365                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1366                                       /* val.i = constant                             */
1367
1368                         var_to_reg_int(s1, src, REG_ITMP1);
1369                         d = reg_of_var(iptr->dst, REG_ITMP3);
1370                         M_LSRA_IMM(s1, iptr->val.i, d);
1371                         store_reg_to_var_int(iptr->dst, d);
1372                         break;
1373
1374                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1375
1376                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1377                         var_to_reg_int(s2, src, REG_ITMP2);
1378                         d = reg_of_var(iptr->dst, REG_ITMP3);
1379                         M_LSRL(s1, s2, d);
1380                         store_reg_to_var_int(iptr->dst, d);
1381                         break;
1382
1383                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1384                                       /* val.i = constant                             */
1385
1386                         var_to_reg_int(s1, src, REG_ITMP1);
1387                         d = reg_of_var(iptr->dst, REG_ITMP3);
1388                         M_LSRL_IMM(s1, iptr->val.i, d);
1389                         store_reg_to_var_int(iptr->dst, d);
1390                         break;
1391
1392                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1393                 case ICMD_LAND:
1394
1395                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1396                         var_to_reg_int(s2, src, REG_ITMP2);
1397                         d = reg_of_var(iptr->dst, REG_ITMP3);
1398                         M_AND(s1, s2, d);
1399                         store_reg_to_var_int(iptr->dst, d);
1400                         break;
1401
1402                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1403                                       /* val.i = constant                             */
1404
1405                         var_to_reg_int(s1, src, REG_ITMP1);
1406                         d = reg_of_var(iptr->dst, REG_ITMP3);
1407                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1408                                 M_AND_IMM(s1, iptr->val.i, d);
1409                                 }
1410                         else {
1411                                 ICONST(REG_ITMP2, iptr->val.i);
1412                                 M_AND(s1, REG_ITMP2, d);
1413                                 }
1414                         store_reg_to_var_int(iptr->dst, d);
1415                         break;
1416
1417                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1418                                       /* val.i = constant                             */
1419
1420                         var_to_reg_int(s1, src, REG_ITMP1);
1421                         d = reg_of_var(iptr->dst, REG_ITMP3);
1422                         if (s1 == d) {
1423                                 M_MOV(s1, REG_ITMP1);
1424                                 s1 = REG_ITMP1;
1425                                 }
1426                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1427                                 M_AND_IMM(s1, iptr->val.i, d);
1428                                 M_BGEZ(s1, 4);
1429                                 M_NOP;
1430                                 M_ISUB(REG_ZERO, s1, d);
1431                                 M_AND_IMM(d, iptr->val.i, d);
1432                                 }
1433                         else {
1434                                 ICONST(REG_ITMP2, iptr->val.i);
1435                                 M_AND(s1, REG_ITMP2, d);
1436                                 M_BGEZ(s1, 4);
1437                                 M_NOP;
1438                                 M_ISUB(REG_ZERO, s1, d);
1439                                 M_AND(d, REG_ITMP2, d);
1440                                 }
1441                         M_ISUB(REG_ZERO, d, d);
1442                         store_reg_to_var_int(iptr->dst, d);
1443                         break;
1444
1445                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1446
1447 /*          b = value & 0xffff;
1448                         a = value >> 16;
1449                         a = ((b - a) & 0xffff) + (b < a);
1450 */
1451                         var_to_reg_int(s1, src, REG_ITMP1);
1452                         d = reg_of_var(iptr->dst, REG_ITMP3);
1453                         if (s1 == d) {
1454                                 M_MOV(s1, REG_ITMP3);
1455                                 s1 = REG_ITMP3;
1456                                 }
1457                         M_BLTZ(s1, 7);
1458             M_CZEXT(s1, REG_ITMP2);                             /* delay slot */
1459                         M_ISRA_IMM(s1, 16, d);
1460                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1461                         M_ISUB(REG_ITMP2, d, d);
1462             M_CZEXT(d, d);
1463                         M_BR(7);
1464                         M_IADD(d, REG_ITMP1, d);                            /* delay slot */
1465
1466                         M_LUI(REG_ITMP2, 1);
1467                         M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1468                         M_IDIV(s1, REG_ITMP2);
1469                         M_MFHI(d);
1470                         M_NOP;
1471                         M_NOP;
1472                         store_reg_to_var_int(iptr->dst, d);
1473                         break;
1474
1475                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1476                                       /* val.l = constant                             */
1477
1478                         var_to_reg_int(s1, src, REG_ITMP1);
1479                         d = reg_of_var(iptr->dst, REG_ITMP3);
1480                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1481                                 M_AND_IMM(s1, iptr->val.l, d);
1482                                 }
1483                         else {
1484                                 LCONST(REG_ITMP2, iptr->val.l);
1485                                 M_AND(s1, REG_ITMP2, d);
1486                                 }
1487                         store_reg_to_var_int(iptr->dst, d);
1488                         break;
1489
1490                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1491                                       /* val.l = constant                             */
1492
1493                         var_to_reg_int(s1, src, REG_ITMP1);
1494                         d = reg_of_var(iptr->dst, REG_ITMP3);
1495                         if (s1 == d) {
1496                                 M_MOV(s1, REG_ITMP1);
1497                                 s1 = REG_ITMP1;
1498                                 }
1499                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1500                                 M_AND_IMM(s1, iptr->val.l, d);
1501                                 M_BGEZ(s1, 4);
1502                                 M_NOP;
1503                                 M_LSUB(REG_ZERO, s1, d);
1504                                 M_AND_IMM(d, iptr->val.l, d);
1505                                 }
1506                         else {
1507                                 LCONST(REG_ITMP2, iptr->val.l);
1508                                 M_AND(s1, REG_ITMP2, d);
1509                                 M_BGEZ(s1, 4);
1510                                 M_NOP;
1511                                 M_LSUB(REG_ZERO, s1, d);
1512                                 M_AND(d, REG_ITMP2, d);
1513                                 }
1514                         M_LSUB(REG_ZERO, d, d);
1515                         store_reg_to_var_int(iptr->dst, d);
1516                         break;
1517
1518                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1519
1520                         var_to_reg_int(s1, src, REG_ITMP1);
1521                         d = reg_of_var(iptr->dst, REG_ITMP3);
1522                         M_LUI(REG_ITMP2, 1);
1523                         M_LADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1524                         M_LDIV(s1, REG_ITMP2);
1525                         M_MFHI(d);
1526                         M_NOP;
1527                         M_NOP;
1528                         store_reg_to_var_int(iptr->dst, d);
1529                         break;
1530
1531                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1532                 case ICMD_LOR:
1533
1534                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1535                         var_to_reg_int(s2, src, REG_ITMP2);
1536                         d = reg_of_var(iptr->dst, REG_ITMP3);
1537                         M_OR( s1,s2, d);
1538                         store_reg_to_var_int(iptr->dst, d);
1539                         break;
1540
1541                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1542                                       /* val.i = constant                             */
1543
1544                         var_to_reg_int(s1, src, REG_ITMP1);
1545                         d = reg_of_var(iptr->dst, REG_ITMP3);
1546                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1547                                 M_OR_IMM(s1, iptr->val.i, d);
1548                                 }
1549                         else {
1550                                 ICONST(REG_ITMP2, iptr->val.i);
1551                                 M_OR(s1, REG_ITMP2, d);
1552                                 }
1553                         store_reg_to_var_int(iptr->dst, d);
1554                         break;
1555
1556                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1557                                       /* val.l = constant                             */
1558
1559                         var_to_reg_int(s1, src, REG_ITMP1);
1560                         d = reg_of_var(iptr->dst, REG_ITMP3);
1561                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1562                                 M_OR_IMM(s1, iptr->val.l, d);
1563                                 }
1564                         else {
1565                                 LCONST(REG_ITMP2, iptr->val.l);
1566                                 M_OR(s1, REG_ITMP2, d);
1567                                 }
1568                         store_reg_to_var_int(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1572                 case ICMD_LXOR:
1573
1574                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1575                         var_to_reg_int(s2, src, REG_ITMP2);
1576                         d = reg_of_var(iptr->dst, REG_ITMP3);
1577                         M_XOR(s1, s2, d);
1578                         store_reg_to_var_int(iptr->dst, d);
1579                         break;
1580
1581                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1582                                       /* val.i = constant                             */
1583
1584                         var_to_reg_int(s1, src, REG_ITMP1);
1585                         d = reg_of_var(iptr->dst, REG_ITMP3);
1586                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1587                                 M_XOR_IMM(s1, iptr->val.i, d);
1588                                 }
1589                         else {
1590                                 ICONST(REG_ITMP2, iptr->val.i);
1591                                 M_XOR(s1, REG_ITMP2, d);
1592                                 }
1593                         store_reg_to_var_int(iptr->dst, d);
1594                         break;
1595
1596                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1597                                       /* val.l = constant                             */
1598
1599                         var_to_reg_int(s1, src, REG_ITMP1);
1600                         d = reg_of_var(iptr->dst, REG_ITMP3);
1601                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1602                                 M_XOR_IMM(s1, iptr->val.l, d);
1603                                 }
1604                         else {
1605                                 LCONST(REG_ITMP2, iptr->val.l);
1606                                 M_XOR(s1, REG_ITMP2, d);
1607                                 }
1608                         store_reg_to_var_int(iptr->dst, d);
1609                         break;
1610
1611
1612                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1613
1614                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1615                         var_to_reg_int(s2, src, REG_ITMP2);
1616                         d = reg_of_var(iptr->dst, REG_ITMP3);
1617                         M_CMPLT(s1, s2, REG_ITMP3);
1618                         M_CMPLT(s2, s1, REG_ITMP1);
1619                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1620                         store_reg_to_var_int(iptr->dst, d);
1621                         break;
1622
1623
1624                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1625                                       /* op1 = variable, val.i = constant             */
1626
1627                         var = &(locals[iptr->op1][TYPE_INT]);
1628                         if (var->flags & INMEMORY) {
1629                                 s1 = REG_ITMP1;
1630                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1631                                 }
1632                         else
1633                                 s1 = var->regoff;
1634                         M_IADD_IMM(s1, iptr->val.i, s1);
1635                         if (var->flags & INMEMORY)
1636                                 M_LST(s1, REG_SP, 8 * var->regoff);
1637                         break;
1638
1639
1640                 /* floating operations ************************************************/
1641
1642                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1643
1644                         var_to_reg_flt(s1, src, REG_FTMP1);
1645                         d = reg_of_var(iptr->dst, REG_FTMP3);
1646                         M_FNEG(s1, d);
1647                         store_reg_to_var_flt(iptr->dst, d);
1648                         break;
1649
1650                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1651
1652                         var_to_reg_flt(s1, src, REG_FTMP1);
1653                         d = reg_of_var(iptr->dst, REG_FTMP3);
1654                         M_DNEG(s1, d);
1655                         store_reg_to_var_flt(iptr->dst, d);
1656                         break;
1657
1658                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1659
1660                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1661                         var_to_reg_flt(s2, src, REG_FTMP2);
1662                         d = reg_of_var(iptr->dst, REG_FTMP3);
1663                         M_FADD(s1, s2, d);
1664                         store_reg_to_var_flt(iptr->dst, d);
1665                         break;
1666
1667                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1668
1669                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1670                         var_to_reg_flt(s2, src, REG_FTMP2);
1671                         d = reg_of_var(iptr->dst, REG_FTMP3);
1672                         M_DADD(s1, s2, d);
1673                         store_reg_to_var_flt(iptr->dst, d);
1674                         break;
1675
1676                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1677
1678                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1679                         var_to_reg_flt(s2, src, REG_FTMP2);
1680                         d = reg_of_var(iptr->dst, REG_FTMP3);
1681                         M_FSUB(s1, s2, d);
1682                         store_reg_to_var_flt(iptr->dst, d);
1683                         break;
1684
1685                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1686
1687                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1688                         var_to_reg_flt(s2, src, REG_FTMP2);
1689                         d = reg_of_var(iptr->dst, REG_FTMP3);
1690                         M_DSUB(s1, s2, d);
1691                         store_reg_to_var_flt(iptr->dst, d);
1692                         break;
1693
1694                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1695
1696                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1697                         var_to_reg_flt(s2, src, REG_FTMP2);
1698                         d = reg_of_var(iptr->dst, REG_FTMP3);
1699                         M_FMUL(s1, s2, d);
1700                         store_reg_to_var_flt(iptr->dst, d);
1701                         break;
1702
1703                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1704
1705                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1706                         var_to_reg_flt(s2, src, REG_FTMP2);
1707                         d = reg_of_var(iptr->dst, REG_FTMP3);
1708                         M_DMUL(s1, s2, d);
1709                         store_reg_to_var_flt(iptr->dst, d);
1710                         break;
1711
1712                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1713
1714                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1715                         var_to_reg_flt(s2, src, REG_FTMP2);
1716                         d = reg_of_var(iptr->dst, REG_FTMP3);
1717                         M_FDIV(s1, s2, d);
1718                         store_reg_to_var_flt(iptr->dst, d);
1719                         break;
1720
1721                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1722
1723                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1724                         var_to_reg_flt(s2, src, REG_FTMP2);
1725                         d = reg_of_var(iptr->dst, REG_FTMP3);
1726                         M_DDIV(s1, s2, d);
1727                         store_reg_to_var_flt(iptr->dst, d);
1728                         break;
1729
1730                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1731                         panic("FREM");
1732
1733                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1734                         var_to_reg_flt(s2, src, REG_FTMP2);
1735                         d = reg_of_var(iptr->dst, REG_FTMP3);
1736                         M_FDIV(s1,s2, REG_FTMP3);
1737                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1738                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1739                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1740                         M_FSUB(s1, REG_FTMP3, d);
1741                         store_reg_to_var_flt(iptr->dst, d);
1742                     break;
1743
1744                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1745
1746                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1747                         var_to_reg_flt(s2, src, REG_FTMP2);
1748                         d = reg_of_var(iptr->dst, REG_FTMP3);
1749                         M_DDIV(s1,s2, REG_FTMP3);
1750                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1751                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1752                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1753                         M_DSUB(s1, REG_FTMP3, d);
1754                         store_reg_to_var_flt(iptr->dst, d);
1755                     break;
1756
1757                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1758                 case ICMD_L2F:
1759                         var_to_reg_int(s1, src, REG_ITMP1);
1760                         d = reg_of_var(iptr->dst, REG_FTMP3);
1761                         M_MOVLD(s1, d);
1762                         M_CVTLF(d, d);
1763                         store_reg_to_var_flt(iptr->dst, d);
1764                         break;
1765
1766                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1767                 case ICMD_L2D:
1768                         var_to_reg_int(s1, src, REG_ITMP1);
1769                         d = reg_of_var(iptr->dst, REG_FTMP3);
1770                         M_MOVLD(s1, d);
1771                         M_CVTLD(d, d);
1772                         store_reg_to_var_flt(iptr->dst, d);
1773                         break;
1774
1775                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1776
1777                         var_to_reg_flt(s1, src, REG_FTMP1);
1778                         d = reg_of_var(iptr->dst, REG_ITMP3);
1779                         M_TRUNCFI(s1, REG_FTMP1);
1780                         M_MOVDI(REG_FTMP1, d);
1781                         M_NOP;
1782                         store_reg_to_var_int(iptr->dst, d);
1783                         break;
1784
1785                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1786
1787                         var_to_reg_flt(s1, src, REG_FTMP1);
1788                         d = reg_of_var(iptr->dst, REG_ITMP3);
1789                         M_TRUNCDI(s1, REG_FTMP1);
1790                         M_MOVDI(REG_FTMP1, d);
1791                         M_NOP;
1792                         store_reg_to_var_int(iptr->dst, d);
1793                         break;
1794
1795                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1796
1797                         var_to_reg_flt(s1, src, REG_FTMP1);
1798                         d = reg_of_var(iptr->dst, REG_ITMP3);
1799                         M_TRUNCFL(s1, REG_FTMP1);
1800                         M_MOVDL(REG_FTMP1, d);
1801                         M_NOP;
1802                         store_reg_to_var_int(iptr->dst, d);
1803                         break;
1804
1805                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1806
1807                         var_to_reg_flt(s1, src, REG_FTMP1);
1808                         d = reg_of_var(iptr->dst, REG_ITMP3);
1809                         M_TRUNCDL(s1, REG_FTMP1);
1810                         M_MOVDL(REG_FTMP1, d);
1811                         M_NOP;
1812                         store_reg_to_var_int(iptr->dst, d);
1813                         break;
1814
1815                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1816
1817                         var_to_reg_flt(s1, src, REG_FTMP1);
1818                         d = reg_of_var(iptr->dst, REG_FTMP3);
1819                         M_CVTFD(s1, d);
1820                         store_reg_to_var_flt(iptr->dst, d);
1821                         break;
1822
1823                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1824
1825                         var_to_reg_flt(s1, src, REG_FTMP1);
1826                         d = reg_of_var(iptr->dst, REG_FTMP3);
1827                         M_CVTDF(s1, d);
1828                         store_reg_to_var_flt(iptr->dst, d);
1829                         break;
1830
1831                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1832
1833                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1834                         var_to_reg_flt(s2, src, REG_FTMP2);
1835                         d = reg_of_var(iptr->dst, REG_ITMP3);
1836                         M_FCMPULEF(s1, s2);
1837                         M_FBT(3);
1838                         M_LADD_IMM(REG_ZERO, 1, d);
1839                         M_BR(4);
1840                         M_NOP;
1841                         M_FCMPEQF(s1, s2);
1842                         M_LSUB_IMM(REG_ZERO, 1, d);
1843                         M_CMOVT(REG_ZERO, d);
1844                         store_reg_to_var_int(iptr->dst, d);
1845                         break;
1846
1847                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1848
1849                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1850                         var_to_reg_flt(s2, src, REG_FTMP2);
1851                         d = reg_of_var(iptr->dst, REG_ITMP3);
1852                         M_FCMPULED(s1, s2);
1853                         M_FBT(3);
1854                         M_LADD_IMM(REG_ZERO, 1, d);
1855                         M_BR(4);
1856                         M_NOP;
1857                         M_FCMPEQD(s1, s2);
1858                         M_LSUB_IMM(REG_ZERO, 1, d);
1859                         M_CMOVT(REG_ZERO, d);
1860                         store_reg_to_var_int(iptr->dst, d);
1861                         break;
1862
1863                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1864
1865                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1866                         var_to_reg_flt(s2, src, REG_FTMP2);
1867                         d = reg_of_var(iptr->dst, REG_ITMP3);
1868                         M_FCMPOLTF(s1, s2);
1869                         M_FBF(3);
1870                         M_LSUB_IMM(REG_ZERO, 1, d);
1871                         M_BR(4);
1872                         M_NOP;
1873                         M_FCMPEQF(s1, s2);
1874                         M_LADD_IMM(REG_ZERO, 1, d);
1875                         M_CMOVT(REG_ZERO, d);
1876                         store_reg_to_var_int(iptr->dst, d);
1877                         break;
1878
1879                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1880
1881                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1882                         var_to_reg_flt(s2, src, REG_FTMP2);
1883                         d = reg_of_var(iptr->dst, REG_ITMP3);
1884                         M_FCMPOLTD(s1, s2);
1885                         M_FBF(3);
1886                         M_LSUB_IMM(REG_ZERO, 1, d);
1887                         M_BR(4);
1888                         M_NOP;
1889                         M_FCMPEQD(s1, s2);
1890                         M_LADD_IMM(REG_ZERO, 1, d);
1891                         M_CMOVT(REG_ZERO, d);
1892                         store_reg_to_var_int(iptr->dst, d);
1893                         break;
1894
1895
1896                 /* memory operations **************************************************/
1897
1898 #define gen_bound_check \
1899     if (checkbounds) { \
1900         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size)); \
1901         M_CMPULT(s2, REG_ITMP3, REG_ITMP3); \
1902         M_BEQZ(REG_ITMP3, 0); \
1903         codegen_addxboundrefs(mcodeptr, s2); \
1904         M_NOP; \
1905     }
1906
1907                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1908
1909                         var_to_reg_int(s1, src, REG_ITMP1);
1910                         d = reg_of_var(iptr->dst, REG_ITMP3);
1911                         gen_nullptr_check(s1);
1912                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1913                         store_reg_to_var_int(iptr->dst, d);
1914                         break;
1915
1916                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1917
1918                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1919                         var_to_reg_int(s2, src, REG_ITMP2);
1920                         d = reg_of_var(iptr->dst, REG_ITMP3);
1921                         if (iptr->op1 == 0) {
1922                                 gen_nullptr_check(s1);
1923                                 gen_bound_check;
1924                                 }
1925                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1926                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1927                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1928                         store_reg_to_var_int(iptr->dst, d);
1929                         break;
1930
1931                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1932
1933                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1934                         var_to_reg_int(s2, src, REG_ITMP2);
1935                         d = reg_of_var(iptr->dst, REG_ITMP3);
1936                         if (iptr->op1 == 0) {
1937                                 gen_nullptr_check(s1);
1938                                 gen_bound_check;
1939                                 }
1940                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1941                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1942                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1943                         store_reg_to_var_int(iptr->dst, d);
1944                         break;
1945
1946                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1947
1948                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1949                         var_to_reg_int(s2, src, REG_ITMP2);
1950                         d = reg_of_var(iptr->dst, REG_ITMP3);
1951                         if (iptr->op1 == 0) {
1952                                 gen_nullptr_check(s1);
1953                                 gen_bound_check;
1954                                 }
1955                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1956                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1957                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1958                         store_reg_to_var_int(iptr->dst, d);
1959                         break;
1960
1961                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1962
1963                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1964                         var_to_reg_int(s2, src, REG_ITMP2);
1965                         d = reg_of_var(iptr->dst, REG_FTMP3);
1966                         if (iptr->op1 == 0) {
1967                                 gen_nullptr_check(s1);
1968                                 gen_bound_check;
1969                                 }
1970                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1971                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1972                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1973                         store_reg_to_var_flt(iptr->dst, d);
1974                         break;
1975
1976                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1977
1978                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1979                         var_to_reg_int(s2, src, REG_ITMP2);
1980                         d = reg_of_var(iptr->dst, REG_FTMP3);
1981                         if (iptr->op1 == 0) {
1982                                 gen_nullptr_check(s1);
1983                                 gen_bound_check;
1984                                 }
1985                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1986                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1987                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1988                         store_reg_to_var_flt(iptr->dst, d);
1989                         break;
1990
1991                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1992
1993                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1994                         var_to_reg_int(s2, src, REG_ITMP2);
1995                         d = reg_of_var(iptr->dst, REG_ITMP3);
1996                         if (iptr->op1 == 0) {
1997                                 gen_nullptr_check(s1);
1998                                 gen_bound_check;
1999                                 }
2000                         M_AADD(s2, s1, REG_ITMP1);
2001                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2002                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2003                         store_reg_to_var_int(iptr->dst, d);
2004                         break;
2005
2006                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2007
2008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2009                         var_to_reg_int(s2, src, REG_ITMP2);
2010                         d = reg_of_var(iptr->dst, REG_ITMP3);
2011                         if (iptr->op1 == 0) {
2012                                 gen_nullptr_check(s1);
2013                                 gen_bound_check;
2014                                 }
2015                         M_AADD(s2, s1, REG_ITMP1);
2016                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2017                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2018                         store_reg_to_var_int(iptr->dst, d);
2019                         break;
2020
2021                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2022
2023                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2024                         var_to_reg_int(s2, src, REG_ITMP2);
2025                         d = reg_of_var(iptr->dst, REG_ITMP3);
2026                         if (iptr->op1 == 0) {
2027                                 gen_nullptr_check(s1);
2028                                 gen_bound_check;
2029                                 }
2030                         M_AADD(s2, s1, REG_ITMP1);
2031                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2032                         store_reg_to_var_int(iptr->dst, d);
2033                         break;
2034
2035
2036                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2037
2038                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2039                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2040                         if (iptr->op1 == 0) {
2041                                 gen_nullptr_check(s1);
2042                                 gen_bound_check;
2043                                 }
2044                         var_to_reg_int(s3, src, REG_ITMP3);
2045                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
2046                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2047                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2048                         break;
2049
2050                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2051
2052                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2053                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2054                         if (iptr->op1 == 0) {
2055                                 gen_nullptr_check(s1);
2056                                 gen_bound_check;
2057                                 }
2058                         var_to_reg_int(s3, src, REG_ITMP3);
2059                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2060                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2061                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2062                         break;
2063
2064                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2065
2066                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2067                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2068                         if (iptr->op1 == 0) {
2069                                 gen_nullptr_check(s1);
2070                                 gen_bound_check;
2071                                 }
2072                         var_to_reg_int(s3, src, REG_ITMP3);
2073                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2074                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2075                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2076                         break;
2077
2078                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2079
2080                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2081                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2082                         if (iptr->op1 == 0) {
2083                                 gen_nullptr_check(s1);
2084                                 gen_bound_check;
2085                                 }
2086                         var_to_reg_flt(s3, src, REG_FTMP3);
2087                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2088                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2089                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2090                         break;
2091
2092                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2093
2094                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2095                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2096                         if (iptr->op1 == 0) {
2097                                 gen_nullptr_check(s1);
2098                                 gen_bound_check;
2099                                 }
2100                         var_to_reg_flt(s3, src, REG_FTMP3);
2101                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2102                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2103                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2104                         break;
2105
2106                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2107                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2108
2109                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2110                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2111                         if (iptr->op1 == 0) {
2112                                 gen_nullptr_check(s1);
2113                                 gen_bound_check;
2114                                 }
2115                         var_to_reg_int(s3, src, REG_ITMP3);
2116                         M_AADD(s2, s1, REG_ITMP1);
2117                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2118                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2119                         break;
2120
2121                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2122
2123                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2124                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2125                         if (iptr->op1 == 0) {
2126                                 gen_nullptr_check(s1);
2127                                 gen_bound_check;
2128                                 }
2129                         var_to_reg_int(s3, src, REG_ITMP3);
2130                         M_AADD(s2, s1, REG_ITMP1);
2131                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2132                         break;
2133
2134
2135                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2136                                       /* op1 = type, val.a = field address            */
2137
2138                         /* if class isn't yet initialized, do it */
2139                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2140                                 /* call helper function which patches this code */
2141                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2142                                 M_ALD(REG_ITMP1, REG_PV, a);
2143                                 a = dseg_addaddress(asm_check_clinit);
2144                                 M_ALD(REG_ITMP3, REG_PV, a);
2145                                 M_JSR(REG_RA, REG_ITMP3);
2146                                 M_NOP;
2147
2148 #if 0
2149                                 s1 = (s4) ((u1 *) mcodeptr - mcodebase);
2150                                 if (s1 <= 32768) {
2151                                         M_LDA(REG_PV, REG_RA, -s1);
2152                                         M_NOP;
2153                                         M_NOP;
2154
2155                                 } else {
2156                                         s4 ml = -s1, mh = 0;
2157                                         while (ml < -32768) { ml += 65536; mh--; }
2158                                         M_LUI(REG_PV, mh);
2159                                         M_IADD_IMM(REG_PV, ml, REG_PV);
2160                                         M_LADD(REG_PV, REG_RA, REG_PV);
2161                                 }
2162 #endif
2163                         }
2164
2165                         a = dseg_addaddress(&(((fieldinfo *) iptr->val.a)->value));
2166                         M_ALD(REG_ITMP1, REG_PV, a);
2167                         switch (iptr->op1) {
2168                         case TYPE_INT:
2169                                 var_to_reg_int(s2, src, REG_ITMP2);
2170                                 M_IST(s2, REG_ITMP1, 0);
2171                                 break;
2172                         case TYPE_LNG:
2173                                 var_to_reg_int(s2, src, REG_ITMP2);
2174                                 M_LST(s2, REG_ITMP1, 0);
2175                                 break;
2176                         case TYPE_ADR:
2177                                 var_to_reg_int(s2, src, REG_ITMP2);
2178                                 M_AST(s2, REG_ITMP1, 0);
2179                                 break;
2180                         case TYPE_FLT:
2181                                 var_to_reg_flt(s2, src, REG_FTMP2);
2182                                 M_FST(s2, REG_ITMP1, 0);
2183                                 break;
2184                         case TYPE_DBL:
2185                                 var_to_reg_flt(s2, src, REG_FTMP2);
2186                                 M_DST(s2, REG_ITMP1, 0);
2187                                 break;
2188                         default: panic ("internal error");
2189                         }
2190                         break;
2191
2192                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2193                                       /* op1 = type, val.a = field address            */
2194
2195                         /* if class isn't yet initialized, do it */
2196                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2197                                 /* call helper function which patches this code */
2198                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2199                                 M_ALD(REG_ITMP1, REG_PV, a);
2200                                 a = dseg_addaddress(asm_check_clinit);
2201                                 M_ALD(REG_ITMP3, REG_PV, a);
2202                                 M_JSR(REG_RA, REG_ITMP3);
2203                                 M_NOP;
2204
2205 #if 0
2206                                 s1 = (s4) ((u1 *) mcodeptr - mcodebase);
2207                                 if (s1 <= 32768) {
2208                                         M_LDA(REG_PV, REG_RA, -s1);
2209                                         M_NOP;
2210                                         M_NOP;
2211
2212                                 } else {
2213                                         s4 ml = -s1, mh = 0;
2214                                         while (ml < -32768) { ml += 65536; mh--; }
2215                                         M_LUI(REG_PV, mh);
2216                                         M_IADD_IMM(REG_PV, ml, REG_PV);
2217                                         M_LADD(REG_PV, REG_RA, REG_PV);
2218                                 }
2219 #endif
2220                         }
2221
2222                         a = dseg_addaddress(&(((fieldinfo *) iptr->val.a)->value));
2223                         M_ALD(REG_ITMP1, REG_PV, a);
2224                         switch (iptr->op1) {
2225                         case TYPE_INT:
2226                                 d = reg_of_var(iptr->dst, REG_ITMP3);
2227                                 M_ILD(d, REG_ITMP1, 0);
2228                                 store_reg_to_var_int(iptr->dst, d);
2229                                 break;
2230                         case TYPE_LNG:
2231                                 d = reg_of_var(iptr->dst, REG_ITMP3);
2232                                 M_LLD(d, REG_ITMP1, 0);
2233                                 store_reg_to_var_int(iptr->dst, d);
2234                                 break;
2235                         case TYPE_ADR:
2236                                 d = reg_of_var(iptr->dst, REG_ITMP3);
2237                                 M_ALD(d, REG_ITMP1, 0);
2238                                 store_reg_to_var_int(iptr->dst, d);
2239                                 break;
2240                         case TYPE_FLT:
2241                                 d = reg_of_var(iptr->dst, REG_FTMP1);
2242                                 M_FLD(d, REG_ITMP1, 0);
2243                                 store_reg_to_var_flt(iptr->dst, d);
2244                                 break;
2245                         case TYPE_DBL:
2246                                 d = reg_of_var(iptr->dst, REG_FTMP1);
2247                                 M_DLD(d, REG_ITMP1, 0);
2248                                 store_reg_to_var_flt(iptr->dst, d);
2249                                 break;
2250                         default: panic ("internal error");
2251                         }
2252                         break;
2253
2254
2255                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2256                                       /* op1 = type, val.i = field offset             */
2257
2258                         a = ((fieldinfo *)(iptr->val.a))->offset;
2259                         switch (iptr->op1) {
2260                                 case TYPE_INT:
2261                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2262                                         var_to_reg_int(s2, src, REG_ITMP2);
2263                                         gen_nullptr_check(s1);
2264                                         M_IST(s2, s1, a);
2265                                         break;
2266                                 case TYPE_LNG:
2267                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2268                                         var_to_reg_int(s2, src, REG_ITMP2);
2269                                         gen_nullptr_check(s1);
2270                                         M_LST(s2, s1, a);
2271                                         break;
2272                                 case TYPE_ADR:
2273                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2274                                         var_to_reg_int(s2, src, REG_ITMP2);
2275                                         gen_nullptr_check(s1);
2276                                         M_AST(s2, s1, a);
2277                                         break;
2278                                 case TYPE_FLT:
2279                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2280                                         var_to_reg_flt(s2, src, REG_FTMP2);
2281                                         gen_nullptr_check(s1);
2282                                         M_FST(s2, s1, a);
2283                                         break;
2284                                 case TYPE_DBL:
2285                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2286                                         var_to_reg_flt(s2, src, REG_FTMP2);
2287                                         gen_nullptr_check(s1);
2288                                         M_DST(s2, s1, a);
2289                                         break;
2290                                 default: panic ("internal error");
2291                                 }
2292                         break;
2293
2294                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2295                                       /* op1 = type, val.i = field offset             */
2296
2297                         a = ((fieldinfo *)(iptr->val.a))->offset;
2298                         switch (iptr->op1) {
2299                                 case TYPE_INT:
2300                                         var_to_reg_int(s1, src, REG_ITMP1);
2301                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2302                                         gen_nullptr_check(s1);
2303                                         M_ILD(d, s1, a);
2304                                         store_reg_to_var_int(iptr->dst, d);
2305                                         break;
2306                                 case TYPE_LNG:
2307                                         var_to_reg_int(s1, src, REG_ITMP1);
2308                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2309                                         gen_nullptr_check(s1);
2310                                         M_LLD(d, s1, a);
2311                                         store_reg_to_var_int(iptr->dst, d);
2312                                         break;
2313                                 case TYPE_ADR:
2314                                         var_to_reg_int(s1, src, REG_ITMP1);
2315                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2316                                         gen_nullptr_check(s1);
2317                                         M_ALD(d, s1, a);
2318                                         store_reg_to_var_int(iptr->dst, d);
2319                                         break;
2320                                 case TYPE_FLT:
2321                                         var_to_reg_int(s1, src, REG_ITMP1);
2322                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2323                                         gen_nullptr_check(s1);
2324                                         M_FLD(d, s1, a);
2325                                         store_reg_to_var_flt(iptr->dst, d);
2326                                         break;
2327                                 case TYPE_DBL:
2328                                         var_to_reg_int(s1, src, REG_ITMP1);
2329                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2330                                         gen_nullptr_check(s1);
2331                                         M_DLD(d, s1, a);
2332                                         store_reg_to_var_flt(iptr->dst, d);
2333                                         break;
2334                                 default: panic ("internal error");
2335                                 }
2336                         break;
2337
2338
2339                 /* branch operations **************************************************/
2340
2341 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2342
2343                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2344
2345                         var_to_reg_int(s1, src, REG_ITMP1);
2346                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2347                         a = dseg_addaddress(asm_handle_exception);
2348                         M_ALD(REG_ITMP2, REG_PV, a);
2349                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2350                         M_NOP;
2351                         M_NOP;              /* nop ensures that XPC is less than the end */
2352                                             /* of basic block                            */
2353                         ALIGNCODENOP;
2354                         break;
2355
2356                 case ICMD_GOTO:         /* ... ==> ...                                */
2357                                         /* op1 = target JavaVM pc                     */
2358                         M_BR(0);
2359                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2360                         M_NOP;
2361                         ALIGNCODENOP;
2362                         break;
2363
2364                 case ICMD_JSR:          /* ... ==> ...                                */
2365                                         /* op1 = target JavaVM pc                     */
2366
2367                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2368                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2369                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2370                         M_NOP;
2371                         break;
2372
2373                 case ICMD_RET:          /* ... ==> ...                                */
2374                                         /* op1 = local variable                       */
2375                         var = &(locals[iptr->op1][TYPE_ADR]);
2376                         if (var->flags & INMEMORY) {
2377                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2378                                 M_RET(REG_ITMP1);
2379                                 }
2380                         else
2381                                 M_RET(var->regoff);
2382                         M_NOP;
2383                         ALIGNCODENOP;
2384                         break;
2385
2386                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2387                                         /* op1 = target JavaVM pc                     */
2388
2389                         var_to_reg_int(s1, src, REG_ITMP1);
2390                         M_BEQZ(s1, 0);
2391                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2392                         M_NOP;
2393                         break;
2394
2395                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2396                                         /* op1 = target JavaVM pc                     */
2397
2398                         var_to_reg_int(s1, src, REG_ITMP1);
2399                         M_BNEZ(s1, 0);
2400                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2401                         M_NOP;
2402                         break;
2403
2404                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2405                                         /* op1 = target JavaVM pc, val.i = constant   */
2406
2407                         var_to_reg_int(s1, src, REG_ITMP1);
2408                         if (iptr->val.i == 0) {
2409                                 M_BEQZ(s1, 0);
2410                                 }
2411                         else {
2412                                 ICONST(REG_ITMP2, iptr->val.i);
2413                                 M_BEQ(s1, REG_ITMP2, 0);
2414                                 }
2415                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2416                         M_NOP;
2417                         break;
2418
2419                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2420                                         /* op1 = target JavaVM pc, val.i = constant   */
2421
2422                         var_to_reg_int(s1, src, REG_ITMP1);
2423                         if (iptr->val.i == 0) {
2424                                 M_BLTZ(s1, 0);
2425                                 }
2426                         else {
2427                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2428                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2429                                         }
2430                                 else {
2431                                         ICONST(REG_ITMP2, iptr->val.i);
2432                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2433                                         }
2434                                 M_BNEZ(REG_ITMP1, 0);
2435                                 }
2436                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2437                         M_NOP;
2438                         break;
2439
2440                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2441                                         /* op1 = target JavaVM pc, val.i = constant   */
2442
2443                         var_to_reg_int(s1, src, REG_ITMP1);
2444                         if (iptr->val.i == 0) {
2445                                 M_BLEZ(s1, 0);
2446                                 }
2447                         else {
2448                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2449                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2450                                         M_BNEZ(REG_ITMP1, 0);
2451                                         }
2452                                 else {
2453                                         ICONST(REG_ITMP2, iptr->val.i);
2454                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2455                                         M_BEQZ(REG_ITMP1, 0);
2456                                         }
2457                                 }
2458                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2459                         M_NOP;
2460                         break;
2461
2462                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2463                                         /* op1 = target JavaVM pc, val.i = constant   */
2464
2465                         var_to_reg_int(s1, src, REG_ITMP1);
2466                         if (iptr->val.i == 0) {
2467                                 M_BNEZ(s1, 0);
2468                                 }
2469                         else {
2470                                 ICONST(REG_ITMP2, iptr->val.i);
2471                                 M_BNE(s1, REG_ITMP2, 0);
2472                                 }
2473                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2474                         M_NOP;
2475                         break;
2476
2477                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2478                                         /* op1 = target JavaVM pc, val.i = constant   */
2479
2480                         var_to_reg_int(s1, src, REG_ITMP1);
2481                         if (iptr->val.i == 0) {
2482                                 M_BGTZ(s1, 0);
2483                                 }
2484                         else {
2485                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2486                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2487                                         M_BEQZ(REG_ITMP1, 0);
2488                                         }
2489                                 else {
2490                                         ICONST(REG_ITMP2, iptr->val.i);
2491                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2492                                         M_BNEZ(REG_ITMP1, 0);
2493                                         }
2494                                 }
2495                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2496                         M_NOP;
2497                         break;
2498
2499                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2500                                         /* op1 = target JavaVM pc, val.i = constant   */
2501
2502                         var_to_reg_int(s1, src, REG_ITMP1);
2503                         if (iptr->val.i == 0) {
2504                                 M_BGEZ(s1, 0);
2505                                 }
2506                         else {
2507                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2508                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2509                                         }
2510                                 else {
2511                                         ICONST(REG_ITMP2, iptr->val.i);
2512                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2513                                         }
2514                                 M_BEQZ(REG_ITMP1, 0);
2515                                 }
2516                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2517                         M_NOP;
2518                         break;
2519
2520                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2521                                         /* op1 = target JavaVM pc, val.l = constant   */
2522
2523                         var_to_reg_int(s1, src, REG_ITMP1);
2524                         if (iptr->val.l == 0) {
2525                                 M_BEQZ(s1, 0);
2526                                 }
2527                         else {
2528                                 LCONST(REG_ITMP2, iptr->val.l);
2529                                 M_BEQ(s1, REG_ITMP2, 0);
2530                                 }
2531                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2532                         M_NOP;
2533                         break;
2534
2535                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2536                                         /* op1 = target JavaVM pc, val.l = constant   */
2537
2538                         var_to_reg_int(s1, src, REG_ITMP1);
2539                         if (iptr->val.l == 0) {
2540                                 M_BLTZ(s1, 0);
2541                                 }
2542                         else {
2543                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2544                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2545                                         }
2546                                 else {
2547                                         LCONST(REG_ITMP2, iptr->val.l);
2548                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2549                                         }
2550                                 M_BNEZ(REG_ITMP1, 0);
2551                                 }
2552                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2553                         M_NOP;
2554                         break;
2555
2556                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2557                                         /* op1 = target JavaVM pc, val.l = constant   */
2558
2559                         var_to_reg_int(s1, src, REG_ITMP1);
2560                         if (iptr->val.l == 0) {
2561                                 M_BLEZ(s1, 0);
2562                                 }
2563                         else {
2564                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2565                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2566                                         M_BNEZ(REG_ITMP1, 0);
2567                                         }
2568                                 else {
2569                                         LCONST(REG_ITMP2, iptr->val.l);
2570                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2571                                         M_BEQZ(REG_ITMP1, 0);
2572                                         }
2573                                 }
2574                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2575                         M_NOP;
2576                         break;
2577
2578                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2579                                         /* op1 = target JavaVM pc, val.l = constant   */
2580
2581                         var_to_reg_int(s1, src, REG_ITMP1);
2582                         if (iptr->val.l == 0) {
2583                                 M_BNEZ(s1, 0);
2584                                 }
2585                         else {
2586                                 LCONST(REG_ITMP2, iptr->val.l);
2587                                 M_BNE(s1, REG_ITMP2, 0);
2588                                 }
2589                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2590                         M_NOP;
2591                         break;
2592
2593                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2594                                         /* op1 = target JavaVM pc, val.l = constant   */
2595
2596                         var_to_reg_int(s1, src, REG_ITMP1);
2597                         if (iptr->val.l == 0) {
2598                                 M_BGTZ(s1, 0);
2599                                 }
2600                         else {
2601                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2602                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2603                                         M_BEQZ(REG_ITMP1, 0);
2604                                         }
2605                                 else {
2606                                         LCONST(REG_ITMP2, iptr->val.l);
2607                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2608                                         M_BNEZ(REG_ITMP1, 0);
2609                                         }
2610                                 }
2611                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2612                         M_NOP;
2613                         break;
2614
2615                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2616                                         /* op1 = target JavaVM pc, val.l = constant   */
2617
2618                         var_to_reg_int(s1, src, REG_ITMP1);
2619                         if (iptr->val.l == 0) {
2620                                 M_BGEZ(s1, 0);
2621                                 }
2622                         else {
2623                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2624                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2625                                         }
2626                                 else {
2627                                         LCONST(REG_ITMP2, iptr->val.l);
2628                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2629                                         }
2630                                 M_BEQZ(REG_ITMP1, 0);
2631                                 }
2632                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2633                         M_NOP;
2634                         break;
2635
2636                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2637                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2638                 case ICMD_IF_ACMPEQ:
2639
2640                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2641                         var_to_reg_int(s2, src, REG_ITMP2);
2642                         M_BEQ(s1, s2, 0);
2643                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2644                         M_NOP;
2645                         break;
2646
2647                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2648                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2649                 case ICMD_IF_ACMPNE:
2650
2651                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2652                         var_to_reg_int(s2, src, REG_ITMP2);
2653                         M_BNE(s1, s2, 0);
2654                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2655                         M_NOP;
2656                         break;
2657
2658                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2659                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2660
2661                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2662                         var_to_reg_int(s2, src, REG_ITMP2);
2663                         M_CMPLT(s1, s2, REG_ITMP1);
2664                         M_BNEZ(REG_ITMP1, 0);
2665                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2666                         M_NOP;
2667                         break;
2668
2669                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2670                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2671
2672                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2673                         var_to_reg_int(s2, src, REG_ITMP2);
2674                         M_CMPGT(s1, s2, REG_ITMP1);
2675                         M_BNEZ(REG_ITMP1, 0);
2676                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2677                         M_NOP;
2678                         break;
2679
2680                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2681                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2682
2683                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2684                         var_to_reg_int(s2, src, REG_ITMP2);
2685                         M_CMPGT(s1, s2, REG_ITMP1);
2686                         M_BEQZ(REG_ITMP1, 0);
2687                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2688                         M_NOP;
2689                         break;
2690
2691                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2692                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2693
2694                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2695                         var_to_reg_int(s2, src, REG_ITMP2);
2696                         M_CMPLT(s1, s2, REG_ITMP1);
2697                         M_BEQZ(REG_ITMP1, 0);
2698                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2699                         M_NOP;
2700                         break;
2701
2702 #ifdef CONDITIONAL_LOADCONST
2703                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2704
2705                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2706                         break;
2707
2708                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2709                                         /* val.i = constant                           */
2710
2711                         var_to_reg_int(s1, src, REG_ITMP1);
2712                         d = reg_of_var(iptr->dst, REG_ITMP3);
2713                         s3 = iptr->val.i;
2714                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2715                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2716                                         M_CMPEQ(s1, REG_ZERO, d);
2717                                         store_reg_to_var_int(iptr->dst, d);
2718                                         break;
2719                                         }
2720                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2721                                         M_CMPEQ(s1, REG_ZERO, d);
2722                                         M_XOR_IMM(d, 1, d);
2723                                         store_reg_to_var_int(iptr->dst, d);
2724                                         break;
2725                                         }
2726                                 if (s1 == d) {
2727                                         M_MOV(s1, REG_ITMP1);
2728                                         s1 = REG_ITMP1;
2729                                         }
2730                                 ICONST(d, iptr[1].val.i);
2731                                 }
2732                         if ((s3 >= 0) && (s3 <= 255)) {
2733                                 M_CMOVEQ_IMM(s1, s3, d);
2734                                 }
2735                         else {
2736                                 ICONST(REG_ITMP2, s3);
2737                                 M_CMOVEQ(s1, REG_ITMP2, d);
2738                                 }
2739                         store_reg_to_var_int(iptr->dst, d);
2740                         break;
2741
2742                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2743                                         /* val.i = constant                           */
2744
2745                         var_to_reg_int(s1, src, REG_ITMP1);
2746                         d = reg_of_var(iptr->dst, REG_ITMP3);
2747                         s3 = iptr->val.i;
2748                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2749                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2750                                         M_CMPEQ(s1, REG_ZERO, d);
2751                                         store_reg_to_var_int(iptr->dst, d);
2752                                         break;
2753                                         }
2754                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2755                                         M_CMPEQ(s1, REG_ZERO, d);
2756                                         M_XOR_IMM(d, 1, d);
2757                                         store_reg_to_var_int(iptr->dst, d);
2758                                         break;
2759                                         }
2760                                 if (s1 == d) {
2761                                         M_MOV(s1, REG_ITMP1);
2762                                         s1 = REG_ITMP1;
2763                                         }
2764                                 ICONST(d, iptr[1].val.i);
2765                                 }
2766                         if ((s3 >= 0) && (s3 <= 255)) {
2767                                 M_CMOVNE_IMM(s1, s3, d);
2768                                 }
2769                         else {
2770                                 ICONST(REG_ITMP2, s3);
2771                                 M_CMOVNE(s1, REG_ITMP2, d);
2772                                 }
2773                         store_reg_to_var_int(iptr->dst, d);
2774                         break;
2775
2776                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2777                                         /* val.i = constant                           */
2778
2779                         var_to_reg_int(s1, src, REG_ITMP1);
2780                         d = reg_of_var(iptr->dst, REG_ITMP3);
2781                         s3 = iptr->val.i;
2782                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2783                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2784                                         M_CMPLT(s1, REG_ZERO, d);
2785                                         store_reg_to_var_int(iptr->dst, d);
2786                                         break;
2787                                         }
2788                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2789                                         M_CMPLE(REG_ZERO, s1, d);
2790                                         store_reg_to_var_int(iptr->dst, d);
2791                                         break;
2792                                         }
2793                                 if (s1 == d) {
2794                                         M_MOV(s1, REG_ITMP1);
2795                                         s1 = REG_ITMP1;
2796                                         }
2797                                 ICONST(d, iptr[1].val.i);
2798                                 }
2799                         if ((s3 >= 0) && (s3 <= 255)) {
2800                                 M_CMOVLT_IMM(s1, s3, d);
2801                                 }
2802                         else {
2803                                 ICONST(REG_ITMP2, s3);
2804                                 M_CMOVLT(s1, REG_ITMP2, d);
2805                                 }
2806                         store_reg_to_var_int(iptr->dst, d);
2807                         break;
2808
2809                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2810                                         /* val.i = constant                           */
2811
2812                         var_to_reg_int(s1, src, REG_ITMP1);
2813                         d = reg_of_var(iptr->dst, REG_ITMP3);
2814                         s3 = iptr->val.i;
2815                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2816                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2817                                         M_CMPLE(REG_ZERO, s1, d);
2818                                         store_reg_to_var_int(iptr->dst, d);
2819                                         break;
2820                                         }
2821                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2822                                         M_CMPLT(s1, REG_ZERO, d);
2823                                         store_reg_to_var_int(iptr->dst, d);
2824                                         break;
2825                                         }
2826                                 if (s1 == d) {
2827                                         M_MOV(s1, REG_ITMP1);
2828                                         s1 = REG_ITMP1;
2829                                         }
2830                                 ICONST(d, iptr[1].val.i);
2831                                 }
2832                         if ((s3 >= 0) && (s3 <= 255)) {
2833                                 M_CMOVGE_IMM(s1, s3, d);
2834                                 }
2835                         else {
2836                                 ICONST(REG_ITMP2, s3);
2837                                 M_CMOVGE(s1, REG_ITMP2, d);
2838                                 }
2839                         store_reg_to_var_int(iptr->dst, d);
2840                         break;
2841
2842                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2843                                         /* val.i = constant                           */
2844
2845                         var_to_reg_int(s1, src, REG_ITMP1);
2846                         d = reg_of_var(iptr->dst, REG_ITMP3);
2847                         s3 = iptr->val.i;
2848                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2849                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2850                                         M_CMPLT(REG_ZERO, s1, d);
2851                                         store_reg_to_var_int(iptr->dst, d);
2852                                         break;
2853                                         }
2854                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2855                                         M_CMPLE(s1, REG_ZERO, d);
2856                                         store_reg_to_var_int(iptr->dst, d);
2857                                         break;
2858                                         }
2859                                 if (s1 == d) {
2860                                         M_MOV(s1, REG_ITMP1);
2861                                         s1 = REG_ITMP1;
2862                                         }
2863                                 ICONST(d, iptr[1].val.i);
2864                                 }
2865                         if ((s3 >= 0) && (s3 <= 255)) {
2866                                 M_CMOVGT_IMM(s1, s3, d);
2867                                 }
2868                         else {
2869                                 ICONST(REG_ITMP2, s3);
2870                                 M_CMOVGT(s1, REG_ITMP2, d);
2871                                 }
2872                         store_reg_to_var_int(iptr->dst, d);
2873                         break;
2874
2875                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2876                                         /* val.i = constant                           */
2877
2878                         var_to_reg_int(s1, src, REG_ITMP1);
2879                         d = reg_of_var(iptr->dst, REG_ITMP3);
2880                         s3 = iptr->val.i;
2881                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2882                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2883                                         M_CMPLE(s1, REG_ZERO, d);
2884                                         store_reg_to_var_int(iptr->dst, d);
2885                                         break;
2886                                         }
2887                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2888                                         M_CMPLT(REG_ZERO, s1, d);
2889                                         store_reg_to_var_int(iptr->dst, d);
2890                                         break;
2891                                         }
2892                                 if (s1 == d) {
2893                                         M_MOV(s1, REG_ITMP1);
2894                                         s1 = REG_ITMP1;
2895                                         }
2896                                 ICONST(d, iptr[1].val.i);
2897                                 }
2898                         if ((s3 >= 0) && (s3 <= 255)) {
2899                                 M_CMOVLE_IMM(s1, s3, d);
2900                                 }
2901                         else {
2902                                 ICONST(REG_ITMP2, s3);
2903                                 M_CMOVLE(s1, REG_ITMP2, d);
2904                                 }
2905                         store_reg_to_var_int(iptr->dst, d);
2906                         break;
2907 #endif
2908
2909
2910                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2911                 case ICMD_LRETURN:
2912                 case ICMD_ARETURN:
2913
2914 #if defined(USE_THREADS)
2915                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2916                                 s4 disp;
2917                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2918                                 M_ALD(REG_ITMP3, REG_PV, a);
2919                                 M_JSR(REG_RA, REG_ITMP3);
2920                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);    /* delay slot */
2921                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2922                                 M_LDA(REG_PV, REG_RA, disp);
2923                         }
2924 #endif
2925                         var_to_reg_int(s1, src, REG_RESULT);
2926                         M_INTMOVE(s1, REG_RESULT);
2927                         goto nowperformreturn;
2928
2929                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2930                 case ICMD_DRETURN:
2931
2932 #if defined(USE_THREADS)
2933                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2934                                 s4 disp;
2935                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2936                                 M_ALD(REG_ITMP3, REG_PV, a);
2937                                 M_JSR(REG_RA, REG_ITMP3);
2938                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);    /* delay slot */
2939                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2940                                 M_LDA(REG_PV, REG_RA, disp);
2941                         }
2942 #endif
2943                         var_to_reg_flt(s1, src, REG_FRESULT);
2944                         {
2945                                 int t = ((iptr->opc == ICMD_FRETURN) ? TYPE_FLT : TYPE_DBL);
2946                                 M_TFLTMOVE(t, s1, REG_FRESULT);
2947                         }
2948                         goto nowperformreturn;
2949
2950                 case ICMD_RETURN:      /* ...  ==> ...                                */
2951
2952 #if defined(USE_THREADS)
2953                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2954                                 s4 disp;
2955                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2956                                 M_ALD(REG_ITMP3, REG_PV, a);
2957                                 M_JSR(REG_RA, REG_ITMP3);
2958                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);    /* delay slot */
2959                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2960                                 M_LDA(REG_PV, REG_RA, disp);
2961                         }
2962 #endif
2963
2964 nowperformreturn:
2965                         {
2966                         int r, p;
2967
2968                         p = parentargs_base;
2969
2970                         /* restore return address                                         */
2971
2972                         if (!isleafmethod)
2973                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2974
2975                         /* restore saved registers                                        */
2976
2977                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2978                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2979                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2980                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2981
2982                         /* call trace function */
2983
2984                         if (runverbose) {
2985                                 M_LDA (REG_SP, REG_SP, -24);
2986                                 M_LST(REG_RA, REG_SP, 0);
2987                                 M_LST(REG_RESULT, REG_SP, 8);
2988                                 M_DST(REG_FRESULT, REG_SP,16);
2989                                 a = dseg_addaddress (method);
2990                                 M_ALD(argintregs[0], REG_PV, a);
2991                                 M_MOV(REG_RESULT, argintregs[1]);
2992                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2993                                 M_FMOV(REG_FRESULT, argfltregs[3]);
2994                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2995                                 M_ALD(REG_ITMP3, REG_PV, a);
2996                                 M_JSR (REG_RA, REG_ITMP3);
2997                                 M_NOP;
2998                                 M_DLD(REG_FRESULT, REG_SP,16);
2999                                 M_LLD(REG_RESULT, REG_SP, 8);
3000                                 M_LLD(REG_RA, REG_SP, 0);
3001                                 M_LDA (REG_SP, REG_SP, 24);
3002                                 }
3003
3004                         M_RET(REG_RA);
3005
3006                         /* deallocate stack                                               */
3007
3008                         if (parentargs_base)
3009                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3010                         else
3011                                 {M_NOP;}
3012                         ALIGNCODENOP;
3013                         }
3014                         break;
3015
3016
3017                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3018                         {
3019                         s4 i, l, *s4ptr;
3020                         void **tptr;
3021
3022                         tptr = (void **) iptr->target;
3023
3024                         s4ptr = iptr->val.a;
3025                         l = s4ptr[1];                          /* low     */
3026                         i = s4ptr[2];                          /* high    */
3027
3028                         var_to_reg_int(s1, src, REG_ITMP1);
3029                         if (l == 0)
3030                                 {M_INTMOVE(s1, REG_ITMP1);}
3031                         else if (l <= 32768) {
3032                                 M_IADD_IMM(s1, -l, REG_ITMP1);
3033                                 }
3034                         else {
3035                                 ICONST(REG_ITMP2, l);
3036                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3037                                 }
3038                         i = i - l + 1;
3039
3040                         /* range check */
3041
3042                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
3043                         M_BEQZ(REG_ITMP2, 0);
3044                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3045                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
3046
3047                         /* build jump table top down and use address of lowest entry */
3048
3049                         /* s4ptr += 3 + i; */
3050                         tptr += i;
3051
3052                         while (--i >= 0) {
3053                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3054                                 dseg_addtarget((basicblock *) tptr[0]);
3055                                 --tptr;
3056                                 }
3057                         }
3058
3059                         /* length of dataseg after last dseg_addtarget is used by load */
3060
3061                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
3062                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3063                         M_JMP(REG_ITMP2);
3064                         M_NOP;
3065                         ALIGNCODENOP;
3066                         break;
3067
3068
3069                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3070                         {
3071                         s4 i, /*l, */val, *s4ptr;
3072                         void **tptr;
3073
3074                         tptr = (void **) iptr->target;
3075
3076                         s4ptr = iptr->val.a;
3077                         /*l = s4ptr[0];*/                          /* default  */
3078                         i = s4ptr[1];                          /* count    */
3079
3080                         MCODECHECK((i<<2)+8);
3081                         var_to_reg_int(s1, src, REG_ITMP1);
3082                         while (--i >= 0) {
3083                                 s4ptr += 2;
3084                                 ++tptr;
3085
3086                                 val = s4ptr[0];
3087                                 ICONST(REG_ITMP2, val);
3088                                 M_BEQ(s1, REG_ITMP2, 0);
3089                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3090                                 M_NOP;
3091                                 }
3092
3093                         M_BR(0);
3094                         tptr = (void **) iptr->target;
3095                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3096                         M_NOP;
3097                         ALIGNCODENOP;
3098                         break;
3099                         }
3100
3101
3102                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3103                                         /* op1 = return type, val.a = function pointer*/
3104                         s3 = 3;
3105                         goto gen_method;
3106
3107                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3108                                         /* op1 = return type, val.a = function pointer*/
3109                         s3 = 2;
3110                         goto gen_method;
3111
3112                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3113                                         /* op1 = return type, val.a = function pointer*/
3114                         s3 = 1;
3115                         goto gen_method;
3116
3117                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3118                                         /* op1 = arg count, val.a = method pointer    */
3119
3120                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3121                                         /* op1 = arg count, val.a = method pointer    */
3122
3123                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3124                                         /* op1 = arg count, val.a = method pointer    */
3125
3126                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3127                                         /* op1 = arg count, val.a = method pointer    */
3128
3129                         s3 = iptr->op1;
3130
3131 gen_method: {
3132                         methodinfo   *m;
3133                         classinfo    *ci;
3134
3135                         MCODECHECK((s3 << 1) + 64);
3136
3137                         /* copy arguments to registers or stack location                  */
3138
3139                         for (; --s3 >= 0; src = src->prev) {
3140                                 if (src->varkind == ARGVAR)
3141                                         continue;
3142                                 if (IS_INT_LNG_TYPE(src->type)) {
3143                                         if (s3 < INT_ARG_CNT) {
3144                                                 s1 = argintregs[s3];
3145                                                 var_to_reg_int(d, src, s1);
3146                                                 M_INTMOVE(d, s1);
3147                                                 }
3148                                         else  {
3149                                                 var_to_reg_int(d, src, REG_ITMP1);
3150                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3151                                                 }
3152                                         }
3153                                 else
3154                                         if (s3 < FLT_ARG_CNT) {
3155                                                 s1 = argfltregs[s3];
3156                                                 var_to_reg_flt(d, src, s1);
3157                                                 M_TFLTMOVE(src->type,d, s1);
3158                                                 }
3159                                         else {
3160                                                 var_to_reg_flt(d, src, REG_FTMP1);
3161                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3162                                                 }
3163                                 } /* end of for */
3164
3165                         m = iptr->val.a;
3166                         switch (iptr->opc) {
3167                                 case ICMD_BUILTIN3:
3168                                 case ICMD_BUILTIN2:
3169                                 case ICMD_BUILTIN1:
3170                                         a = dseg_addaddress ((void*) (m));
3171                                         M_ALD(REG_ITMP3, REG_PV, a); /* built-in-function pointer */
3172                                         M_JSR (REG_RA, REG_ITMP3);
3173                                         M_NOP;
3174                                         d = iptr->op1;                             /* return type */
3175                                         goto afteractualcall;
3176
3177                                 case ICMD_INVOKESTATIC:
3178                                 case ICMD_INVOKESPECIAL:
3179                                         a = dseg_addaddress (m->stubroutine);
3180
3181                                         M_ALD(REG_PV, REG_PV, a );        /* method pointer in pv */
3182
3183                                         d = m->returntype;
3184                                         goto makeactualcall;
3185
3186                                 case ICMD_INVOKEVIRTUAL:
3187
3188                                         gen_nullptr_check(argintregs[0]);
3189                                         M_ALD(REG_METHODPTR, argintregs[0],
3190                                                                  OFFSET(java_objectheader, vftbl));
3191                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3192                                                                 sizeof(methodptr) * m->vftblindex);
3193
3194                                         d = m->returntype;
3195                                         goto makeactualcall;
3196
3197                                 case ICMD_INVOKEINTERFACE:
3198                                         ci = m->class;
3199
3200                                         gen_nullptr_check(argintregs[0]);
3201                                         M_ALD(REG_METHODPTR, argintregs[0],
3202                                                                  OFFSET(java_objectheader, vftbl));
3203                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3204                                               OFFSET(vftbl, interfacetable[0]) -
3205                                               sizeof(methodptr*) * ci->index);
3206                                         M_ALD(REG_PV, REG_METHODPTR,
3207                                                             sizeof(methodptr) * (m - ci->methods));
3208
3209                                         d = m->returntype;
3210                                         goto makeactualcall;
3211
3212                                 default:
3213                                         d = 0;
3214                                         error ("Unkown ICMD-Command: %d", iptr->opc);
3215                                 }
3216
3217 makeactualcall:
3218
3219                         M_JSR (REG_RA, REG_PV);
3220                         M_NOP;
3221
3222                         /* recompute pv */
3223
3224 afteractualcall:
3225
3226                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3227                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3228                         else {
3229                                 s4 ml = -s1, mh = 0;
3230                                 while (ml < -32768) { ml += 65536; mh--; }
3231                                 M_LUI(REG_PV, mh);
3232                                 M_IADD_IMM(REG_PV, ml, REG_PV);
3233                                 M_LADD(REG_PV, REG_RA, REG_PV);
3234                         }
3235
3236                         /* d contains return type */
3237
3238                         if (d != TYPE_VOID) {
3239                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3240                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3241                                         M_INTMOVE(REG_RESULT, s1);
3242                                         store_reg_to_var_int(iptr->dst, s1);
3243                                         }
3244                                 else {
3245                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3246                                         M_TFLTMOVE(iptr->dst->type, REG_FRESULT, s1);
3247                                         store_reg_to_var_flt(iptr->dst, s1);
3248                                         }
3249                                 }
3250                         }
3251                         break;
3252
3253
3254                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3255
3256                                       /* op1:   0 == array, 1 == class                */
3257                                       /* val.a: (classinfo*) superclass               */
3258
3259 /*          superclass is an interface:
3260  *
3261  *          return (sub != NULL) &&
3262  *                 (sub->vftbl->interfacetablelength > super->index) &&
3263  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3264  *
3265  *          superclass is a class:
3266  *
3267  *          return ((sub != NULL) && (0
3268  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3269  *                  super->vftbl->diffvall));
3270  */
3271
3272                         {
3273                         classinfo *super = (classinfo*) iptr->val.a;
3274
3275 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3276                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3277 #endif
3278                         var_to_reg_int(s1, src, REG_ITMP1);
3279                         d = reg_of_var(iptr->dst, REG_ITMP3);
3280                         if (s1 == d) {
3281                                 M_MOV(s1, REG_ITMP1);
3282                                 s1 = REG_ITMP1;
3283                                 }
3284                         M_CLR(d);
3285                         if (iptr->op1) {                               /* class/interface */
3286                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3287                                         M_BEQZ(s1, 8);
3288                                         M_NOP;
3289                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3290                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3291                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3292                                         M_BLEZ(REG_ITMP2, 3);
3293                                         M_NOP;
3294                                         M_ALD(REG_ITMP1, REG_ITMP1,
3295                                               OFFSET(vftbl, interfacetable[0]) -
3296                                               super->index * sizeof(methodptr*));
3297                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3298                                         }
3299                                 else {                                     /* class           */
3300                                         /*
3301                                         s2 = super->vftbl->diffval;
3302                                         M_BEQZ(s1, 5);
3303                                         M_NOP;
3304                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3305                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3306                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3307                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3308                                         */
3309
3310                                         M_BEQZ(s1, 9);
3311                                         M_NOP;
3312                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3313                     a = dseg_addaddress ((void*) super->vftbl);
3314                     M_ALD(REG_ITMP2, REG_PV, a);
3315 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3316                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3317 #endif
3318                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3319                     M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3320                     M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3321 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3322                                         codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3323 #endif
3324                     M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3325                     M_CMPULT(REG_ITMP2, REG_ITMP1, d);
3326                                         M_XOR_IMM(d, 1, d);
3327
3328                                         }
3329                                 }
3330                         else
3331                                 panic ("internal error: no inlined array instanceof");
3332                         }
3333                         store_reg_to_var_int(iptr->dst, d);
3334                         break;
3335
3336                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3337
3338                                       /* op1:   0 == array, 1 == class                */
3339                                       /* val.a: (classinfo*) superclass               */
3340
3341 /*          superclass is an interface:
3342  *
3343  *          OK if ((sub == NULL) ||
3344  *                 (sub->vftbl->interfacetablelength > super->index) &&
3345  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3346  *
3347  *          superclass is a class:
3348  *
3349  *          OK if ((sub == NULL) || (0
3350  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3351  *                 super->vftbl->diffvall));
3352  */
3353
3354                         {
3355                         classinfo *super = (classinfo*) iptr->val.a;
3356
3357 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3358                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3359 #endif
3360
3361                         d = reg_of_var(iptr->dst, REG_ITMP3);
3362                         var_to_reg_int(s1, src, d);
3363                         if (iptr->op1) {                               /* class/interface */
3364                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3365                                         M_BEQZ(s1, 9);
3366                                         M_NOP;
3367                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3368                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3369                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3370                                         M_BLEZ(REG_ITMP2, 0);
3371                                         codegen_addxcastrefs(mcodeptr);
3372                                         M_NOP;
3373                                         M_ALD(REG_ITMP2, REG_ITMP1,
3374                                               OFFSET(vftbl, interfacetable[0]) -
3375                                               super->index * sizeof(methodptr*));
3376                                         M_BEQZ(REG_ITMP2, 0);
3377                                         codegen_addxcastrefs(mcodeptr);
3378                                         M_NOP;
3379                                         }
3380                                 else {                                     /* class           */
3381
3382                                         /*
3383                                         s2 = super->vftbl->diffval;
3384                                         M_BEQZ(s1, 6 + (s2 != 0));
3385                                         M_NOP;
3386                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3387                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3388                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3389                                         if (s2 == 0) {
3390                                                 M_BNEZ(REG_ITMP1, 0);
3391                                                 }
3392                                         else{
3393                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3394                                                 M_BEQZ(REG_ITMP2, 0);
3395                                                 }
3396                                         */
3397
3398                                         M_BEQZ(s1, 10 + (d == REG_ITMP3));
3399                                         M_NOP;
3400                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3401                     a = dseg_addaddress ((void*) super->vftbl);
3402                     M_ALD(REG_ITMP2, REG_PV, a);
3403 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3404                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3405 #endif
3406                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3407                                         if (d != REG_ITMP3) {
3408                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3409                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3410 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3411                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3412 #endif
3413                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3414                                         } else {
3415                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3416                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3417                                                 M_ALD(REG_ITMP2, REG_PV, a);
3418                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3419 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3420                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3421 #endif
3422                                         }
3423                     M_CMPULT(REG_ITMP2, REG_ITMP1, REG_ITMP2);
3424                                         M_BNEZ(REG_ITMP2, 0);
3425
3426                                         codegen_addxcastrefs(mcodeptr);
3427                                         M_NOP;
3428                                         }
3429                                 }
3430                         else
3431                                 panic ("internal error: no inlined array checkcast");
3432                         }
3433                         M_INTMOVE(s1, d);
3434                         store_reg_to_var_int(iptr->dst, d);
3435                         break;
3436
3437                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3438
3439                         var_to_reg_int(s1, src, REG_ITMP1);
3440                         M_BLTZ(s1, 0);
3441                         codegen_addxcheckarefs(mcodeptr);
3442                         M_NOP;
3443                         break;
3444
3445                 case ICMD_CHECKEXCEPTION:  /* ... ==> ...                             */
3446
3447                         M_BEQZ(REG_RESULT, 0);
3448                         codegen_addxexceptionrefs(mcodeptr);
3449                         M_NOP;
3450                         break;
3451
3452                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3453                                       /* op1 = dimension, val.a = array descriptor    */
3454
3455                         /* check for negative sizes and copy sizes to stack if necessary  */
3456
3457                         MCODECHECK((iptr->op1 << 1) + 64);
3458
3459                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3460                                 var_to_reg_int(s2, src, REG_ITMP1);
3461                                 M_BLTZ(s2, 0);
3462                                 codegen_addxcheckarefs(mcodeptr);
3463                                 M_NOP;
3464
3465                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3466
3467                                 if (src->varkind != ARGVAR) {
3468                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3469                                         }
3470                                 }
3471
3472                         /* a0 = dimension count */
3473
3474                         ICONST(argintregs[0], iptr->op1);
3475
3476                         /* a1 = arraydescriptor */
3477
3478                         a = dseg_addaddress(iptr->val.a);
3479                         M_ALD(argintregs[1], REG_PV, a);
3480
3481                         /* a2 = pointer to dimensions = stack pointer */
3482
3483                         M_INTMOVE(REG_SP, argintregs[2]);
3484
3485                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3486                         M_ALD(REG_ITMP3, REG_PV, a);
3487                         M_JSR(REG_RA, REG_ITMP3);
3488                         M_NOP;
3489                         s1 = (int)((u1*) mcodeptr - mcodebase);
3490                         if (s1 <= 32768)
3491                                 M_LDA (REG_PV, REG_RA, -s1);
3492                         else {
3493                                 panic("To big");
3494                             }
3495                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3496                         M_INTMOVE(REG_RESULT, s1);
3497                         store_reg_to_var_int(iptr->dst, s1);
3498                         break;
3499
3500
3501                 default: error ("Unknown pseudo command: %d", iptr->opc);
3502
3503
3504
3505         } /* switch */
3506
3507         } /* for instruction */
3508
3509         /* copy values to interface registers */
3510
3511         src = bptr->outstack;
3512         len = bptr->outdepth;
3513         MCODECHECK(64+len);
3514         while (src) {
3515                 len--;
3516                 if ((src->varkind != STACKVAR)) {
3517                         s2 = src->type;
3518                         if (IS_FLT_DBL_TYPE(s2)) {
3519                                 var_to_reg_flt(s1, src, REG_FTMP1);
3520                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3521                                         M_TFLTMOVE(s2,s1,interfaces[len][s2].regoff);
3522                                         }
3523                                 else {
3524                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3525                                         }
3526                                 }
3527                         else {
3528                                 var_to_reg_int(s1, src, REG_ITMP1);
3529                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3530                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3531                                         }
3532                                 else {
3533                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3534                                         }
3535                                 }
3536                         }
3537                 src = src->prev;
3538                 }
3539         } /* if (bptr -> flags >= BBREACHED) */
3540         } /* for basic block */
3541
3542         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3543
3544         {
3545         /* generate bound check stubs */
3546
3547         s4 *xcodeptr = NULL;
3548
3549         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3550                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3551                                   xboundrefs->branchpos,
3552                                                   (u1*) mcodeptr - mcodebase);
3553
3554                 MCODECHECK(8);
3555
3556                 M_MOV(xboundrefs->reg, REG_ITMP1);
3557                 M_LADD_IMM(REG_PV, xboundrefs->branchpos - 4, REG_ITMP2_XPC);
3558
3559                 if (xcodeptr != NULL) {
3560                         M_BR(xcodeptr - mcodeptr);
3561                         M_NOP;
3562
3563                 } else {
3564                         xcodeptr = mcodeptr;
3565
3566                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3567                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3568
3569                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3570                         M_ALD(argintregs[0], REG_PV, a);
3571                         M_MOV(REG_ITMP1, argintregs[1]);
3572
3573                         a = dseg_addaddress(new_exception_int);
3574                         M_ALD(REG_ITMP3, REG_PV, a);
3575                         M_JSR(REG_RA, REG_ITMP3);
3576                         M_NOP;
3577                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3578
3579                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3580                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3581
3582                         a = dseg_addaddress(asm_handle_exception);
3583                         M_ALD(REG_ITMP3, REG_PV, a);
3584                         M_JMP(REG_ITMP3);
3585                         M_NOP;
3586                 }
3587         }
3588
3589         /* generate negative array size check stubs */
3590
3591         xcodeptr = NULL;
3592
3593         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3594                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3595                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3596                                                           xcheckarefs->branchpos,
3597                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3598                         continue;
3599                 }
3600
3601                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3602                                   xcheckarefs->branchpos,
3603                                                   (u1*) mcodeptr - mcodebase);
3604
3605                 MCODECHECK(8);
3606
3607                 M_LADD_IMM(REG_PV, xcheckarefs->branchpos - 4, REG_ITMP2_XPC);
3608
3609                 if (xcodeptr != NULL) {
3610                         M_BR(xcodeptr - mcodeptr);
3611                         M_NOP;
3612
3613                 } else {
3614                         xcodeptr = mcodeptr;
3615
3616                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3617                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3618
3619                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3620                         M_ALD(argintregs[0], REG_PV, a);
3621
3622                         a = dseg_addaddress(new_exception);
3623                         M_ALD(REG_ITMP3, REG_PV, a);
3624                         M_JSR(REG_RA, REG_ITMP3);
3625                         M_NOP;
3626                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3627
3628                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3629                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3630
3631                         a = dseg_addaddress(asm_handle_exception);
3632                         M_ALD(REG_ITMP3, REG_PV, a);
3633                         M_JMP(REG_ITMP3);
3634                         M_NOP;
3635                 }
3636         }
3637
3638         /* generate cast check stubs */
3639
3640         xcodeptr = NULL;
3641
3642         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3643                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3644                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3645                                                           xcastrefs->branchpos,
3646                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3647                         continue;
3648                 }
3649
3650                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3651                                   xcastrefs->branchpos,
3652                                                   (u1*) mcodeptr - mcodebase);
3653
3654                 MCODECHECK(8);
3655
3656                 M_LADD_IMM(REG_PV, xcastrefs->branchpos - 4, REG_ITMP2_XPC);
3657
3658                 if (xcodeptr != NULL) {
3659                         M_BR(xcodeptr - mcodeptr);
3660                         M_NOP;
3661
3662                 } else {
3663                         xcodeptr = mcodeptr;
3664
3665                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3666                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3667
3668                         a = dseg_addaddress(string_java_lang_ClassCastException);
3669                         M_ALD(argintregs[0], REG_PV, a);
3670
3671                         a = dseg_addaddress(new_exception);
3672                         M_ALD(REG_ITMP3, REG_PV, a);
3673                         M_JSR(REG_RA, REG_ITMP3);
3674                         M_NOP;
3675                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3676
3677                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3678                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3679
3680                         a = dseg_addaddress(asm_handle_exception);
3681                         M_ALD(REG_ITMP3, REG_PV, a);
3682                         M_JMP(REG_ITMP3);
3683                         M_NOP;
3684                 }
3685         }
3686
3687         /* generate exception check stubs */
3688
3689         xcodeptr = NULL;
3690
3691         for (; xexceptionrefs != NULL; xexceptionrefs = xexceptionrefs->next) {
3692                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3693                         gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3694                                                           xexceptionrefs->branchpos,
3695                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3696                         continue;
3697                 }
3698
3699                 gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3700                                   xexceptionrefs->branchpos,
3701                                                   (u1*) mcodeptr - mcodebase);
3702
3703                 MCODECHECK(8);
3704
3705                 M_LADD_IMM(REG_PV, xexceptionrefs->branchpos - 4, REG_ITMP2_XPC);
3706
3707                 if (xcodeptr != NULL) {
3708                         M_BR(xcodeptr - mcodeptr);
3709                         M_NOP;
3710
3711                 } else {
3712                         xcodeptr = mcodeptr;
3713
3714 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3715                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3716                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3717
3718                         a = dseg_addaddress(builtin_get_exceptionptrptr);
3719                         M_ALD(REG_ITMP3, REG_PV, a);
3720                         M_JSR(REG_RA, REG_ITMP3);
3721                         M_NOP;
3722                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3723
3724                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3725                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3726 #else
3727                         a = dseg_addaddress(&_exceptionptr);
3728                         M_ALD(REG_ITMP3, REG_PV, a);
3729                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3730                         M_AST(REG_ZERO, REG_ITMP3, 0);
3731 #endif
3732
3733                         a = dseg_addaddress(asm_handle_exception);
3734                         M_ALD(REG_ITMP3, REG_PV, a);
3735                         M_JMP(REG_ITMP3);
3736                         M_NOP;
3737                 }
3738         }
3739
3740         /* generate null pointer check stubs */
3741
3742         xcodeptr = NULL;
3743
3744         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3745                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3746                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3747                                                           xnullrefs->branchpos,
3748                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3749                         continue;
3750                 }
3751
3752                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3753                                   xnullrefs->branchpos,
3754                                                   (u1*) mcodeptr - mcodebase);
3755
3756                 MCODECHECK(8);
3757
3758                 M_LADD_IMM(REG_PV, xnullrefs->branchpos - 4, REG_ITMP2_XPC);
3759
3760                 if (xcodeptr != NULL) {
3761                         M_BR(xcodeptr - mcodeptr);
3762                         M_NOP;
3763
3764                 } else {
3765                         xcodeptr = mcodeptr;
3766
3767                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3768                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3769
3770                         a = dseg_addaddress(string_java_lang_NullPointerException);
3771                         M_ALD(argintregs[0], REG_PV, a);
3772
3773                         a = dseg_addaddress(new_exception);
3774                         M_ALD(REG_ITMP3, REG_PV, a);
3775                         M_JSR(REG_RA, REG_ITMP3);
3776                         M_NOP;
3777                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3778
3779                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3780                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3781
3782                         a = dseg_addaddress(asm_handle_exception);
3783                         M_ALD(REG_ITMP3, REG_PV, a);
3784                         M_JMP(REG_ITMP3);
3785                         M_NOP;
3786                 }
3787         }
3788         }
3789
3790         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3791
3792         docacheflush((void*) method->entrypoint,
3793                           ((u1*) mcodeptr - mcodebase));
3794 }
3795
3796
3797 /* function createcompilerstub *************************************************
3798
3799         creates a stub routine which calls the compiler
3800
3801 *******************************************************************************/
3802
3803 #define COMPSTUBSIZE 4
3804
3805 u1 *createcompilerstub(methodinfo *m)
3806 {
3807         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3808         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3809
3810                                             /* code for the stub                  */
3811         M_ALD(REG_PV, REG_PV, 24);          /* load pointer to the compiler       */
3812         M_NOP;
3813         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3814                                                in itmp1 is used as method pointer */
3815         M_NOP;
3816
3817         s[2] = (u8) m;                      /* literals to be adressed            */
3818         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3819
3820         (void) docacheflush((void*) s, (char*) mcodeptr - (char*) s);
3821
3822 #ifdef STATISTICS
3823         count_cstub_len += COMPSTUBSIZE * 8;
3824 #endif
3825
3826         return (u1 *) s;
3827 }
3828
3829
3830 /* function removecompilerstub *************************************************
3831
3832      deletes a compilerstub from memory  (simply by freeing it)
3833
3834 *******************************************************************************/
3835
3836 void removecompilerstub(u1 *stub)
3837 {
3838         CFREE(stub, COMPSTUBSIZE * 8);
3839 }
3840
3841
3842 /* function: createnativestub **************************************************
3843
3844         creates a stub routine which calls a native method
3845
3846 *******************************************************************************/
3847
3848 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3849 #define NATIVESTUBSTACK       2
3850 #define NATIVESTUBTHREADEXTRA 5
3851 #else
3852 #define NATIVESTUBSTACK       1
3853 #define NATIVESTUBTHREADEXTRA 1
3854 #endif
3855
3856 #define NATIVESTUBSIZE      (54 + 4 + NATIVESTUBTHREADEXTRA - 1)
3857 #define NATIVEVERBOSESIZE   (50 + 17)
3858 #define NATIVESTUBOFFSET    9
3859
3860 u1 *createnativestub(functionptr f, methodinfo *m)
3861 {
3862         u8 *s;                              /* memory to hold the stub            */
3863         u8 *cs;
3864         s4 *mcodeptr;                       /* code generation pointer            */
3865         s4 stackframesize = 0;              /* size of stackframe if needed       */
3866         s4 disp;
3867         s4 stubsize;
3868
3869         reg_init();
3870         descriptor2types(m);                /* set paramcount and paramtypes      */
3871
3872         stubsize = runverbose ? NATIVESTUBSIZE + NATIVEVERBOSESIZE : NATIVESTUBSIZE;
3873         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3874         cs = s + NATIVESTUBOFFSET;
3875         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3876
3877         *(cs-1) = (u8) f;                   /* address of native method           */
3878 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3879         *(cs-2) = (u8) &builtin_get_exceptionptrptr;
3880 #else
3881         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3882 #endif
3883         *(cs-3) = (u8) asm_handle_nat_exception;/* addr of asm exception handler  */
3884         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3885         *(cs-5) = (u8) builtin_trace_args;
3886         *(cs-6) = (u8) m;
3887         *(cs-7) = (u8) builtin_displaymethodstop;
3888         *(cs-8) = (u8) m->class;
3889         *(cs-9) = (u8) asm_check_clinit;
3890
3891         M_LDA(REG_SP, REG_SP, -NATIVESTUBSTACK * 8); /* build up stackframe       */
3892         M_LST(REG_RA, REG_SP, 0);           /* store return address               */
3893
3894         /* if function is static, check for initialized */
3895
3896         if (m->flags & ACC_STATIC) {
3897         /* if class isn't yet initialized, do it */
3898                 if (!m->class->initialized) {
3899                         /* call helper function which patches this code */
3900                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
3901                         M_ALD(REG_ITMP3, REG_PV, -9 * 8);     /* asm_check_clinit         */
3902                         M_JSR(REG_RA, REG_ITMP3);
3903                         M_NOP;
3904                 }
3905         }
3906
3907         /* max. 50 instructions */
3908         if (runverbose) {
3909                 int p;
3910                 int t;
3911
3912                 M_LDA(REG_SP, REG_SP, -(18 * 8));
3913                 M_AST(REG_RA, REG_SP, 1 * 8);
3914
3915                 /* save integer argument registers */
3916                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3917                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
3918                 }
3919
3920                 /* save and copy float arguments into integer registers */
3921                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3922                         t = m->paramtypes[p];
3923
3924                         if (IS_FLT_DBL_TYPE(t)) {
3925                                 if (IS_2_WORD_TYPE(t)) {
3926                                         M_DST(argfltregs[p], REG_SP, (10 + p) * 8);
3927                                         M_LLD(argintregs[p], REG_SP, (10 + p) * 8);
3928
3929                                 } else {
3930                                         M_FST(argfltregs[p], REG_SP, (10 + p) * 8);
3931                                         M_ILD(argintregs[p], REG_SP, (10 + p) * 8);
3932                                 }
3933
3934                         } else {
3935                                 M_DST(argfltregs[p], REG_SP, (10 + p) * 8);
3936                         }
3937                 }
3938
3939                 M_ALD(REG_ITMP1, REG_PV, -6 * 8); /* method address                   */
3940                 M_AST(REG_ITMP1, REG_SP, 0);
3941                 M_ALD(REG_ITMP3, REG_PV, -5 * 8); /* builtin_trace_args               */
3942                 M_JSR(REG_RA, REG_ITMP3);
3943                 M_NOP;
3944                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
3945                 M_LDA(REG_PV, REG_RA, disp);
3946
3947                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3948                         M_LLD(argintregs[p], REG_SP,  (2 + p) * 8);
3949                 }
3950
3951                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3952                         t = m->paramtypes[p];
3953
3954                         if (IS_FLT_DBL_TYPE(t)) {
3955                                 if (IS_2_WORD_TYPE(t)) {
3956                                         M_DLD(argfltregs[p], REG_SP, (10 + p) * 8);
3957
3958                                 } else {
3959                                         M_FLD(argfltregs[p], REG_SP, (10 + p) * 8);
3960                                 }
3961
3962                         } else {
3963                                 M_DLD(argfltregs[p], REG_SP, (10 + p) * 8);
3964                         }
3965                 }
3966
3967                 M_ALD(REG_RA, REG_SP, 1 * 8);
3968                 M_LDA(REG_SP, REG_SP, 18 * 8);
3969         }
3970
3971         /* save argument registers on stack -- if we have to */
3972         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
3973                 int i;
3974                 int paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
3975                 int stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
3976
3977                 stackframesize = stackparamcnt + paramshiftcnt;
3978
3979                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
3980
3981                 /* copy stack arguments into new stack frame -- if any */
3982                 for (i = 0; i < stackparamcnt; i++) {
3983                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
3984                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
3985                 }
3986
3987                 if (m->flags & ACC_STATIC) {
3988                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
3989                                 M_DST(argfltregs[5], REG_SP, 1 * 8);
3990                         } else {
3991                                 M_LST(argintregs[5], REG_SP, 1 * 8);
3992                         }
3993
3994                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
3995                                 M_DST(argfltregs[4], REG_SP, 0 * 8);
3996                         } else {
3997                                 M_LST(argintregs[4], REG_SP, 0 * 8);
3998                         }
3999
4000                 } else {
4001                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4002                                 M_DST(argfltregs[5], REG_SP, 0 * 8);
4003                         } else {
4004                                 M_LST(argintregs[5], REG_SP, 0 * 8);
4005                         }
4006                 }
4007         }
4008
4009         if (m->flags & ACC_STATIC) {
4010                 M_MOV(argintregs[5], argintregs[7]);
4011
4012                 M_DMFC1(REG_ITMP1, argfltregs[5]);
4013                 M_DMTC1(REG_ITMP1, argfltregs[7]);
4014
4015                 M_MOV(argintregs[4], argintregs[6]);
4016
4017                 M_DMFC1(REG_ITMP1, argfltregs[4]);
4018                 M_DMTC1(REG_ITMP1, argfltregs[6]);
4019
4020                 M_MOV(argintregs[3], argintregs[5]);
4021                 M_DMFC1(REG_ITMP1, argfltregs[3]);
4022
4023                 M_MOV(argintregs[2], argintregs[4]);
4024                 M_DMTC1(REG_ITMP1, argfltregs[5]);
4025
4026                 M_MOV(argintregs[1], argintregs[3]);
4027                 M_DMFC1(REG_ITMP1, argfltregs[2]);
4028
4029                 M_MOV(argintregs[0], argintregs[2]);
4030                 M_DMTC1(REG_ITMP1, argfltregs[4]);
4031
4032                 M_DMFC1(REG_ITMP1, argfltregs[1]);
4033                 M_DMTC1(REG_ITMP1, argfltregs[3]);
4034
4035                 M_DMFC1(REG_ITMP1, argfltregs[0]);
4036                 M_DMTC1(REG_ITMP1, argfltregs[2]);
4037
4038                 M_ALD(argintregs[1], REG_PV, -8 * 8);
4039
4040         } else {
4041                 M_MOV(argintregs[6], argintregs[7]);
4042
4043                 M_DMFC1(REG_ITMP1, argfltregs[6]);
4044                 M_DMTC1(REG_ITMP1, argfltregs[7]);
4045
4046                 M_MOV(argintregs[5], argintregs[6]);
4047
4048                 M_DMFC1(REG_ITMP1, argfltregs[5]);
4049                 M_DMTC1(REG_ITMP1, argfltregs[6]);
4050
4051                 M_MOV(argintregs[4], argintregs[5]);
4052                 M_DMFC1(REG_ITMP1, argfltregs[4]);
4053
4054                 M_MOV(argintregs[3], argintregs[4]);
4055                 M_DMTC1(REG_ITMP1, argfltregs[5]);
4056
4057                 M_MOV(argintregs[2], argintregs[3]);
4058                 M_DMFC1(REG_ITMP1, argfltregs[3]);
4059
4060                 M_MOV(argintregs[1], argintregs[2]);
4061                 M_DMTC1(REG_ITMP1, argfltregs[4]);
4062
4063                 M_MOV(argintregs[0], argintregs[1]);
4064                 M_DMFC1(REG_ITMP1, argfltregs[2]);
4065
4066                 M_DMTC1(REG_ITMP1, argfltregs[3]);
4067
4068                 M_DMFC1(REG_ITMP1, argfltregs[1]);
4069                 M_DMFC1(REG_ITMP2, argfltregs[0]);
4070
4071                 M_DMTC1(REG_ITMP1, argfltregs[2]);
4072                 M_DMTC1(REG_ITMP2, argfltregs[1]);
4073         }
4074
4075         M_ALD(argintregs[0], REG_PV, -4 * 8); /* load adress of jni_environement  */
4076         M_ALD(REG_ITMP3, REG_PV, -1 * 8);   /* load adress of native method       */
4077         M_JSR(REG_RA, REG_ITMP3);           /* call native method                 */
4078         M_NOP;                              /* delay slot                         */
4079
4080         /* remove stackframe if there is one */
4081         if (stackframesize) {
4082                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4083         }
4084
4085         /* 17 instructions */
4086         if (runverbose) {
4087                 M_LDA(REG_SP, REG_SP, -(3 * 8));
4088                 M_AST(REG_RA, REG_SP, 0 * 8);
4089                 M_LST(REG_RESULT, REG_SP, 1 * 8);
4090                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
4091                 M_ALD(argintregs[0], REG_PV, -6 * 8);
4092                 M_MOV(REG_RESULT, argintregs[1]);
4093                 M_DMFC1(REG_ITMP1, REG_FRESULT);
4094                 M_DMTC1(REG_ITMP1, argfltregs[2]);
4095                 M_DMTC1(REG_ITMP1, argfltregs[3]);
4096                 M_ALD(REG_ITMP3, REG_PV, -7 * 8);/* builtin_displaymethodstop         */
4097                 M_JSR(REG_RA, REG_ITMP3);
4098                 M_NOP;
4099                 disp = -(int) (mcodeptr - (s4*) cs) * 4;
4100                 M_LDA(REG_PV, REG_RA, disp);
4101                 M_ALD(REG_RA, REG_SP, 0 * 8);
4102                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
4103                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
4104                 M_LDA(REG_SP, REG_SP, 3 * 8);
4105         }
4106
4107 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4108         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* builtin_get_exceptionptrptr        */
4109         M_JSR(REG_RA, REG_ITMP3);
4110
4111         /* delay slot */
4112         if (IS_FLT_DBL_TYPE(m->returntype))
4113                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4114         else
4115                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4116         M_MOV(REG_RESULT, REG_ITMP3);
4117         if (IS_FLT_DBL_TYPE(m->returntype))
4118                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4119         else
4120                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4121 #else
4122         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4123 #endif
4124
4125         M_LLD(REG_RA, REG_SP, 0);           /* load return address                */
4126         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4127
4128         M_BNEZ(REG_ITMP1, 2);               /* if no exception then return        */
4129         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8);/*remove stackframe, delay slot*/
4130
4131         M_RET(REG_RA);                      /* return to caller                   */
4132         M_NOP;                              /* delay slot                         */
4133
4134         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4135         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4136
4137         M_JMP(REG_ITMP3);                   /* jump to asm exception handler      */
4138         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4139                                             /* delay slot                         */
4140
4141         (void) docacheflush((void*) cs, (char*) mcodeptr - (char*) cs);
4142
4143 #if 0
4144         dolog_plain("stubsize: %d (for %d params)\n",
4145                                 (int) (mcodeptr - (s4*) s), m->paramcount);
4146 #endif
4147
4148 #ifdef STATISTICS
4149         count_nstub_len += NATIVESTUBSIZE * 8;
4150 #endif
4151
4152         return (u1 *) (s + NATIVESTUBOFFSET);
4153 }
4154
4155
4156 /* function: removenativestub **************************************************
4157
4158     removes a previously created native-stub from memory
4159
4160 *******************************************************************************/
4161
4162 void removenativestub(u1 *stub)
4163 {
4164         CFREE((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4165 }
4166
4167
4168 void docacheflush(u1 *p, long bytelen)
4169 {
4170         u1 *e = p + bytelen;
4171         long psize = sysconf(_SC_PAGESIZE);
4172         p -= (long) p & (psize-1);
4173         e += psize - ((((long) e - 1) & (psize-1)) + 1);
4174         bytelen = e-p;
4175         mprotect(p, bytelen, PROT_READ|PROT_WRITE|PROT_EXEC);
4176 }
4177
4178
4179 /*
4180  * These are local overrides for various environment variables in Emacs.
4181  * Please do not remove this and leave it at the end of the file, where
4182  * Emacs will automagically detect them.
4183  * ---------------------------------------------------------------------
4184  * Local variables:
4185  * mode: c
4186  * indent-tabs-mode: t
4187  * c-basic-offset: 4
4188  * tab-width: 4
4189  * End:
4190  */