src/vm/jit/mips/codegen.c

   1 /* jit/mips/codegen.c - machine code generator for mips
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    Contains the codegenerator for an MIPS (R4000 or higher) processor.
  32    This module generates MIPS machine code for a sequence of
  33    intermediate code commands (ICMDs).
  34
  35    $Id: codegen.c 597 2003-11-09 20:08:18Z twisti $
  36
  37 */
  38
  39
  40 #include <stdio.h>
  41 #include <signal.h>
  42 #include <unistd.h>
  43 #include <sys/mman.h>
  44 #include "types.h"
  45 #include "codegen.h"
  46 #include "jit.h"
  47 #include "reg.h"
  48 #include "builtin.h"
  49 #include "asmpart.h"
  50 #include "jni.h"
  51 #include "loader.h"
  52 #include "tables.h"
  53 #include "native.h"
  54
  55 /* include independent code generation stuff */
  56 #include "codegen.inc"
  57 #include "reg.inc"
  58
  59
  60 /* *****************************************************************************
  61
  62 Datatypes and Register Allocations:
  63 -----------------------------------
  64
  65 On 64-bit-machines (like the MIPS) all operands are stored in the
  66 registers in a 64-bit form, even when the correspondig JavaVM operands
  67 only need 32 bits. This is done by a canonical representation:
  68
  69 32-bit integers are allways stored as sign-extended 64-bit values (this
  70 approach is directly supported by the MIPS architecture and is very easy
  71 to implement).
  72
  73 32-bit-floats are stored in a 64-bit double precision register by simply
  74 expanding the exponent and mantissa with zeroes. (also supported by the
  75 architecture)
  76
  77
  78 Stackframes:
  79
  80 The calling conventions and the layout of the stack is  explained in detail
  81 in the documention file: calling.doc
  82
  83 *******************************************************************************/
  84
  85
  86 /* register descripton - array ************************************************/
  87
  88 /* #define REG_RES   0         reserved register for OS or code generator     */
  89 /* #define REG_RET   1         return value register                          */
  90 /* #define REG_EXC   2         exception value register (only old jit)        */
  91 /* #define REG_SAV   3         (callee) saved register                        */
  92 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  93 /* #define REG_ARG   5         argument register (caller saved)               */
  94
  95 /* #define REG_END   -1        last entry in tables */
  96
  97 int nregdescint[] = {
  98         REG_RES, REG_RES, REG_RET, REG_RES, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
  99         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 100         REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 101         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 102         REG_END };
 103
 104 /* for use of reserved registers, see comment above */
 105
 106 int nregdescfloat[] = {
 107         REG_RET, REG_RES, REG_RES, REG_RES, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 108         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
 109         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 110         REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP,
 111         REG_END };
 112
 113 /* for use of reserved registers, see comment above */
 114
 115
 116 /* parameter allocation mode */
 117
 118 int nreg_parammode = PARAMMODE_NUMBERED;
 119
 120    /* parameter-registers will be allocated by assigning the
 121       1. parameter:   int/float-reg a0
 122       2. parameter:   int/float-reg a1
 123       3. parameter:   int/float-reg a2 ....
 124    */
 125
 126
 127 /* stackframe-infos ***********************************************************/
 128
 129 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 130
 131 /* -> see file 'calling.doc' */
 132
 133
 134 /* additional functions and macros to generate code ***************************/
 135
 136 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 137 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 138
 139
 140 #ifdef STATISTICS
 141 #define COUNT_SPILLS count_spills++
 142 #else
 143 #define COUNT_SPILLS
 144 #endif
 145
 146
 147 /* gen_nullptr_check(objreg) */
 148
 149 #ifdef SOFTNULLPTRCHECK
 150 #define gen_nullptr_check(objreg) \
 151         if (checknull) {\
 152         M_BEQZ((objreg), 0);\
 153         codegen_addxnullrefs(mcodeptr);\
 154         M_NOP;\
 155         }
 156 #else
 157 #define gen_nullptr_check(objreg)
 158 #endif
 159
 160
 161 /* MCODECHECK(icnt) */
 162
 163 #define MCODECHECK(icnt) \
 164         if((mcodeptr+(icnt))>mcodeend)mcodeptr=codegen_increase((u1*)mcodeptr)
 165
 166 /* M_INTMOVE:
 167      generates an integer-move from register a to b.
 168      if a and b are the same int-register, no code will be generated.
 169 */
 170
 171 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
 172
 173
 174 /* M_FLTMOVE:
 175     generates a floating-point-move from register a to b.
 176     if a and b are the same float-register, no code will be generated
 177 */
 178
 179 #define M_FLTMOVE(a,b) {if(a!=b){M_DMOV(a,b);}}
 180
 181 #define M_TFLTMOVE(t,a,b) \
 182         {if(a!=b) \
 183                 if ((t)==TYPE_DBL) \
 184                     {M_DMOV(a,b);} \
 185                 else {M_FMOV(a,b);} \
 186         }
 187
 188 #define M_TFLD(t,a,b,disp) \
 189     if ((t)==TYPE_DBL) \
 190           {M_DLD(a,b,disp);} \
 191     else \
 192           {M_FLD(a,b,disp);}
 193
 194 #define M_TFST(t,a,b,disp) \
 195     if ((t)==TYPE_DBL) \
 196           {M_DST(a,b,disp);} \
 197     else \
 198           {M_FST(a,b,disp);}
 199
 200 #define M_CCFLTMOVE(t1,t2,a,b) \
 201         if ((t1)==(t2)) \
 202           {M_TFLTMOVE(t1,a,b);} \
 203         else \
 204           if ((t1)==TYPE_DBL) \
 205                 {M_CVTDF(a,b);} \
 206           else \
 207                 {M_CVTFD(a,b);}
 208
 209 #define M_CCFLD(t1,t2,a,b,disp) \
 210     if ((t1)==(t2)) \
 211           {M_DLD(a,b,disp);} \
 212         else { \
 213           M_DLD(REG_FTMP1,b,disp); \
 214           if ((t1)==TYPE_DBL) \
 215             {M_CVTDF(REG_FTMP1,a);} \
 216           else \
 217             {M_CVTFD(REG_FTMP1,a);} \
 218         }
 219
 220 #define M_CCFST(t1,t2,a,b,disp) \
 221     if ((t1)==(t2)) \
 222           {M_DST(a,b,disp);} \
 223         else { \
 224           if ((t1)==TYPE_DBL) \
 225             {M_CVTDF(a,REG_FTMP1);} \
 226           else \
 227             {M_CVTFD(a,REG_FTMP1);} \
 228           M_DST(REG_FTMP1,b,disp); \
 229         }
 230
 231
 232 /* var_to_reg_xxx:
 233     this function generates code to fetch data from a pseudo-register
 234     into a real register.
 235     If the pseudo-register has actually been assigned to a real
 236     register, no code will be emitted, since following operations
 237     can use this register directly.
 238
 239     v: pseudoregister to be fetched from
 240     tempregnum: temporary register to be used if v is actually spilled to ram
 241
 242     return: the register number, where the operand can be found after
 243             fetching (this wil be either tempregnum or the register
 244             number allready given to v)
 245 */
 246
 247 #define var_to_reg_int(regnr,v,tempnr) { \
 248         if ((v)->flags & INMEMORY) \
 249                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 250         else regnr=(v)->regoff; \
 251 }
 252
 253
 254 #define var_to_reg_flt(regnr,v,tempnr) { \
 255         if ((v)->flags & INMEMORY) \
 256                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 257         else regnr=(v)->regoff; \
 258 }
 259
 260
 261 /* reg_of_var:
 262     This function determines a register, to which the result of an operation
 263     should go, when it is ultimatively intended to store the result in
 264     pseudoregister v.
 265     If v is assigned to an actual register, this register will be returned.
 266     Otherwise (when v is spilled) this function returns tempregnum.
 267     If not already done, regoff and flags are set in the stack location.
 268 */
 269
 270 static int reg_of_var(stackptr v, int tempregnum)
 271 {
 272         varinfo      *var;
 273
 274         switch (v->varkind) {
 275                 case TEMPVAR:
 276                         if (!(v->flags & INMEMORY))
 277                                 return(v->regoff);
 278                         break;
 279                 case STACKVAR:
 280                         var = &(interfaces[v->varnum][v->type]);
 281                         v->regoff = var->regoff;
 282                         if (!(var->flags & INMEMORY))
 283                                 return(var->regoff);
 284                         break;
 285                 case LOCALVAR:
 286                         var = &(locals[v->varnum][v->type]);
 287                         v->regoff = var->regoff;
 288                         if (!(var->flags & INMEMORY))
 289                                 return(var->regoff);
 290                         break;
 291                 case ARGVAR:
 292                         v->regoff = v->varnum;
 293                         if (IS_FLT_DBL_TYPE(v->type)) {
 294                                 if (v->varnum < fltreg_argnum) {
 295                                         v->regoff = argfltregs[v->varnum];
 296                                         return(argfltregs[v->varnum]);
 297                                         }
 298                                 }
 299                         else
 300                                 if (v->varnum < intreg_argnum) {
 301                                         v->regoff = argintregs[v->varnum];
 302                                         return(argintregs[v->varnum]);
 303                                         }
 304                         v->regoff -= intreg_argnum;
 305                         break;
 306                 }
 307         v->flags |= INMEMORY;
 308         return tempregnum;
 309 }
 310
 311
 312 /* store_reg_to_var_xxx:
 313     This function generates the code to store the result of an operation
 314     back into a spilled pseudo-variable.
 315     If the pseudo-variable has not been spilled in the first place, this
 316     function will generate nothing.
 317
 318     v ............ Pseudovariable
 319     tempregnum ... Number of the temporary registers as returned by
 320                    reg_of_var.
 321 */
 322
 323 #define store_reg_to_var_int(sptr, tempregnum) {       \
 324         if ((sptr)->flags & INMEMORY) {                    \
 325                 COUNT_SPILLS;                                  \
 326                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 327                 }                                              \
 328         }
 329
 330 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 331         if ((sptr)->flags & INMEMORY) {                    \
 332                 COUNT_SPILLS;                                  \
 333                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 334                 }                                              \
 335         }
 336
 337
 338 /* NullPointerException handlers and exception handling initialisation        */
 339
 340 /* NullPointerException signal handler for hardware null pointer check */
 341
 342 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 343 {
 344         sigset_t nsig;
 345         int      instr;
 346         long     faultaddr;
 347
 348         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 349
 350         instr = *((int*)(sigctx->sc_pc));
 351         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 352
 353         if (faultaddr == 0) {
 354                 sigemptyset(&nsig);
 355                 sigaddset(&nsig, sig);
 356                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 357                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 358                                             (long) proto_java_lang_NullPointerException;
 359                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 360                 sigctx->sc_pc = (long) asm_handle_exception;
 361                 }
 362         else {
 363         faultaddr += (long) ((instr << 16) >> 16);
 364                 fprintf(stderr, "faulting address: 0x%lx at 0x%lx\n", (long) faultaddr, (long) sigctx->sc_pc);
 365                 panic("Stack overflow");
 366                 }
 367 }
 368
 369
 370 void init_exceptions(void)
 371 {
 372         struct sigaction sa;
 373         sigset_t unblockmask;
 374
 375         createcalljava();
 376
 377         /* The Boehm GC initialization blocks the SIGSEGV signal. So we do a
 378            dummy allocation here to ensure that the GC is initialized.
 379         */
 380         heap_allocate(1, 0, NULL);
 381
 382         /* install signal handlers we need to convert to exceptions */
 383
 384         sigemptyset(&unblockmask);
 385         sa.sa_flags = 0;
 386         sa.sa_sigaction = catch_NullPointerException;
 387         sigemptyset(&sa.sa_mask);
 388
 389         if (!checknull) {
 390
 391 #if defined(SIGSEGV)
 392                 sigaction(SIGSEGV, &sa, NULL);
 393                 sigaddset(&unblockmask, SIGSEGV);
 394 #endif
 395
 396 #if defined(SIGBUS)
 397                 sigaction(SIGBUS, &sa, NULL);
 398                 sigaddset(&unblockmask, SIGBUS);
 399 #endif
 400         }
 401
 402         sigprocmask(SIG_UNBLOCK, &unblockmask, NULL);
 403 }
 404
 405
 406 /* function gen_mcode **********************************************************
 407
 408         generates machine code
 409
 410 *******************************************************************************/
 411
 412 #define         MethodPointer   -8
 413 #define         FrameSize       -12
 414 #define     IsSync          -16
 415 #define     IsLeaf          -20
 416 #define     IntSave         -24
 417 #define     FltSave         -28
 418 #define     ExTableSize     -32
 419 #define     ExTableStart    -32
 420
 421 #if POINTERSIZE==8
 422 #define     ExEntrySize     -32
 423 #define     ExStartPC       -8
 424 #define     ExEndPC         -16
 425 #define     ExHandlerPC     -24
 426 #define     ExCatchType     -32
 427 #else
 428 #define     ExEntrySize     -16
 429 #define     ExStartPC       -4
 430 #define     ExEndPC         -8
 431 #define     ExHandlerPC     -12
 432 #define     ExCatchType     -16
 433 #endif
 434
 435 void codegen()
 436 {
 437         int  len, s1, s2, s3, d;
 438         s4   a;
 439         s4          *mcodeptr;
 440         stackptr    src;
 441         varinfo     *var;
 442         basicblock  *bptr;
 443         instruction *iptr;
 444         xtable *ex;
 445
 446         {
 447         int p, pa, t, l, r;
 448
 449         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 450
 451         /* space to save used callee saved registers */
 452
 453         savedregs_num += (savintregcnt - maxsavintreguse);
 454         savedregs_num += (savfltregcnt - maxsavfltreguse);
 455
 456         parentargs_base = maxmemuse + savedregs_num;
 457
 458 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 459
 460         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 461                 parentargs_base++;
 462
 463 #endif
 464
 465         /* adjust frame size for 16 byte alignment */
 466
 467         if (parentargs_base & 1)
 468                 parentargs_base++;
 469
 470         /* create method header */
 471
 472 #if POINTERSIZE==4
 473         (void) dseg_addaddress(method);                         /* Filler         */
 474 #endif
 475         (void) dseg_addaddress(method);                         /* MethodPointer  */
 476         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 477
 478 #ifdef USE_THREADS
 479
 480         /* IsSync contains the offset relative to the stack pointer for the
 481            argument of monitor_exit used in the exception handler. Since the
 482            offset could be zero and give a wrong meaning of the flag it is
 483            offset by one.
 484         */
 485
 486         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 487                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 488         else
 489
 490 #endif
 491
 492         (void) dseg_adds4(0);                                   /* IsSync         */
 493
 494         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 495         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 496         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 497         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 498
 499         /* create exception table */
 500
 501         for (ex = extable; ex != NULL; ex = ex->down) {
 502
 503 #ifdef LOOP_DEBUG
 504                 if (ex->start != NULL)
 505                         printf("adding start - %d - ", ex->start->debug_nr);
 506                 else {
 507                         printf("PANIC - start is NULL");
 508                         exit(-1);
 509                 }
 510 #endif
 511
 512                 dseg_addtarget(ex->start);
 513
 514 #ifdef LOOP_DEBUG
 515                 if (ex->end != NULL)
 516                         printf("adding end - %d - ", ex->end->debug_nr);
 517                 else {
 518                         printf("PANIC - end is NULL");
 519                         exit(-1);
 520                 }
 521 #endif
 522
 523                 dseg_addtarget(ex->end);
 524
 525 #ifdef LOOP_DEBUG
 526                 if (ex->handler != NULL)
 527                         printf("adding handler - %d\n", ex->handler->debug_nr);
 528                 else {
 529                         printf("PANIC - handler is NULL");
 530                         exit(-1);
 531                 }
 532 #endif
 533
 534                 dseg_addtarget(ex->handler);
 535
 536                 (void) dseg_addaddress(ex->catchtype);
 537                 }
 538
 539         /* initialize mcode variables */
 540
 541         mcodeptr = (s4*) mcodebase;
 542         mcodeend = (s4*) (mcodebase + mcodesize);
 543         MCODECHECK(128 + mparamcount);
 544
 545         /* create stack frame (if necessary) */
 546
 547         if (parentargs_base)
 548                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 549
 550         /* save return address and used callee saved registers */
 551
 552         p = parentargs_base;
 553         if (!isleafmethod)
 554                 {p--;  M_LST (REG_RA, REG_SP, 8*p);}
 555         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 556                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 557         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 558                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 559
 560         /* save monitorenter argument */
 561
 562 #ifdef USE_THREADS
 563         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 564                 if (method->flags & ACC_STATIC) {
 565                         p = dseg_addaddress (class);
 566                         M_ALD(REG_ITMP1, REG_PV, p);
 567                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 568                         }
 569                 else {
 570                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 571                         }
 572                 }
 573 #endif
 574
 575         /* copy argument registers to stack and call trace function with pointer
 576            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 577         */
 578
 579         if (runverbose) {
 580                 M_LDA (REG_SP, REG_SP, -(18*8));
 581
 582                 M_LST(REG_RA,        REG_SP,  1*8);
 583
 584                 M_LST(argintregs[0], REG_SP,  2*8);
 585                 M_LST(argintregs[1], REG_SP,  3*8);
 586                 M_LST(argintregs[2], REG_SP,  4*8);
 587                 M_LST(argintregs[3], REG_SP,  5*8);
 588                 M_LST(argintregs[4], REG_SP,  6*8);
 589                 M_LST(argintregs[5], REG_SP,  7*8);
 590                 M_LST(argintregs[6], REG_SP,  8*8);
 591                 M_LST(argintregs[7], REG_SP,  9*8);
 592
 593                 M_DST(argfltregs[0], REG_SP, 10*8);
 594                 M_DST(argfltregs[1], REG_SP, 11*8);
 595                 M_DST(argfltregs[2], REG_SP, 12*8);
 596                 M_DST(argfltregs[3], REG_SP, 13*8);
 597                 M_DST(argfltregs[4], REG_SP, 14*8);
 598                 M_DST(argfltregs[5], REG_SP, 15*8);
 599                 M_DST(argfltregs[6], REG_SP, 16*8);
 600                 M_DST(argfltregs[7], REG_SP, 17*8);
 601
 602                 p = dseg_addaddress (method);
 603                 M_ALD(REG_ITMP1, REG_PV, p);
 604                 M_LST(REG_ITMP1, REG_SP, 0);
 605                 p = dseg_addaddress ((void*) (builtin_trace_args));
 606                 M_ALD(REG_ITMP3, REG_PV, p);
 607                 M_JSR(REG_RA, REG_ITMP3);
 608                 M_NOP;
 609
 610                 M_LLD(REG_RA,        REG_SP,  1*8);
 611
 612                 M_LLD(argintregs[0], REG_SP,  2*8);
 613                 M_LLD(argintregs[1], REG_SP,  3*8);
 614                 M_LLD(argintregs[2], REG_SP,  4*8);
 615                 M_LLD(argintregs[3], REG_SP,  5*8);
 616                 M_LLD(argintregs[4], REG_SP,  6*8);
 617                 M_LLD(argintregs[5], REG_SP,  7*8);
 618                 M_LLD(argintregs[6], REG_SP,  8*8);
 619                 M_LLD(argintregs[7], REG_SP,  9*8);
 620
 621                 M_DLD(argfltregs[0], REG_SP, 10*8);
 622                 M_DLD(argfltregs[1], REG_SP, 11*8);
 623                 M_DLD(argfltregs[2], REG_SP, 12*8);
 624                 M_DLD(argfltregs[3], REG_SP, 13*8);
 625                 M_DLD(argfltregs[4], REG_SP, 14*8);
 626                 M_DLD(argfltregs[5], REG_SP, 15*8);
 627                 M_DLD(argfltregs[6], REG_SP, 16*8);
 628                 M_DLD(argfltregs[7], REG_SP, 17*8);
 629
 630                 M_LDA (REG_SP, REG_SP, 18*8);
 631                 }
 632
 633         /* take arguments out of register or stack frame */
 634
 635         for (p = 0, l = 0; p < mparamcount; p++) {
 636                 t = mparamtypes[p];
 637                 var = &(locals[l][t]);
 638                 l++;
 639                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 640                         l++;
 641                 if (var->type < 0)
 642                         continue;
 643                 r = var->regoff;
 644                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 645                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 646                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 647                                         {M_INTMOVE (argintregs[p], r);}
 648                                 else                                 /* reg arg -> spilled    */
 649                                         M_LST (argintregs[p], REG_SP, 8 * r);
 650                                 }
 651                         else {                                   /* stack arguments       */
 652                                 pa = p - INT_ARG_CNT;
 653                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 654                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 655                                 else {                               /* stack arg -> spilled  */
 656                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 657                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 658                                         }
 659                                 }
 660                         }
 661                 else {                                       /* floating args         */
 662                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 663                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 664                                         {M_TFLTMOVE (var->type, argfltregs[p], r);}
 665                                 else                                             /* reg arg -> spilled    */
 666                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 667                                 }
 668                         else {                                   /* stack arguments       */
 669                                 pa = p - FLT_ARG_CNT;
 670                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 671                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 672                                 } else {                             /* stack-arg -> spilled  */
 673                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 674                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 675                                         }
 676                                 }
 677                         }
 678                 }  /* end for */
 679
 680         /* call trace function */
 681
 682 #if 0
 683         if (runverbose && !isleafmethod) {
 684                 M_LDA (REG_SP, REG_SP, -8);
 685                 p = dseg_addaddress (method);
 686                 M_ALD(REG_ITMP1, REG_PV, p);
 687                 M_AST(REG_ITMP1, REG_SP, 0);
 688                 p = dseg_addaddress ((void*) (builtin_trace_args));
 689                 M_ALD(REG_ITMP3, REG_PV, p);
 690                 M_JSR(REG_RA, REG_ITMP3);
 691                 M_NOP;
 692                 M_LDA(REG_SP, REG_SP, 8);
 693                 }
 694 #endif
 695
 696         /* call monitorenter function */
 697
 698 #ifdef USE_THREADS
 699         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 700                 int disp;
 701                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 702                 M_ALD(REG_ITMP3, REG_PV, p);
 703                 M_JSR(REG_RA, REG_ITMP3);
 704                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 705                 disp = -(int)((u1*) mcodeptr - mcodebase);
 706                 M_LDA(REG_PV, REG_RA, disp);
 707                 }
 708 #endif
 709         }
 710
 711         /* end of header generation */
 712
 713         /* walk through all basic blocks */
 714         for (bptr = block; bptr != NULL; bptr = bptr->next) {
 715
 716                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 717
 718                 if (bptr->flags >= BBREACHED) {
 719
 720                 /* branch resolving */
 721
 722                 {
 723                 branchref *brefs;
 724                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 725                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 726                                           brefs->branchpos, bptr->mpc);
 727                         }
 728                 }
 729
 730                 /* copy interface registers to their destination */
 731
 732                 src = bptr->instack;
 733                 len = bptr->indepth;
 734                 MCODECHECK(64+len);
 735                 while (src != NULL) {
 736                         len--;
 737                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 738                                 d = reg_of_var(src, REG_ITMP1);
 739                                 M_INTMOVE(REG_ITMP1, d);
 740                                 store_reg_to_var_int(src, d);
 741                                 }
 742                         else {
 743                                 d = reg_of_var(src, REG_IFTMP);
 744                                 if ((src->varkind != STACKVAR)) {
 745                                         s2 = src->type;
 746                                         if (IS_FLT_DBL_TYPE(s2)) {
 747                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 748                                                         s1 = interfaces[len][s2].regoff;
 749                                                         M_TFLTMOVE(s2,s1,d);
 750                                                         }
 751                                                 else {
 752                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 753                                                         }
 754                                                 store_reg_to_var_flt(src, d);
 755                                                 }
 756                                         else {
 757                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 758                                                         s1 = interfaces[len][s2].regoff;
 759                                                         M_INTMOVE(s1,d);
 760                                                         }
 761                                                 else {
 762                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 763                                                         }
 764                                                 store_reg_to_var_int(src, d);
 765                                                 }
 766                                         }
 767                                 }
 768                         src = src->prev;
 769                         }
 770
 771                 /* walk through all instructions */
 772
 773                 src = bptr->instack;
 774                 len = bptr->icount;
 775                 for (iptr = bptr->iinstr;
 776                     len > 0;
 777                     src = iptr->dst, len--, iptr++) {
 778
 779         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 780         switch (iptr->opc) {
 781
 782                 case ICMD_NOP:        /* ...  ==> ...                                 */
 783                         break;
 784
 785                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 786
 787                         var_to_reg_int(s1, src, REG_ITMP1);
 788                         M_BEQZ(s1, 0);
 789                         codegen_addxnullrefs(mcodeptr);
 790                         M_NOP;
 791                         break;
 792
 793                 /* constant operations ************************************************/
 794
 795 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 796                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 797                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 798
 799 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 800                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 801                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 802
 803                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 804                                       /* op1 = 0, val.i = constant                    */
 805
 806                         d = reg_of_var(iptr->dst, REG_ITMP1);
 807                         ICONST(d, iptr->val.i);
 808                         store_reg_to_var_int(iptr->dst, d);
 809                         break;
 810
 811                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 812                                       /* op1 = 0, val.l = constant                    */
 813
 814                         d = reg_of_var(iptr->dst, REG_ITMP1);
 815                         LCONST(d, iptr->val.l);
 816                         store_reg_to_var_int(iptr->dst, d);
 817                         break;
 818
 819                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 820                                       /* op1 = 0, val.f = constant                    */
 821
 822                         d = reg_of_var (iptr->dst, REG_FTMP1);
 823                         a = dseg_addfloat (iptr->val.f);
 824                         M_FLD(d, REG_PV, a);
 825                         store_reg_to_var_flt (iptr->dst, d);
 826                         break;
 827
 828                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 829                                       /* op1 = 0, val.d = constant                    */
 830
 831                         d = reg_of_var (iptr->dst, REG_FTMP1);
 832                         a = dseg_adddouble (iptr->val.d);
 833                         M_DLD(d, REG_PV, a);
 834                         store_reg_to_var_flt (iptr->dst, d);
 835                         break;
 836
 837                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 838                                       /* op1 = 0, val.a = constant                    */
 839
 840                         d = reg_of_var(iptr->dst, REG_ITMP1);
 841                         if (iptr->val.a) {
 842                                 a = dseg_addaddress (iptr->val.a);
 843                                 M_ALD(d, REG_PV, a);
 844                                 }
 845                         else {
 846                                 M_INTMOVE(REG_ZERO, d);
 847                                 }
 848                         store_reg_to_var_int(iptr->dst, d);
 849                         break;
 850
 851
 852                 /* load/store operations **********************************************/
 853
 854                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 855                 case ICMD_LLOAD:      /* op1 = local variable                         */
 856                 case ICMD_ALOAD:
 857
 858                         d = reg_of_var(iptr->dst, REG_ITMP1);
 859                         if ((iptr->dst->varkind == LOCALVAR) &&
 860                             (iptr->dst->varnum == iptr->op1))
 861                                 break;
 862                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 863                         if (var->flags & INMEMORY)
 864                                 M_LLD(d, REG_SP, 8 * var->regoff);
 865                         else
 866                                 {M_INTMOVE(var->regoff,d);}
 867                         store_reg_to_var_int(iptr->dst, d);
 868                         break;
 869
 870                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 871                 case ICMD_DLOAD:      /* op1 = local variable                         */
 872
 873                         d = reg_of_var(iptr->dst, REG_FTMP1);
 874                         if ((iptr->dst->varkind == LOCALVAR) &&
 875                             (iptr->dst->varnum == iptr->op1))
 876                                 break;
 877                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 878                         {
 879                                 int t2 = ((iptr->opc == ICMD_FLOAD) ? TYPE_FLT : TYPE_DBL);
 880                                 if (var->flags & INMEMORY)
 881                                         {M_CCFLD(var->type,t2,d, REG_SP, 8 * var->regoff);}
 882                                 else
 883                                         {M_CCFLTMOVE(var->type,t2,var->regoff,d);}
 884                         }
 885                         store_reg_to_var_flt(iptr->dst, d);
 886                         break;
 887
 888
 889                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 890                 case ICMD_LSTORE:     /* op1 = local variable                         */
 891                 case ICMD_ASTORE:
 892
 893                         if ((src->varkind == LOCALVAR) &&
 894                             (src->varnum == iptr->op1))
 895                                 break;
 896                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 897                         if (var->flags & INMEMORY) {
 898                                 var_to_reg_int(s1, src, REG_ITMP1);
 899                                 M_LST(s1, REG_SP, 8 * var->regoff);
 900                                 }
 901                         else {
 902                                 var_to_reg_int(s1, src, var->regoff);
 903                                 M_INTMOVE(s1, var->regoff);
 904                                 }
 905                         break;
 906
 907                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 908                 case ICMD_DSTORE:     /* op1 = local variable                         */
 909
 910                         if ((src->varkind == LOCALVAR) &&
 911                             (src->varnum == iptr->op1))
 912                                 break;
 913                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 914                         {
 915                                 int t1 = ((iptr->opc == ICMD_FSTORE) ? TYPE_FLT : TYPE_DBL);
 916                                 if (var->flags & INMEMORY) {
 917                                         var_to_reg_flt(s1, src, REG_FTMP1);
 918                                         M_CCFST(t1,var->type,s1, REG_SP, 8 * var->regoff);
 919                                         }
 920                                 else {
 921                                         var_to_reg_flt(s1, src, var->regoff);
 922                                         M_CCFLTMOVE(t1,var->type,s1, var->regoff);
 923                                         }
 924                         }
 925                         break;
 926
 927
 928                 /* pop/dup/swap operations ********************************************/
 929
 930                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 931
 932                 case ICMD_POP:        /* ..., value  ==> ...                          */
 933                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 934                         break;
 935
 936 #define M_COPY(from,to) \
 937                         d = reg_of_var(to, REG_IFTMP); \
 938                         if ((from->regoff != to->regoff) || \
 939                             ((from->flags ^ to->flags) & INMEMORY)) { \
 940                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 941                                         var_to_reg_flt(s1, from, d); \
 942                                         M_TFLTMOVE(from->type,s1,d); \
 943                                         store_reg_to_var_flt(to, d); \
 944                                         }\
 945                                 else { \
 946                                         var_to_reg_int(s1, from, d); \
 947                                         M_INTMOVE(s1,d); \
 948                                         store_reg_to_var_int(to, d); \
 949                                         }\
 950                                 }
 951
 952                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 953                         M_COPY(src, iptr->dst);
 954                         break;
 955
 956                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 957
 958                         M_COPY(src,       iptr->dst->prev->prev);
 959
 960                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 961
 962                         M_COPY(src,       iptr->dst);
 963                         M_COPY(src->prev, iptr->dst->prev);
 964                         break;
 965
 966                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 967
 968                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 969
 970                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 971
 972                         M_COPY(src,             iptr->dst);
 973                         M_COPY(src->prev,       iptr->dst->prev);
 974                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 975                         M_COPY(src, iptr->dst->prev->prev->prev);
 976                         break;
 977
 978                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 979
 980                         M_COPY(src,                   iptr->dst);
 981                         M_COPY(src->prev,             iptr->dst->prev);
 982                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 983                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 984                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 985                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 986                         break;
 987
 988                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 989
 990                         M_COPY(src, iptr->dst->prev);
 991                         M_COPY(src->prev, iptr->dst);
 992                         break;
 993
 994
 995                 /* integer operations *************************************************/
 996
 997                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 998
 999                         var_to_reg_int(s1, src, REG_ITMP1);
1000                         d = reg_of_var(iptr->dst, REG_ITMP3);
1001                         M_ISUB(REG_ZERO, s1, d);
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
1006
1007                         var_to_reg_int(s1, src, REG_ITMP1);
1008                         d = reg_of_var(iptr->dst, REG_ITMP3);
1009                         M_LSUB(REG_ZERO, s1, d);
1010                         store_reg_to_var_int(iptr->dst, d);
1011                         break;
1012
1013                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
1014
1015                         var_to_reg_int(s1, src, REG_ITMP1);
1016                         d = reg_of_var(iptr->dst, REG_ITMP3);
1017                         M_INTMOVE(s1, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
1022
1023                         var_to_reg_int(s1, src, REG_ITMP1);
1024                         d = reg_of_var(iptr->dst, REG_ITMP3);
1025                         M_ISLL_IMM(s1, 0, d );
1026                         store_reg_to_var_int(iptr->dst, d);
1027                         break;
1028
1029                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
1030
1031                         var_to_reg_int(s1, src, REG_ITMP1);
1032                         d = reg_of_var(iptr->dst, REG_ITMP3);
1033                         M_LSLL_IMM(s1, 56, d);
1034                         M_LSRA_IMM( d, 56, d);
1035                         store_reg_to_var_int(iptr->dst, d);
1036                         break;
1037
1038                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
1039
1040                         var_to_reg_int(s1, src, REG_ITMP1);
1041                         d = reg_of_var(iptr->dst, REG_ITMP3);
1042             M_CZEXT(s1, d);
1043                         store_reg_to_var_int(iptr->dst, d);
1044                         break;
1045
1046                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
1047
1048                         var_to_reg_int(s1, src, REG_ITMP1);
1049                         d = reg_of_var(iptr->dst, REG_ITMP3);
1050                         M_LSLL_IMM(s1, 48, d);
1051                         M_LSRA_IMM( d, 48, d);
1052                         store_reg_to_var_int(iptr->dst, d);
1053                         break;
1054
1055
1056                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1057
1058                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1059                         var_to_reg_int(s2, src, REG_ITMP2);
1060                         d = reg_of_var(iptr->dst, REG_ITMP3);
1061                         M_IADD(s1, s2, d);
1062                         store_reg_to_var_int(iptr->dst, d);
1063                         break;
1064
1065                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1066                                       /* val.i = constant                             */
1067
1068                         var_to_reg_int(s1, src, REG_ITMP1);
1069                         d = reg_of_var(iptr->dst, REG_ITMP3);
1070                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
1071                                 M_IADD_IMM(s1, iptr->val.i, d);
1072                                 }
1073                         else {
1074                                 ICONST(REG_ITMP2, iptr->val.i);
1075                                 M_IADD(s1, REG_ITMP2, d);
1076                                 }
1077                         store_reg_to_var_int(iptr->dst, d);
1078                         break;
1079
1080                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1081
1082                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1083                         var_to_reg_int(s2, src, REG_ITMP2);
1084                         d = reg_of_var(iptr->dst, REG_ITMP3);
1085                         M_LADD(s1, s2, d);
1086                         store_reg_to_var_int(iptr->dst, d);
1087                         break;
1088
1089                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1090                                       /* val.l = constant                             */
1091
1092                         var_to_reg_int(s1, src, REG_ITMP1);
1093                         d = reg_of_var(iptr->dst, REG_ITMP3);
1094                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
1095                                 M_LADD_IMM(s1, iptr->val.l, d);
1096                                 }
1097                         else {
1098                                 LCONST(REG_ITMP2, iptr->val.l);
1099                                 M_LADD(s1, REG_ITMP2, d);
1100                                 }
1101                         store_reg_to_var_int(iptr->dst, d);
1102                         break;
1103
1104                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1105
1106                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1107                         var_to_reg_int(s2, src, REG_ITMP2);
1108                         d = reg_of_var(iptr->dst, REG_ITMP3);
1109                         M_ISUB(s1, s2, d);
1110                         store_reg_to_var_int(iptr->dst, d);
1111                         break;
1112
1113                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1114                                       /* val.i = constant                             */
1115
1116                         var_to_reg_int(s1, src, REG_ITMP1);
1117                         d = reg_of_var(iptr->dst, REG_ITMP3);
1118                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
1119                                 M_IADD_IMM(s1, -iptr->val.i, d);
1120                                 }
1121                         else {
1122                                 ICONST(REG_ITMP2, iptr->val.i);
1123                                 M_ISUB(s1, REG_ITMP2, d);
1124                                 }
1125                         store_reg_to_var_int(iptr->dst, d);
1126                         break;
1127
1128                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1129
1130                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1131                         var_to_reg_int(s2, src, REG_ITMP2);
1132                         d = reg_of_var(iptr->dst, REG_ITMP3);
1133                         M_LSUB(s1, s2, d);
1134                         store_reg_to_var_int(iptr->dst, d);
1135                         break;
1136
1137                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1138                                       /* val.l = constant                             */
1139
1140                         var_to_reg_int(s1, src, REG_ITMP1);
1141                         d = reg_of_var(iptr->dst, REG_ITMP3);
1142                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
1143                                 M_LADD_IMM(s1, -iptr->val.l, d);
1144                                 }
1145                         else {
1146                                 LCONST(REG_ITMP2, iptr->val.l);
1147                                 M_LSUB(s1, REG_ITMP2, d);
1148                                 }
1149                         store_reg_to_var_int(iptr->dst, d);
1150                         break;
1151
1152                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1153
1154                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1155                         var_to_reg_int(s2, src, REG_ITMP2);
1156                         d = reg_of_var(iptr->dst, REG_ITMP3);
1157                         M_IMUL(s1, s2);
1158                         M_MFLO(d);
1159                         M_NOP;
1160                         M_NOP;
1161                         store_reg_to_var_int(iptr->dst, d);
1162                         break;
1163
1164                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1165                                       /* val.i = constant                             */
1166
1167                         var_to_reg_int(s1, src, REG_ITMP1);
1168                         d = reg_of_var(iptr->dst, REG_ITMP3);
1169                         ICONST(REG_ITMP2, iptr->val.i);
1170                         M_IMUL(s1, REG_ITMP2);
1171                         M_MFLO(d);
1172                         M_NOP;
1173                         M_NOP;
1174                         store_reg_to_var_int(iptr->dst, d);
1175                         break;
1176
1177                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1178
1179                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1180                         var_to_reg_int(s2, src, REG_ITMP2);
1181                         d = reg_of_var(iptr->dst, REG_ITMP3);
1182                         M_LMUL(s1, s2);
1183                         M_MFLO(d);
1184                         M_NOP;
1185                         M_NOP;
1186                         store_reg_to_var_int(iptr->dst, d);
1187                         break;
1188
1189                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1190                                       /* val.l = constant                             */
1191
1192                         var_to_reg_int(s1, src, REG_ITMP1);
1193                         d = reg_of_var(iptr->dst, REG_ITMP3);
1194                         LCONST(REG_ITMP2, iptr->val.l);
1195                         M_LMUL(s1, REG_ITMP2);
1196                         M_MFLO(d);
1197                         M_NOP;
1198                         M_NOP;
1199                         store_reg_to_var_int(iptr->dst, d);
1200                         break;
1201
1202                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1203
1204                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1205                         var_to_reg_int(s2, src, REG_ITMP2);
1206                         d = reg_of_var(iptr->dst, REG_ITMP3);
1207                         M_IDIV(s1, s2);
1208                         M_MFLO(d);
1209                         M_NOP;
1210                         M_NOP;
1211                         store_reg_to_var_int(iptr->dst, d);
1212                         break;
1213 #if 0
1214                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
1215                                       /* val.i = constant                             */
1216
1217                         var_to_reg_int(s1, src, REG_ITMP1);
1218                         d = reg_of_var(iptr->dst, REG_ITMP3);
1219                         ICONST(REG_ITMP2, iptr->val.i);
1220                         M_IDIV(s1, REG_ITMP2);
1221                         M_MFLO(d);
1222                         M_NOP;
1223                         M_NOP;
1224                         store_reg_to_var_int(iptr->dst, d);
1225                         break;
1226 #endif
1227                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1228
1229                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1230                         var_to_reg_int(s2, src, REG_ITMP2);
1231                         d = reg_of_var(iptr->dst, REG_ITMP3);
1232                         M_LDIV(s1, s2);
1233                         M_MFLO(d);
1234                         M_NOP;
1235                         M_NOP;
1236                         store_reg_to_var_int(iptr->dst, d);
1237                         break;
1238 #if 0
1239                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
1240                                       /* val.l = constant                             */
1241
1242                         var_to_reg_int(s1, src, REG_ITMP1);
1243                         d = reg_of_var(iptr->dst, REG_ITMP3);
1244                         LCONST(REG_ITMP2, iptr->val.l);
1245                         M_LDIV(s1, REG_ITMP2);
1246                         M_MFLO(d);
1247                         M_NOP;
1248                         M_NOP;
1249                         store_reg_to_var_int(iptr->dst, d);
1250                         break;
1251 #endif
1252                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1253
1254                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1255                         var_to_reg_int(s2, src, REG_ITMP2);
1256                         d = reg_of_var(iptr->dst, REG_ITMP3);
1257                         M_IDIV(s1, s2);
1258                         M_MFHI(d);
1259                         M_NOP;
1260                         M_NOP;
1261                         store_reg_to_var_int(iptr->dst, d);
1262                         break;
1263 #if 0
1264                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1265                                       /* val.i = constant                             */
1266
1267                         var_to_reg_int(s1, src, REG_ITMP1);
1268                         d = reg_of_var(iptr->dst, REG_ITMP3);
1269                         ICONST(REG_ITMP2, iptr->val.i);
1270                         M_IDIV(s1, REG_ITMP2);
1271                         M_MFHI(d);
1272                         M_NOP;
1273                         M_NOP;
1274                         store_reg_to_var_int(iptr->dst, d);
1275                         break;
1276 #endif
1277                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1278
1279                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1280                         var_to_reg_int(s2, src, REG_ITMP2);
1281                         d = reg_of_var(iptr->dst, REG_ITMP3);
1282                         M_LDIV(s1, s2);
1283                         M_MFHI(d);
1284                         M_NOP;
1285                         M_NOP;
1286                         store_reg_to_var_int(iptr->dst, d);
1287                         break;
1288 #if 0
1289                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1290                                       /* val.l = constant                             */
1291
1292                         var_to_reg_int(s1, src, REG_ITMP1);
1293                         d = reg_of_var(iptr->dst, REG_ITMP3);
1294                         LCONST(REG_ITMP2, iptr->val.l);
1295                         M_LDIV(s1, REG_ITMP2);
1296                         M_MFHI(d);
1297                         M_NOP;
1298                         M_NOP;
1299                         store_reg_to_var_int(iptr->dst, d);
1300                         break;
1301 #endif
1302                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1303                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1304
1305                         var_to_reg_int(s1, src, REG_ITMP1);
1306                         d = reg_of_var(iptr->dst, REG_ITMP3);
1307                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1308                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1309                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1310                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1311                         store_reg_to_var_int(iptr->dst, d);
1312                         break;
1313
1314                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1315
1316                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1317                         var_to_reg_int(s2, src, REG_ITMP2);
1318                         d = reg_of_var(iptr->dst, REG_ITMP3);
1319                         M_ISLL(s1, s2, d);
1320                         store_reg_to_var_int(iptr->dst, d);
1321                         break;
1322
1323                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1324                                       /* val.i = constant                             */
1325
1326                         var_to_reg_int(s1, src, REG_ITMP1);
1327                         d = reg_of_var(iptr->dst, REG_ITMP3);
1328                         M_ISLL_IMM(s1, iptr->val.i, d);
1329                         store_reg_to_var_int(iptr->dst, d);
1330                         break;
1331
1332                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1333
1334                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1335                         var_to_reg_int(s2, src, REG_ITMP2);
1336                         d = reg_of_var(iptr->dst, REG_ITMP3);
1337                         M_ISRA(s1, s2, d);
1338                         store_reg_to_var_int(iptr->dst, d);
1339                         break;
1340
1341                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1342                                       /* val.i = constant                             */
1343
1344                         var_to_reg_int(s1, src, REG_ITMP1);
1345                         d = reg_of_var(iptr->dst, REG_ITMP3);
1346                         M_ISRA_IMM(s1, iptr->val.i, d);
1347                         store_reg_to_var_int(iptr->dst, d);
1348                         break;
1349
1350                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1351
1352                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1353                         var_to_reg_int(s2, src, REG_ITMP2);
1354                         d = reg_of_var(iptr->dst, REG_ITMP3);
1355                         M_ISRL(s1, s2, d);
1356                         store_reg_to_var_int(iptr->dst, d);
1357                         break;
1358
1359                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1360                                       /* val.i = constant                             */
1361
1362                         var_to_reg_int(s1, src, REG_ITMP1);
1363                         d = reg_of_var(iptr->dst, REG_ITMP3);
1364                         M_ISRL_IMM(s1, iptr->val.i, d);
1365                         store_reg_to_var_int(iptr->dst, d);
1366                         break;
1367
1368                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1369
1370                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1371                         var_to_reg_int(s2, src, REG_ITMP2);
1372                         d = reg_of_var(iptr->dst, REG_ITMP3);
1373                         M_LSLL(s1, s2, d);
1374                         store_reg_to_var_int(iptr->dst, d);
1375                         break;
1376
1377                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1378                                       /* val.i = constant                             */
1379
1380                         var_to_reg_int(s1, src, REG_ITMP1);
1381                         d = reg_of_var(iptr->dst, REG_ITMP3);
1382                         M_LSLL_IMM(s1, iptr->val.i, d);
1383                         store_reg_to_var_int(iptr->dst, d);
1384                         break;
1385
1386                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1387
1388                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1389                         var_to_reg_int(s2, src, REG_ITMP2);
1390                         d = reg_of_var(iptr->dst, REG_ITMP3);
1391                         M_LSRA(s1, s2, d);
1392                         store_reg_to_var_int(iptr->dst, d);
1393                         break;
1394
1395                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1396                                       /* val.i = constant                             */
1397
1398                         var_to_reg_int(s1, src, REG_ITMP1);
1399                         d = reg_of_var(iptr->dst, REG_ITMP3);
1400                         M_LSRA_IMM(s1, iptr->val.i, d);
1401                         store_reg_to_var_int(iptr->dst, d);
1402                         break;
1403
1404                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1405
1406                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1407                         var_to_reg_int(s2, src, REG_ITMP2);
1408                         d = reg_of_var(iptr->dst, REG_ITMP3);
1409                         M_LSRL(s1, s2, d);
1410                         store_reg_to_var_int(iptr->dst, d);
1411                         break;
1412
1413                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1414                                       /* val.i = constant                             */
1415
1416                         var_to_reg_int(s1, src, REG_ITMP1);
1417                         d = reg_of_var(iptr->dst, REG_ITMP3);
1418                         M_LSRL_IMM(s1, iptr->val.i, d);
1419                         store_reg_to_var_int(iptr->dst, d);
1420                         break;
1421
1422                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1423                 case ICMD_LAND:
1424
1425                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1426                         var_to_reg_int(s2, src, REG_ITMP2);
1427                         d = reg_of_var(iptr->dst, REG_ITMP3);
1428                         M_AND(s1, s2, d);
1429                         store_reg_to_var_int(iptr->dst, d);
1430                         break;
1431
1432                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1433                                       /* val.i = constant                             */
1434
1435                         var_to_reg_int(s1, src, REG_ITMP1);
1436                         d = reg_of_var(iptr->dst, REG_ITMP3);
1437                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1438                                 M_AND_IMM(s1, iptr->val.i, d);
1439                                 }
1440                         else {
1441                                 ICONST(REG_ITMP2, iptr->val.i);
1442                                 M_AND(s1, REG_ITMP2, d);
1443                                 }
1444                         store_reg_to_var_int(iptr->dst, d);
1445                         break;
1446
1447                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1448                                       /* val.i = constant                             */
1449
1450                         var_to_reg_int(s1, src, REG_ITMP1);
1451                         d = reg_of_var(iptr->dst, REG_ITMP3);
1452                         if (s1 == d) {
1453                                 M_MOV(s1, REG_ITMP1);
1454                                 s1 = REG_ITMP1;
1455                                 }
1456                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1457                                 M_AND_IMM(s1, iptr->val.i, d);
1458                                 M_BGEZ(s1, 4);
1459                                 M_NOP;
1460                                 M_ISUB(REG_ZERO, s1, d);
1461                                 M_AND_IMM(d, iptr->val.i, d);
1462                                 }
1463                         else {
1464                                 ICONST(REG_ITMP2, iptr->val.i);
1465                                 M_AND(s1, REG_ITMP2, d);
1466                                 M_BGEZ(s1, 4);
1467                                 M_NOP;
1468                                 M_ISUB(REG_ZERO, s1, d);
1469                                 M_AND(d, REG_ITMP2, d);
1470                                 }
1471                         M_ISUB(REG_ZERO, d, d);
1472                         store_reg_to_var_int(iptr->dst, d);
1473                         break;
1474
1475                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1476
1477 /*          b = value & 0xffff;
1478                         a = value >> 16;
1479                         a = ((b - a) & 0xffff) + (b < a);
1480 */
1481                         var_to_reg_int(s1, src, REG_ITMP1);
1482                         d = reg_of_var(iptr->dst, REG_ITMP3);
1483                         if (s1 == d) {
1484                                 M_MOV(s1, REG_ITMP3);
1485                                 s1 = REG_ITMP3;
1486                                 }
1487                         M_BLTZ(s1, 7);
1488             M_CZEXT(s1, REG_ITMP2);                             /* delay slot */
1489                         M_ISRA_IMM(s1, 16, d);
1490                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1491                         M_ISUB(REG_ITMP2, d, d);
1492             M_CZEXT(d, d);
1493                         M_BR(7);
1494                         M_IADD(d, REG_ITMP1, d);                            /* delay slot */
1495
1496                         M_LUI(REG_ITMP2, 1);
1497                         M_IADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1498                         M_IDIV(s1, REG_ITMP2);
1499                         M_MFHI(d);
1500                         M_NOP;
1501                         M_NOP;
1502                         store_reg_to_var_int(iptr->dst, d);
1503                         break;
1504
1505                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1506                                       /* val.l = constant                             */
1507
1508                         var_to_reg_int(s1, src, REG_ITMP1);
1509                         d = reg_of_var(iptr->dst, REG_ITMP3);
1510                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1511                                 M_AND_IMM(s1, iptr->val.l, d);
1512                                 }
1513                         else {
1514                                 LCONST(REG_ITMP2, iptr->val.l);
1515                                 M_AND(s1, REG_ITMP2, d);
1516                                 }
1517                         store_reg_to_var_int(iptr->dst, d);
1518                         break;
1519
1520                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1521                                       /* val.l = constant                             */
1522
1523                         var_to_reg_int(s1, src, REG_ITMP1);
1524                         d = reg_of_var(iptr->dst, REG_ITMP3);
1525                         if (s1 == d) {
1526                                 M_MOV(s1, REG_ITMP1);
1527                                 s1 = REG_ITMP1;
1528                                 }
1529                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1530                                 M_AND_IMM(s1, iptr->val.l, d);
1531                                 M_BGEZ(s1, 4);
1532                                 M_NOP;
1533                                 M_LSUB(REG_ZERO, s1, d);
1534                                 M_AND_IMM(d, iptr->val.l, d);
1535                                 }
1536                         else {
1537                                 LCONST(REG_ITMP2, iptr->val.l);
1538                                 M_AND(s1, REG_ITMP2, d);
1539                                 M_BGEZ(s1, 4);
1540                                 M_NOP;
1541                                 M_LSUB(REG_ZERO, s1, d);
1542                                 M_AND(d, REG_ITMP2, d);
1543                                 }
1544                         M_LSUB(REG_ZERO, d, d);
1545                         store_reg_to_var_int(iptr->dst, d);
1546                         break;
1547
1548                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1549
1550                         var_to_reg_int(s1, src, REG_ITMP1);
1551                         d = reg_of_var(iptr->dst, REG_ITMP3);
1552                         M_LUI(REG_ITMP2, 1);
1553                         M_LADD_IMM(REG_ITMP2, 1, REG_ITMP2);
1554                         M_LDIV(s1, REG_ITMP2);
1555                         M_MFHI(d);
1556                         M_NOP;
1557                         M_NOP;
1558                         store_reg_to_var_int(iptr->dst, d);
1559                         break;
1560
1561                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1562                 case ICMD_LOR:
1563
1564                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1565                         var_to_reg_int(s2, src, REG_ITMP2);
1566                         d = reg_of_var(iptr->dst, REG_ITMP3);
1567                         M_OR( s1,s2, d);
1568                         store_reg_to_var_int(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1572                                       /* val.i = constant                             */
1573
1574                         var_to_reg_int(s1, src, REG_ITMP1);
1575                         d = reg_of_var(iptr->dst, REG_ITMP3);
1576                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1577                                 M_OR_IMM(s1, iptr->val.i, d);
1578                                 }
1579                         else {
1580                                 ICONST(REG_ITMP2, iptr->val.i);
1581                                 M_OR(s1, REG_ITMP2, d);
1582                                 }
1583                         store_reg_to_var_int(iptr->dst, d);
1584                         break;
1585
1586                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1587                                       /* val.l = constant                             */
1588
1589                         var_to_reg_int(s1, src, REG_ITMP1);
1590                         d = reg_of_var(iptr->dst, REG_ITMP3);
1591                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1592                                 M_OR_IMM(s1, iptr->val.l, d);
1593                                 }
1594                         else {
1595                                 LCONST(REG_ITMP2, iptr->val.l);
1596                                 M_OR(s1, REG_ITMP2, d);
1597                                 }
1598                         store_reg_to_var_int(iptr->dst, d);
1599                         break;
1600
1601                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1602                 case ICMD_LXOR:
1603
1604                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1605                         var_to_reg_int(s2, src, REG_ITMP2);
1606                         d = reg_of_var(iptr->dst, REG_ITMP3);
1607                         M_XOR(s1, s2, d);
1608                         store_reg_to_var_int(iptr->dst, d);
1609                         break;
1610
1611                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1612                                       /* val.i = constant                             */
1613
1614                         var_to_reg_int(s1, src, REG_ITMP1);
1615                         d = reg_of_var(iptr->dst, REG_ITMP3);
1616                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1617                                 M_XOR_IMM(s1, iptr->val.i, d);
1618                                 }
1619                         else {
1620                                 ICONST(REG_ITMP2, iptr->val.i);
1621                                 M_XOR(s1, REG_ITMP2, d);
1622                                 }
1623                         store_reg_to_var_int(iptr->dst, d);
1624                         break;
1625
1626                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1627                                       /* val.l = constant                             */
1628
1629                         var_to_reg_int(s1, src, REG_ITMP1);
1630                         d = reg_of_var(iptr->dst, REG_ITMP3);
1631                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1632                                 M_XOR_IMM(s1, iptr->val.l, d);
1633                                 }
1634                         else {
1635                                 LCONST(REG_ITMP2, iptr->val.l);
1636                                 M_XOR(s1, REG_ITMP2, d);
1637                                 }
1638                         store_reg_to_var_int(iptr->dst, d);
1639                         break;
1640
1641
1642                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1643
1644                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1645                         var_to_reg_int(s2, src, REG_ITMP2);
1646                         d = reg_of_var(iptr->dst, REG_ITMP3);
1647                         M_CMPLT(s1, s2, REG_ITMP3);
1648                         M_CMPLT(s2, s1, REG_ITMP1);
1649                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1650                         store_reg_to_var_int(iptr->dst, d);
1651                         break;
1652
1653
1654                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1655                                       /* op1 = variable, val.i = constant             */
1656
1657                         var = &(locals[iptr->op1][TYPE_INT]);
1658                         if (var->flags & INMEMORY) {
1659                                 s1 = REG_ITMP1;
1660                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1661                                 }
1662                         else
1663                                 s1 = var->regoff;
1664                         M_IADD_IMM(s1, iptr->val.i, s1);
1665                         if (var->flags & INMEMORY)
1666                                 M_LST(s1, REG_SP, 8 * var->regoff);
1667                         break;
1668
1669
1670                 /* floating operations ************************************************/
1671
1672                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1673
1674                         var_to_reg_flt(s1, src, REG_FTMP1);
1675                         d = reg_of_var(iptr->dst, REG_FTMP3);
1676                         M_FNEG(s1, d);
1677                         store_reg_to_var_flt(iptr->dst, d);
1678                         break;
1679
1680                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1681
1682                         var_to_reg_flt(s1, src, REG_FTMP1);
1683                         d = reg_of_var(iptr->dst, REG_FTMP3);
1684                         M_DNEG(s1, d);
1685                         store_reg_to_var_flt(iptr->dst, d);
1686                         break;
1687
1688                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1689
1690                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1691                         var_to_reg_flt(s2, src, REG_FTMP2);
1692                         d = reg_of_var(iptr->dst, REG_FTMP3);
1693                         M_FADD(s1, s2, d);
1694                         store_reg_to_var_flt(iptr->dst, d);
1695                         break;
1696
1697                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1698
1699                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1700                         var_to_reg_flt(s2, src, REG_FTMP2);
1701                         d = reg_of_var(iptr->dst, REG_FTMP3);
1702                         M_DADD(s1, s2, d);
1703                         store_reg_to_var_flt(iptr->dst, d);
1704                         break;
1705
1706                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1707
1708                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1709                         var_to_reg_flt(s2, src, REG_FTMP2);
1710                         d = reg_of_var(iptr->dst, REG_FTMP3);
1711                         M_FSUB(s1, s2, d);
1712                         store_reg_to_var_flt(iptr->dst, d);
1713                         break;
1714
1715                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1716
1717                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1718                         var_to_reg_flt(s2, src, REG_FTMP2);
1719                         d = reg_of_var(iptr->dst, REG_FTMP3);
1720                         M_DSUB(s1, s2, d);
1721                         store_reg_to_var_flt(iptr->dst, d);
1722                         break;
1723
1724                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1725
1726                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1727                         var_to_reg_flt(s2, src, REG_FTMP2);
1728                         d = reg_of_var(iptr->dst, REG_FTMP3);
1729                         M_FMUL(s1, s2, d);
1730                         store_reg_to_var_flt(iptr->dst, d);
1731                         break;
1732
1733                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1734
1735                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1736                         var_to_reg_flt(s2, src, REG_FTMP2);
1737                         d = reg_of_var(iptr->dst, REG_FTMP3);
1738                         M_DMUL(s1, s2, d);
1739                         store_reg_to_var_flt(iptr->dst, d);
1740                         break;
1741
1742                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1743
1744                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1745                         var_to_reg_flt(s2, src, REG_FTMP2);
1746                         d = reg_of_var(iptr->dst, REG_FTMP3);
1747                         M_FDIV(s1, s2, d);
1748                         store_reg_to_var_flt(iptr->dst, d);
1749                         break;
1750
1751                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1752
1753                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1754                         var_to_reg_flt(s2, src, REG_FTMP2);
1755                         d = reg_of_var(iptr->dst, REG_FTMP3);
1756                         M_DDIV(s1, s2, d);
1757                         store_reg_to_var_flt(iptr->dst, d);
1758                         break;
1759
1760                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1761                         panic("FREM");
1762
1763                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1764                         var_to_reg_flt(s2, src, REG_FTMP2);
1765                         d = reg_of_var(iptr->dst, REG_FTMP3);
1766                         M_FDIV(s1,s2, REG_FTMP3);
1767                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1768                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1769                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1770                         M_FSUB(s1, REG_FTMP3, d);
1771                         store_reg_to_var_flt(iptr->dst, d);
1772                     break;
1773
1774                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1775
1776                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1777                         var_to_reg_flt(s2, src, REG_FTMP2);
1778                         d = reg_of_var(iptr->dst, REG_FTMP3);
1779                         M_DDIV(s1,s2, REG_FTMP3);
1780                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1781                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1782                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1783                         M_DSUB(s1, REG_FTMP3, d);
1784                         store_reg_to_var_flt(iptr->dst, d);
1785                     break;
1786
1787                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1788                 case ICMD_L2F:
1789                         var_to_reg_int(s1, src, REG_ITMP1);
1790                         d = reg_of_var(iptr->dst, REG_FTMP3);
1791                         M_MOVLD(s1, d);
1792                         M_CVTLF(d, d);
1793                         store_reg_to_var_flt(iptr->dst, d);
1794                         break;
1795
1796                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1797                 case ICMD_L2D:
1798                         var_to_reg_int(s1, src, REG_ITMP1);
1799                         d = reg_of_var(iptr->dst, REG_FTMP3);
1800                         M_MOVLD(s1, d);
1801                         M_CVTLD(d, d);
1802                         store_reg_to_var_flt(iptr->dst, d);
1803                         break;
1804
1805                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1806
1807                         var_to_reg_flt(s1, src, REG_FTMP1);
1808                         d = reg_of_var(iptr->dst, REG_ITMP3);
1809                         M_TRUNCFI(s1, REG_FTMP1);
1810                         M_MOVDI(REG_FTMP1, d);
1811                         M_NOP;
1812                         store_reg_to_var_int(iptr->dst, d);
1813                         break;
1814
1815                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1816
1817                         var_to_reg_flt(s1, src, REG_FTMP1);
1818                         d = reg_of_var(iptr->dst, REG_ITMP3);
1819                         M_TRUNCDI(s1, REG_FTMP1);
1820                         M_MOVDI(REG_FTMP1, d);
1821                         M_NOP;
1822                         store_reg_to_var_int(iptr->dst, d);
1823                         break;
1824
1825                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1826
1827                         var_to_reg_flt(s1, src, REG_FTMP1);
1828                         d = reg_of_var(iptr->dst, REG_ITMP3);
1829                         M_TRUNCFL(s1, REG_FTMP1);
1830                         M_MOVDL(REG_FTMP1, d);
1831                         M_NOP;
1832                         store_reg_to_var_int(iptr->dst, d);
1833                         break;
1834
1835                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1836
1837                         var_to_reg_flt(s1, src, REG_FTMP1);
1838                         d = reg_of_var(iptr->dst, REG_ITMP3);
1839                         M_TRUNCDL(s1, REG_FTMP1);
1840                         M_MOVDL(REG_FTMP1, d);
1841                         M_NOP;
1842                         store_reg_to_var_int(iptr->dst, d);
1843                         break;
1844
1845                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1846
1847                         var_to_reg_flt(s1, src, REG_FTMP1);
1848                         d = reg_of_var(iptr->dst, REG_FTMP3);
1849                         M_CVTFD(s1, d);
1850                         store_reg_to_var_flt(iptr->dst, d);
1851                         break;
1852
1853                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1854
1855                         var_to_reg_flt(s1, src, REG_FTMP1);
1856                         d = reg_of_var(iptr->dst, REG_FTMP3);
1857                         M_CVTDF(s1, d);
1858                         store_reg_to_var_flt(iptr->dst, d);
1859                         break;
1860
1861                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1862
1863                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1864                         var_to_reg_flt(s2, src, REG_FTMP2);
1865                         d = reg_of_var(iptr->dst, REG_ITMP3);
1866                         M_FCMPUEQF(s1, s2);
1867                         M_NOP;                             /* compare delay               */
1868                         M_FBF(2);                          /* jump over next instructions */
1869                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1870                         M_CLR(d);
1871                         M_FCMPULTF(s2, s1);
1872                         M_NOP;                             /* compare delay               */
1873                         M_FBF(2);                          /* jump over next instruction  */
1874                         M_NOP;
1875                         M_LADD_IMM(REG_ZERO, 1, d);
1876                         store_reg_to_var_int(iptr->dst, d);
1877                         break;
1878
1879                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1880
1881                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1882                         var_to_reg_flt(s2, src, REG_FTMP2);
1883                         d = reg_of_var(iptr->dst, REG_ITMP3);
1884                         M_FCMPUEQD(s1, s2);
1885                         M_NOP;                             /* compare delay               */
1886                         M_FBF(2);                          /* jump over next instructions */
1887                         M_LSUB_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1888                         M_CLR(d);
1889                         M_FCMPULTD(s2, s1);
1890                         M_NOP;                             /* compare delay               */
1891                         M_FBF(2);                          /* jump over next instruction  */
1892                         M_NOP;
1893                         M_LADD_IMM(REG_ZERO, 1, d);
1894                         store_reg_to_var_int(iptr->dst, d);
1895                         break;
1896
1897                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1898
1899                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1900                         var_to_reg_flt(s2, src, REG_FTMP2);
1901                         d = reg_of_var(iptr->dst, REG_ITMP3);
1902                         M_FCMPUEQF(s1, s2);
1903                         M_NOP;                             /* compare delay               */
1904                         M_FBF(2);                          /* jump over next instruction  */
1905                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1906                         M_CLR(d);
1907                         M_FCMPULTF(s1, s2);
1908                         M_NOP;                             /* compare delay               */
1909                         M_FBF(2);                          /* jump over next instruction  */
1910                         M_NOP;
1911                         M_LSUB_IMM(REG_ZERO, 1, d);
1912                         store_reg_to_var_int(iptr->dst, d);
1913                         break;
1914
1915                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1916
1917                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1918                         var_to_reg_flt(s2, src, REG_FTMP2);
1919                         d = reg_of_var(iptr->dst, REG_ITMP3);
1920                         M_FCMPUEQD(s1, s2);
1921                         M_NOP;                             /* compare delay               */
1922                         M_FBF(2);                          /* jump over next instruction  */
1923                         M_LADD_IMM(REG_ZERO, 1, d);        /* delay slot                  */
1924                         M_CLR(d);
1925                         M_FCMPULTD(s1, s2);
1926                         M_NOP;                             /* compare delay               */
1927                         M_FBF(2);                          /* jump over next instruction  */
1928                         M_NOP;
1929                         M_LSUB_IMM(REG_ZERO, 1, d);
1930                         store_reg_to_var_int(iptr->dst, d);
1931                         break;
1932
1933
1934                 /* memory operations **************************************************/
1935
1936 #define gen_bound_check \
1937                         if (checkbounds) {\
1938                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1939                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1940                                 M_BEQZ(REG_ITMP3, 0);\
1941                                 codegen_addxboundrefs(mcodeptr);\
1942                                 M_NOP;\
1943                                 }
1944
1945                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1946
1947                         var_to_reg_int(s1, src, REG_ITMP1);
1948                         d = reg_of_var(iptr->dst, REG_ITMP3);
1949                         gen_nullptr_check(s1);
1950                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1951                         store_reg_to_var_int(iptr->dst, d);
1952                         break;
1953
1954                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1955
1956                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1957                         var_to_reg_int(s2, src, REG_ITMP2);
1958                         d = reg_of_var(iptr->dst, REG_ITMP3);
1959                         if (iptr->op1 == 0) {
1960                                 gen_nullptr_check(s1);
1961                                 gen_bound_check;
1962                                 }
1963                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1964                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1965                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1966                         store_reg_to_var_int(iptr->dst, d);
1967                         break;
1968
1969                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1970
1971                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1972                         var_to_reg_int(s2, src, REG_ITMP2);
1973                         d = reg_of_var(iptr->dst, REG_ITMP3);
1974                         if (iptr->op1 == 0) {
1975                                 gen_nullptr_check(s1);
1976                                 gen_bound_check;
1977                                 }
1978                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1979                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1980                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1981                         store_reg_to_var_int(iptr->dst, d);
1982                         break;
1983
1984                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1985
1986                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1987                         var_to_reg_int(s2, src, REG_ITMP2);
1988                         d = reg_of_var(iptr->dst, REG_ITMP3);
1989                         if (iptr->op1 == 0) {
1990                                 gen_nullptr_check(s1);
1991                                 gen_bound_check;
1992                                 }
1993                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1994                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1995                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1996                         store_reg_to_var_int(iptr->dst, d);
1997                         break;
1998
1999                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2000
2001                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2002                         var_to_reg_int(s2, src, REG_ITMP2);
2003                         d = reg_of_var(iptr->dst, REG_FTMP3);
2004                         if (iptr->op1 == 0) {
2005                                 gen_nullptr_check(s1);
2006                                 gen_bound_check;
2007                                 }
2008                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2009                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2010                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2011                         store_reg_to_var_flt(iptr->dst, d);
2012                         break;
2013
2014                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2015
2016                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2017                         var_to_reg_int(s2, src, REG_ITMP2);
2018                         d = reg_of_var(iptr->dst, REG_FTMP3);
2019                         if (iptr->op1 == 0) {
2020                                 gen_nullptr_check(s1);
2021                                 gen_bound_check;
2022                                 }
2023                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2024                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2025                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2026                         store_reg_to_var_flt(iptr->dst, d);
2027                         break;
2028
2029                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2030
2031                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2032                         var_to_reg_int(s2, src, REG_ITMP2);
2033                         d = reg_of_var(iptr->dst, REG_ITMP3);
2034                         if (iptr->op1 == 0) {
2035                                 gen_nullptr_check(s1);
2036                                 gen_bound_check;
2037                                 }
2038                         M_AADD(s2, s1, REG_ITMP1);
2039                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2040                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2041                         store_reg_to_var_int(iptr->dst, d);
2042                         break;
2043
2044                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2045
2046                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2047                         var_to_reg_int(s2, src, REG_ITMP2);
2048                         d = reg_of_var(iptr->dst, REG_ITMP3);
2049                         if (iptr->op1 == 0) {
2050                                 gen_nullptr_check(s1);
2051                                 gen_bound_check;
2052                                 }
2053                         M_AADD(s2, s1, REG_ITMP1);
2054                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2055                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2056                         store_reg_to_var_int(iptr->dst, d);
2057                         break;
2058
2059                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2060
2061                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2062                         var_to_reg_int(s2, src, REG_ITMP2);
2063                         d = reg_of_var(iptr->dst, REG_ITMP3);
2064                         if (iptr->op1 == 0) {
2065                                 gen_nullptr_check(s1);
2066                                 gen_bound_check;
2067                                 }
2068                         M_AADD(s2, s1, REG_ITMP1);
2069                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2070                         store_reg_to_var_int(iptr->dst, d);
2071                         break;
2072
2073
2074                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2075
2076                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2077                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2078                         if (iptr->op1 == 0) {
2079                                 gen_nullptr_check(s1);
2080                                 gen_bound_check;
2081                                 }
2082                         var_to_reg_int(s3, src, REG_ITMP3);
2083                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
2084                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2085                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2086                         break;
2087
2088                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2089
2090                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2091                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2092                         if (iptr->op1 == 0) {
2093                                 gen_nullptr_check(s1);
2094                                 gen_bound_check;
2095                                 }
2096                         var_to_reg_int(s3, src, REG_ITMP3);
2097                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2098                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2099                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2100                         break;
2101
2102                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2103
2104                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2105                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2106                         if (iptr->op1 == 0) {
2107                                 gen_nullptr_check(s1);
2108                                 gen_bound_check;
2109                                 }
2110                         var_to_reg_int(s3, src, REG_ITMP3);
2111                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2112                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2113                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2114                         break;
2115
2116                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2117
2118                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2119                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2120                         if (iptr->op1 == 0) {
2121                                 gen_nullptr_check(s1);
2122                                 gen_bound_check;
2123                                 }
2124                         var_to_reg_flt(s3, src, REG_FTMP3);
2125                         M_ASLL_IMM(s2, 2, REG_ITMP2);
2126                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2127                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2128                         break;
2129
2130                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2131
2132                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2133                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2134                         if (iptr->op1 == 0) {
2135                                 gen_nullptr_check(s1);
2136                                 gen_bound_check;
2137                                 }
2138                         var_to_reg_flt(s3, src, REG_FTMP3);
2139                         M_ASLL_IMM(s2, 3, REG_ITMP2);
2140                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
2141                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2142                         break;
2143
2144                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2145                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2146
2147                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2148                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2149                         if (iptr->op1 == 0) {
2150                                 gen_nullptr_check(s1);
2151                                 gen_bound_check;
2152                                 }
2153                         var_to_reg_int(s3, src, REG_ITMP3);
2154                         M_AADD(s2, s1, REG_ITMP1);
2155                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
2156                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2157                         break;
2158
2159                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2160
2161                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2162                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2163                         if (iptr->op1 == 0) {
2164                                 gen_nullptr_check(s1);
2165                                 gen_bound_check;
2166                                 }
2167                         var_to_reg_int(s3, src, REG_ITMP3);
2168                         M_AADD(s2, s1, REG_ITMP1);
2169                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2170                         break;
2171
2172
2173                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2174                                       /* op1 = type, val.a = field address            */
2175
2176                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2177                         M_ALD(REG_ITMP1, REG_PV, a);
2178                         switch (iptr->op1) {
2179                                 case TYPE_INT:
2180                                         var_to_reg_int(s2, src, REG_ITMP2);
2181                                         M_IST(s2, REG_ITMP1, 0);
2182                                         break;
2183                                 case TYPE_LNG:
2184                                         var_to_reg_int(s2, src, REG_ITMP2);
2185                                         M_LST(s2, REG_ITMP1, 0);
2186                                         break;
2187                                 case TYPE_ADR:
2188                                         var_to_reg_int(s2, src, REG_ITMP2);
2189                                         M_AST(s2, REG_ITMP1, 0);
2190                                         break;
2191                                 case TYPE_FLT:
2192                                         var_to_reg_flt(s2, src, REG_FTMP2);
2193                                         M_FST(s2, REG_ITMP1, 0);
2194                                         break;
2195                                 case TYPE_DBL:
2196                                         var_to_reg_flt(s2, src, REG_FTMP2);
2197                                         M_DST(s2, REG_ITMP1, 0);
2198                                         break;
2199                                 default: panic ("internal error");
2200                                 }
2201                         break;
2202
2203                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2204                                       /* op1 = type, val.a = field address            */
2205
2206                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2207                         M_ALD(REG_ITMP1, REG_PV, a);
2208                         switch (iptr->op1) {
2209                                 case TYPE_INT:
2210                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2211                                         M_ILD(d, REG_ITMP1, 0);
2212                                         store_reg_to_var_int(iptr->dst, d);
2213                                         break;
2214                                 case TYPE_LNG:
2215                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2216                                         M_LLD(d, REG_ITMP1, 0);
2217                                         store_reg_to_var_int(iptr->dst, d);
2218                                         break;
2219                                 case TYPE_ADR:
2220                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2221                                         M_ALD(d, REG_ITMP1, 0);
2222                                         store_reg_to_var_int(iptr->dst, d);
2223                                         break;
2224                                 case TYPE_FLT:
2225                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2226                                         M_FLD(d, REG_ITMP1, 0);
2227                                         store_reg_to_var_flt(iptr->dst, d);
2228                                         break;
2229                                 case TYPE_DBL:
2230                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2231                                         M_DLD(d, REG_ITMP1, 0);
2232                                         store_reg_to_var_flt(iptr->dst, d);
2233                                         break;
2234                                 default: panic ("internal error");
2235                                 }
2236                         break;
2237
2238
2239                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2240                                       /* op1 = type, val.i = field offset             */
2241
2242                         a = ((fieldinfo *)(iptr->val.a))->offset;
2243                         switch (iptr->op1) {
2244                                 case TYPE_INT:
2245                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2246                                         var_to_reg_int(s2, src, REG_ITMP2);
2247                                         gen_nullptr_check(s1);
2248                                         M_IST(s2, s1, a);
2249                                         break;
2250                                 case TYPE_LNG:
2251                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2252                                         var_to_reg_int(s2, src, REG_ITMP2);
2253                                         gen_nullptr_check(s1);
2254                                         M_LST(s2, s1, a);
2255                                         break;
2256                                 case TYPE_ADR:
2257                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2258                                         var_to_reg_int(s2, src, REG_ITMP2);
2259                                         gen_nullptr_check(s1);
2260                                         M_AST(s2, s1, a);
2261                                         break;
2262                                 case TYPE_FLT:
2263                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2264                                         var_to_reg_flt(s2, src, REG_FTMP2);
2265                                         gen_nullptr_check(s1);
2266                                         M_FST(s2, s1, a);
2267                                         break;
2268                                 case TYPE_DBL:
2269                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2270                                         var_to_reg_flt(s2, src, REG_FTMP2);
2271                                         gen_nullptr_check(s1);
2272                                         M_DST(s2, s1, a);
2273                                         break;
2274                                 default: panic ("internal error");
2275                                 }
2276                         break;
2277
2278                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2279                                       /* op1 = type, val.i = field offset             */
2280
2281                         a = ((fieldinfo *)(iptr->val.a))->offset;
2282                         switch (iptr->op1) {
2283                                 case TYPE_INT:
2284                                         var_to_reg_int(s1, src, REG_ITMP1);
2285                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2286                                         gen_nullptr_check(s1);
2287                                         M_ILD(d, s1, a);
2288                                         store_reg_to_var_int(iptr->dst, d);
2289                                         break;
2290                                 case TYPE_LNG:
2291                                         var_to_reg_int(s1, src, REG_ITMP1);
2292                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2293                                         gen_nullptr_check(s1);
2294                                         M_LLD(d, s1, a);
2295                                         store_reg_to_var_int(iptr->dst, d);
2296                                         break;
2297                                 case TYPE_ADR:
2298                                         var_to_reg_int(s1, src, REG_ITMP1);
2299                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2300                                         gen_nullptr_check(s1);
2301                                         M_ALD(d, s1, a);
2302                                         store_reg_to_var_int(iptr->dst, d);
2303                                         break;
2304                                 case TYPE_FLT:
2305                                         var_to_reg_int(s1, src, REG_ITMP1);
2306                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2307                                         gen_nullptr_check(s1);
2308                                         M_FLD(d, s1, a);
2309                                         store_reg_to_var_flt(iptr->dst, d);
2310                                         break;
2311                                 case TYPE_DBL:
2312                                         var_to_reg_int(s1, src, REG_ITMP1);
2313                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2314                                         gen_nullptr_check(s1);
2315                                         M_DLD(d, s1, a);
2316                                         store_reg_to_var_flt(iptr->dst, d);
2317                                         break;
2318                                 default: panic ("internal error");
2319                                 }
2320                         break;
2321
2322
2323                 /* branch operations **************************************************/
2324
2325 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2326
2327                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2328
2329                         var_to_reg_int(s1, src, REG_ITMP1);
2330                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2331                         a = dseg_addaddress(asm_handle_exception);
2332                         M_ALD(REG_ITMP2, REG_PV, a);
2333                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2334                         M_NOP;
2335                         M_NOP;              /* nop ensures that XPC is less than the end */
2336                                             /* of basic block                            */
2337                         ALIGNCODENOP;
2338                         break;
2339
2340                 case ICMD_GOTO:         /* ... ==> ...                                */
2341                                         /* op1 = target JavaVM pc                     */
2342                         M_BR(0);
2343                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2344                         M_NOP;
2345                         ALIGNCODENOP;
2346                         break;
2347
2348                 case ICMD_JSR:          /* ... ==> ...                                */
2349                                         /* op1 = target JavaVM pc                     */
2350
2351                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2352                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2353                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2354                         M_NOP;
2355                         break;
2356
2357                 case ICMD_RET:          /* ... ==> ...                                */
2358                                         /* op1 = local variable                       */
2359                         var = &(locals[iptr->op1][TYPE_ADR]);
2360                         if (var->flags & INMEMORY) {
2361                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2362                                 M_RET(REG_ITMP1);
2363                                 }
2364                         else
2365                                 M_RET(var->regoff);
2366                         M_NOP;
2367                         ALIGNCODENOP;
2368                         break;
2369
2370                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2371                                         /* op1 = target JavaVM pc                     */
2372
2373                         var_to_reg_int(s1, src, REG_ITMP1);
2374                         M_BEQZ(s1, 0);
2375                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2376                         M_NOP;
2377                         break;
2378
2379                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2380                                         /* op1 = target JavaVM pc                     */
2381
2382                         var_to_reg_int(s1, src, REG_ITMP1);
2383                         M_BNEZ(s1, 0);
2384                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2385                         M_NOP;
2386                         break;
2387
2388                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2389                                         /* op1 = target JavaVM pc, val.i = constant   */
2390
2391                         var_to_reg_int(s1, src, REG_ITMP1);
2392                         if (iptr->val.i == 0) {
2393                                 M_BEQZ(s1, 0);
2394                                 }
2395                         else {
2396                                 ICONST(REG_ITMP2, iptr->val.i);
2397                                 M_BEQ(s1, REG_ITMP2, 0);
2398                                 }
2399                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2400                         M_NOP;
2401                         break;
2402
2403                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2404                                         /* op1 = target JavaVM pc, val.i = constant   */
2405
2406                         var_to_reg_int(s1, src, REG_ITMP1);
2407                         if (iptr->val.i == 0) {
2408                                 M_BLTZ(s1, 0);
2409                                 }
2410                         else {
2411                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2412                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2413                                         }
2414                                 else {
2415                                         ICONST(REG_ITMP2, iptr->val.i);
2416                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2417                                         }
2418                                 M_BNEZ(REG_ITMP1, 0);
2419                                 }
2420                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2421                         M_NOP;
2422                         break;
2423
2424                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2425                                         /* op1 = target JavaVM pc, val.i = constant   */
2426
2427                         var_to_reg_int(s1, src, REG_ITMP1);
2428                         if (iptr->val.i == 0) {
2429                                 M_BLEZ(s1, 0);
2430                                 }
2431                         else {
2432                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2433                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2434                                         M_BNEZ(REG_ITMP1, 0);
2435                                         }
2436                                 else {
2437                                         ICONST(REG_ITMP2, iptr->val.i);
2438                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2439                                         M_BEQZ(REG_ITMP1, 0);
2440                                         }
2441                                 }
2442                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2443                         M_NOP;
2444                         break;
2445
2446                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2447                                         /* op1 = target JavaVM pc, val.i = constant   */
2448
2449                         var_to_reg_int(s1, src, REG_ITMP1);
2450                         if (iptr->val.i == 0) {
2451                                 M_BNEZ(s1, 0);
2452                                 }
2453                         else {
2454                                 ICONST(REG_ITMP2, iptr->val.i);
2455                                 M_BNE(s1, REG_ITMP2, 0);
2456                                 }
2457                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2458                         M_NOP;
2459                         break;
2460
2461                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2462                                         /* op1 = target JavaVM pc, val.i = constant   */
2463
2464                         var_to_reg_int(s1, src, REG_ITMP1);
2465                         if (iptr->val.i == 0) {
2466                                 M_BGTZ(s1, 0);
2467                                 }
2468                         else {
2469                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2470                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2471                                         M_BEQZ(REG_ITMP1, 0);
2472                                         }
2473                                 else {
2474                                         ICONST(REG_ITMP2, iptr->val.i);
2475                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2476                                         M_BNEZ(REG_ITMP1, 0);
2477                                         }
2478                                 }
2479                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2480                         M_NOP;
2481                         break;
2482
2483                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2484                                         /* op1 = target JavaVM pc, val.i = constant   */
2485
2486                         var_to_reg_int(s1, src, REG_ITMP1);
2487                         if (iptr->val.i == 0) {
2488                                 M_BGEZ(s1, 0);
2489                                 }
2490                         else {
2491                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2492                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2493                                         }
2494                                 else {
2495                                         ICONST(REG_ITMP2, iptr->val.i);
2496                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2497                                         }
2498                                 M_BEQZ(REG_ITMP1, 0);
2499                                 }
2500                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2501                         M_NOP;
2502                         break;
2503
2504                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2505                                         /* op1 = target JavaVM pc, val.l = constant   */
2506
2507                         var_to_reg_int(s1, src, REG_ITMP1);
2508                         if (iptr->val.l == 0) {
2509                                 M_BEQZ(s1, 0);
2510                                 }
2511                         else {
2512                                 LCONST(REG_ITMP2, iptr->val.l);
2513                                 M_BEQ(s1, REG_ITMP2, 0);
2514                                 }
2515                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2516                         M_NOP;
2517                         break;
2518
2519                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2520                                         /* op1 = target JavaVM pc, val.l = constant   */
2521
2522                         var_to_reg_int(s1, src, REG_ITMP1);
2523                         if (iptr->val.l == 0) {
2524                                 M_BLTZ(s1, 0);
2525                                 }
2526                         else {
2527                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2528                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2529                                         }
2530                                 else {
2531                                         LCONST(REG_ITMP2, iptr->val.l);
2532                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2533                                         }
2534                                 M_BNEZ(REG_ITMP1, 0);
2535                                 }
2536                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2537                         M_NOP;
2538                         break;
2539
2540                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2541                                         /* op1 = target JavaVM pc, val.l = constant   */
2542
2543                         var_to_reg_int(s1, src, REG_ITMP1);
2544                         if (iptr->val.l == 0) {
2545                                 M_BLEZ(s1, 0);
2546                                 }
2547                         else {
2548                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2549                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2550                                         M_BNEZ(REG_ITMP1, 0);
2551                                         }
2552                                 else {
2553                                         LCONST(REG_ITMP2, iptr->val.l);
2554                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2555                                         M_BEQZ(REG_ITMP1, 0);
2556                                         }
2557                                 }
2558                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2559                         M_NOP;
2560                         break;
2561
2562                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2563                                         /* op1 = target JavaVM pc, val.l = constant   */
2564
2565                         var_to_reg_int(s1, src, REG_ITMP1);
2566                         if (iptr->val.l == 0) {
2567                                 M_BNEZ(s1, 0);
2568                                 }
2569                         else {
2570                                 LCONST(REG_ITMP2, iptr->val.l);
2571                                 M_BNE(s1, REG_ITMP2, 0);
2572                                 }
2573                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2574                         M_NOP;
2575                         break;
2576
2577                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2578                                         /* op1 = target JavaVM pc, val.l = constant   */
2579
2580                         var_to_reg_int(s1, src, REG_ITMP1);
2581                         if (iptr->val.l == 0) {
2582                                 M_BGTZ(s1, 0);
2583                                 }
2584                         else {
2585                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2586                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2587                                         M_BEQZ(REG_ITMP1, 0);
2588                                         }
2589                                 else {
2590                                         LCONST(REG_ITMP2, iptr->val.l);
2591                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2592                                         M_BNEZ(REG_ITMP1, 0);
2593                                         }
2594                                 }
2595                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2596                         M_NOP;
2597                         break;
2598
2599                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2600                                         /* op1 = target JavaVM pc, val.l = constant   */
2601
2602                         var_to_reg_int(s1, src, REG_ITMP1);
2603                         if (iptr->val.l == 0) {
2604                                 M_BGEZ(s1, 0);
2605                                 }
2606                         else {
2607                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2608                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2609                                         }
2610                                 else {
2611                                         LCONST(REG_ITMP2, iptr->val.l);
2612                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2613                                         }
2614                                 M_BEQZ(REG_ITMP1, 0);
2615                                 }
2616                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2617                         M_NOP;
2618                         break;
2619
2620                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2621                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2622                 case ICMD_IF_ACMPEQ:
2623
2624                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2625                         var_to_reg_int(s2, src, REG_ITMP2);
2626                         M_BEQ(s1, s2, 0);
2627                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2628                         M_NOP;
2629                         break;
2630
2631                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2632                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2633                 case ICMD_IF_ACMPNE:
2634
2635                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2636                         var_to_reg_int(s2, src, REG_ITMP2);
2637                         M_BNE(s1, s2, 0);
2638                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2639                         M_NOP;
2640                         break;
2641
2642                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2643                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2644
2645                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2646                         var_to_reg_int(s2, src, REG_ITMP2);
2647                         M_CMPLT(s1, s2, REG_ITMP1);
2648                         M_BNEZ(REG_ITMP1, 0);
2649                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2650                         M_NOP;
2651                         break;
2652
2653                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2654                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2655
2656                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2657                         var_to_reg_int(s2, src, REG_ITMP2);
2658                         M_CMPGT(s1, s2, REG_ITMP1);
2659                         M_BNEZ(REG_ITMP1, 0);
2660                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2661                         M_NOP;
2662                         break;
2663
2664                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2665                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2666
2667                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2668                         var_to_reg_int(s2, src, REG_ITMP2);
2669                         M_CMPGT(s1, s2, REG_ITMP1);
2670                         M_BEQZ(REG_ITMP1, 0);
2671                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2672                         M_NOP;
2673                         break;
2674
2675                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2676                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2677
2678                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2679                         var_to_reg_int(s2, src, REG_ITMP2);
2680                         M_CMPLT(s1, s2, REG_ITMP1);
2681                         M_BEQZ(REG_ITMP1, 0);
2682                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2683                         M_NOP;
2684                         break;
2685
2686 #ifdef CONDITIONAL_LOADCONST
2687                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2688
2689                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2690                         break;
2691
2692                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2693                                         /* val.i = constant                           */
2694
2695                         var_to_reg_int(s1, src, REG_ITMP1);
2696                         d = reg_of_var(iptr->dst, REG_ITMP3);
2697                         s3 = iptr->val.i;
2698                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2699                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2700                                         M_CMPEQ(s1, REG_ZERO, d);
2701                                         store_reg_to_var_int(iptr->dst, d);
2702                                         break;
2703                                         }
2704                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2705                                         M_CMPEQ(s1, REG_ZERO, d);
2706                                         M_XOR_IMM(d, 1, d);
2707                                         store_reg_to_var_int(iptr->dst, d);
2708                                         break;
2709                                         }
2710                                 if (s1 == d) {
2711                                         M_MOV(s1, REG_ITMP1);
2712                                         s1 = REG_ITMP1;
2713                                         }
2714                                 ICONST(d, iptr[1].val.i);
2715                                 }
2716                         if ((s3 >= 0) && (s3 <= 255)) {
2717                                 M_CMOVEQ_IMM(s1, s3, d);
2718                                 }
2719                         else {
2720                                 ICONST(REG_ITMP2, s3);
2721                                 M_CMOVEQ(s1, REG_ITMP2, d);
2722                                 }
2723                         store_reg_to_var_int(iptr->dst, d);
2724                         break;
2725
2726                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2727                                         /* val.i = constant                           */
2728
2729                         var_to_reg_int(s1, src, REG_ITMP1);
2730                         d = reg_of_var(iptr->dst, REG_ITMP3);
2731                         s3 = iptr->val.i;
2732                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2733                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2734                                         M_CMPEQ(s1, REG_ZERO, d);
2735                                         store_reg_to_var_int(iptr->dst, d);
2736                                         break;
2737                                         }
2738                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2739                                         M_CMPEQ(s1, REG_ZERO, d);
2740                                         M_XOR_IMM(d, 1, d);
2741                                         store_reg_to_var_int(iptr->dst, d);
2742                                         break;
2743                                         }
2744                                 if (s1 == d) {
2745                                         M_MOV(s1, REG_ITMP1);
2746                                         s1 = REG_ITMP1;
2747                                         }
2748                                 ICONST(d, iptr[1].val.i);
2749                                 }
2750                         if ((s3 >= 0) && (s3 <= 255)) {
2751                                 M_CMOVNE_IMM(s1, s3, d);
2752                                 }
2753                         else {
2754                                 ICONST(REG_ITMP2, s3);
2755                                 M_CMOVNE(s1, REG_ITMP2, d);
2756                                 }
2757                         store_reg_to_var_int(iptr->dst, d);
2758                         break;
2759
2760                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2761                                         /* val.i = constant                           */
2762
2763                         var_to_reg_int(s1, src, REG_ITMP1);
2764                         d = reg_of_var(iptr->dst, REG_ITMP3);
2765                         s3 = iptr->val.i;
2766                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2767                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2768                                         M_CMPLT(s1, REG_ZERO, d);
2769                                         store_reg_to_var_int(iptr->dst, d);
2770                                         break;
2771                                         }
2772                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2773                                         M_CMPLE(REG_ZERO, s1, d);
2774                                         store_reg_to_var_int(iptr->dst, d);
2775                                         break;
2776                                         }
2777                                 if (s1 == d) {
2778                                         M_MOV(s1, REG_ITMP1);
2779                                         s1 = REG_ITMP1;
2780                                         }
2781                                 ICONST(d, iptr[1].val.i);
2782                                 }
2783                         if ((s3 >= 0) && (s3 <= 255)) {
2784                                 M_CMOVLT_IMM(s1, s3, d);
2785                                 }
2786                         else {
2787                                 ICONST(REG_ITMP2, s3);
2788                                 M_CMOVLT(s1, REG_ITMP2, d);
2789                                 }
2790                         store_reg_to_var_int(iptr->dst, d);
2791                         break;
2792
2793                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2794                                         /* val.i = constant                           */
2795
2796                         var_to_reg_int(s1, src, REG_ITMP1);
2797                         d = reg_of_var(iptr->dst, REG_ITMP3);
2798                         s3 = iptr->val.i;
2799                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2800                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2801                                         M_CMPLE(REG_ZERO, s1, d);
2802                                         store_reg_to_var_int(iptr->dst, d);
2803                                         break;
2804                                         }
2805                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2806                                         M_CMPLT(s1, REG_ZERO, d);
2807                                         store_reg_to_var_int(iptr->dst, d);
2808                                         break;
2809                                         }
2810                                 if (s1 == d) {
2811                                         M_MOV(s1, REG_ITMP1);
2812                                         s1 = REG_ITMP1;
2813                                         }
2814                                 ICONST(d, iptr[1].val.i);
2815                                 }
2816                         if ((s3 >= 0) && (s3 <= 255)) {
2817                                 M_CMOVGE_IMM(s1, s3, d);
2818                                 }
2819                         else {
2820                                 ICONST(REG_ITMP2, s3);
2821                                 M_CMOVGE(s1, REG_ITMP2, d);
2822                                 }
2823                         store_reg_to_var_int(iptr->dst, d);
2824                         break;
2825
2826                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2827                                         /* val.i = constant                           */
2828
2829                         var_to_reg_int(s1, src, REG_ITMP1);
2830                         d = reg_of_var(iptr->dst, REG_ITMP3);
2831                         s3 = iptr->val.i;
2832                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2833                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2834                                         M_CMPLT(REG_ZERO, s1, d);
2835                                         store_reg_to_var_int(iptr->dst, d);
2836                                         break;
2837                                         }
2838                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2839                                         M_CMPLE(s1, REG_ZERO, d);
2840                                         store_reg_to_var_int(iptr->dst, d);
2841                                         break;
2842                                         }
2843                                 if (s1 == d) {
2844                                         M_MOV(s1, REG_ITMP1);
2845                                         s1 = REG_ITMP1;
2846                                         }
2847                                 ICONST(d, iptr[1].val.i);
2848                                 }
2849                         if ((s3 >= 0) && (s3 <= 255)) {
2850                                 M_CMOVGT_IMM(s1, s3, d);
2851                                 }
2852                         else {
2853                                 ICONST(REG_ITMP2, s3);
2854                                 M_CMOVGT(s1, REG_ITMP2, d);
2855                                 }
2856                         store_reg_to_var_int(iptr->dst, d);
2857                         break;
2858
2859                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2860                                         /* val.i = constant                           */
2861
2862                         var_to_reg_int(s1, src, REG_ITMP1);
2863                         d = reg_of_var(iptr->dst, REG_ITMP3);
2864                         s3 = iptr->val.i;
2865                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2866                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2867                                         M_CMPLE(s1, REG_ZERO, d);
2868                                         store_reg_to_var_int(iptr->dst, d);
2869                                         break;
2870                                         }
2871                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2872                                         M_CMPLT(REG_ZERO, s1, d);
2873                                         store_reg_to_var_int(iptr->dst, d);
2874                                         break;
2875                                         }
2876                                 if (s1 == d) {
2877                                         M_MOV(s1, REG_ITMP1);
2878                                         s1 = REG_ITMP1;
2879                                         }
2880                                 ICONST(d, iptr[1].val.i);
2881                                 }
2882                         if ((s3 >= 0) && (s3 <= 255)) {
2883                                 M_CMOVLE_IMM(s1, s3, d);
2884                                 }
2885                         else {
2886                                 ICONST(REG_ITMP2, s3);
2887                                 M_CMOVLE(s1, REG_ITMP2, d);
2888                                 }
2889                         store_reg_to_var_int(iptr->dst, d);
2890                         break;
2891 #endif
2892
2893
2894                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2895                 case ICMD_LRETURN:
2896                 case ICMD_ARETURN:
2897
2898 #ifdef USE_THREADS
2899                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2900                                 int disp;
2901                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2902                                 M_ALD(REG_ITMP3, REG_PV, a);
2903                                 M_JSR(REG_RA, REG_ITMP3);
2904                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2905                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2906                                 M_LDA(REG_PV, REG_RA, disp);
2907                                 }
2908 #endif
2909                         var_to_reg_int(s1, src, REG_RESULT);
2910                         M_INTMOVE(s1, REG_RESULT);
2911                         goto nowperformreturn;
2912
2913                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2914                 case ICMD_DRETURN:
2915
2916 #ifdef USE_THREADS
2917                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2918                                 int disp;
2919                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2920                                 M_ALD(REG_ITMP3, REG_PV, a);
2921                                 M_JSR(REG_RA, REG_ITMP3);
2922                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2923                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2924                                 M_LDA(REG_PV, REG_RA, disp);
2925                                 }
2926 #endif
2927                         var_to_reg_flt(s1, src, REG_FRESULT);
2928                         {
2929                                 int t = ((iptr->opc == ICMD_FRETURN) ? TYPE_FLT : TYPE_DBL);
2930                                 M_TFLTMOVE(t, s1, REG_FRESULT);
2931                         }
2932                         goto nowperformreturn;
2933
2934                 case ICMD_RETURN:      /* ...  ==> ...                                */
2935
2936 #ifdef USE_THREADS
2937                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
2938                                 int disp;
2939                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
2940                                 M_ALD(REG_ITMP3, REG_PV, a);
2941                                 M_JSR(REG_RA, REG_ITMP3);
2942                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);    /* delay slot */
2943                                 disp = -(int)((u1*) mcodeptr - mcodebase);
2944                                 M_LDA(REG_PV, REG_RA, disp);
2945                                 }
2946 #endif
2947
2948 nowperformreturn:
2949                         {
2950                         int r, p;
2951
2952                         p = parentargs_base;
2953
2954                         /* restore return address                                         */
2955
2956                         if (!isleafmethod)
2957                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
2958
2959                         /* restore saved registers                                        */
2960
2961                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
2962                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
2963                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
2964                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
2965
2966                         /* call trace function */
2967
2968                         if (runverbose) {
2969                                 M_LDA (REG_SP, REG_SP, -24);
2970                                 M_LST(REG_RA, REG_SP, 0);
2971                                 M_LST(REG_RESULT, REG_SP, 8);
2972                                 M_DST(REG_FRESULT, REG_SP,16);
2973                                 a = dseg_addaddress (method);
2974                                 M_ALD(argintregs[0], REG_PV, a);
2975                                 M_MOV(REG_RESULT, argintregs[1]);
2976                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
2977                                 M_FMOV(REG_FRESULT, argfltregs[3]);
2978                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
2979                                 M_ALD(REG_ITMP3, REG_PV, a);
2980                                 M_JSR (REG_RA, REG_ITMP3);
2981                                 M_NOP;
2982                                 M_DLD(REG_FRESULT, REG_SP,16);
2983                                 M_LLD(REG_RESULT, REG_SP, 8);
2984                                 M_LLD(REG_RA, REG_SP, 0);
2985                                 M_LDA (REG_SP, REG_SP, 24);
2986                                 }
2987
2988                         M_RET(REG_RA);
2989
2990                         /* deallocate stack                                               */
2991
2992                         if (parentargs_base)
2993                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
2994                         else
2995                                 {M_NOP;}
2996                         ALIGNCODENOP;
2997                         }
2998                         break;
2999
3000
3001                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3002                         {
3003                         s4 i, l, *s4ptr;
3004                         void **tptr;
3005
3006                         tptr = (void **) iptr->target;
3007
3008                         s4ptr = iptr->val.a;
3009                         l = s4ptr[1];                          /* low     */
3010                         i = s4ptr[2];                          /* high    */
3011
3012                         var_to_reg_int(s1, src, REG_ITMP1);
3013                         if (l == 0)
3014                                 {M_INTMOVE(s1, REG_ITMP1);}
3015                         else if (l <= 32768) {
3016                                 M_IADD_IMM(s1, -l, REG_ITMP1);
3017                                 }
3018                         else {
3019                                 ICONST(REG_ITMP2, l);
3020                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3021                                 }
3022                         i = i - l + 1;
3023
3024                         /* range check */
3025
3026                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
3027                         M_BEQZ(REG_ITMP2, 0);
3028                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3029                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
3030
3031                         /* build jump table top down and use address of lowest entry */
3032
3033                         /* s4ptr += 3 + i; */
3034                         tptr += i;
3035
3036                         while (--i >= 0) {
3037                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3038                                 dseg_addtarget((basicblock *) tptr[0]);
3039                                 --tptr;
3040                                 }
3041                         }
3042
3043                         /* length of dataseg after last dseg_addtarget is used by load */
3044
3045                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
3046                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3047                         M_JMP(REG_ITMP2);
3048                         M_NOP;
3049                         ALIGNCODENOP;
3050                         break;
3051
3052
3053                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3054                         {
3055                         s4 i, l, val, *s4ptr;
3056                         void **tptr;
3057
3058                         tptr = (void **) iptr->target;
3059
3060                         s4ptr = iptr->val.a;
3061                         l = s4ptr[0];                          /* default  */
3062                         i = s4ptr[1];                          /* count    */
3063
3064                         MCODECHECK((i<<2)+8);
3065                         var_to_reg_int(s1, src, REG_ITMP1);
3066                         while (--i >= 0) {
3067                                 s4ptr += 2;
3068                                 ++tptr;
3069
3070                                 val = s4ptr[0];
3071                                 ICONST(REG_ITMP2, val);
3072                                 M_BEQ(s1, REG_ITMP2, 0);
3073                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3074                                 M_NOP;
3075                                 }
3076
3077                         M_BR(0);
3078                         tptr = (void **) iptr->target;
3079                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3080                         M_NOP;
3081                         ALIGNCODENOP;
3082                         break;
3083                         }
3084
3085
3086                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3087                                         /* op1 = return type, val.a = function pointer*/
3088                         s3 = 3;
3089                         goto gen_method;
3090
3091                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3092                                         /* op1 = return type, val.a = function pointer*/
3093                         s3 = 2;
3094                         goto gen_method;
3095
3096                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3097                                         /* op1 = return type, val.a = function pointer*/
3098                         s3 = 1;
3099                         goto gen_method;
3100
3101                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3102                                         /* op1 = arg count, val.a = method pointer    */
3103
3104                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3105                                         /* op1 = arg count, val.a = method pointer    */
3106
3107                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3108                                         /* op1 = arg count, val.a = method pointer    */
3109
3110                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3111                                         /* op1 = arg count, val.a = method pointer    */
3112
3113                         s3 = iptr->op1;
3114
3115 gen_method: {
3116                         methodinfo   *m;
3117                         classinfo    *ci;
3118
3119                         MCODECHECK((s3 << 1) + 64);
3120
3121                         /* copy arguments to registers or stack location                  */
3122
3123                         for (; --s3 >= 0; src = src->prev) {
3124                                 if (src->varkind == ARGVAR)
3125                                         continue;
3126                                 if (IS_INT_LNG_TYPE(src->type)) {
3127                                         if (s3 < INT_ARG_CNT) {
3128                                                 s1 = argintregs[s3];
3129                                                 var_to_reg_int(d, src, s1);
3130                                                 M_INTMOVE(d, s1);
3131                                                 }
3132                                         else  {
3133                                                 var_to_reg_int(d, src, REG_ITMP1);
3134                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3135                                                 }
3136                                         }
3137                                 else
3138                                         if (s3 < FLT_ARG_CNT) {
3139                                                 s1 = argfltregs[s3];
3140                                                 var_to_reg_flt(d, src, s1);
3141                                                 M_TFLTMOVE(src->type,d, s1);
3142                                                 }
3143                                         else {
3144                                                 var_to_reg_flt(d, src, REG_FTMP1);
3145                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3146                                                 }
3147                                 } /* end of for */
3148
3149                         m = iptr->val.a;
3150                         switch (iptr->opc) {
3151                                 case ICMD_BUILTIN3:
3152                                 case ICMD_BUILTIN2:
3153                                 case ICMD_BUILTIN1:
3154                                         a = dseg_addaddress ((void*) (m));
3155                                         M_ALD(REG_ITMP3, REG_PV, a); /* built-in-function pointer */
3156                                         M_JSR (REG_RA, REG_ITMP3);
3157                                         M_NOP;
3158                                         d = iptr->op1;                             /* return type */
3159                                         goto afteractualcall;
3160
3161                                 case ICMD_INVOKESTATIC:
3162                                 case ICMD_INVOKESPECIAL:
3163                                         a = dseg_addaddress (m->stubroutine);
3164
3165                                         M_ALD(REG_PV, REG_PV, a );        /* method pointer in pv */
3166
3167                                         d = m->returntype;
3168                                         goto makeactualcall;
3169
3170                                 case ICMD_INVOKEVIRTUAL:
3171
3172                                         gen_nullptr_check(argintregs[0]);
3173                                         M_ALD(REG_METHODPTR, argintregs[0],
3174                                                                  OFFSET(java_objectheader, vftbl));
3175                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3176                                                                 sizeof(methodptr) * m->vftblindex);
3177
3178                                         d = m->returntype;
3179                                         goto makeactualcall;
3180
3181                                 case ICMD_INVOKEINTERFACE:
3182                                         ci = m->class;
3183
3184                                         gen_nullptr_check(argintregs[0]);
3185                                         M_ALD(REG_METHODPTR, argintregs[0],
3186                                                                  OFFSET(java_objectheader, vftbl));
3187                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3188                                               OFFSET(vftbl, interfacetable[0]) -
3189                                               sizeof(methodptr*) * ci->index);
3190                                         M_ALD(REG_PV, REG_METHODPTR,
3191                                                             sizeof(methodptr) * (m - ci->methods));
3192
3193                                         d = m->returntype;
3194                                         goto makeactualcall;
3195
3196                                 default:
3197                                         d = 0;
3198                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3199                                         error ();
3200                                 }
3201
3202 makeactualcall:
3203
3204                         M_JSR (REG_RA, REG_PV);
3205                         M_NOP;
3206
3207                         /* recompute pv */
3208
3209 afteractualcall:
3210
3211                         s1 = (int)((u1*) mcodeptr - mcodebase);
3212                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3213                         else {
3214                                         s4 ml=-s1, mh=0;
3215                                         while (ml<-32768) { ml+=65536; mh--; }
3216                                         M_LUI(REG_PV, mh);
3217                                         M_IADD_IMM(REG_PV, ml, REG_PV);
3218                                         M_LADD(REG_PV, REG_RA, REG_PV);
3219                                 }
3220
3221                         /* d contains return type */
3222
3223                         if (d != TYPE_VOID) {
3224                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3225                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3226                                         M_INTMOVE(REG_RESULT, s1);
3227                                         store_reg_to_var_int(iptr->dst, s1);
3228                                         }
3229                                 else {
3230                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3231                                         M_TFLTMOVE(iptr->dst->type, REG_FRESULT, s1);
3232                                         store_reg_to_var_flt(iptr->dst, s1);
3233                                         }
3234                                 }
3235                         }
3236                         break;
3237
3238
3239                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3240
3241                                       /* op1:   0 == array, 1 == class                */
3242                                       /* val.a: (classinfo*) superclass               */
3243
3244 /*          superclass is an interface:
3245  *
3246  *          return (sub != NULL) &&
3247  *                 (sub->vftbl->interfacetablelength > super->index) &&
3248  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3249  *
3250  *          superclass is a class:
3251  *
3252  *          return ((sub != NULL) && (0
3253  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3254  *                  super->vftbl->diffvall));
3255  */
3256
3257                         {
3258                         classinfo *super = (classinfo*) iptr->val.a;
3259
3260                         var_to_reg_int(s1, src, REG_ITMP1);
3261                         d = reg_of_var(iptr->dst, REG_ITMP3);
3262                         if (s1 == d) {
3263                                 M_MOV(s1, REG_ITMP1);
3264                                 s1 = REG_ITMP1;
3265                                 }
3266                         M_CLR(d);
3267                         if (iptr->op1) {                               /* class/interface */
3268                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3269                                         M_BEQZ(s1, 8);
3270                                         M_NOP;
3271                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3272                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3273                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3274                                         M_BLEZ(REG_ITMP2, 3);
3275                                         M_NOP;
3276                                         M_ALD(REG_ITMP1, REG_ITMP1,
3277                                               OFFSET(vftbl, interfacetable[0]) -
3278                                               super->index * sizeof(methodptr*));
3279                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3280                                         }
3281                                 else {                                     /* class           */
3282                                         /*
3283                                         s2 = super->vftbl->diffval;
3284                                         M_BEQZ(s1, 5);
3285                                         M_NOP;
3286                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3287                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3288                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3289                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3290                                         */
3291
3292                                         M_BEQZ(s1, 9);
3293                                         M_NOP;
3294                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3295                     a = dseg_addaddress ((void*) super->vftbl);
3296                     M_ALD(REG_ITMP2, REG_PV, a);
3297                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3298                     M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3299                     M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3300                     M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3301                     M_CMPULT(REG_ITMP2, REG_ITMP1, d);
3302                                         M_XOR_IMM(d, 1, d);
3303
3304                                         }
3305                                 }
3306                         else
3307                                 panic ("internal error: no inlined array instanceof");
3308                         }
3309                         store_reg_to_var_int(iptr->dst, d);
3310                         break;
3311
3312                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3313
3314                                       /* op1:   0 == array, 1 == class                */
3315                                       /* val.a: (classinfo*) superclass               */
3316
3317 /*          superclass is an interface:
3318  *
3319  *          OK if ((sub == NULL) ||
3320  *                 (sub->vftbl->interfacetablelength > super->index) &&
3321  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3322  *
3323  *          superclass is a class:
3324  *
3325  *          OK if ((sub == NULL) || (0
3326  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3327  *                 super->vftbl->diffvall));
3328  */
3329
3330                         {
3331                         classinfo *super = (classinfo*) iptr->val.a;
3332
3333                         d = reg_of_var(iptr->dst, REG_ITMP3);
3334                         var_to_reg_int(s1, src, d);
3335                         if (iptr->op1) {                               /* class/interface */
3336                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3337                                         M_BEQZ(s1, 9);
3338                                         M_NOP;
3339                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3340                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3341                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3342                                         M_BLEZ(REG_ITMP2, 0);
3343                                         codegen_addxcastrefs(mcodeptr);
3344                                         M_NOP;
3345                                         M_ALD(REG_ITMP2, REG_ITMP1,
3346                                               OFFSET(vftbl, interfacetable[0]) -
3347                                               super->index * sizeof(methodptr*));
3348                                         M_BEQZ(REG_ITMP2, 0);
3349                                         codegen_addxcastrefs(mcodeptr);
3350                                         M_NOP;
3351                                         }
3352                                 else {                                     /* class           */
3353
3354                                         /*
3355                                         s2 = super->vftbl->diffval;
3356                                         M_BEQZ(s1, 6 + (s2 != 0));
3357                                         M_NOP;
3358                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3359                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3360                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3361                                         if (s2 == 0) {
3362                                                 M_BNEZ(REG_ITMP1, 0);
3363                                                 }
3364                                         else{
3365                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3366                                                 M_BEQZ(REG_ITMP2, 0);
3367                                                 }
3368                                         */
3369
3370                                         M_BEQZ(s1, 10 + (d == REG_ITMP3));
3371                                         M_NOP;
3372                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3373                     a = dseg_addaddress ((void*) super->vftbl);
3374                     M_ALD(REG_ITMP2, REG_PV, a);
3375                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3376                                         if (d != REG_ITMP3) {
3377                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3378                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3379                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3380                                         } else {
3381                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3382                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3383                                                 M_ALD(REG_ITMP2, REG_PV, a);
3384                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3385                                         }
3386                     M_CMPULT(REG_ITMP2, REG_ITMP1, REG_ITMP2);
3387                                         M_BNEZ(REG_ITMP2, 0);
3388
3389                                         codegen_addxcastrefs(mcodeptr);
3390                                         M_NOP;
3391                                         }
3392                                 }
3393                         else
3394                                 panic ("internal error: no inlined array checkcast");
3395                         }
3396                         M_INTMOVE(s1, d);
3397                         store_reg_to_var_int(iptr->dst, d);
3398                         break;
3399
3400                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3401
3402                         var_to_reg_int(s1, src, REG_ITMP1);
3403                         M_BLTZ(s1, 0);
3404                         codegen_addxcheckarefs(mcodeptr);
3405                         M_NOP;
3406                         break;
3407
3408                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3409                                       /* op1 = dimension, val.a = array descriptor    */
3410
3411                         /* check for negative sizes and copy sizes to stack if necessary  */
3412
3413                         MCODECHECK((iptr->op1 << 1) + 64);
3414
3415                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3416                                 var_to_reg_int(s2, src, REG_ITMP1);
3417                                 M_BLTZ(s2, 0);
3418                                 codegen_addxcheckarefs(mcodeptr);
3419                                 M_NOP;
3420
3421                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3422
3423                                 if (src->varkind != ARGVAR) {
3424                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3425                                         }
3426                                 }
3427
3428                         /* a0 = dimension count */
3429
3430                         ICONST(argintregs[0], iptr->op1);
3431
3432                         /* a1 = arraydescriptor */
3433
3434                         a = dseg_addaddress(iptr->val.a);
3435                         M_ALD(argintregs[1], REG_PV, a);
3436
3437                         /* a2 = pointer to dimensions = stack pointer */
3438
3439                         M_INTMOVE(REG_SP, argintregs[2]);
3440
3441                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3442                         M_ALD(REG_ITMP3, REG_PV, a);
3443                         M_JSR(REG_RA, REG_ITMP3);
3444                         M_NOP;
3445                         s1 = (int)((u1*) mcodeptr - mcodebase);
3446                         if (s1 <= 32768)
3447                                 M_LDA (REG_PV, REG_RA, -s1);
3448                         else {
3449                                 panic("To big");
3450                             }
3451                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3452                         M_INTMOVE(REG_RESULT, s1);
3453                         store_reg_to_var_int(iptr->dst, s1);
3454                         break;
3455
3456
3457                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3458                          error();
3459
3460
3461
3462         } /* switch */
3463
3464         } /* for instruction */
3465
3466         /* copy values to interface registers */
3467
3468         src = bptr->outstack;
3469         len = bptr->outdepth;
3470         MCODECHECK(64+len);
3471         while (src) {
3472                 len--;
3473                 if ((src->varkind != STACKVAR)) {
3474                         s2 = src->type;
3475                         if (IS_FLT_DBL_TYPE(s2)) {
3476                                 var_to_reg_flt(s1, src, REG_FTMP1);
3477                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3478                                         M_TFLTMOVE(s2,s1,interfaces[len][s2].regoff);
3479                                         }
3480                                 else {
3481                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3482                                         }
3483                                 }
3484                         else {
3485                                 var_to_reg_int(s1, src, REG_ITMP1);
3486                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3487                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3488                                         }
3489                                 else {
3490                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3491                                         }
3492                                 }
3493                         }
3494                 src = src->prev;
3495                 }
3496         } /* if (bptr -> flags >= BBREACHED) */
3497         } /* for basic block */
3498
3499         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3500
3501         {
3502         /* generate bound check stubs */
3503
3504         s4 *xcodeptr = NULL;
3505
3506         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3507                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3508                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3509                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3510                         continue;
3511                         }
3512
3513
3514                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3515                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3516
3517                 MCODECHECK(8);
3518
3519                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3520
3521                 if (xcodeptr != NULL) {
3522                         int disp = xcodeptr-mcodeptr;
3523                         M_BR(disp-1);
3524                         M_NOP;
3525                         }
3526                 else {
3527                         xcodeptr = mcodeptr;
3528
3529                         a = dseg_addaddress(asm_handle_exception);
3530                         M_ALD(REG_ITMP3, REG_PV, a);
3531
3532                         M_JMP(REG_ITMP3);
3533                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3534                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3535                         }
3536                 }
3537
3538         /* generate negative array size check stubs */
3539
3540         xcodeptr = NULL;
3541
3542         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3543                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3544                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3545                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3546                         continue;
3547                         }
3548
3549                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3550                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3551
3552                 MCODECHECK(8);
3553
3554                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3555
3556                 if (xcodeptr != NULL) {
3557                         int disp = xcodeptr-mcodeptr;
3558                         M_BR(disp-1);
3559                         M_NOP;
3560                         }
3561                 else {
3562                         xcodeptr = mcodeptr;
3563
3564                         a = dseg_addaddress(asm_handle_exception);
3565                         M_ALD(REG_ITMP3, REG_PV, a);
3566
3567                         M_JMP(REG_ITMP3);
3568                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3569                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3570                         }
3571                 }
3572
3573         /* generate cast check stubs */
3574
3575         xcodeptr = NULL;
3576
3577         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3578                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3579                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3580                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3581                         continue;
3582                         }
3583
3584                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3585                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3586
3587                 MCODECHECK(8);
3588
3589                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3590
3591                 if (xcodeptr != NULL) {
3592                         int disp = xcodeptr-mcodeptr;
3593                         M_BR(disp-1);
3594                         M_NOP;
3595                         }
3596                 else {
3597                         xcodeptr = mcodeptr;
3598
3599                         a = dseg_addaddress(asm_handle_exception);
3600                         M_ALD(REG_ITMP3, REG_PV, a);
3601
3602                         M_JMP(REG_ITMP3);
3603                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3604                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3605                         }
3606                 }
3607
3608
3609 #ifdef SOFTNULLPTRCHECK
3610
3611         /* generate null pointer check stubs */
3612
3613         xcodeptr = NULL;
3614
3615         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3616                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3617                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3618                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3619                         continue;
3620                         }
3621
3622                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3623                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3624
3625                 MCODECHECK(8);
3626
3627                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3628
3629                 if (xcodeptr != NULL) {
3630                         int disp = xcodeptr-mcodeptr;
3631                         M_BR(disp-1);
3632                         M_NOP;
3633                         }
3634                 else {
3635                         xcodeptr = mcodeptr;
3636
3637                         a = dseg_addaddress(asm_handle_exception);
3638                         M_ALD(REG_ITMP3, REG_PV, a);
3639
3640                         M_JMP(REG_ITMP3);
3641                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3642                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3643                         }
3644                 }
3645
3646 #endif
3647         }
3648
3649         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3650
3651         docacheflush((void*) method->entrypoint,
3652                           ((u1*) mcodeptr - mcodebase));
3653 }
3654
3655
3656 /* redefinition of code generation macros (compiling into array) **************/
3657
3658 /*
3659 These macros are newly defined to allow code generation into an array.
3660 This is necessary, because the original M_.. macros generate code by
3661 calling 'codegen_adds4' that uses an additional data structure to
3662 receive the code.
3663
3664 For a faster (but less flexible) version to generate code, these
3665 macros directly use the (s4* p) - pointer to put the code directly
3666 in a locally defined array.
3667 This makes sense only for the stub-generation-routines below.
3668 */
3669
3670 #undef M_ITYPE
3671 #define M_ITYPE(op, rs, rt, imm)\
3672   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((imm)&0xffff))
3673
3674 #undef M_JTYPE
3675 #define M_JTYPE(op, imm)\
3676   *(p++) = (((op)<<26)|((off)&0x3ffffff))
3677
3678 #undef M_RTYPE
3679 #define M_RTYPE(op, rs, rt, rd, sa, fu)\
3680   *(p++) = (((op)<<26)|((rs)<<21)|((rt)<<16)|((rd)<<11)|((sa)<<6)|(fu))
3681
3682
3683 /* function createcompilerstub *************************************************
3684
3685         creates a stub routine which calls the compiler
3686
3687 *******************************************************************************/
3688
3689 #define COMPSTUBSIZE 4
3690
3691 u1 *createcompilerstub (methodinfo *m)
3692 {
3693         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3694         s4 *p = (s4*) s;                    /* code generation pointer            */
3695
3696                                             /* code for the stub                  */
3697         M_ALD(REG_PV, REG_PV, 24);          /* load pointer to the compiler       */
3698         M_NOP;
3699         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3700                                                in itmp1 is used as method pointer */
3701         M_NOP;
3702
3703         s[2] = (u8) m;                      /* literals to be adressed            */
3704         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3705
3706         (void) docacheflush((void*) s, (char*) p - (char*) s);
3707
3708 #ifdef STATISTICS
3709         count_cstub_len += COMPSTUBSIZE * 8;
3710 #endif
3711
3712         return (u1*) s;
3713 }
3714
3715
3716 /* function removecompilerstub *************************************************
3717
3718      deletes a compilerstub from memory  (simply by freeing it)
3719
3720 *******************************************************************************/
3721
3722 void removecompilerstub (u1 *stub)
3723 {
3724         CFREE(stub, COMPSTUBSIZE * 8);
3725 }
3726
3727 /* function: createnativestub **************************************************
3728
3729         creates a stub routine which calls a native method
3730
3731 *******************************************************************************/
3732
3733 #define NATIVESTUBSIZE 20
3734
3735 u1 *createnativestub (functionptr f, methodinfo *m)
3736 {
3737         u8 *s = CNEW(u8, NATIVESTUBSIZE);   /* memory to hold the stub            */
3738         s4 *p = (s4*) s;                    /* code generation pointer            */
3739
3740         reg_init(m);
3741
3742         M_MOV  (argintregs[4], argintregs[5]);
3743         M_DMFC1 (REG_ITMP1, argfltregs[4]);
3744
3745         M_MOV  (argintregs[3], argintregs[4]);
3746         M_DMTC1 (REG_ITMP1, argfltregs[5]);
3747
3748         M_MOV  (argintregs[2], argintregs[3]);
3749         M_DMFC1 (REG_ITMP1, argfltregs[3]);
3750
3751         M_MOV  (argintregs[1], argintregs[2]);
3752         M_DMTC1 (REG_ITMP1, argfltregs[4]);
3753
3754         M_MOV  (argintregs[0], argintregs[1]);
3755         M_DMFC1 (REG_ITMP1, argfltregs[2]);
3756
3757         M_ALD  (argintregs[0], REG_PV, 19*8); /* load adress of jni_environement  */
3758         M_DMTC1 (REG_ITMP1, argfltregs[3]);
3759
3760         M_DMFC1 (REG_ITMP1, argfltregs[1]);
3761         M_DMFC1 (REG_ITMP2, argfltregs[0]);
3762
3763         M_DMTC1 (REG_ITMP1, argfltregs[2]);
3764         M_DMTC1 (REG_ITMP2, argfltregs[1]);
3765
3766         M_ALD  (REG_ITMP3, REG_PV, 16*8);   /* load adress of native method       */
3767         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3768
3769         M_LST  (REG_RA, REG_SP, 0);         /* store return address               */
3770         M_JSR  (REG_RA, REG_ITMP3);         /* call native method                 */
3771
3772         M_NOP;                              /* delay slot                         */
3773         M_ALD  (REG_ITMP3, REG_PV, 17*8);   /* get address of exceptionptr        */
3774
3775         M_LLD  (REG_RA, REG_SP, 0);         /* load return address                */
3776         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3777
3778         M_BNEZ (REG_ITMP1, 2);              /* if no exception then return        */
3779         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe, delay slot      */
3780
3781         M_RET  (REG_RA);                    /* return to caller                   */
3782         M_NOP;                              /* delay slot                         */
3783
3784         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3785         M_ALD  (REG_ITMP3, REG_PV,18*8);    /* load asm exception handler address */
3786
3787         M_JMP  (REG_ITMP3);                 /* jump to asm exception handler      */
3788         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3789                                             /* delay slot                         */
3790
3791         s[16] = (u8) f;                     /* address of native method           */
3792         s[17] = (u8) (&exceptionptr);       /* address of exceptionptr            */
3793         s[18]= (u8) (asm_handle_nat_exception); /* addr of asm exception handler  */
3794         s[19] = (u8) (&env);                  /* addr of jni_environement         */
3795
3796         (void) docacheflush((void*) s, (char*) p - (char*) s);
3797
3798 #ifdef STATISTICS
3799         count_nstub_len += NATIVESTUBSIZE * 8;
3800 #endif
3801
3802         return (u1*) s;
3803 }
3804
3805 /* function: removenativestub **************************************************
3806
3807     removes a previously created native-stub from memory
3808
3809 *******************************************************************************/
3810
3811 void removenativestub (u1 *stub)
3812 {
3813         CFREE(stub, NATIVESTUBSIZE * 8);
3814 }
3815
3816
3817 /* function: createcalljava ****************************************************
3818
3819         creates the asm_calljavamethod (MIPS assembler does not like data in the
3820         text segment). Documentation can be found in asmpart.c.
3821
3822 *******************************************************************************/
3823
3824 #define REG_FSS0    20
3825 #define REG_FSS1    22
3826 #define REG_FSS2    25
3827 #define REG_FSS3    27
3828 #define REG_FSS4    29
3829 #define REG_FSS5    31
3830
3831 #define CALL_JAVA_MEM_SIZE 60
3832 #define CALL_JAVA_ENTRY    20
3833 #define CALL_JAVA_XHANDLER 55
3834
3835 static s4 calljavamem[CALL_JAVA_MEM_SIZE];
3836
3837 void createcalljava ()
3838 {
3839         s4 *p;
3840
3841         *((void**)(calljavamem + 0)) = (void*) asm_call_jit_compiler;
3842         *((void**)(calljavamem + 2)) = (void*) builtin_throw_exception;
3843 #if POINTERSIZE==8
3844         *((void**)(calljavamem + 4)) = NULL;
3845         *((void**)(calljavamem + 6)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3846         *((void**)(calljavamem + 8)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3847         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3848 #else
3849         *((void**)(calljavamem + 8)) = NULL;
3850         *((void**)(calljavamem + 9)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3851         *((void**)(calljavamem +10)) = (void*) (calljavamem + CALL_JAVA_XHANDLER);
3852         *((void**)(calljavamem +11)) = (void*) (calljavamem + CALL_JAVA_ENTRY);
3853 #endif
3854
3855         calljavamem[12] = 1;                /* extable size                       */
3856         calljavamem[13] = 0;                /* fltsave                            */
3857         calljavamem[14] = 0;                /* intsave                            */
3858         calljavamem[15] = 0;                /* isleaf                             */
3859         calljavamem[16] = 0;                /* IsSync                             */
3860         calljavamem[17] = 80;               /* frame size                         */
3861         calljavamem[18] = 0;                /* method pointer (NULL)              */
3862         calljavamem[19] = 0;                /* method pointer (NULL)              */
3863
3864         p = calljavamem + CALL_JAVA_ENTRY;  /* code generation pointer            */
3865
3866 /*  20 */
3867         M_LDA (REG_SP, REG_SP, -10*8);      /* allocate stackframe                */
3868         M_LST (REG_RA, REG_SP, 0);          /* save return address                */
3869
3870         M_BRS(1);                           /* compute current program counter    */
3871         M_LST (REG_PV, REG_SP, 3*8);        /* save procedure vector              */
3872 /*  24 */
3873         M_LDA (REG_PV, REG_RA, -4*4);       /* compute procedure vector           */
3874         M_DST (REG_FSS0, REG_SP, 4*8);      /* save non JavaABI saved flt regs    */
3875
3876         M_DST (REG_FSS1, REG_SP, 5*8);
3877         M_DST (REG_FSS2, REG_SP, 6*8);
3878 /*  28 */
3879         M_DST (REG_FSS3, REG_SP, 7*8);
3880         M_DST (REG_FSS4, REG_SP, 8*8);
3881
3882         M_DST (REG_FSS5, REG_SP, 9*8);
3883         M_LST (REG_ARG_0, REG_SP, 2*8);     /* save method pointer for compiler   */
3884 /*  32 */
3885         M_LDA (REG_ITMP1, REG_SP, 2*8);     /* pass pointer to methodptr via itmp1*/
3886         M_MOV (REG_ARG_1, REG_ARG_0);       /* pass the remaining parameters      */
3887
3888         M_MOV (REG_ARG_2, REG_ARG_1);
3889         M_MOV (REG_ARG_3, REG_ARG_2);
3890 /*  36 */
3891         M_MOV (REG_ARG_4, REG_ARG_3);
3892         M_ALD (REG_METHODPTR, REG_PV, -80); /* address of asm_call_jit_compiler   */
3893
3894         M_AST (REG_METHODPTR, REG_SP, 8);   /* store function address             */
3895         M_MOV (REG_SP, REG_METHODPTR);      /* set method pointer                 */
3896 /*  40 */
3897         M_ALD (REG_PV, REG_METHODPTR, 8);   /* method call as in Java             */
3898         M_JSR (REG_RA, REG_PV);             /* call JIT compiler                  */
3899
3900         M_NOP;                              /* delay slot                         */
3901         M_LDA (REG_PV, REG_RA, -23*4);      /* recompute procedure vector         */
3902
3903 /*  44 */
3904 #if 0
3905         M_CLR (REG_RESULT);                 /* clear return value (exception ptr) */
3906 #else
3907         M_NOP;
3908 #endif
3909 /*  calljava_return: */
3910         M_LLD (REG_RA, REG_SP, 0);          /* restore return address             */
3911
3912         M_LLD (REG_PV, REG_SP, 3*8);        /* restore procedure vector           */
3913         M_DLD (REG_FSS0, REG_SP, 4*8);      /* restore non JavaABI saved flt regs */
3914 /*  48 */
3915         M_DLD (REG_FSS1, REG_SP, 5*8);
3916         M_DLD (REG_FSS2, REG_SP, 6*8);
3917
3918         M_DLD (REG_FSS3, REG_SP, 7*8);
3919         M_DLD (REG_FSS4, REG_SP, 8*8);
3920 /*  52 */
3921         M_DLD (REG_FSS5, REG_SP, 9*8);
3922         M_RET(REG_RA);                      /* return                             */
3923
3924         M_LDA (REG_SP, REG_SP, 10*8);       /* deallocate stackframe (delay slot) */
3925
3926 /*  55 */
3927 /*  calljava_xhandler: */
3928
3929         M_ALD (REG_ITMP3, REG_PV, -72);     /* address of builtin_throw_exception */
3930
3931         M_JSR (REG_RA, REG_ITMP3);          /* call builtin                       */
3932         M_MOV (REG_ITMP1, REG_ARG_0);       /* pass parameter (delay slot)        */
3933 /*  58 */
3934         M_BR(-14);                          /* branch calljava_return             */
3935         M_NOP;                              /* delay slot                         */
3936
3937         (void) docacheflush((void*)(calljavamem + CALL_JAVA_ENTRY),
3938                (CALL_JAVA_MEM_SIZE - CALL_JAVA_ENTRY) * (int) sizeof(s4));
3939 }
3940
3941
3942 typedef java_objectheader* (*asm_fptr)(methodinfo*, void*, void*, void*, void*);
3943
3944
3945 java_objectheader *asm_calljavamethod (methodinfo *m, void *arg1, void *arg2,
3946                                                       void *arg3, void *arg4)
3947 {
3948         java_objectheader *r = ((asm_fptr)(calljavamem + 20))(m, arg1, arg2, arg3, arg4);
3949         return (exceptionptr ? r : NULL);
3950 }
3951
3952
3953 java_objectheader *asm_calljavafunction (methodinfo *m, void *arg1, void *arg2,
3954                                                       void *arg3, void *arg4)
3955 {
3956         return ((asm_fptr)(calljavamem + 20))(m, arg1, arg2, arg3, arg4);
3957 }
3958
3959
3960 void docacheflush(u1 *p, long bytelen)
3961 {
3962         u1 *e = p + bytelen;
3963         long psize = sysconf(_SC_PAGESIZE);
3964         p -= (long) p & (psize-1);
3965         e += psize - ((((long) e - 1) & (psize-1)) + 1);
3966         bytelen = e-p;
3967         mprotect(p, bytelen, PROT_READ|PROT_WRITE|PROT_EXEC);
3968 }
3969
3970
3971 /*
3972  * These are local overrides for various environment variables in Emacs.
3973  * Please do not remove this and leave it at the end of the file, where
3974  * Emacs will automagically detect them.
3975  * ---------------------------------------------------------------------
3976  * Local variables:
3977  * mode: c
3978  * indent-tabs-mode: t
3979  * c-basic-offset: 4
3980  * tab-width: 4
3981  * End:
3982  */