src/vm/jit/mips/codegen.c

   1 /* jit/mips/codegen.c - machine code generator for mips
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    Contains the codegenerator for an MIPS (R4000 or higher) processor.
  32    This module generates MIPS machine code for a sequence of
  33    intermediate code commands (ICMDs).
  34
  35    $Id: codegen.c 1291 2004-07-09 13:20:56Z twisti $
  36
  37 */
  38
  39
  40 #include <stdio.h>
  41 #include <signal.h>
  42 #include <unistd.h>
  43 #include <sys/mman.h>
  44 #include "jit/mips/types.h"
  45 #include "main.h"
  46 #include "builtin.h"
  47 #include "asmpart.h"
  48 #include "jni.h"
  49 #include "loader.h"
  50 #include "tables.h"
  51 #include "native.h"
  52 #include "jit/jit.h"
  53 #include "jit/reg.h"
  54 #include "jit/mips/codegen.h"
  55
  56 /* include independent code generation stuff */
  57 #include "jit/codegen.inc"
  58 #include "jit/reg.inc"
  59
  60
  61 /* *****************************************************************************
  62
  63 Datatypes and Register Allocations:
  64 -----------------------------------
  65
  66 On 64-bit-machines (like the MIPS) all operands are stored in the
  67 registers in a 64-bit form, even when the correspondig JavaVM operands
  68 only need 32 bits. This is done by a canonical representation:
  69
  70 32-bit integers are allways stored as sign-extended 64-bit values (this
  71 approach is directly supported by the MIPS architecture and is very easy
  72 to implement).
  73
  74 32-bit-floats are stored in a 64-bit double precision register by simply
  75 expanding the exponent and mantissa with zeroes. (also supported by the
  76 architecture)
  77
  78
  79 Stackframes:
  80
  81 The calling conventions and the layout of the stack is  explained in detail
  82 in the documention file: calling.doc
  83
  84 *******************************************************************************/
  85
  86
  87 /* register descripton - array ************************************************/
  88
  89 /* #define REG_RES   0         reserved register for OS or code generator     */
  90 /* #define REG_RET   1         return value register                          */
  91 /* #define REG_EXC   2         exception value register (only old jit)        */
  92 /* #define REG_SAV   3         (callee) saved register                        */
  93 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  94 /* #define REG_ARG   5         argument register (caller saved)               */
  95
  96 /* #define REG_END   -1        last entry in tables */
  97
  98 int nregdescint[] = {
  99         REG_RES, REG_RES, REG_RET, REG_RES, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
 100         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 101         REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 102         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 103         REG_END };
 104
 105 /* for use of reserved registers, see comment above */
 106
 107 int nregdescfloat[] = {
 108         REG_RET, REG_RES, REG_RES, REG_RES, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 109         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_ARG, REG_ARG, REG_ARG, REG_ARG,
 110         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 111         REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP,
 112         REG_END };
 113
 114 /* for use of reserved registers, see comment above */
 115
 116
 117 /* NullPointerException handlers and exception handling initialisation        */
 118
 119 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 120 void thread_restartcriticalsection(ucontext_t *uc)
 121 {
 122         void *critical;
 123         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.gregs[CTX_EPC])) != NULL)
 124                 uc->uc_mcontext.gregs[CTX_EPC] = (u8) critical;
 125 }
 126 #endif
 127
 128 /* NullPointerException signal handler for hardware null pointer check */
 129
 130 void catch_NullPointerException(int sig, int code, struct sigcontext *sigctx)
 131 {
 132         sigset_t nsig;
 133         int      instr;
 134         long     faultaddr;
 135         java_objectheader *xptr;
 136
 137         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 138
 139         instr = *((int*)(sigctx->sc_pc));
 140         faultaddr = sigctx->sc_regs[(instr >> 21) & 0x1f];
 141
 142         if (faultaddr == 0) {
 143                 sigemptyset(&nsig);
 144                 sigaddset(&nsig, sig);
 145                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 146
 147                 xptr = new_exception(string_java_lang_NullPointerException);
 148
 149
 150                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 151                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 152                 sigctx->sc_pc = (u8) asm_handle_exception;
 153
 154         } else {
 155         faultaddr += (long) ((instr << 16) >> 16);
 156                 fprintf(stderr, "faulting address: 0x%lx at 0x%lx\n", (long) faultaddr, (long) sigctx->sc_pc);
 157                 panic("Stack overflow");
 158         }
 159 }
 160
 161
 162 #include <sys/fpu.h>
 163
 164 void init_exceptions(void)
 165 {
 166         struct sigaction sa;
 167         sigset_t unblockmask;
 168
 169         /* The Boehm GC initialization blocks the SIGSEGV signal. So we do a
 170            dummy allocation here to ensure that the GC is initialized.
 171         */
 172         heap_allocate(1, 0, NULL);
 173
 174         /* install signal handlers we need to convert to exceptions */
 175
 176         sigemptyset(&unblockmask);
 177         sa.sa_flags = 0;
 178         sa.sa_sigaction = catch_NullPointerException;
 179         sigemptyset(&sa.sa_mask);
 180
 181         if (!checknull) {
 182 #if defined(SIGSEGV)
 183                 sigaction(SIGSEGV, &sa, NULL);
 184                 sigaddset(&unblockmask, SIGSEGV);
 185 #endif
 186
 187 #if defined(SIGBUS)
 188                 sigaction(SIGBUS, &sa, NULL);
 189                 sigaddset(&unblockmask, SIGBUS);
 190 #endif
 191         }
 192
 193         sigprocmask(SIG_UNBLOCK, &unblockmask, NULL);
 194
 195         /* Turn off flush-to-zero */
 196         {
 197                 union fpc_csr n;
 198                 n.fc_word = get_fpc_csr();
 199                 n.fc_struct.flush = 0;
 200                 set_fpc_csr(n.fc_word);
 201         }
 202 }
 203
 204
 205 /* function gen_mcode **********************************************************
 206
 207         generates machine code
 208
 209 *******************************************************************************/
 210
 211 void codegen(methodinfo *m)
 212 {
 213         s4 len, s1, s2, s3, d;
 214         s4 a;
 215         s4 parentargs_base;
 216         s4             *mcodeptr;
 217         stackptr        src;
 218         varinfo        *var;
 219         basicblock     *bptr;
 220         instruction    *iptr;
 221         exceptiontable *ex;
 222         registerdata   *r;
 223
 224         {
 225         s4 i, p, pa, t, l;
 226         s4 savedregs_num;
 227
 228         /* keep code size smaller */
 229         r = m->registerdata;
 230
 231         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 232
 233         /* space to save used callee saved registers */
 234
 235         savedregs_num += (r->savintregcnt - r->maxsavintreguse);
 236         savedregs_num += (r->savfltregcnt - r->maxsavfltreguse);
 237
 238         parentargs_base = r->maxmemuse + savedregs_num;
 239
 240 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 241
 242         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 243                 parentargs_base++;
 244
 245 #endif
 246
 247         /* adjust frame size for 16 byte alignment */
 248
 249         if (parentargs_base & 1)
 250                 parentargs_base++;
 251
 252         /* create method header */
 253
 254 #if POINTERSIZE == 4
 255         (void) dseg_addaddress(m);                              /* Filler         */
 256 #endif
 257         (void) dseg_addaddress(m);                              /* MethodPointer  */
 258         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 259
 260 #if defined(USE_THREADS)
 261
 262         /* IsSync contains the offset relative to the stack pointer for the
 263            argument of monitor_exit used in the exception handler. Since the
 264            offset could be zero and give a wrong meaning of the flag it is
 265            offset by one.
 266         */
 267
 268         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 269                 (void) dseg_adds4((r->maxmemuse + 1) * 8);          /* IsSync         */
 270         else
 271
 272 #endif
 273
 274                 (void) dseg_adds4(0);                               /* IsSync         */
 275
 276         (void) dseg_adds4(m->isleafmethod);                     /* IsLeaf         */
 277         (void) dseg_adds4(r->savintregcnt - r->maxsavintreguse);/* IntSave        */
 278         (void) dseg_adds4(r->savfltregcnt - r->maxsavfltreguse);/* FltSave        */
 279         (void) dseg_adds4(m->exceptiontablelength);             /* ExTableSize    */
 280
 281         /* create exception table */
 282
 283         for (ex = m->exceptiontable; ex != NULL; ex = ex->down) {
 284                 dseg_addtarget(ex->start);
 285                 dseg_addtarget(ex->end);
 286                 dseg_addtarget(ex->handler);
 287                 (void) dseg_addaddress(ex->catchtype);
 288         }
 289
 290         /* initialize mcode variables */
 291
 292         mcodeptr = (s4 *) mcodebase;
 293         mcodeend = (s4 *) (mcodebase + mcodesize);
 294         MCODECHECK(128 + m->paramcount);
 295
 296         /* create stack frame (if necessary) */
 297
 298         if (parentargs_base) {
 299                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 300         }
 301
 302         /* save return address and used callee saved registers */
 303
 304         p = parentargs_base;
 305         if (!m->isleafmethod) {
 306                 p--; M_LST(REG_RA, REG_SP, 8 * p);
 307         }
 308         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
 309                 p--; M_LST(r->savintregs[i], REG_SP, 8 * p);
 310         }
 311         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
 312                 p--; M_DST(r->savfltregs[i], REG_SP, 8 * p);
 313         }
 314
 315         /* save monitorenter argument */
 316
 317 #if defined(USE_THREADS)
 318         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 319                 if (m->flags & ACC_STATIC) {
 320                         p = dseg_addaddress(m->class);
 321                         M_ALD(REG_ITMP1, REG_PV, p);
 322                         M_AST(REG_ITMP1, REG_SP, r->maxmemuse * 8);
 323
 324                 } else {
 325                         M_AST(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 326                 }
 327         }
 328 #endif
 329
 330         /* copy argument registers to stack and call trace function with pointer
 331            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 332         */
 333
 334         if (runverbose) {
 335                 M_LDA(REG_SP, REG_SP, -(18 * 8));
 336                 M_LST(REG_RA, REG_SP, 1 * 8);
 337
 338                 /* save integer argument registers */
 339                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
 340                         M_LST(r->argintregs[p], REG_SP,  (2 + p) * 8);
 341                 }
 342
 343                 /* save and copy float arguments into integer registers */
 344                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
 345                         t = m->paramtypes[p];
 346
 347                         if (IS_FLT_DBL_TYPE(t)) {
 348                                 if (IS_2_WORD_TYPE(t)) {
 349                                         M_DST(r->argfltregs[p], REG_SP, (10 + p) * 8);
 350                                         M_LLD(r->argintregs[p], REG_SP, (10 + p) * 8);
 351
 352                                 } else {
 353                                         M_FST(r->argfltregs[p], REG_SP, (10 + p) * 8);
 354                                         M_ILD(r->argintregs[p], REG_SP, (10 + p) * 8);
 355                                 }
 356
 357                         } else {
 358                                 M_DST(r->argfltregs[p], REG_SP, (10 + p) * 8);
 359                         }
 360                 }
 361
 362                 p = dseg_addaddress(m);
 363                 M_ALD(REG_ITMP1, REG_PV, p);
 364                 M_LST(REG_ITMP1, REG_SP, 0);
 365                 p = dseg_addaddress((void *) builtin_trace_args);
 366                 M_ALD(REG_ITMP3, REG_PV, p);
 367                 M_JSR(REG_RA, REG_ITMP3);
 368                 M_NOP;
 369
 370                 M_LLD(REG_RA, REG_SP, 1 * 8);
 371
 372                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
 373                         M_LLD(r->argintregs[p], REG_SP, (2 + p) * 8);
 374                 }
 375
 376                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
 377                         t = m->paramtypes[p];
 378
 379                         if (IS_FLT_DBL_TYPE(t)) {
 380                                 if (IS_2_WORD_TYPE(t)) {
 381                                         M_DLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
 382
 383                                 } else {
 384                                         M_FLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
 385                                 }
 386
 387                         } else {
 388                                 M_DLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
 389                         }
 390                 }
 391
 392                 M_LDA(REG_SP, REG_SP, 18 * 8);
 393         }
 394
 395         /* take arguments out of register or stack frame */
 396
 397         for (p = 0, l = 0; p < m->paramcount; p++) {
 398                 t = m->paramtypes[p];
 399                 var = &(r->locals[l][t]);
 400                 l++;
 401                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 402                         l++;
 403                 if (var->type < 0)
 404                         continue;
 405                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 406                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 407                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 408                                         M_INTMOVE(r->argintregs[p], var->regoff);
 409                                 } else {                             /* reg arg -> spilled    */
 410                                         M_LST(r->argintregs[p], REG_SP, 8 * var->regoff);
 411                                 }
 412
 413                         } else {                                 /* stack arguments       */
 414                                 pa = p - INT_ARG_CNT;
 415                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 416                                         M_LLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 417
 418                                 } else {                             /* stack arg -> spilled  */
 419                                         M_LLD(REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 420                                         M_LST(REG_ITMP1, REG_SP, 8 * var->regoff);
 421                                 }
 422                         }
 423
 424                 } else {                                     /* floating args         */
 425                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 426                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 427                                         M_TFLTMOVE(var->type, r->argfltregs[p], var->regoff);
 428
 429                                 } else {                                         /* reg arg -> spilled    */
 430                                         M_DST(r->argfltregs[p], REG_SP, var->regoff * 8);
 431                                 }
 432
 433                         } else {                                 /* stack arguments       */
 434                                 pa = p - FLT_ARG_CNT;
 435                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 436                                         M_DLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 437
 438                                 } else {                             /* stack-arg -> spilled  */
 439                                         M_DLD(REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 440                                         M_DST(REG_FTMP1, REG_SP, 8 * var->regoff);
 441                                 }
 442                         }
 443                 }
 444         } /* end for */
 445
 446         /* call monitorenter function */
 447
 448 #if defined(USE_THREADS)
 449         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 450                 s4 disp;
 451                 s8 func_enter = (m->flags & ACC_STATIC) ?
 452                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 453                 p = dseg_addaddress((void *) func_enter);
 454                 M_ALD(REG_ITMP3, REG_PV, p);
 455                 M_JSR(REG_RA, REG_ITMP3);
 456                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 457                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
 458                 M_LDA(REG_PV, REG_RA, disp);
 459         }
 460 #endif
 461         }
 462
 463         /* end of header generation */
 464
 465         /* walk through all basic blocks */
 466         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 467
 468                 bptr->mpc = (s4) ((u1 *) mcodeptr - mcodebase);
 469
 470                 if (bptr->flags >= BBREACHED) {
 471
 472                 /* branch resolving */
 473
 474                 {
 475                 branchref *brefs;
 476                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 477                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 478                                           brefs->branchpos,
 479                                                           bptr->mpc);
 480                 }
 481                 }
 482
 483                 /* copy interface registers to their destination */
 484
 485                 src = bptr->instack;
 486                 len = bptr->indepth;
 487                 MCODECHECK(64+len);
 488                 while (src != NULL) {
 489                         len--;
 490                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 491                                 d = reg_of_var(m, src, REG_ITMP1);
 492                                 M_INTMOVE(REG_ITMP1, d);
 493                                 store_reg_to_var_int(src, d);
 494
 495                         } else {
 496                                 d = reg_of_var(m, src, REG_IFTMP);
 497                                 if ((src->varkind != STACKVAR)) {
 498                                         s2 = src->type;
 499                                         if (IS_FLT_DBL_TYPE(s2)) {
 500                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 501                                                         s1 = r->interfaces[len][s2].regoff;
 502                                                         M_TFLTMOVE(s2, s1, d);
 503
 504                                                 } else {
 505                                                         M_DLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 506                                                 }
 507                                                 store_reg_to_var_flt(src, d);
 508
 509                                         } else {
 510                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 511                                                         s1 = r->interfaces[len][s2].regoff;
 512                                                         M_INTMOVE(s1,d);
 513
 514                                                 } else {
 515                                                         M_LLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 516                                                 }
 517                                                 store_reg_to_var_int(src, d);
 518                                         }
 519                                 }
 520                         }
 521                         src = src->prev;
 522                 }
 523
 524                 /* walk through all instructions */
 525
 526                 src = bptr->instack;
 527                 len = bptr->icount;
 528                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 529
 530         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 531         switch (iptr->opc) {
 532
 533                 case ICMD_NOP:        /* ...  ==> ...                                 */
 534                         break;
 535
 536                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 537
 538                         var_to_reg_int(s1, src, REG_ITMP1);
 539                         M_BEQZ(s1, 0);
 540                         codegen_addxnullrefs(mcodeptr);
 541                         M_NOP;
 542                         break;
 543
 544                 /* constant operations ************************************************/
 545
 546 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_IADD_IMM(REG_ZERO,c,r);} \
 547                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 548                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 549
 550 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LADD_IMM(REG_ZERO,c,r);} \
 551                     else if(((c)>=0)&&((c)<=0xffff)){M_OR_IMM(REG_ZERO,c,r);} \
 552                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 553
 554                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 555                                       /* op1 = 0, val.i = constant                    */
 556
 557                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 558                         ICONST(d, iptr->val.i);
 559                         store_reg_to_var_int(iptr->dst, d);
 560                         break;
 561
 562                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 563                                       /* op1 = 0, val.l = constant                    */
 564
 565                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 566                         LCONST(d, iptr->val.l);
 567                         store_reg_to_var_int(iptr->dst, d);
 568                         break;
 569
 570                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 571                                       /* op1 = 0, val.f = constant                    */
 572
 573                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 574                         a = dseg_addfloat(iptr->val.f);
 575                         M_FLD(d, REG_PV, a);
 576                         store_reg_to_var_flt(iptr->dst, d);
 577                         break;
 578
 579                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 580                                       /* op1 = 0, val.d = constant                    */
 581
 582                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 583                         a = dseg_adddouble(iptr->val.d);
 584                         M_DLD(d, REG_PV, a);
 585                         store_reg_to_var_flt (iptr->dst, d);
 586                         break;
 587
 588                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 589                                       /* op1 = 0, val.a = constant                    */
 590
 591                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 592                         if (iptr->val.a) {
 593                                 a = dseg_addaddress(iptr->val.a);
 594                                 M_ALD(d, REG_PV, a);
 595                                 }
 596                         else {
 597                                 M_INTMOVE(REG_ZERO, d);
 598                                 }
 599                         store_reg_to_var_int(iptr->dst, d);
 600                         break;
 601
 602
 603                 /* load/store operations **********************************************/
 604
 605                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 606                 case ICMD_LLOAD:      /* op1 = local variable                         */
 607                 case ICMD_ALOAD:
 608
 609                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 610                         if ((iptr->dst->varkind == LOCALVAR) &&
 611                             (iptr->dst->varnum == iptr->op1))
 612                                 break;
 613                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 614                         if (var->flags & INMEMORY) {
 615                                 M_LLD(d, REG_SP, 8 * var->regoff);
 616                         } else {
 617                                 M_INTMOVE(var->regoff,d);
 618                         }
 619                         store_reg_to_var_int(iptr->dst, d);
 620                         break;
 621
 622                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 623                 case ICMD_DLOAD:      /* op1 = local variable                         */
 624
 625                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 626                         if ((iptr->dst->varkind == LOCALVAR) &&
 627                             (iptr->dst->varnum == iptr->op1))
 628                                 break;
 629                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 630                         {
 631                                 int t2 = ((iptr->opc == ICMD_FLOAD) ? TYPE_FLT : TYPE_DBL);
 632                                 if (var->flags & INMEMORY) {
 633                                         M_CCFLD(var->type, t2, d, REG_SP, 8 * var->regoff);
 634                                 } else {
 635                                         M_CCFLTMOVE(var->type, t2, var->regoff, d);
 636                                 }
 637                         }
 638                         store_reg_to_var_flt(iptr->dst, d);
 639                         break;
 640
 641
 642                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 643                 case ICMD_LSTORE:     /* op1 = local variable                         */
 644                 case ICMD_ASTORE:
 645
 646                         if ((src->varkind == LOCALVAR) &&
 647                             (src->varnum == iptr->op1))
 648                                 break;
 649                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 650                         if (var->flags & INMEMORY) {
 651                                 var_to_reg_int(s1, src, REG_ITMP1);
 652                                 M_LST(s1, REG_SP, 8 * var->regoff);
 653
 654                         } else {
 655                                 var_to_reg_int(s1, src, var->regoff);
 656                                 M_INTMOVE(s1, var->regoff);
 657                         }
 658                         break;
 659
 660                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 661                 case ICMD_DSTORE:     /* op1 = local variable                         */
 662
 663                         if ((src->varkind == LOCALVAR) &&
 664                             (src->varnum == iptr->op1))
 665                                 break;
 666                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 667                         {
 668                                 int t1 = ((iptr->opc == ICMD_FSTORE) ? TYPE_FLT : TYPE_DBL);
 669                                 if (var->flags & INMEMORY) {
 670                                         var_to_reg_flt(s1, src, REG_FTMP1);
 671                                         M_CCFST(t1, var->type, s1, REG_SP, 8 * var->regoff);
 672
 673                                 } else {
 674                                         var_to_reg_flt(s1, src, var->regoff);
 675                                         M_CCFLTMOVE(t1, var->type, s1, var->regoff);
 676                                 }
 677                         }
 678                         break;
 679
 680
 681                 /* pop/dup/swap operations ********************************************/
 682
 683                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 684
 685                 case ICMD_POP:        /* ..., value  ==> ...                          */
 686                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 687                         break;
 688
 689 #define M_COPY(from,to) \
 690                         d = reg_of_var(m, to, REG_IFTMP); \
 691                         if ((from->regoff != to->regoff) || \
 692                             ((from->flags ^ to->flags) & INMEMORY)) { \
 693                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 694                                         var_to_reg_flt(s1, from, d); \
 695                                         M_TFLTMOVE(from->type,s1,d); \
 696                                         store_reg_to_var_flt(to, d); \
 697                                         }\
 698                                 else { \
 699                                         var_to_reg_int(s1, from, d); \
 700                                         M_INTMOVE(s1,d); \
 701                                         store_reg_to_var_int(to, d); \
 702                                         }\
 703                                 }
 704
 705                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 706                         M_COPY(src, iptr->dst);
 707                         break;
 708
 709                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 710
 711                         M_COPY(src,       iptr->dst->prev->prev);
 712
 713                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 714
 715                         M_COPY(src,       iptr->dst);
 716                         M_COPY(src->prev, iptr->dst->prev);
 717                         break;
 718
 719                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 720
 721                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 722
 723                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 724
 725                         M_COPY(src,             iptr->dst);
 726                         M_COPY(src->prev,       iptr->dst->prev);
 727                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 728                         M_COPY(src, iptr->dst->prev->prev->prev);
 729                         break;
 730
 731                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 732
 733                         M_COPY(src,                   iptr->dst);
 734                         M_COPY(src->prev,             iptr->dst->prev);
 735                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 736                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 737                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 738                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 739                         break;
 740
 741                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 742
 743                         M_COPY(src, iptr->dst->prev);
 744                         M_COPY(src->prev, iptr->dst);
 745                         break;
 746
 747
 748                 /* integer operations *************************************************/
 749
 750                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 754                         M_ISUB(REG_ZERO, s1, d);
 755                         store_reg_to_var_int(iptr->dst, d);
 756                         break;
 757
 758                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 759
 760                         var_to_reg_int(s1, src, REG_ITMP1);
 761                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 762                         M_LSUB(REG_ZERO, s1, d);
 763                         store_reg_to_var_int(iptr->dst, d);
 764                         break;
 765
 766                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 767
 768                         var_to_reg_int(s1, src, REG_ITMP1);
 769                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 770                         M_INTMOVE(s1, d);
 771                         store_reg_to_var_int(iptr->dst, d);
 772                         break;
 773
 774                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 775
 776                         var_to_reg_int(s1, src, REG_ITMP1);
 777                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 778                         M_ISLL_IMM(s1, 0, d );
 779                         store_reg_to_var_int(iptr->dst, d);
 780                         break;
 781
 782                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 783
 784                         var_to_reg_int(s1, src, REG_ITMP1);
 785                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 786                         M_LSLL_IMM(s1, 56, d);
 787                         M_LSRA_IMM( d, 56, d);
 788                         store_reg_to_var_int(iptr->dst, d);
 789                         break;
 790
 791                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 792
 793                         var_to_reg_int(s1, src, REG_ITMP1);
 794                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 795             M_CZEXT(s1, d);
 796                         store_reg_to_var_int(iptr->dst, d);
 797                         break;
 798
 799                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 800
 801                         var_to_reg_int(s1, src, REG_ITMP1);
 802                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 803                         M_LSLL_IMM(s1, 48, d);
 804                         M_LSRA_IMM( d, 48, d);
 805                         store_reg_to_var_int(iptr->dst, d);
 806                         break;
 807
 808
 809                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 810
 811                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 812                         var_to_reg_int(s2, src, REG_ITMP2);
 813                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 814                         M_IADD(s1, s2, d);
 815                         store_reg_to_var_int(iptr->dst, d);
 816                         break;
 817
 818                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 819                                       /* val.i = constant                             */
 820
 821                         var_to_reg_int(s1, src, REG_ITMP1);
 822                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 823                         if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
 824                                 M_IADD_IMM(s1, iptr->val.i, d);
 825                                 }
 826                         else {
 827                                 ICONST(REG_ITMP2, iptr->val.i);
 828                                 M_IADD(s1, REG_ITMP2, d);
 829                                 }
 830                         store_reg_to_var_int(iptr->dst, d);
 831                         break;
 832
 833                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 834
 835                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 836                         var_to_reg_int(s2, src, REG_ITMP2);
 837                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 838                         M_LADD(s1, s2, d);
 839                         store_reg_to_var_int(iptr->dst, d);
 840                         break;
 841
 842                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 843                                       /* val.l = constant                             */
 844
 845                         var_to_reg_int(s1, src, REG_ITMP1);
 846                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 847                         if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
 848                                 M_LADD_IMM(s1, iptr->val.l, d);
 849                                 }
 850                         else {
 851                                 LCONST(REG_ITMP2, iptr->val.l);
 852                                 M_LADD(s1, REG_ITMP2, d);
 853                                 }
 854                         store_reg_to_var_int(iptr->dst, d);
 855                         break;
 856
 857                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 858
 859                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 860                         var_to_reg_int(s2, src, REG_ITMP2);
 861                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 862                         M_ISUB(s1, s2, d);
 863                         store_reg_to_var_int(iptr->dst, d);
 864                         break;
 865
 866                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 867                                       /* val.i = constant                             */
 868
 869                         var_to_reg_int(s1, src, REG_ITMP1);
 870                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 871                         if ((iptr->val.i >= -32767) && (iptr->val.i <= 32768)) {
 872                                 M_IADD_IMM(s1, -iptr->val.i, d);
 873                                 }
 874                         else {
 875                                 ICONST(REG_ITMP2, iptr->val.i);
 876                                 M_ISUB(s1, REG_ITMP2, d);
 877                                 }
 878                         store_reg_to_var_int(iptr->dst, d);
 879                         break;
 880
 881                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 882
 883                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 884                         var_to_reg_int(s2, src, REG_ITMP2);
 885                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 886                         M_LSUB(s1, s2, d);
 887                         store_reg_to_var_int(iptr->dst, d);
 888                         break;
 889
 890                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 891                                       /* val.l = constant                             */
 892
 893                         var_to_reg_int(s1, src, REG_ITMP1);
 894                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 895                         if ((iptr->val.l >= -32767) && (iptr->val.l <= 32768)) {
 896                                 M_LADD_IMM(s1, -iptr->val.l, d);
 897                                 }
 898                         else {
 899                                 LCONST(REG_ITMP2, iptr->val.l);
 900                                 M_LSUB(s1, REG_ITMP2, d);
 901                                 }
 902                         store_reg_to_var_int(iptr->dst, d);
 903                         break;
 904
 905                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 906
 907                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 908                         var_to_reg_int(s2, src, REG_ITMP2);
 909                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 910                         M_IMUL(s1, s2);
 911                         M_MFLO(d);
 912                         M_NOP;
 913                         M_NOP;
 914                         store_reg_to_var_int(iptr->dst, d);
 915                         break;
 916
 917                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 918                                       /* val.i = constant                             */
 919
 920                         var_to_reg_int(s1, src, REG_ITMP1);
 921                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 922                         ICONST(REG_ITMP2, iptr->val.i);
 923                         M_IMUL(s1, REG_ITMP2);
 924                         M_MFLO(d);
 925                         M_NOP;
 926                         M_NOP;
 927                         store_reg_to_var_int(iptr->dst, d);
 928                         break;
 929
 930                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 931
 932                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 933                         var_to_reg_int(s2, src, REG_ITMP2);
 934                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 935                         M_LMUL(s1, s2);
 936                         M_MFLO(d);
 937                         M_NOP;
 938                         M_NOP;
 939                         store_reg_to_var_int(iptr->dst, d);
 940                         break;
 941
 942                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 943                                       /* val.l = constant                             */
 944
 945                         var_to_reg_int(s1, src, REG_ITMP1);
 946                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 947                         LCONST(REG_ITMP2, iptr->val.l);
 948                         M_LMUL(s1, REG_ITMP2);
 949                         M_MFLO(d);
 950                         M_NOP;
 951                         M_NOP;
 952                         store_reg_to_var_int(iptr->dst, d);
 953                         break;
 954
 955                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 956
 957                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 958                         var_to_reg_int(s2, src, REG_ITMP2);
 959                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 960                         M_IDIV(s1, s2);
 961                         M_MFLO(d);
 962                         M_NOP;
 963                         M_NOP;
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966 #if 0
 967                 case ICMD_IDIVCONST:  /* ..., value  ==> ..., value / constant        */
 968                                       /* val.i = constant                             */
 969
 970                         var_to_reg_int(s1, src, REG_ITMP1);
 971                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 972                         ICONST(REG_ITMP2, iptr->val.i);
 973                         M_IDIV(s1, REG_ITMP2);
 974                         M_MFLO(d);
 975                         M_NOP;
 976                         M_NOP;
 977                         store_reg_to_var_int(iptr->dst, d);
 978                         break;
 979 #endif
 980                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 981
 982                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 983                         var_to_reg_int(s2, src, REG_ITMP2);
 984                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 985                         M_LDIV(s1, s2);
 986                         M_MFLO(d);
 987                         M_NOP;
 988                         M_NOP;
 989                         store_reg_to_var_int(iptr->dst, d);
 990                         break;
 991 #if 0
 992                 case ICMD_LDIVCONST:  /* ..., value  ==> ..., value / constant        */
 993                                       /* val.l = constant                             */
 994
 995                         var_to_reg_int(s1, src, REG_ITMP1);
 996                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 997                         LCONST(REG_ITMP2, iptr->val.l);
 998                         M_LDIV(s1, REG_ITMP2);
 999                         M_MFLO(d);
1000                         M_NOP;
1001                         M_NOP;
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004 #endif
1005                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1006
1007                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1008                         var_to_reg_int(s2, src, REG_ITMP2);
1009                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1010                         M_IDIV(s1, s2);
1011                         M_MFHI(d);
1012                         M_NOP;
1013                         M_NOP;
1014                         store_reg_to_var_int(iptr->dst, d);
1015                         break;
1016 #if 0
1017                 case ICMD_IREMCONST:  /* ..., value  ==> ..., value % constant        */
1018                                       /* val.i = constant                             */
1019
1020                         var_to_reg_int(s1, src, REG_ITMP1);
1021                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1022                         ICONST(REG_ITMP2, iptr->val.i);
1023                         M_IDIV(s1, REG_ITMP2);
1024                         M_MFHI(d);
1025                         M_NOP;
1026                         M_NOP;
1027                         store_reg_to_var_int(iptr->dst, d);
1028                         break;
1029 #endif
1030                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1031
1032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1033                         var_to_reg_int(s2, src, REG_ITMP2);
1034                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1035                         M_LDIV(s1, s2);
1036                         M_MFHI(d);
1037                         M_NOP;
1038                         M_NOP;
1039                         store_reg_to_var_int(iptr->dst, d);
1040                         break;
1041 #if 0
1042                 case ICMD_LREMCONST:  /* ..., value  ==> ..., value % constant        */
1043                                       /* val.l = constant                             */
1044
1045                         var_to_reg_int(s1, src, REG_ITMP1);
1046                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1047                         LCONST(REG_ITMP2, iptr->val.l);
1048                         M_LDIV(s1, REG_ITMP2);
1049                         M_MFHI(d);
1050                         M_NOP;
1051                         M_NOP;
1052                         store_reg_to_var_int(iptr->dst, d);
1053                         break;
1054 #endif
1055                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1056                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1057
1058                         var_to_reg_int(s1, src, REG_ITMP1);
1059                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1060                         M_LSRA_IMM(s1, 63, REG_ITMP2);
1061                         M_LSRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1062                         M_LADD(s1, REG_ITMP2, REG_ITMP2);
1063                         M_LSRA_IMM(REG_ITMP2, iptr->val.i, d);
1064                         store_reg_to_var_int(iptr->dst, d);
1065                         break;
1066
1067                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1068
1069                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1070                         var_to_reg_int(s2, src, REG_ITMP2);
1071                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1072                         M_ISLL(s1, s2, d);
1073                         store_reg_to_var_int(iptr->dst, d);
1074                         break;
1075
1076                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1077                                       /* val.i = constant                             */
1078
1079                         var_to_reg_int(s1, src, REG_ITMP1);
1080                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1081                         M_ISLL_IMM(s1, iptr->val.i, d);
1082                         store_reg_to_var_int(iptr->dst, d);
1083                         break;
1084
1085                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1086
1087                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1088                         var_to_reg_int(s2, src, REG_ITMP2);
1089                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1090                         M_ISRA(s1, s2, d);
1091                         store_reg_to_var_int(iptr->dst, d);
1092                         break;
1093
1094                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1095                                       /* val.i = constant                             */
1096
1097                         var_to_reg_int(s1, src, REG_ITMP1);
1098                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1099                         M_ISRA_IMM(s1, iptr->val.i, d);
1100                         store_reg_to_var_int(iptr->dst, d);
1101                         break;
1102
1103                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1104
1105                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1106                         var_to_reg_int(s2, src, REG_ITMP2);
1107                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1108                         M_ISRL(s1, s2, d);
1109                         store_reg_to_var_int(iptr->dst, d);
1110                         break;
1111
1112                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1113                                       /* val.i = constant                             */
1114
1115                         var_to_reg_int(s1, src, REG_ITMP1);
1116                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1117                         M_ISRL_IMM(s1, iptr->val.i, d);
1118                         store_reg_to_var_int(iptr->dst, d);
1119                         break;
1120
1121                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1122
1123                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1124                         var_to_reg_int(s2, src, REG_ITMP2);
1125                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1126                         M_LSLL(s1, s2, d);
1127                         store_reg_to_var_int(iptr->dst, d);
1128                         break;
1129
1130                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1131                                       /* val.i = constant                             */
1132
1133                         var_to_reg_int(s1, src, REG_ITMP1);
1134                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1135                         M_LSLL_IMM(s1, iptr->val.i, d);
1136                         store_reg_to_var_int(iptr->dst, d);
1137                         break;
1138
1139                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1140
1141                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1142                         var_to_reg_int(s2, src, REG_ITMP2);
1143                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1144                         M_LSRA(s1, s2, d);
1145                         store_reg_to_var_int(iptr->dst, d);
1146                         break;
1147
1148                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1149                                       /* val.i = constant                             */
1150
1151                         var_to_reg_int(s1, src, REG_ITMP1);
1152                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1153                         M_LSRA_IMM(s1, iptr->val.i, d);
1154                         store_reg_to_var_int(iptr->dst, d);
1155                         break;
1156
1157                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1158
1159                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1160                         var_to_reg_int(s2, src, REG_ITMP2);
1161                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1162                         M_LSRL(s1, s2, d);
1163                         store_reg_to_var_int(iptr->dst, d);
1164                         break;
1165
1166                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1167                                       /* val.i = constant                             */
1168
1169                         var_to_reg_int(s1, src, REG_ITMP1);
1170                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1171                         M_LSRL_IMM(s1, iptr->val.i, d);
1172                         store_reg_to_var_int(iptr->dst, d);
1173                         break;
1174
1175                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1176                 case ICMD_LAND:
1177
1178                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1179                         var_to_reg_int(s2, src, REG_ITMP2);
1180                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1181                         M_AND(s1, s2, d);
1182                         store_reg_to_var_int(iptr->dst, d);
1183                         break;
1184
1185                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1186                                       /* val.i = constant                             */
1187
1188                         var_to_reg_int(s1, src, REG_ITMP1);
1189                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1190                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1191                                 M_AND_IMM(s1, iptr->val.i, d);
1192                                 }
1193                         else {
1194                                 ICONST(REG_ITMP2, iptr->val.i);
1195                                 M_AND(s1, REG_ITMP2, d);
1196                                 }
1197                         store_reg_to_var_int(iptr->dst, d);
1198                         break;
1199
1200                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1201                                       /* val.i = constant                             */
1202
1203                         var_to_reg_int(s1, src, REG_ITMP1);
1204                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1205                         if (s1 == d) {
1206                                 M_MOV(s1, REG_ITMP1);
1207                                 s1 = REG_ITMP1;
1208                                 }
1209                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1210                                 M_AND_IMM(s1, iptr->val.i, d);
1211                                 M_BGEZ(s1, 4);
1212                                 M_NOP;
1213                                 M_ISUB(REG_ZERO, s1, d);
1214                                 M_AND_IMM(d, iptr->val.i, d);
1215                                 }
1216                         else {
1217                                 ICONST(REG_ITMP2, iptr->val.i);
1218                                 M_AND(s1, REG_ITMP2, d);
1219                                 M_BGEZ(s1, 4);
1220                                 M_NOP;
1221                                 M_ISUB(REG_ZERO, s1, d);
1222                                 M_AND(d, REG_ITMP2, d);
1223                                 }
1224                         M_ISUB(REG_ZERO, d, d);
1225                         store_reg_to_var_int(iptr->dst, d);
1226                         break;
1227
1228                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1229                                       /* val.l = constant                             */
1230
1231                         var_to_reg_int(s1, src, REG_ITMP1);
1232                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1233                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1234                                 M_AND_IMM(s1, iptr->val.l, d);
1235                                 }
1236                         else {
1237                                 LCONST(REG_ITMP2, iptr->val.l);
1238                                 M_AND(s1, REG_ITMP2, d);
1239                                 }
1240                         store_reg_to_var_int(iptr->dst, d);
1241                         break;
1242
1243                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1244                                       /* val.l = constant                             */
1245
1246                         var_to_reg_int(s1, src, REG_ITMP1);
1247                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1248                         if (s1 == d) {
1249                                 M_MOV(s1, REG_ITMP1);
1250                                 s1 = REG_ITMP1;
1251                                 }
1252                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1253                                 M_AND_IMM(s1, iptr->val.l, d);
1254                                 M_BGEZ(s1, 4);
1255                                 M_NOP;
1256                                 M_LSUB(REG_ZERO, s1, d);
1257                                 M_AND_IMM(d, iptr->val.l, d);
1258                                 }
1259                         else {
1260                                 LCONST(REG_ITMP2, iptr->val.l);
1261                                 M_AND(s1, REG_ITMP2, d);
1262                                 M_BGEZ(s1, 4);
1263                                 M_NOP;
1264                                 M_LSUB(REG_ZERO, s1, d);
1265                                 M_AND(d, REG_ITMP2, d);
1266                                 }
1267                         M_LSUB(REG_ZERO, d, d);
1268                         store_reg_to_var_int(iptr->dst, d);
1269                         break;
1270
1271                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1272                 case ICMD_LOR:
1273
1274                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1275                         var_to_reg_int(s2, src, REG_ITMP2);
1276                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1277                         M_OR( s1,s2, d);
1278                         store_reg_to_var_int(iptr->dst, d);
1279                         break;
1280
1281                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1282                                       /* val.i = constant                             */
1283
1284                         var_to_reg_int(s1, src, REG_ITMP1);
1285                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1286                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1287                                 M_OR_IMM(s1, iptr->val.i, d);
1288                                 }
1289                         else {
1290                                 ICONST(REG_ITMP2, iptr->val.i);
1291                                 M_OR(s1, REG_ITMP2, d);
1292                                 }
1293                         store_reg_to_var_int(iptr->dst, d);
1294                         break;
1295
1296                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1297                                       /* val.l = constant                             */
1298
1299                         var_to_reg_int(s1, src, REG_ITMP1);
1300                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1301                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1302                                 M_OR_IMM(s1, iptr->val.l, d);
1303                                 }
1304                         else {
1305                                 LCONST(REG_ITMP2, iptr->val.l);
1306                                 M_OR(s1, REG_ITMP2, d);
1307                                 }
1308                         store_reg_to_var_int(iptr->dst, d);
1309                         break;
1310
1311                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1312                 case ICMD_LXOR:
1313
1314                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1315                         var_to_reg_int(s2, src, REG_ITMP2);
1316                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1317                         M_XOR(s1, s2, d);
1318                         store_reg_to_var_int(iptr->dst, d);
1319                         break;
1320
1321                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1322                                       /* val.i = constant                             */
1323
1324                         var_to_reg_int(s1, src, REG_ITMP1);
1325                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1326                         if ((iptr->val.i >= 0) && (iptr->val.i <= 0xffff)) {
1327                                 M_XOR_IMM(s1, iptr->val.i, d);
1328                                 }
1329                         else {
1330                                 ICONST(REG_ITMP2, iptr->val.i);
1331                                 M_XOR(s1, REG_ITMP2, d);
1332                                 }
1333                         store_reg_to_var_int(iptr->dst, d);
1334                         break;
1335
1336                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1337                                       /* val.l = constant                             */
1338
1339                         var_to_reg_int(s1, src, REG_ITMP1);
1340                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1341                         if ((iptr->val.l >= 0) && (iptr->val.l <= 0xffff)) {
1342                                 M_XOR_IMM(s1, iptr->val.l, d);
1343                                 }
1344                         else {
1345                                 LCONST(REG_ITMP2, iptr->val.l);
1346                                 M_XOR(s1, REG_ITMP2, d);
1347                                 }
1348                         store_reg_to_var_int(iptr->dst, d);
1349                         break;
1350
1351
1352                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1353
1354                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1355                         var_to_reg_int(s2, src, REG_ITMP2);
1356                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1357                         M_CMPLT(s1, s2, REG_ITMP3);
1358                         M_CMPLT(s2, s1, REG_ITMP1);
1359                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1360                         store_reg_to_var_int(iptr->dst, d);
1361                         break;
1362
1363
1364                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1365                                       /* op1 = variable, val.i = constant             */
1366
1367                         var = &(r->locals[iptr->op1][TYPE_INT]);
1368                         if (var->flags & INMEMORY) {
1369                                 s1 = REG_ITMP1;
1370                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1371
1372                         } else
1373                                 s1 = var->regoff;
1374                         M_IADD_IMM(s1, iptr->val.i, s1);
1375                         if (var->flags & INMEMORY)
1376                                 M_LST(s1, REG_SP, 8 * var->regoff);
1377                         break;
1378
1379
1380                 /* floating operations ************************************************/
1381
1382                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1383
1384                         var_to_reg_flt(s1, src, REG_FTMP1);
1385                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1386                         M_FNEG(s1, d);
1387                         store_reg_to_var_flt(iptr->dst, d);
1388                         break;
1389
1390                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1391
1392                         var_to_reg_flt(s1, src, REG_FTMP1);
1393                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1394                         M_DNEG(s1, d);
1395                         store_reg_to_var_flt(iptr->dst, d);
1396                         break;
1397
1398                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1399
1400                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1401                         var_to_reg_flt(s2, src, REG_FTMP2);
1402                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1403                         M_FADD(s1, s2, d);
1404                         store_reg_to_var_flt(iptr->dst, d);
1405                         break;
1406
1407                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1408
1409                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1410                         var_to_reg_flt(s2, src, REG_FTMP2);
1411                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1412                         M_DADD(s1, s2, d);
1413                         store_reg_to_var_flt(iptr->dst, d);
1414                         break;
1415
1416                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1417
1418                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1419                         var_to_reg_flt(s2, src, REG_FTMP2);
1420                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1421                         M_FSUB(s1, s2, d);
1422                         store_reg_to_var_flt(iptr->dst, d);
1423                         break;
1424
1425                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1426
1427                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1428                         var_to_reg_flt(s2, src, REG_FTMP2);
1429                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1430                         M_DSUB(s1, s2, d);
1431                         store_reg_to_var_flt(iptr->dst, d);
1432                         break;
1433
1434                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1435
1436                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1437                         var_to_reg_flt(s2, src, REG_FTMP2);
1438                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1439                         M_FMUL(s1, s2, d);
1440                         store_reg_to_var_flt(iptr->dst, d);
1441                         break;
1442
1443                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1444
1445                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1446                         var_to_reg_flt(s2, src, REG_FTMP2);
1447                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1448                         M_DMUL(s1, s2, d);
1449                         store_reg_to_var_flt(iptr->dst, d);
1450                         break;
1451
1452                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1453
1454                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1455                         var_to_reg_flt(s2, src, REG_FTMP2);
1456                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1457                         M_FDIV(s1, s2, d);
1458                         store_reg_to_var_flt(iptr->dst, d);
1459                         break;
1460
1461                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1462
1463                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1464                         var_to_reg_flt(s2, src, REG_FTMP2);
1465                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1466                         M_DDIV(s1, s2, d);
1467                         store_reg_to_var_flt(iptr->dst, d);
1468                         break;
1469
1470                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1471                         panic("FREM");
1472
1473                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1474                         var_to_reg_flt(s2, src, REG_FTMP2);
1475                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1476                         M_FDIV(s1,s2, REG_FTMP3);
1477                         M_FLOORFL(REG_FTMP3, REG_FTMP3);
1478                         M_CVTLF(REG_FTMP3, REG_FTMP3);
1479                         M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1480                         M_FSUB(s1, REG_FTMP3, d);
1481                         store_reg_to_var_flt(iptr->dst, d);
1482                     break;
1483
1484                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1485
1486                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1487                         var_to_reg_flt(s2, src, REG_FTMP2);
1488                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1489                         M_DDIV(s1,s2, REG_FTMP3);
1490                         M_FLOORDL(REG_FTMP3, REG_FTMP3);
1491                         M_CVTLD(REG_FTMP3, REG_FTMP3);
1492                         M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1493                         M_DSUB(s1, REG_FTMP3, d);
1494                         store_reg_to_var_flt(iptr->dst, d);
1495                     break;
1496
1497                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1498                 case ICMD_L2F:
1499                         var_to_reg_int(s1, src, REG_ITMP1);
1500                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1501                         M_MOVLD(s1, d);
1502                         M_CVTLF(d, d);
1503                         store_reg_to_var_flt(iptr->dst, d);
1504                         break;
1505
1506                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1507                 case ICMD_L2D:
1508                         var_to_reg_int(s1, src, REG_ITMP1);
1509                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1510                         M_MOVLD(s1, d);
1511                         M_CVTLD(d, d);
1512                         store_reg_to_var_flt(iptr->dst, d);
1513                         break;
1514
1515                 case ICMD_F2I:       /* ..., (float) value  ==> ..., (int) value      */
1516
1517                         var_to_reg_flt(s1, src, REG_FTMP1);
1518                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1519                         M_TRUNCFI(s1, REG_FTMP1);
1520                         M_MOVDI(REG_FTMP1, d);
1521                         M_NOP;
1522                         store_reg_to_var_int(iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_D2I:       /* ..., (double) value  ==> ..., (int) value     */
1526
1527                         var_to_reg_flt(s1, src, REG_FTMP1);
1528                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1529                         M_TRUNCDI(s1, REG_FTMP1);
1530                         M_MOVDI(REG_FTMP1, d);
1531                         M_NOP;
1532                         store_reg_to_var_int(iptr->dst, d);
1533                         break;
1534
1535                 case ICMD_F2L:       /* ..., (float) value  ==> ..., (long) value     */
1536
1537                         var_to_reg_flt(s1, src, REG_FTMP1);
1538                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1539                         M_TRUNCFL(s1, REG_FTMP1);
1540                         M_MOVDL(REG_FTMP1, d);
1541                         M_NOP;
1542                         store_reg_to_var_int(iptr->dst, d);
1543                         break;
1544
1545                 case ICMD_D2L:       /* ..., (double) value  ==> ..., (long) value    */
1546
1547                         var_to_reg_flt(s1, src, REG_FTMP1);
1548                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1549                         M_TRUNCDL(s1, REG_FTMP1);
1550                         M_MOVDL(REG_FTMP1, d);
1551                         M_NOP;
1552                         store_reg_to_var_int(iptr->dst, d);
1553                         break;
1554
1555                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1556
1557                         var_to_reg_flt(s1, src, REG_FTMP1);
1558                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1559                         M_CVTFD(s1, d);
1560                         store_reg_to_var_flt(iptr->dst, d);
1561                         break;
1562
1563                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1564
1565                         var_to_reg_flt(s1, src, REG_FTMP1);
1566                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1567                         M_CVTDF(s1, d);
1568                         store_reg_to_var_flt(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1572
1573                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1574                         var_to_reg_flt(s2, src, REG_FTMP2);
1575                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1576                         M_FCMPULEF(s1, s2);
1577                         M_FBT(3);
1578                         M_LADD_IMM(REG_ZERO, 1, d);
1579                         M_BR(4);
1580                         M_NOP;
1581                         M_FCMPEQF(s1, s2);
1582                         M_LSUB_IMM(REG_ZERO, 1, d);
1583                         M_CMOVT(REG_ZERO, d);
1584                         store_reg_to_var_int(iptr->dst, d);
1585                         break;
1586
1587                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1588
1589                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1590                         var_to_reg_flt(s2, src, REG_FTMP2);
1591                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1592                         M_FCMPULED(s1, s2);
1593                         M_FBT(3);
1594                         M_LADD_IMM(REG_ZERO, 1, d);
1595                         M_BR(4);
1596                         M_NOP;
1597                         M_FCMPEQD(s1, s2);
1598                         M_LSUB_IMM(REG_ZERO, 1, d);
1599                         M_CMOVT(REG_ZERO, d);
1600                         store_reg_to_var_int(iptr->dst, d);
1601                         break;
1602
1603                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1604
1605                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1606                         var_to_reg_flt(s2, src, REG_FTMP2);
1607                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1608                         M_FCMPOLTF(s1, s2);
1609                         M_FBF(3);
1610                         M_LSUB_IMM(REG_ZERO, 1, d);
1611                         M_BR(4);
1612                         M_NOP;
1613                         M_FCMPEQF(s1, s2);
1614                         M_LADD_IMM(REG_ZERO, 1, d);
1615                         M_CMOVT(REG_ZERO, d);
1616                         store_reg_to_var_int(iptr->dst, d);
1617                         break;
1618
1619                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1620
1621                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1622                         var_to_reg_flt(s2, src, REG_FTMP2);
1623                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1624                         M_FCMPOLTD(s1, s2);
1625                         M_FBF(3);
1626                         M_LSUB_IMM(REG_ZERO, 1, d);
1627                         M_BR(4);
1628                         M_NOP;
1629                         M_FCMPEQD(s1, s2);
1630                         M_LADD_IMM(REG_ZERO, 1, d);
1631                         M_CMOVT(REG_ZERO, d);
1632                         store_reg_to_var_int(iptr->dst, d);
1633                         break;
1634
1635
1636                 /* memory operations **************************************************/
1637
1638 #define gen_bound_check \
1639     if (checkbounds) { \
1640         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size)); \
1641         M_CMPULT(s2, REG_ITMP3, REG_ITMP3); \
1642         M_BEQZ(REG_ITMP3, 0); \
1643         codegen_addxboundrefs(mcodeptr, s2); \
1644         M_NOP; \
1645     }
1646
1647                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1648
1649                         var_to_reg_int(s1, src, REG_ITMP1);
1650                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1651                         gen_nullptr_check(s1);
1652                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1653                         store_reg_to_var_int(iptr->dst, d);
1654                         break;
1655
1656                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1657
1658                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1659                         var_to_reg_int(s2, src, REG_ITMP2);
1660                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1661                         if (iptr->op1 == 0) {
1662                                 gen_nullptr_check(s1);
1663                                 gen_bound_check;
1664                                 }
1665                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1666                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1667                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1668                         store_reg_to_var_int(iptr->dst, d);
1669                         break;
1670
1671                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1672
1673                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1674                         var_to_reg_int(s2, src, REG_ITMP2);
1675                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1676                         if (iptr->op1 == 0) {
1677                                 gen_nullptr_check(s1);
1678                                 gen_bound_check;
1679                                 }
1680                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1681                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1682                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1683                         store_reg_to_var_int(iptr->dst, d);
1684                         break;
1685
1686                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1687
1688                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1689                         var_to_reg_int(s2, src, REG_ITMP2);
1690                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1691                         if (iptr->op1 == 0) {
1692                                 gen_nullptr_check(s1);
1693                                 gen_bound_check;
1694                                 }
1695                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1696                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1697                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1698                         store_reg_to_var_int(iptr->dst, d);
1699                         break;
1700
1701                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1702
1703                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1704                         var_to_reg_int(s2, src, REG_ITMP2);
1705                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1706                         if (iptr->op1 == 0) {
1707                                 gen_nullptr_check(s1);
1708                                 gen_bound_check;
1709                                 }
1710                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1711                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1712                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1713                         store_reg_to_var_flt(iptr->dst, d);
1714                         break;
1715
1716                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1717
1718                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1719                         var_to_reg_int(s2, src, REG_ITMP2);
1720                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1721                         if (iptr->op1 == 0) {
1722                                 gen_nullptr_check(s1);
1723                                 gen_bound_check;
1724                                 }
1725                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1726                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1727                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1728                         store_reg_to_var_flt(iptr->dst, d);
1729                         break;
1730
1731                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1732
1733                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1734                         var_to_reg_int(s2, src, REG_ITMP2);
1735                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1736                         if (iptr->op1 == 0) {
1737                                 gen_nullptr_check(s1);
1738                                 gen_bound_check;
1739                                 }
1740                         M_AADD(s2, s1, REG_ITMP1);
1741                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1742                         M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1743                         store_reg_to_var_int(iptr->dst, d);
1744                         break;
1745
1746                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1747
1748                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1749                         var_to_reg_int(s2, src, REG_ITMP2);
1750                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1751                         if (iptr->op1 == 0) {
1752                                 gen_nullptr_check(s1);
1753                                 gen_bound_check;
1754                                 }
1755                         M_AADD(s2, s1, REG_ITMP1);
1756                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1757                         M_SLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1758                         store_reg_to_var_int(iptr->dst, d);
1759                         break;
1760
1761                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1762
1763                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1764                         var_to_reg_int(s2, src, REG_ITMP2);
1765                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1766                         if (iptr->op1 == 0) {
1767                                 gen_nullptr_check(s1);
1768                                 gen_bound_check;
1769                                 }
1770                         M_AADD(s2, s1, REG_ITMP1);
1771                         M_BLDS(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1772                         store_reg_to_var_int(iptr->dst, d);
1773                         break;
1774
1775
1776                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1777
1778                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1779                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1780                         if (iptr->op1 == 0) {
1781                                 gen_nullptr_check(s1);
1782                                 gen_bound_check;
1783                                 }
1784                         var_to_reg_int(s3, src, REG_ITMP3);
1785                         M_ASLL_IMM(s2, POINTERSHIFT, REG_ITMP2);
1786                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1787                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1788                         break;
1789
1790                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1791
1792                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1793                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1794                         if (iptr->op1 == 0) {
1795                                 gen_nullptr_check(s1);
1796                                 gen_bound_check;
1797                                 }
1798                         var_to_reg_int(s3, src, REG_ITMP3);
1799                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1800                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1801                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1802                         break;
1803
1804                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1805
1806                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1807                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1808                         if (iptr->op1 == 0) {
1809                                 gen_nullptr_check(s1);
1810                                 gen_bound_check;
1811                                 }
1812                         var_to_reg_int(s3, src, REG_ITMP3);
1813                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1814                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1815                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1816                         break;
1817
1818                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1819
1820                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1821                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1822                         if (iptr->op1 == 0) {
1823                                 gen_nullptr_check(s1);
1824                                 gen_bound_check;
1825                                 }
1826                         var_to_reg_flt(s3, src, REG_FTMP3);
1827                         M_ASLL_IMM(s2, 2, REG_ITMP2);
1828                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1829                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1830                         break;
1831
1832                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1833
1834                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1835                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1836                         if (iptr->op1 == 0) {
1837                                 gen_nullptr_check(s1);
1838                                 gen_bound_check;
1839                                 }
1840                         var_to_reg_flt(s3, src, REG_FTMP3);
1841                         M_ASLL_IMM(s2, 3, REG_ITMP2);
1842                         M_AADD(REG_ITMP2, s1, REG_ITMP1);
1843                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1844                         break;
1845
1846                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1847                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1848
1849                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1850                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1851                         if (iptr->op1 == 0) {
1852                                 gen_nullptr_check(s1);
1853                                 gen_bound_check;
1854                                 }
1855                         var_to_reg_int(s3, src, REG_ITMP3);
1856                         M_AADD(s2, s1, REG_ITMP1);
1857                         M_AADD(s2, REG_ITMP1, REG_ITMP1);
1858                         M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1859                         break;
1860
1861                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1862
1863                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1864                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1865                         if (iptr->op1 == 0) {
1866                                 gen_nullptr_check(s1);
1867                                 gen_bound_check;
1868                                 }
1869                         var_to_reg_int(s3, src, REG_ITMP3);
1870                         M_AADD(s2, s1, REG_ITMP1);
1871                         M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1872                         break;
1873
1874
1875                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1876                                       /* op1 = type, val.a = field address            */
1877
1878                         /* if class isn't yet initialized, do it */
1879                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
1880                                 /* call helper function which patches this code */
1881                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
1882                                 M_ALD(REG_ITMP1, REG_PV, a);
1883                                 a = dseg_addaddress(asm_check_clinit);
1884                                 M_ALD(REG_ITMP3, REG_PV, a);
1885                                 M_JSR(REG_RA, REG_ITMP3);
1886                                 M_NOP;
1887                         }
1888
1889                         a = dseg_addaddress(&(((fieldinfo *) iptr->val.a)->value));
1890                         M_ALD(REG_ITMP1, REG_PV, a);
1891                         switch (iptr->op1) {
1892                         case TYPE_INT:
1893                                 var_to_reg_int(s2, src, REG_ITMP2);
1894                                 M_IST(s2, REG_ITMP1, 0);
1895                                 break;
1896                         case TYPE_LNG:
1897                                 var_to_reg_int(s2, src, REG_ITMP2);
1898                                 M_LST(s2, REG_ITMP1, 0);
1899                                 break;
1900                         case TYPE_ADR:
1901                                 var_to_reg_int(s2, src, REG_ITMP2);
1902                                 M_AST(s2, REG_ITMP1, 0);
1903                                 break;
1904                         case TYPE_FLT:
1905                                 var_to_reg_flt(s2, src, REG_FTMP2);
1906                                 M_FST(s2, REG_ITMP1, 0);
1907                                 break;
1908                         case TYPE_DBL:
1909                                 var_to_reg_flt(s2, src, REG_FTMP2);
1910                                 M_DST(s2, REG_ITMP1, 0);
1911                                 break;
1912                         default: panic ("internal error");
1913                         }
1914                         break;
1915
1916                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1917                                       /* op1 = type, val.a = field address            */
1918
1919                         /* if class isn't yet initialized, do it */
1920                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
1921                                 /* call helper function which patches this code */
1922                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
1923                                 M_ALD(REG_ITMP1, REG_PV, a);
1924                                 a = dseg_addaddress(asm_check_clinit);
1925                                 M_ALD(REG_ITMP3, REG_PV, a);
1926                                 M_JSR(REG_RA, REG_ITMP3);
1927                                 M_NOP;
1928                         }
1929
1930                         a = dseg_addaddress(&(((fieldinfo *) iptr->val.a)->value));
1931                         M_ALD(REG_ITMP1, REG_PV, a);
1932                         switch (iptr->op1) {
1933                         case TYPE_INT:
1934                                 d = reg_of_var(m, iptr->dst, REG_ITMP3);
1935                                 M_ILD(d, REG_ITMP1, 0);
1936                                 store_reg_to_var_int(iptr->dst, d);
1937                                 break;
1938                         case TYPE_LNG:
1939                                 d = reg_of_var(m, iptr->dst, REG_ITMP3);
1940                                 M_LLD(d, REG_ITMP1, 0);
1941                                 store_reg_to_var_int(iptr->dst, d);
1942                                 break;
1943                         case TYPE_ADR:
1944                                 d = reg_of_var(m, iptr->dst, REG_ITMP3);
1945                                 M_ALD(d, REG_ITMP1, 0);
1946                                 store_reg_to_var_int(iptr->dst, d);
1947                                 break;
1948                         case TYPE_FLT:
1949                                 d = reg_of_var(m, iptr->dst, REG_FTMP1);
1950                                 M_FLD(d, REG_ITMP1, 0);
1951                                 store_reg_to_var_flt(iptr->dst, d);
1952                                 break;
1953                         case TYPE_DBL:
1954                                 d = reg_of_var(m, iptr->dst, REG_FTMP1);
1955                                 M_DLD(d, REG_ITMP1, 0);
1956                                 store_reg_to_var_flt(iptr->dst, d);
1957                                 break;
1958                         default: panic ("internal error");
1959                         }
1960                         break;
1961
1962
1963                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
1964                                       /* op1 = type, val.i = field offset             */
1965
1966                         a = ((fieldinfo *)(iptr->val.a))->offset;
1967                         switch (iptr->op1) {
1968                                 case TYPE_INT:
1969                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1970                                         var_to_reg_int(s2, src, REG_ITMP2);
1971                                         gen_nullptr_check(s1);
1972                                         M_IST(s2, s1, a);
1973                                         break;
1974                                 case TYPE_LNG:
1975                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1976                                         var_to_reg_int(s2, src, REG_ITMP2);
1977                                         gen_nullptr_check(s1);
1978                                         M_LST(s2, s1, a);
1979                                         break;
1980                                 case TYPE_ADR:
1981                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1982                                         var_to_reg_int(s2, src, REG_ITMP2);
1983                                         gen_nullptr_check(s1);
1984                                         M_AST(s2, s1, a);
1985                                         break;
1986                                 case TYPE_FLT:
1987                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1988                                         var_to_reg_flt(s2, src, REG_FTMP2);
1989                                         gen_nullptr_check(s1);
1990                                         M_FST(s2, s1, a);
1991                                         break;
1992                                 case TYPE_DBL:
1993                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1994                                         var_to_reg_flt(s2, src, REG_FTMP2);
1995                                         gen_nullptr_check(s1);
1996                                         M_DST(s2, s1, a);
1997                                         break;
1998                                 default: panic ("internal error");
1999                                 }
2000                         break;
2001
2002                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2003                                       /* op1 = type, val.i = field offset             */
2004
2005                         a = ((fieldinfo *)(iptr->val.a))->offset;
2006                         switch (iptr->op1) {
2007                                 case TYPE_INT:
2008                                         var_to_reg_int(s1, src, REG_ITMP1);
2009                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2010                                         gen_nullptr_check(s1);
2011                                         M_ILD(d, s1, a);
2012                                         store_reg_to_var_int(iptr->dst, d);
2013                                         break;
2014                                 case TYPE_LNG:
2015                                         var_to_reg_int(s1, src, REG_ITMP1);
2016                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2017                                         gen_nullptr_check(s1);
2018                                         M_LLD(d, s1, a);
2019                                         store_reg_to_var_int(iptr->dst, d);
2020                                         break;
2021                                 case TYPE_ADR:
2022                                         var_to_reg_int(s1, src, REG_ITMP1);
2023                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2024                                         gen_nullptr_check(s1);
2025                                         M_ALD(d, s1, a);
2026                                         store_reg_to_var_int(iptr->dst, d);
2027                                         break;
2028                                 case TYPE_FLT:
2029                                         var_to_reg_int(s1, src, REG_ITMP1);
2030                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2031                                         gen_nullptr_check(s1);
2032                                         M_FLD(d, s1, a);
2033                                         store_reg_to_var_flt(iptr->dst, d);
2034                                         break;
2035                                 case TYPE_DBL:
2036                                         var_to_reg_int(s1, src, REG_ITMP1);
2037                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2038                                         gen_nullptr_check(s1);
2039                                         M_DLD(d, s1, a);
2040                                         store_reg_to_var_flt(iptr->dst, d);
2041                                         break;
2042                                 default: panic ("internal error");
2043                                 }
2044                         break;
2045
2046
2047                 /* branch operations **************************************************/
2048
2049 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2050
2051                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2052
2053                         var_to_reg_int(s1, src, REG_ITMP1);
2054                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2055                         a = dseg_addaddress(asm_handle_exception);
2056                         M_ALD(REG_ITMP2, REG_PV, a);
2057                         M_JSR(REG_ITMP2_XPC, REG_ITMP2);
2058                         M_NOP;
2059                         M_NOP;              /* nop ensures that XPC is less than the end */
2060                                             /* of basic block                            */
2061                         ALIGNCODENOP;
2062                         break;
2063
2064                 case ICMD_GOTO:         /* ... ==> ...                                */
2065                                         /* op1 = target JavaVM pc                     */
2066                         M_BR(0);
2067                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2068                         M_NOP;
2069                         ALIGNCODENOP;
2070                         break;
2071
2072                 case ICMD_JSR:          /* ... ==> ...                                */
2073                                         /* op1 = target JavaVM pc                     */
2074
2075                         dseg_addtarget(BlockPtrOfPC(iptr->op1));
2076                         M_ALD(REG_ITMP1, REG_PV, -dseglen);
2077                         M_JSR(REG_ITMP1, REG_ITMP1);        /* REG_ITMP1 = return address */
2078                         M_NOP;
2079                         break;
2080
2081                 case ICMD_RET:          /* ... ==> ...                                */
2082                                         /* op1 = local variable                       */
2083                         var = &(r->locals[iptr->op1][TYPE_ADR]);
2084                         if (var->flags & INMEMORY) {
2085                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2086                                 M_RET(REG_ITMP1);
2087                                 }
2088                         else
2089                                 M_RET(var->regoff);
2090                         M_NOP;
2091                         ALIGNCODENOP;
2092                         break;
2093
2094                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2095                                         /* op1 = target JavaVM pc                     */
2096
2097                         var_to_reg_int(s1, src, REG_ITMP1);
2098                         M_BEQZ(s1, 0);
2099                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2100                         M_NOP;
2101                         break;
2102
2103                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2104                                         /* op1 = target JavaVM pc                     */
2105
2106                         var_to_reg_int(s1, src, REG_ITMP1);
2107                         M_BNEZ(s1, 0);
2108                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2109                         M_NOP;
2110                         break;
2111
2112                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2113                                         /* op1 = target JavaVM pc, val.i = constant   */
2114
2115                         var_to_reg_int(s1, src, REG_ITMP1);
2116                         if (iptr->val.i == 0) {
2117                                 M_BEQZ(s1, 0);
2118                                 }
2119                         else {
2120                                 ICONST(REG_ITMP2, iptr->val.i);
2121                                 M_BEQ(s1, REG_ITMP2, 0);
2122                                 }
2123                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2124                         M_NOP;
2125                         break;
2126
2127                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2128                                         /* op1 = target JavaVM pc, val.i = constant   */
2129
2130                         var_to_reg_int(s1, src, REG_ITMP1);
2131                         if (iptr->val.i == 0) {
2132                                 M_BLTZ(s1, 0);
2133                                 }
2134                         else {
2135                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2136                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2137                                         }
2138                                 else {
2139                                         ICONST(REG_ITMP2, iptr->val.i);
2140                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2141                                         }
2142                                 M_BNEZ(REG_ITMP1, 0);
2143                                 }
2144                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2145                         M_NOP;
2146                         break;
2147
2148                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2149                                         /* op1 = target JavaVM pc, val.i = constant   */
2150
2151                         var_to_reg_int(s1, src, REG_ITMP1);
2152                         if (iptr->val.i == 0) {
2153                                 M_BLEZ(s1, 0);
2154                                 }
2155                         else {
2156                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2157                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2158                                         M_BNEZ(REG_ITMP1, 0);
2159                                         }
2160                                 else {
2161                                         ICONST(REG_ITMP2, iptr->val.i);
2162                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2163                                         M_BEQZ(REG_ITMP1, 0);
2164                                         }
2165                                 }
2166                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2167                         M_NOP;
2168                         break;
2169
2170                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2171                                         /* op1 = target JavaVM pc, val.i = constant   */
2172
2173                         var_to_reg_int(s1, src, REG_ITMP1);
2174                         if (iptr->val.i == 0) {
2175                                 M_BNEZ(s1, 0);
2176                                 }
2177                         else {
2178                                 ICONST(REG_ITMP2, iptr->val.i);
2179                                 M_BNE(s1, REG_ITMP2, 0);
2180                                 }
2181                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2182                         M_NOP;
2183                         break;
2184
2185                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2186                                         /* op1 = target JavaVM pc, val.i = constant   */
2187
2188                         var_to_reg_int(s1, src, REG_ITMP1);
2189                         if (iptr->val.i == 0) {
2190                                 M_BGTZ(s1, 0);
2191                                 }
2192                         else {
2193                                 if ((iptr->val.i >= -32769) && (iptr->val.i <= 32766)) {
2194                                         M_CMPLT_IMM(s1, iptr->val.i + 1, REG_ITMP1);
2195                                         M_BEQZ(REG_ITMP1, 0);
2196                                         }
2197                                 else {
2198                                         ICONST(REG_ITMP2, iptr->val.i);
2199                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2200                                         M_BNEZ(REG_ITMP1, 0);
2201                                         }
2202                                 }
2203                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2204                         M_NOP;
2205                         break;
2206
2207                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2208                                         /* op1 = target JavaVM pc, val.i = constant   */
2209
2210                         var_to_reg_int(s1, src, REG_ITMP1);
2211                         if (iptr->val.i == 0) {
2212                                 M_BGEZ(s1, 0);
2213                                 }
2214                         else {
2215                                 if ((iptr->val.i >= -32768) && (iptr->val.i <= 32767)) {
2216                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2217                                         }
2218                                 else {
2219                                         ICONST(REG_ITMP2, iptr->val.i);
2220                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2221                                         }
2222                                 M_BEQZ(REG_ITMP1, 0);
2223                                 }
2224                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2225                         M_NOP;
2226                         break;
2227
2228                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2229                                         /* op1 = target JavaVM pc, val.l = constant   */
2230
2231                         var_to_reg_int(s1, src, REG_ITMP1);
2232                         if (iptr->val.l == 0) {
2233                                 M_BEQZ(s1, 0);
2234                                 }
2235                         else {
2236                                 LCONST(REG_ITMP2, iptr->val.l);
2237                                 M_BEQ(s1, REG_ITMP2, 0);
2238                                 }
2239                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2240                         M_NOP;
2241                         break;
2242
2243                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2244                                         /* op1 = target JavaVM pc, val.l = constant   */
2245
2246                         var_to_reg_int(s1, src, REG_ITMP1);
2247                         if (iptr->val.l == 0) {
2248                                 M_BLTZ(s1, 0);
2249                                 }
2250                         else {
2251                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2252                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2253                                         }
2254                                 else {
2255                                         LCONST(REG_ITMP2, iptr->val.l);
2256                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2257                                         }
2258                                 M_BNEZ(REG_ITMP1, 0);
2259                                 }
2260                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2261                         M_NOP;
2262                         break;
2263
2264                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2265                                         /* op1 = target JavaVM pc, val.l = constant   */
2266
2267                         var_to_reg_int(s1, src, REG_ITMP1);
2268                         if (iptr->val.l == 0) {
2269                                 M_BLEZ(s1, 0);
2270                                 }
2271                         else {
2272                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2273                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2274                                         M_BNEZ(REG_ITMP1, 0);
2275                                         }
2276                                 else {
2277                                         LCONST(REG_ITMP2, iptr->val.l);
2278                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2279                                         M_BEQZ(REG_ITMP1, 0);
2280                                         }
2281                                 }
2282                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2283                         M_NOP;
2284                         break;
2285
2286                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2287                                         /* op1 = target JavaVM pc, val.l = constant   */
2288
2289                         var_to_reg_int(s1, src, REG_ITMP1);
2290                         if (iptr->val.l == 0) {
2291                                 M_BNEZ(s1, 0);
2292                                 }
2293                         else {
2294                                 LCONST(REG_ITMP2, iptr->val.l);
2295                                 M_BNE(s1, REG_ITMP2, 0);
2296                                 }
2297                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2298                         M_NOP;
2299                         break;
2300
2301                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2302                                         /* op1 = target JavaVM pc, val.l = constant   */
2303
2304                         var_to_reg_int(s1, src, REG_ITMP1);
2305                         if (iptr->val.l == 0) {
2306                                 M_BGTZ(s1, 0);
2307                                 }
2308                         else {
2309                                 if ((iptr->val.l >= -32769) && (iptr->val.l <= 32766)) {
2310                                         M_CMPLT_IMM(s1, iptr->val.l + 1, REG_ITMP1);
2311                                         M_BEQZ(REG_ITMP1, 0);
2312                                         }
2313                                 else {
2314                                         LCONST(REG_ITMP2, iptr->val.l);
2315                                         M_CMPGT(s1, REG_ITMP2, REG_ITMP1);
2316                                         M_BNEZ(REG_ITMP1, 0);
2317                                         }
2318                                 }
2319                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2320                         M_NOP;
2321                         break;
2322
2323                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2324                                         /* op1 = target JavaVM pc, val.l = constant   */
2325
2326                         var_to_reg_int(s1, src, REG_ITMP1);
2327                         if (iptr->val.l == 0) {
2328                                 M_BGEZ(s1, 0);
2329                                 }
2330                         else {
2331                                 if ((iptr->val.l >= -32768) && (iptr->val.l <= 32767)) {
2332                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2333                                         }
2334                                 else {
2335                                         LCONST(REG_ITMP2, iptr->val.l);
2336                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2337                                         }
2338                                 M_BEQZ(REG_ITMP1, 0);
2339                                 }
2340                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2341                         M_NOP;
2342                         break;
2343
2344                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2345                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2346                 case ICMD_IF_ACMPEQ:
2347
2348                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2349                         var_to_reg_int(s2, src, REG_ITMP2);
2350                         M_BEQ(s1, s2, 0);
2351                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2352                         M_NOP;
2353                         break;
2354
2355                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2356                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2357                 case ICMD_IF_ACMPNE:
2358
2359                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2360                         var_to_reg_int(s2, src, REG_ITMP2);
2361                         M_BNE(s1, s2, 0);
2362                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2363                         M_NOP;
2364                         break;
2365
2366                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2367                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2368
2369                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2370                         var_to_reg_int(s2, src, REG_ITMP2);
2371                         M_CMPLT(s1, s2, REG_ITMP1);
2372                         M_BNEZ(REG_ITMP1, 0);
2373                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2374                         M_NOP;
2375                         break;
2376
2377                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2378                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2379
2380                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2381                         var_to_reg_int(s2, src, REG_ITMP2);
2382                         M_CMPGT(s1, s2, REG_ITMP1);
2383                         M_BNEZ(REG_ITMP1, 0);
2384                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2385                         M_NOP;
2386                         break;
2387
2388                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2389                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2390
2391                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2392                         var_to_reg_int(s2, src, REG_ITMP2);
2393                         M_CMPGT(s1, s2, REG_ITMP1);
2394                         M_BEQZ(REG_ITMP1, 0);
2395                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2396                         M_NOP;
2397                         break;
2398
2399                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2400                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2401
2402                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2403                         var_to_reg_int(s2, src, REG_ITMP2);
2404                         M_CMPLT(s1, s2, REG_ITMP1);
2405                         M_BEQZ(REG_ITMP1, 0);
2406                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2407                         M_NOP;
2408                         break;
2409
2410 #ifdef CONDITIONAL_LOADCONST
2411                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2412
2413                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2414                         break;
2415
2416                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2417                                         /* val.i = constant                           */
2418
2419                         var_to_reg_int(s1, src, REG_ITMP1);
2420                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2421                         s3 = iptr->val.i;
2422                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2423                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2424                                         M_CMPEQ(s1, REG_ZERO, d);
2425                                         store_reg_to_var_int(iptr->dst, d);
2426                                         break;
2427                                         }
2428                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2429                                         M_CMPEQ(s1, REG_ZERO, d);
2430                                         M_XOR_IMM(d, 1, d);
2431                                         store_reg_to_var_int(iptr->dst, d);
2432                                         break;
2433                                         }
2434                                 if (s1 == d) {
2435                                         M_MOV(s1, REG_ITMP1);
2436                                         s1 = REG_ITMP1;
2437                                         }
2438                                 ICONST(d, iptr[1].val.i);
2439                                 }
2440                         if ((s3 >= 0) && (s3 <= 255)) {
2441                                 M_CMOVEQ_IMM(s1, s3, d);
2442                                 }
2443                         else {
2444                                 ICONST(REG_ITMP2, s3);
2445                                 M_CMOVEQ(s1, REG_ITMP2, d);
2446                                 }
2447                         store_reg_to_var_int(iptr->dst, d);
2448                         break;
2449
2450                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2451                                         /* val.i = constant                           */
2452
2453                         var_to_reg_int(s1, src, REG_ITMP1);
2454                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2455                         s3 = iptr->val.i;
2456                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2457                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2458                                         M_CMPEQ(s1, REG_ZERO, d);
2459                                         store_reg_to_var_int(iptr->dst, d);
2460                                         break;
2461                                         }
2462                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2463                                         M_CMPEQ(s1, REG_ZERO, d);
2464                                         M_XOR_IMM(d, 1, d);
2465                                         store_reg_to_var_int(iptr->dst, d);
2466                                         break;
2467                                         }
2468                                 if (s1 == d) {
2469                                         M_MOV(s1, REG_ITMP1);
2470                                         s1 = REG_ITMP1;
2471                                         }
2472                                 ICONST(d, iptr[1].val.i);
2473                                 }
2474                         if ((s3 >= 0) && (s3 <= 255)) {
2475                                 M_CMOVNE_IMM(s1, s3, d);
2476                                 }
2477                         else {
2478                                 ICONST(REG_ITMP2, s3);
2479                                 M_CMOVNE(s1, REG_ITMP2, d);
2480                                 }
2481                         store_reg_to_var_int(iptr->dst, d);
2482                         break;
2483
2484                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2485                                         /* val.i = constant                           */
2486
2487                         var_to_reg_int(s1, src, REG_ITMP1);
2488                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2489                         s3 = iptr->val.i;
2490                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2491                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2492                                         M_CMPLT(s1, REG_ZERO, d);
2493                                         store_reg_to_var_int(iptr->dst, d);
2494                                         break;
2495                                         }
2496                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2497                                         M_CMPLE(REG_ZERO, s1, d);
2498                                         store_reg_to_var_int(iptr->dst, d);
2499                                         break;
2500                                         }
2501                                 if (s1 == d) {
2502                                         M_MOV(s1, REG_ITMP1);
2503                                         s1 = REG_ITMP1;
2504                                         }
2505                                 ICONST(d, iptr[1].val.i);
2506                                 }
2507                         if ((s3 >= 0) && (s3 <= 255)) {
2508                                 M_CMOVLT_IMM(s1, s3, d);
2509                                 }
2510                         else {
2511                                 ICONST(REG_ITMP2, s3);
2512                                 M_CMOVLT(s1, REG_ITMP2, d);
2513                                 }
2514                         store_reg_to_var_int(iptr->dst, d);
2515                         break;
2516
2517                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2518                                         /* val.i = constant                           */
2519
2520                         var_to_reg_int(s1, src, REG_ITMP1);
2521                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2522                         s3 = iptr->val.i;
2523                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2524                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2525                                         M_CMPLE(REG_ZERO, s1, d);
2526                                         store_reg_to_var_int(iptr->dst, d);
2527                                         break;
2528                                         }
2529                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2530                                         M_CMPLT(s1, REG_ZERO, d);
2531                                         store_reg_to_var_int(iptr->dst, d);
2532                                         break;
2533                                         }
2534                                 if (s1 == d) {
2535                                         M_MOV(s1, REG_ITMP1);
2536                                         s1 = REG_ITMP1;
2537                                         }
2538                                 ICONST(d, iptr[1].val.i);
2539                                 }
2540                         if ((s3 >= 0) && (s3 <= 255)) {
2541                                 M_CMOVGE_IMM(s1, s3, d);
2542                                 }
2543                         else {
2544                                 ICONST(REG_ITMP2, s3);
2545                                 M_CMOVGE(s1, REG_ITMP2, d);
2546                                 }
2547                         store_reg_to_var_int(iptr->dst, d);
2548                         break;
2549
2550                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2551                                         /* val.i = constant                           */
2552
2553                         var_to_reg_int(s1, src, REG_ITMP1);
2554                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2555                         s3 = iptr->val.i;
2556                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2557                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2558                                         M_CMPLT(REG_ZERO, s1, d);
2559                                         store_reg_to_var_int(iptr->dst, d);
2560                                         break;
2561                                         }
2562                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2563                                         M_CMPLE(s1, REG_ZERO, d);
2564                                         store_reg_to_var_int(iptr->dst, d);
2565                                         break;
2566                                         }
2567                                 if (s1 == d) {
2568                                         M_MOV(s1, REG_ITMP1);
2569                                         s1 = REG_ITMP1;
2570                                         }
2571                                 ICONST(d, iptr[1].val.i);
2572                                 }
2573                         if ((s3 >= 0) && (s3 <= 255)) {
2574                                 M_CMOVGT_IMM(s1, s3, d);
2575                                 }
2576                         else {
2577                                 ICONST(REG_ITMP2, s3);
2578                                 M_CMOVGT(s1, REG_ITMP2, d);
2579                                 }
2580                         store_reg_to_var_int(iptr->dst, d);
2581                         break;
2582
2583                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2584                                         /* val.i = constant                           */
2585
2586                         var_to_reg_int(s1, src, REG_ITMP1);
2587                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2588                         s3 = iptr->val.i;
2589                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2590                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2591                                         M_CMPLE(s1, REG_ZERO, d);
2592                                         store_reg_to_var_int(iptr->dst, d);
2593                                         break;
2594                                         }
2595                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2596                                         M_CMPLT(REG_ZERO, s1, d);
2597                                         store_reg_to_var_int(iptr->dst, d);
2598                                         break;
2599                                         }
2600                                 if (s1 == d) {
2601                                         M_MOV(s1, REG_ITMP1);
2602                                         s1 = REG_ITMP1;
2603                                         }
2604                                 ICONST(d, iptr[1].val.i);
2605                                 }
2606                         if ((s3 >= 0) && (s3 <= 255)) {
2607                                 M_CMOVLE_IMM(s1, s3, d);
2608                                 }
2609                         else {
2610                                 ICONST(REG_ITMP2, s3);
2611                                 M_CMOVLE(s1, REG_ITMP2, d);
2612                                 }
2613                         store_reg_to_var_int(iptr->dst, d);
2614                         break;
2615 #endif
2616
2617
2618                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2619                 case ICMD_LRETURN:
2620                 case ICMD_ARETURN:
2621
2622 #if defined(USE_THREADS)
2623                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2624                                 s4 disp;
2625                                 a = dseg_addaddress((void *) builtin_monitorexit);
2626                                 M_ALD(REG_ITMP3, REG_PV, a);
2627                                 M_JSR(REG_RA, REG_ITMP3);
2628                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8); /* delay slot */
2629                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2630                                 M_LDA(REG_PV, REG_RA, disp);
2631                         }
2632 #endif
2633                         var_to_reg_int(s1, src, REG_RESULT);
2634                         M_INTMOVE(s1, REG_RESULT);
2635                         goto nowperformreturn;
2636
2637                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2638                 case ICMD_DRETURN:
2639
2640 #if defined(USE_THREADS)
2641                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2642                                 s4 disp;
2643                                 a = dseg_addaddress((void *) builtin_monitorexit);
2644                                 M_ALD(REG_ITMP3, REG_PV, a);
2645                                 M_JSR(REG_RA, REG_ITMP3);
2646                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8); /* delay slot */
2647                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2648                                 M_LDA(REG_PV, REG_RA, disp);
2649                         }
2650 #endif
2651                         var_to_reg_flt(s1, src, REG_FRESULT);
2652                         {
2653                                 int t = ((iptr->opc == ICMD_FRETURN) ? TYPE_FLT : TYPE_DBL);
2654                                 M_TFLTMOVE(t, s1, REG_FRESULT);
2655                         }
2656                         goto nowperformreturn;
2657
2658                 case ICMD_RETURN:      /* ...  ==> ...                                */
2659
2660 #if defined(USE_THREADS)
2661                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2662                                 s4 disp;
2663                                 a = dseg_addaddress((void *) builtin_monitorexit);
2664                                 M_ALD(REG_ITMP3, REG_PV, a);
2665                                 M_JSR(REG_RA, REG_ITMP3);
2666                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8); /* delay slot */
2667                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2668                                 M_LDA(REG_PV, REG_RA, disp);
2669                         }
2670 #endif
2671
2672 nowperformreturn:
2673                         {
2674                         s4 i, p;
2675
2676                         p = parentargs_base;
2677
2678                         /* restore return address                                         */
2679
2680                         if (!m->isleafmethod) {
2681                                 p--; M_LLD(REG_RA, REG_SP, 8 * p);
2682                         }
2683
2684                         /* restore saved registers                                        */
2685
2686                         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
2687                                 p--; M_LLD(r->savintregs[i], REG_SP, 8 * p);
2688                         }
2689                         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
2690                                 p--; M_DLD(r->savfltregs[i], REG_SP, 8 * p);
2691                         }
2692
2693                         /* call trace function */
2694
2695                         if (runverbose) {
2696                                 M_LDA (REG_SP, REG_SP, -24);
2697                                 M_LST(REG_RA, REG_SP, 0);
2698                                 M_LST(REG_RESULT, REG_SP, 8);
2699                                 M_DST(REG_FRESULT, REG_SP,16);
2700                                 a = dseg_addaddress(m);
2701                                 M_ALD(r->argintregs[0], REG_PV, a);
2702                                 M_MOV(REG_RESULT, r->argintregs[1]);
2703                                 M_FLTMOVE(REG_FRESULT, r->argfltregs[2]);
2704                                 M_FMOV(REG_FRESULT, r->argfltregs[3]);
2705                                 a = dseg_addaddress((void *) builtin_displaymethodstop);
2706                                 M_ALD(REG_ITMP3, REG_PV, a);
2707                                 M_JSR (REG_RA, REG_ITMP3);
2708                                 M_NOP;
2709                                 M_DLD(REG_FRESULT, REG_SP,16);
2710                                 M_LLD(REG_RESULT, REG_SP, 8);
2711                                 M_LLD(REG_RA, REG_SP, 0);
2712                                 M_LDA (REG_SP, REG_SP, 24);
2713                         }
2714
2715                         M_RET(REG_RA);
2716
2717                         /* deallocate stack                                               */
2718
2719                         if (parentargs_base) {
2720                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2721
2722                         } else {
2723                                 M_NOP;
2724                         }
2725
2726                         ALIGNCODENOP;
2727                         }
2728                         break;
2729
2730
2731                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2732                         {
2733                         s4 i, l, *s4ptr;
2734                         void **tptr;
2735
2736                         tptr = (void **) iptr->target;
2737
2738                         s4ptr = iptr->val.a;
2739                         l = s4ptr[1];                          /* low     */
2740                         i = s4ptr[2];                          /* high    */
2741
2742                         var_to_reg_int(s1, src, REG_ITMP1);
2743                         if (l == 0)
2744                                 {M_INTMOVE(s1, REG_ITMP1);}
2745                         else if (l <= 32768) {
2746                                 M_IADD_IMM(s1, -l, REG_ITMP1);
2747                                 }
2748                         else {
2749                                 ICONST(REG_ITMP2, l);
2750                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2751                                 }
2752                         i = i - l + 1;
2753
2754                         /* range check */
2755
2756                         M_CMPULT_IMM(REG_ITMP1, i, REG_ITMP2);
2757                         M_BEQZ(REG_ITMP2, 0);
2758                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
2759                         M_ASLL_IMM(REG_ITMP1, POINTERSHIFT, REG_ITMP1);      /* delay slot*/
2760
2761                         /* build jump table top down and use address of lowest entry */
2762
2763                         /* s4ptr += 3 + i; */
2764                         tptr += i;
2765
2766                         while (--i >= 0) {
2767                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
2768                                 dseg_addtarget((basicblock *) tptr[0]);
2769                                 --tptr;
2770                                 }
2771                         }
2772
2773                         /* length of dataseg after last dseg_addtarget is used by load */
2774
2775                         M_AADD(REG_ITMP1, REG_PV, REG_ITMP2);
2776                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
2777                         M_JMP(REG_ITMP2);
2778                         M_NOP;
2779                         ALIGNCODENOP;
2780                         break;
2781
2782
2783                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2784                         {
2785                         s4 i, /*l, */val, *s4ptr;
2786                         void **tptr;
2787
2788                         tptr = (void **) iptr->target;
2789
2790                         s4ptr = iptr->val.a;
2791                         /*l = s4ptr[0];*/                          /* default  */
2792                         i = s4ptr[1];                          /* count    */
2793
2794                         MCODECHECK((i<<2)+8);
2795                         var_to_reg_int(s1, src, REG_ITMP1);
2796                         while (--i >= 0) {
2797                                 s4ptr += 2;
2798                                 ++tptr;
2799
2800                                 val = s4ptr[0];
2801                                 ICONST(REG_ITMP2, val);
2802                                 M_BEQ(s1, REG_ITMP2, 0);
2803                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
2804                                 M_NOP;
2805                                 }
2806
2807                         M_BR(0);
2808                         tptr = (void **) iptr->target;
2809                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
2810                         M_NOP;
2811                         ALIGNCODENOP;
2812                         break;
2813                         }
2814
2815
2816                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
2817                                         /* op1 = return type, val.a = function pointer*/
2818                         s3 = 3;
2819                         goto gen_method;
2820
2821                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
2822                                         /* op1 = return type, val.a = function pointer*/
2823                         s3 = 2;
2824                         goto gen_method;
2825
2826                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
2827                                         /* op1 = return type, val.a = function pointer*/
2828                         s3 = 1;
2829                         goto gen_method;
2830
2831                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2832                                         /* op1 = arg count, val.a = method pointer    */
2833
2834                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2835                                         /* op1 = arg count, val.a = method pointer    */
2836
2837                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2838                                         /* op1 = arg count, val.a = method pointer    */
2839
2840                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
2841                                         /* op1 = arg count, val.a = method pointer    */
2842
2843                         s3 = iptr->op1;
2844
2845 gen_method: {
2846                         methodinfo *lm;
2847
2848                         MCODECHECK((s3 << 1) + 64);
2849
2850                         /* copy arguments to registers or stack location                  */
2851
2852                         for (; --s3 >= 0; src = src->prev) {
2853                                 if (src->varkind == ARGVAR)
2854                                         continue;
2855                                 if (IS_INT_LNG_TYPE(src->type)) {
2856                                         if (s3 < INT_ARG_CNT) {
2857                                                 s1 = r->argintregs[s3];
2858                                                 var_to_reg_int(d, src, s1);
2859                                                 M_INTMOVE(d, s1);
2860
2861                                         } else  {
2862                                                 var_to_reg_int(d, src, REG_ITMP1);
2863                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
2864                                         }
2865
2866                                 } else {
2867                                         if (s3 < FLT_ARG_CNT) {
2868                                                 s1 = r->argfltregs[s3];
2869                                                 var_to_reg_flt(d, src, s1);
2870                                                 M_TFLTMOVE(src->type, d, s1);
2871
2872                                         } else {
2873                                                 var_to_reg_flt(d, src, REG_FTMP1);
2874                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
2875                                         }
2876                                 }
2877                         } /* end of for */
2878
2879                         lm = iptr->val.a;
2880                         switch (iptr->opc) {
2881                         case ICMD_BUILTIN3:
2882                         case ICMD_BUILTIN2:
2883                         case ICMD_BUILTIN1:
2884                                 a = dseg_addaddress((void *) lm);
2885                                 d = iptr->op1;                                 /* return type */
2886
2887                                 M_ALD(REG_ITMP3, REG_PV, a);     /* built-in-function pointer */
2888                                 M_JSR(REG_RA, REG_ITMP3);
2889                                 M_NOP;
2890                                 goto afteractualcall;
2891
2892                         case ICMD_INVOKESTATIC:
2893                         case ICMD_INVOKESPECIAL:
2894                                 a = dseg_addaddress(lm->stubroutine);
2895                                 d = lm->returntype;
2896
2897                                 M_ALD(REG_PV, REG_PV, a);             /* method pointer in pv */
2898                                 break;
2899
2900                         case ICMD_INVOKEVIRTUAL:
2901                                 d = lm->returntype;
2902
2903                                 gen_nullptr_check(r->argintregs[0]);
2904                                 M_ALD(REG_METHODPTR, r->argintregs[0], OFFSET(java_objectheader, vftbl));
2905                                 M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) + sizeof(methodptr) * lm->vftblindex);
2906                                 break;
2907
2908                         case ICMD_INVOKEINTERFACE:
2909                                 d = lm->returntype;
2910
2911                                 gen_nullptr_check(r->argintregs[0]);
2912                                 M_ALD(REG_METHODPTR, r->argintregs[0], OFFSET(java_objectheader, vftbl));
2913                                 M_ALD(REG_METHODPTR, REG_METHODPTR, OFFSET(vftbl, interfacetable[0]) - sizeof(methodptr*) * lm->class->index);
2914                                 M_ALD(REG_PV, REG_METHODPTR, sizeof(methodptr) * (lm - lm->class->methods));
2915                                 break;
2916                         }
2917
2918                         M_JSR(REG_RA, REG_PV);
2919                         M_NOP;
2920
2921                         /* recompute pv */
2922
2923 afteractualcall:
2924
2925                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
2926                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2927                         else {
2928                                 s4 ml = -s1, mh = 0;
2929                                 while (ml < -32768) { ml += 65536; mh--; }
2930                                 M_LUI(REG_PV, mh);
2931                                 M_IADD_IMM(REG_PV, ml, REG_PV);
2932                                 M_LADD(REG_PV, REG_RA, REG_PV);
2933                         }
2934
2935                         /* d contains return type */
2936
2937                         if (d != TYPE_VOID) {
2938                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
2939                                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
2940                                         M_INTMOVE(REG_RESULT, s1);
2941                                         store_reg_to_var_int(iptr->dst, s1);
2942
2943                                 } else {
2944                                         s1 = reg_of_var(m, iptr->dst, REG_FRESULT);
2945                                         M_TFLTMOVE(iptr->dst->type, REG_FRESULT, s1);
2946                                         store_reg_to_var_flt(iptr->dst, s1);
2947                                 }
2948                         }
2949                         }
2950                         break;
2951
2952
2953                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2954
2955                                       /* op1:   0 == array, 1 == class                */
2956                                       /* val.a: (classinfo*) superclass               */
2957
2958 /*          superclass is an interface:
2959  *
2960  *          return (sub != NULL) &&
2961  *                 (sub->vftbl->interfacetablelength > super->index) &&
2962  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
2963  *
2964  *          superclass is a class:
2965  *
2966  *          return ((sub != NULL) && (0
2967  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2968  *                  super->vftbl->diffvall));
2969  */
2970
2971                         {
2972                         classinfo *super = (classinfo*) iptr->val.a;
2973
2974 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
2975                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
2976 #endif
2977                         var_to_reg_int(s1, src, REG_ITMP1);
2978                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2979                         if (s1 == d) {
2980                                 M_MOV(s1, REG_ITMP1);
2981                                 s1 = REG_ITMP1;
2982                                 }
2983                         M_CLR(d);
2984                         if (iptr->op1) {                               /* class/interface */
2985                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
2986                                         M_BEQZ(s1, 8);
2987                                         M_NOP;
2988                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2989                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
2990                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
2991                                         M_BLEZ(REG_ITMP2, 3);
2992                                         M_NOP;
2993                                         M_ALD(REG_ITMP1, REG_ITMP1,
2994                                               OFFSET(vftbl, interfacetable[0]) -
2995                                               super->index * sizeof(methodptr*));
2996                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
2997                                         }
2998                                 else {                                     /* class           */
2999                                         /*
3000                                         s2 = super->vftbl->diffval;
3001                                         M_BEQZ(s1, 5);
3002                                         M_NOP;
3003                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3004                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3005                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3006                                         M_CMPULT_IMM(REG_ITMP1, s2 + 1, d);
3007                                         */
3008
3009                                         M_BEQZ(s1, 9);
3010                                         M_NOP;
3011                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3012                     a = dseg_addaddress ((void*) super->vftbl);
3013                     M_ALD(REG_ITMP2, REG_PV, a);
3014 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3015                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3016 #endif
3017                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3018                     M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3019                     M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3020 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3021                                         codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3022 #endif
3023                     M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3024                     M_CMPULT(REG_ITMP2, REG_ITMP1, d);
3025                                         M_XOR_IMM(d, 1, d);
3026
3027                                         }
3028                                 }
3029                         else
3030                                 panic ("internal error: no inlined array instanceof");
3031                         }
3032                         store_reg_to_var_int(iptr->dst, d);
3033                         break;
3034
3035                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3036
3037                                       /* op1:   0 == array, 1 == class                */
3038                                       /* val.a: (classinfo*) superclass               */
3039
3040 /*          superclass is an interface:
3041  *
3042  *          OK if ((sub == NULL) ||
3043  *                 (sub->vftbl->interfacetablelength > super->index) &&
3044  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3045  *
3046  *          superclass is a class:
3047  *
3048  *          OK if ((sub == NULL) || (0
3049  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3050  *                 super->vftbl->diffvall));
3051  */
3052
3053                         {
3054                         classinfo *super = (classinfo*) iptr->val.a;
3055
3056 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3057                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3058 #endif
3059
3060                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
3061                         var_to_reg_int(s1, src, d);
3062                         if (iptr->op1) {                               /* class/interface */
3063                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3064                                         M_BEQZ(s1, 9);
3065                                         M_NOP;
3066                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3067                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3068                                         M_IADD_IMM(REG_ITMP2, - super->index, REG_ITMP2);
3069                                         M_BLEZ(REG_ITMP2, 0);
3070                                         codegen_addxcastrefs(mcodeptr);
3071                                         M_NOP;
3072                                         M_ALD(REG_ITMP2, REG_ITMP1,
3073                                               OFFSET(vftbl, interfacetable[0]) -
3074                                               super->index * sizeof(methodptr*));
3075                                         M_BEQZ(REG_ITMP2, 0);
3076                                         codegen_addxcastrefs(mcodeptr);
3077                                         M_NOP;
3078                                         }
3079                                 else {                                     /* class           */
3080
3081                                         /*
3082                                         s2 = super->vftbl->diffval;
3083                                         M_BEQZ(s1, 6 + (s2 != 0));
3084                                         M_NOP;
3085                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3086                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3087                                         M_IADD_IMM(REG_ITMP1, - super->vftbl->baseval, REG_ITMP1);
3088                                         if (s2 == 0) {
3089                                                 M_BNEZ(REG_ITMP1, 0);
3090                                                 }
3091                                         else{
3092                                                 M_CMPULT_IMM(REG_ITMP1, s2 + 1, REG_ITMP2);
3093                                                 M_BEQZ(REG_ITMP2, 0);
3094                                                 }
3095                                         */
3096
3097                                         M_BEQZ(s1, 10 + (d == REG_ITMP3));
3098                                         M_NOP;
3099                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3100                     a = dseg_addaddress ((void*) super->vftbl);
3101                     M_ALD(REG_ITMP2, REG_PV, a);
3102 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3103                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3104 #endif
3105                     M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3106                                         if (d != REG_ITMP3) {
3107                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3108                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3109 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3110                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3111 #endif
3112                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3113                                         } else {
3114                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3115                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3116                                                 M_ALD(REG_ITMP2, REG_PV, a);
3117                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3118 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3119                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3120 #endif
3121                                         }
3122                     M_CMPULT(REG_ITMP2, REG_ITMP1, REG_ITMP2);
3123                                         M_BNEZ(REG_ITMP2, 0);
3124
3125                                         codegen_addxcastrefs(mcodeptr);
3126                                         M_NOP;
3127                                         }
3128                                 }
3129                         else
3130                                 panic ("internal error: no inlined array checkcast");
3131                         }
3132                         M_INTMOVE(s1, d);
3133                         store_reg_to_var_int(iptr->dst, d);
3134                         break;
3135
3136                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3137
3138                         var_to_reg_int(s1, src, REG_ITMP1);
3139                         M_BLTZ(s1, 0);
3140                         codegen_addxcheckarefs(mcodeptr);
3141                         M_NOP;
3142                         break;
3143
3144                 case ICMD_CHECKEXCEPTION:  /* ... ==> ...                             */
3145
3146                         M_BEQZ(REG_RESULT, 0);
3147                         codegen_addxexceptionrefs(mcodeptr);
3148                         M_NOP;
3149                         break;
3150
3151                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3152                                       /* op1 = dimension, val.a = array descriptor    */
3153
3154                         /* check for negative sizes and copy sizes to stack if necessary  */
3155
3156                         MCODECHECK((iptr->op1 << 1) + 64);
3157
3158                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3159                                 var_to_reg_int(s2, src, REG_ITMP1);
3160                                 M_BLTZ(s2, 0);
3161                                 codegen_addxcheckarefs(mcodeptr);
3162                                 M_NOP;
3163
3164                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3165
3166                                 if (src->varkind != ARGVAR) {
3167                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3168                                         }
3169                                 }
3170
3171                         /* a0 = dimension count */
3172
3173                         ICONST(r->argintregs[0], iptr->op1);
3174
3175                         /* a1 = arraydescriptor */
3176
3177                         a = dseg_addaddress(iptr->val.a);
3178                         M_ALD(r->argintregs[1], REG_PV, a);
3179
3180                         /* a2 = pointer to dimensions = stack pointer */
3181
3182                         M_INTMOVE(REG_SP, r->argintregs[2]);
3183
3184                         a = dseg_addaddress((void*) builtin_nmultianewarray);
3185                         M_ALD(REG_ITMP3, REG_PV, a);
3186                         M_JSR(REG_RA, REG_ITMP3);
3187                         M_NOP;
3188                         s1 = (int)((u1*) mcodeptr - mcodebase);
3189                         if (s1 <= 32768)
3190                                 M_LDA (REG_PV, REG_RA, -s1);
3191                         else {
3192                                 panic("To big");
3193                             }
3194                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
3195                         M_INTMOVE(REG_RESULT, s1);
3196                         store_reg_to_var_int(iptr->dst, s1);
3197                         break;
3198
3199
3200                 default: error ("Unknown pseudo command: %d", iptr->opc);
3201
3202
3203
3204         } /* switch */
3205
3206         } /* for instruction */
3207
3208         /* copy values to interface registers */
3209
3210         src = bptr->outstack;
3211         len = bptr->outdepth;
3212         MCODECHECK(64+len);
3213         while (src) {
3214                 len--;
3215                 if ((src->varkind != STACKVAR)) {
3216                         s2 = src->type;
3217                         if (IS_FLT_DBL_TYPE(s2)) {
3218                                 var_to_reg_flt(s1, src, REG_FTMP1);
3219                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3220                                         M_TFLTMOVE(s2, s1, r->interfaces[len][s2].regoff);
3221
3222                                 } else {
3223                                         M_DST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3224                                 }
3225
3226                         } else {
3227                                 var_to_reg_int(s1, src, REG_ITMP1);
3228                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3229                                         M_INTMOVE(s1, r->interfaces[len][s2].regoff);
3230
3231                                 } else {
3232                                         M_LST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3233                                 }
3234                         }
3235                 }
3236                 src = src->prev;
3237         }
3238         } /* if (bptr -> flags >= BBREACHED) */
3239         } /* for basic block */
3240
3241         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3242
3243         {
3244         /* generate bound check stubs */
3245
3246         s4 *xcodeptr = NULL;
3247
3248         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3249                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3250                                   xboundrefs->branchpos,
3251                                                   (u1*) mcodeptr - mcodebase);
3252
3253                 MCODECHECK(8);
3254
3255                 M_MOV(xboundrefs->reg, REG_ITMP1);
3256                 M_LADD_IMM(REG_PV, xboundrefs->branchpos - 4, REG_ITMP2_XPC);
3257
3258                 if (xcodeptr != NULL) {
3259                         M_BR(xcodeptr - mcodeptr);
3260                         M_NOP;
3261
3262                 } else {
3263                         xcodeptr = mcodeptr;
3264
3265                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3266                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3267
3268                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3269                         M_ALD(r->argintregs[0], REG_PV, a);
3270                         M_MOV(REG_ITMP1, r->argintregs[1]);
3271
3272                         a = dseg_addaddress(new_exception_int);
3273                         M_ALD(REG_ITMP3, REG_PV, a);
3274                         M_JSR(REG_RA, REG_ITMP3);
3275                         M_NOP;
3276                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3277
3278                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3279                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3280
3281                         a = dseg_addaddress(asm_handle_exception);
3282                         M_ALD(REG_ITMP3, REG_PV, a);
3283                         M_JMP(REG_ITMP3);
3284                         M_NOP;
3285                 }
3286         }
3287
3288         /* generate negative array size check stubs */
3289
3290         xcodeptr = NULL;
3291
3292         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3293                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3294                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3295                                                           xcheckarefs->branchpos,
3296                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3297                         continue;
3298                 }
3299
3300                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3301                                   xcheckarefs->branchpos,
3302                                                   (u1*) mcodeptr - mcodebase);
3303
3304                 MCODECHECK(8);
3305
3306                 M_LADD_IMM(REG_PV, xcheckarefs->branchpos - 4, REG_ITMP2_XPC);
3307
3308                 if (xcodeptr != NULL) {
3309                         M_BR(xcodeptr - mcodeptr);
3310                         M_NOP;
3311
3312                 } else {
3313                         xcodeptr = mcodeptr;
3314
3315                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3316                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3317
3318                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3319                         M_ALD(r->argintregs[0], REG_PV, a);
3320
3321                         a = dseg_addaddress(new_exception);
3322                         M_ALD(REG_ITMP3, REG_PV, a);
3323                         M_JSR(REG_RA, REG_ITMP3);
3324                         M_NOP;
3325                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3326
3327                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3328                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3329
3330                         a = dseg_addaddress(asm_handle_exception);
3331                         M_ALD(REG_ITMP3, REG_PV, a);
3332                         M_JMP(REG_ITMP3);
3333                         M_NOP;
3334                 }
3335         }
3336
3337         /* generate cast check stubs */
3338
3339         xcodeptr = NULL;
3340
3341         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3342                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3343                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3344                                                           xcastrefs->branchpos,
3345                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3346                         continue;
3347                 }
3348
3349                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3350                                   xcastrefs->branchpos,
3351                                                   (u1*) mcodeptr - mcodebase);
3352
3353                 MCODECHECK(8);
3354
3355                 M_LADD_IMM(REG_PV, xcastrefs->branchpos - 4, REG_ITMP2_XPC);
3356
3357                 if (xcodeptr != NULL) {
3358                         M_BR(xcodeptr - mcodeptr);
3359                         M_NOP;
3360
3361                 } else {
3362                         xcodeptr = mcodeptr;
3363
3364                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3365                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3366
3367                         a = dseg_addaddress(string_java_lang_ClassCastException);
3368                         M_ALD(r->argintregs[0], REG_PV, a);
3369
3370                         a = dseg_addaddress(new_exception);
3371                         M_ALD(REG_ITMP3, REG_PV, a);
3372                         M_JSR(REG_RA, REG_ITMP3);
3373                         M_NOP;
3374                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3375
3376                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3377                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3378
3379                         a = dseg_addaddress(asm_handle_exception);
3380                         M_ALD(REG_ITMP3, REG_PV, a);
3381                         M_JMP(REG_ITMP3);
3382                         M_NOP;
3383                 }
3384         }
3385
3386         /* generate exception check stubs */
3387
3388         xcodeptr = NULL;
3389
3390         for (; xexceptionrefs != NULL; xexceptionrefs = xexceptionrefs->next) {
3391                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3392                         gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3393                                                           xexceptionrefs->branchpos,
3394                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3395                         continue;
3396                 }
3397
3398                 gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3399                                   xexceptionrefs->branchpos,
3400                                                   (u1*) mcodeptr - mcodebase);
3401
3402                 MCODECHECK(8);
3403
3404                 M_LADD_IMM(REG_PV, xexceptionrefs->branchpos - 4, REG_ITMP2_XPC);
3405
3406                 if (xcodeptr != NULL) {
3407                         M_BR(xcodeptr - mcodeptr);
3408                         M_NOP;
3409
3410                 } else {
3411                         xcodeptr = mcodeptr;
3412
3413 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3414                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3415                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3416
3417                         a = dseg_addaddress(builtin_get_exceptionptrptr);
3418                         M_ALD(REG_ITMP3, REG_PV, a);
3419                         M_JSR(REG_RA, REG_ITMP3);
3420                         M_NOP;
3421                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3422
3423                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3424                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3425 #else
3426                         a = dseg_addaddress(&_exceptionptr);
3427                         M_ALD(REG_ITMP3, REG_PV, a);
3428                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3429                         M_AST(REG_ZERO, REG_ITMP3, 0);
3430 #endif
3431
3432                         a = dseg_addaddress(asm_handle_exception);
3433                         M_ALD(REG_ITMP3, REG_PV, a);
3434                         M_JMP(REG_ITMP3);
3435                         M_NOP;
3436                 }
3437         }
3438
3439         /* generate null pointer check stubs */
3440
3441         xcodeptr = NULL;
3442
3443         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3444                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3445                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3446                                                           xnullrefs->branchpos,
3447                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3448                         continue;
3449                 }
3450
3451                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3452                                   xnullrefs->branchpos,
3453                                                   (u1*) mcodeptr - mcodebase);
3454
3455                 MCODECHECK(8);
3456
3457                 M_LADD_IMM(REG_PV, xnullrefs->branchpos - 4, REG_ITMP2_XPC);
3458
3459                 if (xcodeptr != NULL) {
3460                         M_BR(xcodeptr - mcodeptr);
3461                         M_NOP;
3462
3463                 } else {
3464                         xcodeptr = mcodeptr;
3465
3466                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3467                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3468
3469                         a = dseg_addaddress(string_java_lang_NullPointerException);
3470                         M_ALD(r->argintregs[0], REG_PV, a);
3471
3472                         a = dseg_addaddress(new_exception);
3473                         M_ALD(REG_ITMP3, REG_PV, a);
3474                         M_JSR(REG_RA, REG_ITMP3);
3475                         M_NOP;
3476                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3477
3478                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3479                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3480
3481                         a = dseg_addaddress(asm_handle_exception);
3482                         M_ALD(REG_ITMP3, REG_PV, a);
3483                         M_JMP(REG_ITMP3);
3484                         M_NOP;
3485                 }
3486         }
3487         }
3488
3489         codegen_finish(m, (s4) ((u1 *) mcodeptr - mcodebase));
3490
3491         docacheflush((void*) m->entrypoint, ((u1*) mcodeptr - mcodebase));
3492 }
3493
3494
3495 /* function createcompilerstub *************************************************
3496
3497         creates a stub routine which calls the compiler
3498
3499 *******************************************************************************/
3500
3501 #define COMPSTUBSIZE 4
3502
3503 u1 *createcompilerstub(methodinfo *m)
3504 {
3505         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3506         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3507
3508                                             /* code for the stub                  */
3509         M_ALD(REG_PV, REG_PV, 24);          /* load pointer to the compiler       */
3510         M_NOP;
3511         M_JSR(REG_ITMP1, REG_PV);           /* jump to the compiler, return address
3512                                                in itmp1 is used as method pointer */
3513         M_NOP;
3514
3515         s[2] = (u8) m;                      /* literals to be adressed            */
3516         s[3] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3517
3518         (void) docacheflush((void*) s, (char*) mcodeptr - (char*) s);
3519
3520 #ifdef STATISTICS
3521         count_cstub_len += COMPSTUBSIZE * 8;
3522 #endif
3523
3524         return (u1 *) s;
3525 }
3526
3527
3528 /* function removecompilerstub *************************************************
3529
3530      deletes a compilerstub from memory  (simply by freeing it)
3531
3532 *******************************************************************************/
3533
3534 void removecompilerstub(u1 *stub)
3535 {
3536         CFREE(stub, COMPSTUBSIZE * 8);
3537 }
3538
3539
3540 /* function: createnativestub **************************************************
3541
3542         creates a stub routine which calls a native method
3543
3544 *******************************************************************************/
3545
3546 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3547 #define NATIVESTUBSTACK       2
3548 #define NATIVESTUBTHREADEXTRA 5
3549 #else
3550 #define NATIVESTUBSTACK       1
3551 #define NATIVESTUBTHREADEXTRA 1
3552 #endif
3553
3554 #define NATIVESTUBSIZE      (54 + 4 + NATIVESTUBTHREADEXTRA - 1)
3555 #define NATIVEVERBOSESIZE   (50 + 17)
3556 #define NATIVESTUBOFFSET    9
3557
3558 u1 *createnativestub(functionptr f, methodinfo *m)
3559 {
3560         u8 *s;                              /* memory to hold the stub            */
3561         u8 *cs;
3562         s4 *mcodeptr;                       /* code generation pointer            */
3563         s4 stackframesize = 0;              /* size of stackframe if needed       */
3564         s4 disp;
3565         s4 stubsize;
3566         registerdata *r;
3567
3568         /* init registers before using it */
3569         reg_init(m);
3570
3571         /* keep code size smaller */
3572         r = m->registerdata;
3573
3574         descriptor2types(m);                /* set paramcount and paramtypes      */
3575
3576         stubsize = runverbose ? NATIVESTUBSIZE + NATIVEVERBOSESIZE : NATIVESTUBSIZE;
3577         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3578         cs = s + NATIVESTUBOFFSET;
3579         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3580
3581         *(cs-1) = (u8) f;                   /* address of native method           */
3582 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3583         *(cs-2) = (u8) &builtin_get_exceptionptrptr;
3584 #else
3585         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3586 #endif
3587         *(cs-3) = (u8) asm_handle_nat_exception;/* addr of asm exception handler  */
3588         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3589         *(cs-5) = (u8) builtin_trace_args;
3590         *(cs-6) = (u8) m;
3591         *(cs-7) = (u8) builtin_displaymethodstop;
3592         *(cs-8) = (u8) m->class;
3593         *(cs-9) = (u8) asm_check_clinit;
3594
3595         M_LDA(REG_SP, REG_SP, -NATIVESTUBSTACK * 8); /* build up stackframe       */
3596         M_LST(REG_RA, REG_SP, 0);           /* store return address               */
3597
3598         /* if function is static, check for initialized */
3599
3600         if (m->flags & ACC_STATIC) {
3601         /* if class isn't yet initialized, do it */
3602                 if (!m->class->initialized) {
3603                         /* call helper function which patches this code */
3604                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
3605                         M_ALD(REG_ITMP3, REG_PV, -9 * 8);     /* asm_check_clinit         */
3606                         M_JSR(REG_RA, REG_ITMP3);
3607                         M_NOP;
3608                 }
3609         }
3610
3611         /* max. 50 instructions */
3612         if (runverbose) {
3613                 int p;
3614                 int t;
3615
3616                 M_LDA(REG_SP, REG_SP, -(18 * 8));
3617                 M_AST(REG_RA, REG_SP, 1 * 8);
3618
3619                 /* save integer argument registers */
3620                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3621                         M_LST(r->argintregs[p], REG_SP,  (2 + p) * 8);
3622                 }
3623
3624                 /* save and copy float arguments into integer registers */
3625                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3626                         t = m->paramtypes[p];
3627
3628                         if (IS_FLT_DBL_TYPE(t)) {
3629                                 if (IS_2_WORD_TYPE(t)) {
3630                                         M_DST(r->argfltregs[p], REG_SP, (10 + p) * 8);
3631                                         M_LLD(r->argintregs[p], REG_SP, (10 + p) * 8);
3632
3633                                 } else {
3634                                         M_FST(r->argfltregs[p], REG_SP, (10 + p) * 8);
3635                                         M_ILD(r->argintregs[p], REG_SP, (10 + p) * 8);
3636                                 }
3637
3638                         } else {
3639                                 M_DST(r->argfltregs[p], REG_SP, (10 + p) * 8);
3640                         }
3641                 }
3642
3643                 M_ALD(REG_ITMP1, REG_PV, -6 * 8); /* method address                   */
3644                 M_AST(REG_ITMP1, REG_SP, 0);
3645                 M_ALD(REG_ITMP3, REG_PV, -5 * 8); /* builtin_trace_args               */
3646                 M_JSR(REG_RA, REG_ITMP3);
3647                 M_NOP;
3648                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3649                 M_LDA(REG_PV, REG_RA, disp);
3650
3651                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3652                         M_LLD(r->argintregs[p], REG_SP,  (2 + p) * 8);
3653                 }
3654
3655                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3656                         t = m->paramtypes[p];
3657
3658                         if (IS_FLT_DBL_TYPE(t)) {
3659                                 if (IS_2_WORD_TYPE(t)) {
3660                                         M_DLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
3661
3662                                 } else {
3663                                         M_FLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
3664                                 }
3665
3666                         } else {
3667                                 M_DLD(r->argfltregs[p], REG_SP, (10 + p) * 8);
3668                         }
3669                 }
3670
3671                 M_ALD(REG_RA, REG_SP, 1 * 8);
3672                 M_LDA(REG_SP, REG_SP, 18 * 8);
3673         }
3674
3675         /* save argument registers on stack -- if we have to */
3676         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
3677                 s4 i;
3678                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
3679                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
3680
3681                 stackframesize = stackparamcnt + paramshiftcnt;
3682
3683                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
3684
3685                 /* copy stack arguments into new stack frame -- if any */
3686                 for (i = 0; i < stackparamcnt; i++) {
3687                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
3688                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
3689                 }
3690
3691                 if (m->flags & ACC_STATIC) {
3692                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
3693                                 M_DST(r->argfltregs[5], REG_SP, 1 * 8);
3694                         } else {
3695                                 M_LST(r->argintregs[5], REG_SP, 1 * 8);
3696                         }
3697
3698                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
3699                                 M_DST(r->argfltregs[4], REG_SP, 0 * 8);
3700                         } else {
3701                                 M_LST(r->argintregs[4], REG_SP, 0 * 8);
3702                         }
3703
3704                 } else {
3705                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
3706                                 M_DST(r->argfltregs[5], REG_SP, 0 * 8);
3707                         } else {
3708                                 M_LST(r->argintregs[5], REG_SP, 0 * 8);
3709                         }
3710                 }
3711         }
3712
3713         if (m->flags & ACC_STATIC) {
3714                 M_MOV(r->argintregs[5], r->argintregs[7]);
3715
3716                 M_DMFC1(REG_ITMP1, r->argfltregs[5]);
3717                 M_DMTC1(REG_ITMP1, r->argfltregs[7]);
3718
3719                 M_MOV(r->argintregs[4], r->argintregs[6]);
3720
3721                 M_DMFC1(REG_ITMP1, r->argfltregs[4]);
3722                 M_DMTC1(REG_ITMP1, r->argfltregs[6]);
3723
3724                 M_MOV(r->argintregs[3], r->argintregs[5]);
3725                 M_DMFC1(REG_ITMP1, r->argfltregs[3]);
3726
3727                 M_MOV(r->argintregs[2], r->argintregs[4]);
3728                 M_DMTC1(REG_ITMP1, r->argfltregs[5]);
3729
3730                 M_MOV(r->argintregs[1], r->argintregs[3]);
3731                 M_DMFC1(REG_ITMP1, r->argfltregs[2]);
3732
3733                 M_MOV(r->argintregs[0], r->argintregs[2]);
3734                 M_DMTC1(REG_ITMP1, r->argfltregs[4]);
3735
3736                 M_DMFC1(REG_ITMP1, r->argfltregs[1]);
3737                 M_DMTC1(REG_ITMP1, r->argfltregs[3]);
3738
3739                 M_DMFC1(REG_ITMP1, r->argfltregs[0]);
3740                 M_DMTC1(REG_ITMP1, r->argfltregs[2]);
3741
3742                 M_ALD(r->argintregs[1], REG_PV, -8 * 8);
3743
3744         } else {
3745                 M_MOV(r->argintregs[6], r->argintregs[7]);
3746
3747                 M_DMFC1(REG_ITMP1, r->argfltregs[6]);
3748                 M_DMTC1(REG_ITMP1, r->argfltregs[7]);
3749
3750                 M_MOV(r->argintregs[5], r->argintregs[6]);
3751
3752                 M_DMFC1(REG_ITMP1, r->argfltregs[5]);
3753                 M_DMTC1(REG_ITMP1, r->argfltregs[6]);
3754
3755                 M_MOV(r->argintregs[4], r->argintregs[5]);
3756                 M_DMFC1(REG_ITMP1, r->argfltregs[4]);
3757
3758                 M_MOV(r->argintregs[3], r->argintregs[4]);
3759                 M_DMTC1(REG_ITMP1, r->argfltregs[5]);
3760
3761                 M_MOV(r->argintregs[2], r->argintregs[3]);
3762                 M_DMFC1(REG_ITMP1, r->argfltregs[3]);
3763
3764                 M_MOV(r->argintregs[1], r->argintregs[2]);
3765                 M_DMTC1(REG_ITMP1, r->argfltregs[4]);
3766
3767                 M_MOV(r->argintregs[0], r->argintregs[1]);
3768                 M_DMFC1(REG_ITMP1, r->argfltregs[2]);
3769
3770                 M_DMTC1(REG_ITMP1, r->argfltregs[3]);
3771
3772                 M_DMFC1(REG_ITMP1, r->argfltregs[1]);
3773                 M_DMFC1(REG_ITMP2, r->argfltregs[0]);
3774
3775                 M_DMTC1(REG_ITMP1, r->argfltregs[2]);
3776                 M_DMTC1(REG_ITMP2, r->argfltregs[1]);
3777         }
3778
3779         M_ALD(r->argintregs[0], REG_PV, -4 * 8); /* jni environement              */
3780         M_ALD(REG_ITMP3, REG_PV, -1 * 8);   /* load adress of native method       */
3781         M_JSR(REG_RA, REG_ITMP3);           /* call native method                 */
3782         M_NOP;                              /* delay slot                         */
3783
3784         /* remove stackframe if there is one */
3785         if (stackframesize) {
3786                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
3787         }
3788
3789         /* 17 instructions */
3790         if (runverbose) {
3791                 M_LDA(REG_SP, REG_SP, -(3 * 8));
3792                 M_AST(REG_RA, REG_SP, 0 * 8);
3793                 M_LST(REG_RESULT, REG_SP, 1 * 8);
3794                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
3795                 M_ALD(r->argintregs[0], REG_PV, -6 * 8);
3796                 M_MOV(REG_RESULT, r->argintregs[1]);
3797                 M_DMFC1(REG_ITMP1, REG_FRESULT);
3798                 M_DMTC1(REG_ITMP1, r->argfltregs[2]);
3799                 M_DMTC1(REG_ITMP1, r->argfltregs[3]);
3800                 M_ALD(REG_ITMP3, REG_PV, -7 * 8);/* builtin_displaymethodstop         */
3801                 M_JSR(REG_RA, REG_ITMP3);
3802                 M_NOP;
3803                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3804                 M_LDA(REG_PV, REG_RA, disp);
3805                 M_ALD(REG_RA, REG_SP, 0 * 8);
3806                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
3807                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
3808                 M_LDA(REG_SP, REG_SP, 3 * 8);
3809         }
3810
3811 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3812         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* builtin_get_exceptionptrptr        */
3813         M_JSR(REG_RA, REG_ITMP3);
3814
3815         /* delay slot */
3816         if (IS_FLT_DBL_TYPE(m->returntype))
3817                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
3818         else
3819                 M_AST(REG_RESULT, REG_SP, 1 * 8);
3820         M_MOV(REG_RESULT, REG_ITMP3);
3821         if (IS_FLT_DBL_TYPE(m->returntype))
3822                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
3823         else
3824                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
3825 #else
3826         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
3827 #endif
3828
3829         M_LLD(REG_RA, REG_SP, 0);           /* load return address                */
3830         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
3831
3832         M_BNEZ(REG_ITMP1, 2);               /* if no exception then return        */
3833         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8);/*remove stackframe, delay slot*/
3834
3835         M_RET(REG_RA);                      /* return to caller                   */
3836         M_NOP;                              /* delay slot                         */
3837
3838         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
3839         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
3840
3841         M_JMP(REG_ITMP3);                   /* jump to asm exception handler      */
3842         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
3843                                             /* delay slot                         */
3844
3845         (void) docacheflush((void*) cs, (char*) mcodeptr - (char*) cs);
3846
3847 #if 0
3848         dolog_plain("stubsize: %d (for %d params)\n",
3849                                 (int) (mcodeptr - (s4*) s), m->paramcount);
3850 #endif
3851
3852 #ifdef STATISTICS
3853         count_nstub_len += NATIVESTUBSIZE * 8;
3854 #endif
3855
3856         return (u1 *) (s + NATIVESTUBOFFSET);
3857 }
3858
3859
3860 /* function: removenativestub **************************************************
3861
3862     removes a previously created native-stub from memory
3863
3864 *******************************************************************************/
3865
3866 void removenativestub(u1 *stub)
3867 {
3868         CFREE((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
3869 }
3870
3871
3872 void docacheflush(u1 *p, long bytelen)
3873 {
3874         u1 *e = p + bytelen;
3875         long psize = sysconf(_SC_PAGESIZE);
3876         p -= (long) p & (psize-1);
3877         e += psize - ((((long) e - 1) & (psize-1)) + 1);
3878         bytelen = e-p;
3879         mprotect(p, bytelen, PROT_READ|PROT_WRITE|PROT_EXEC);
3880 }
3881
3882
3883 /*
3884  * These are local overrides for various environment variables in Emacs.
3885  * Please do not remove this and leave it at the end of the file, where
3886  * Emacs will automagically detect them.
3887  * ---------------------------------------------------------------------
3888  * Local variables:
3889  * mode: c
3890  * indent-tabs-mode: t
3891  * c-basic-offset: 4
3892  * tab-width: 4
3893  * End:
3894  */