1 /* src/vm/jit/m68k/emit.c
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: arch.h 5330 2006-09-05 18:43:12Z edwin $
35 #include "vm/jit/emit-common.h"
36 #include "vm/exceptions.h"
37 #include "vm/jit/asmpart.h"
38 #include "vm/builtin.h"
40 #include "mm/memory.h"
42 #include "threads/lock-common.h"
48 * Loads an immededat operand into data register
50 void emit_mov_imm_reg (codegendata *cd, s4 imm, s4 dreg)
52 /* FIXME: -1 can be used as byte form 0xff, but this ifs cascade is plain wrong it seems */
54 if ( (imm & 0x0000007F) == imm) {
56 *((s2*)cd->mcodeptr) = 0x7000 | (dreg << 9) | imm; /* MOVEQ.L */
58 } else if ((imm & 0x00007FFF) == imm) {
60 OPWORD( ((3<<6) | (dreg << 3) | 0), 7, 4);
61 *((s2*)cd->mcodeptr) = (s2)imm;
65 OPWORD( ((2<<6) | (dreg << 3) | 0), 7, 4);
66 *((s4*)cd->mcodeptr) = (s4)imm;
73 /* emit_copy *******************************************************************
75 Generates a register/memory to register/memory copy.
77 *******************************************************************************/
79 void emit_copy(jitdata *jd, instruction *iptr)
86 /* get required compiler data */
90 /* get source and destination variables */
92 src = VAROP(iptr->s1);
93 dst = VAROP(iptr->dst);
95 if ((src->vv.regoff != dst->vv.regoff) ||
96 (IS_INMEMORY(src->flags ^ dst->flags))) {
98 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
99 /* emit nothing, as the value won't be used anyway */
103 /* If one of the variables resides in memory, we can eliminate
104 the register move from/to the temporary register with the
105 order of getting the destination register and the load. */
107 if (IS_INMEMORY(src->flags)) {
108 if (IS_LNG_TYPE(src->type))
109 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
111 d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
113 s1 = emit_load(jd, iptr, src, d);
116 if (IS_LNG_TYPE(src->type))
117 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
119 s1 = emit_load(jd, iptr, src, REG_IFTMP);
121 d = codegen_reg_of_var(iptr->opc, dst, s1);
126 case TYPE_INT: M_INTMOVE(s1, d); break;
127 case TYPE_ADR: M_ADRMOVE(s1, d); break;
128 case TYPE_LNG: M_LNGMOVE(s1, d); break;
129 #if !defined(ENABLE_SOFTFLOAT)
130 case TYPE_FLT: M_FLTMOVE(s1, d); break;
131 case TYPE_DBL: M_DBLMOVE(s1, d); break;
133 case TYPE_FLT: M_INTMOVE(s1, d); break;
134 case TYPE_DBL: M_LNGMOVE(s1, d); break;
137 vm_abort("emit_copy: unknown type %d", src->type);
141 emit_store(jd, iptr, dst, d);
146 /* emit_store ******************************************************************
148 Emits a possible store of the destination operand.
150 *******************************************************************************/
152 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
156 /* get required compiler data */
160 if (IS_INMEMORY(dst->flags)) {
164 #if defined(ENABLE_SOFTFLOAT)
168 M_LST(d, REG_SP, dst->vv.regoff * 4);
170 #if defined(ENABLE_SOFTFLOAT)
174 M_IST(d, REG_SP, dst->vv.regoff * 4);
177 M_AST(d, REG_SP, dst->vv.regoff * 4);
179 #if !defined(ENABLE_SOFTFLOAT)
181 M_DST(d, REG_SP, dst->vv.regoff * 4);
184 M_FST(d, REG_SP, dst->vv.regoff * 4);
188 vm_abort("emit_store: unknown type %d", dst->type);
194 /* emit_load *******************************************************************
196 Emits a possible load of an operand.
198 *******************************************************************************/
200 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
206 /* get required compiler data */
210 if (IS_INMEMORY(src->flags)) {
213 disp = src->vv.regoff * 4;
216 #if defined(ENABLE_SOFTFLOAT)
220 M_ILD(tempreg, REG_SP, disp);
222 #if defined(ENABLE_SOFTFLOAT)
226 M_LLD(tempreg, REG_SP, disp);
229 M_ALD(tempreg, REG_SP, disp);
231 #if !defined(ENABLE_SOFTFLOAT)
233 M_FLD(tempreg, REG_SP, disp);
236 M_DLD(tempreg, REG_SP, disp);
240 vm_abort("emit_load: unknown type %d", src->type);
243 if (IS_FLT_DBL_TYPE(src->type)) {
244 if (IS_2_WORD_TYPE(src->type)) {
245 M_DLD(tempreg, REG_SP, disp);
247 M_FLD(tempreg, REG_SP, disp);
250 if (IS_2_WORD_TYPE(src->type)) {
251 M_LLD(tempreg, REG_SP, disp);
253 M_ILD(tempreg, REG_SP, disp);
261 reg = src->vv.regoff;
267 /* emit_patcher_stubs **********************************************************
269 Generates the code for the patcher stubs.
271 *******************************************************************************/
272 void emit_patcher_stubs(jitdata *jd)
282 /* get required compiler data */
286 /* generate code patching stub call code */
290 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
291 /* check code segment size */
295 /* Get machine code which is patched back in later. A
296 `bsr.l' is 6 bytes long. */
298 savedmcodeptr = cd->mcodebase + pref->branchpos;
299 mcode = *((u8 *) savedmcodeptr);
301 /* patch in `bsr.l' to call the following code */
303 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
304 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
306 M_BSR_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE) + 4);
308 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
311 M_IPUSH(REG_ITMP3); /* FIXME why, and restore where ? */
313 /* move pointer to java_objectheader onto stack */
315 #if defined(ENABLE_THREADS)
316 (void) dseg_add_unique_address(cd, NULL); /* flcword */
317 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
318 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
320 assert(0); /* The next lines are wrong */
321 M_MOV_IMM(0, REG_ITMP3);
323 M_AADD_IMM(REG_ITMP3, disp);
329 /* push move machine code bytes and classinfo pointer */
331 M_IPUSH_IMM(mcode >> 32);
333 M_IPUSH_IMM(pref->ref);
334 M_IPUSH_IMM(pref->patcher);
336 M_JMP_IMM(asm_patcher_wrapper);
339 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
345 #if !defined(ENABLE_SOFTFLOAT)
346 assert(src->type == TYPE_LNG);
348 assert(src->type == TYPE_LNG || src->type == TYPE_DBL);
351 /* get required compiler data */
354 if (IS_INMEMORY(src->flags)) {
357 disp = src->vv.regoff * 4;
358 M_ILD(tempreg, REG_SP, disp + 4);
361 reg = GET_LOW_REG(src->vv.regoff);
365 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
371 #if !defined(ENABLE_SOFTFLOAT)
372 assert(src->type == TYPE_LNG);
374 assert(src->type == TYPE_LNG || src->type == TYPE_DBL);
376 /* get required compiler data */
379 if (IS_INMEMORY(src->flags)) {
381 disp = src->vv.regoff * 4;
382 M_ILD(tempreg, REG_SP, disp);
385 reg = GET_HIGH_REG(src->vv.regoff);
389 /* emit_branch *****************************************************************
391 Emits the code for conditional and unconditional branchs.
393 *******************************************************************************/
394 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
396 /* calculate the different displacements */
397 /* PC is a at branch instruction + 2 */
398 /* coditional and uncondition branching work the same way */
399 /* short branches have signed 16 bit offset */
400 /* long branches are signed 32 bit */
401 /* the 8 bit offset branching instructions are not used */
405 /* check displacement for overflow */
406 if ((disp & 0x0000FFFF) != disp) {
407 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
408 cd->flags |= (CODEGENDATA_FLAG_ERROR | CODEGENDATA_FLAG_LONGBRANCHES);
412 /* check which branch to generate */
414 if (condition == BRANCH_UNCONDITIONAL) {
415 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
421 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
449 vm_abort("emit_branch: unknown condition %d", condition);
478 vm_abort("emit_branch: unknown condition %d", condition);
487 * Trace functions. Implement -verbose:call flag
488 * code marked by real NOP, but performance is no matter when using -verbose:call :)
490 void emit_verbosecall_enter(jitdata* jd)
499 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
502 /* get required compiler data */
508 /* mark trace code */
511 M_LINK(REG_FP, -16*4);
514 /* builtin_verbosecall_enter takes all args as s8 type */
515 /* TRACE_ARGS_NUM is the number of args the builtin_verbosecall_enter expects */
518 disp = 16*4 + 4 + 4; /* points to old argument stack initially */
520 /* travel up stack to the first argument of the function which needs to be copied */
521 for (i=0; (i < md->paramcount) && (i < TRACE_ARGS_NUM); i++) {
523 if (IS_2_WORD_TYPE(md->paramtypes[i].type)) {
528 /* disp now points to the first arg which gets copied to the trace stack, relative to REG_SP! */
529 for (i=TRACE_ARGS_NUM-1; i>=0; --i) {
530 if (i < md->paramcount) {
531 /* traced function has such an argument */
532 t = md->paramtypes[i].type;
534 if (IS_2_WORD_TYPE(t)) {
535 /* copy from original argument stack */
536 M_ILD(REG_ITMP1, REG_SP, disp);
538 M_ILD(REG_ITMP1, REG_SP, disp);
541 /* displacment is increased as 4 byte on original stack but 8 byte on trace stack */
542 M_ILD(REG_ITMP1, REG_SP, disp);
548 /* function has no arg here, push nothing and adapt displacement */
554 M_JSR_IMM(builtin_verbosecall_enter);
555 /* pop arguments off stack */
556 M_AADD_IMM(TRACE_ARGS_NUM*8+4, REG_SP);
562 void emit_verbosecall_exit(jitdata* jd)
569 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
572 /* get required compiler data */
578 /* void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m); */
581 /* mark trace code */
585 M_IPUSH_IMM(m); /* push methodinfo */
587 M_IPUSH_IMM(0); /* TODO push float result */
589 M_IPUSH_IMM(0); /* TODO push double result */
590 M_IPUSH_IMM(0); /* TODO push double result */
592 M_IPUSH(GET_HIGH_REG(REG_RESULT_PACKED))
593 M_IPUSH(GET_LOW_REG(REG_RESULT_PACKED)) /* push long result */
596 M_JSR_IMM(builtin_verbosecall_exit);
598 /* poping result registers from stack */
599 M_IPOP(GET_LOW_REG(REG_RESULT_PACKED))
600 M_IPOP(GET_HIGH_REG(REG_RESULT_PACKED))
603 /* that is wrong of course, overwrites registers and stuff */
604 M_IPOP(0); /* TODO: pop double result */
605 M_IPOP(0); /* TODO: pop double result */
607 M_IPOP(0); /* TODO: pop float result */
609 M_AADD_IMM(3*4, REG_SP);
611 M_AADD_IMM(4, REG_SP); /* remove rest of stack */
617 /* emit_classcast_check ********************************************************
619 Emit a ClassCastException check.
621 *******************************************************************************/
623 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
625 if (INSTRUCTION_MUST_CHECK(iptr)) {
640 vm_abort("emit_classcast_check: unknown condition %d", condition);
642 M_TRAP_SETREGISTER(s1);
643 M_TRAP(EXCEPTION_HARDWARE_CLASSCAST);
647 /* emit_arrayindexoutofbounds_check ********************************************
649 Emit a ArrayIndexOutOfBoundsException check.
651 *******************************************************************************/
652 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
654 if (INSTRUCTION_MUST_CHECK(iptr)) {
655 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
656 M_ICMP(s2, REG_ITMP3);
658 M_TRAP_SETREGISTER(s2);
659 M_TRAP(EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
663 /* emit_nullpointer_check ******************************************************
665 Emit a NullPointerException check.
667 *******************************************************************************/
668 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
670 if (INSTRUCTION_MUST_CHECK(iptr)) {
671 /* did like to assert on TYPE_ADR, but not possible in here */
674 M_TRAP(M68K_EXCEPTION_HARDWARE_NULLPOINTER);
678 /* emit_arithmetic_check *******************************************************
680 Emit an ArithmeticException check.
682 *******************************************************************************/
684 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
686 if (INSTRUCTION_MUST_CHECK(iptr)) {
689 M_TRAP(EXCEPTION_HARDWARE_ARITHMETIC);
694 /* emit_exception_check_areg **************************************************
696 Emit an Exception check, tested register is address REG_RESULT
698 *******************************************************************************/
699 void emit_exception_check_areg(codegendata *cd, instruction *iptr)
701 if (INSTRUCTION_MUST_CHECK(iptr)) {
704 /*M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);*/
710 /* emit_exception_check_ireg **************************************************
712 Emit an Exception check. Teste register is integer REG_RESULT
714 *******************************************************************************/
715 void emit_exception_check(codegendata *cd, instruction *iptr)
717 if (INSTRUCTION_MUST_CHECK(iptr)) {
720 /*M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);*/
721 M_TRAP(EXCEPTION_HARDWARE_EXCEPTION);
727 * These are local overrides for various environment variables in Emacs.
728 * Please do not remove this and leave it at the end of the file, where
729 * Emacs will automagically detect them.
730 * ---------------------------------------------------------------------
733 * indent-tabs-mode: t
737 * vim:noexpandtab:sw=4:ts=4: