1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 6129 2006-12-06 10:49:47Z twisti $
40 #include "vm/jit/i386/codegen.h"
41 #include "vm/jit/i386/emit.h"
42 #include "vm/jit/i386/md-abi.h"
44 #if defined(ENABLE_THREADS)
45 # include "threads/native/lock.h"
48 #include "vm/builtin.h"
49 #include "vm/options.h"
50 #include "vm/statistics.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/dseg.h"
53 #include "vm/jit/emit-common.h"
54 #include "vm/jit/jit.h"
55 #include "vm/jit/replace.h"
58 /* emit_load ******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (IS_INMEMORY(src->flags)) {
77 disp = src->vv.regoff * 4;
79 if (IS_FLT_DBL_TYPE(src->type)) {
80 if (IS_2_WORD_TYPE(src->type))
81 M_DLD(tempreg, REG_SP, disp);
83 M_FLD(tempreg, REG_SP, disp);
86 if (IS_2_WORD_TYPE(src->type))
87 M_LLD(tempreg, REG_SP, disp);
89 M_ILD(tempreg, REG_SP, disp);
101 /* emit_load_low ************************************************************
103 Emits a possible load of the low 32-bits of an operand.
105 *******************************************************************************/
107 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
113 assert(src->type == TYPE_LNG);
115 /* get required compiler data */
120 if (IS_INMEMORY(src->flags)) {
123 disp = src->vv.regoff * 4;
125 M_ILD(tempreg, REG_SP, disp);
130 reg = GET_LOW_REG(src->vv.regoff);
136 /* emit_load_high ***********************************************************
138 Emits a possible load of the high 32-bits of an operand.
140 *******************************************************************************/
142 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
148 /* get required compiler data */
150 assert(src->type == TYPE_LNG);
154 if (IS_INMEMORY(src->flags)) {
157 disp = src->vv.regoff * 4;
159 M_ILD(tempreg, REG_SP, disp + 4);
164 reg = GET_HIGH_REG(src->vv.regoff);
170 /* emit_store ******************************************************************
172 Emits a possible store of the destination operand.
174 *******************************************************************************/
176 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
180 /* get required compiler data */
184 if (IS_INMEMORY(dst->flags)) {
187 if (IS_FLT_DBL_TYPE(dst->type)) {
188 if (IS_2_WORD_TYPE(dst->type))
189 M_DST(d, REG_SP, dst->vv.regoff * 4);
191 M_FST(d, REG_SP, dst->vv.regoff * 4);
194 if (IS_2_WORD_TYPE(dst->type))
195 M_LST(d, REG_SP, dst->vv.regoff * 4);
197 M_IST(d, REG_SP, dst->vv.regoff * 4);
203 /* emit_store_low **************************************************************
205 Emits a possible store of the low 32-bits of the destination
208 *******************************************************************************/
210 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
214 assert(dst->type == TYPE_LNG);
216 /* get required compiler data */
220 if (IS_INMEMORY(dst->flags)) {
222 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
227 /* emit_store_high *************************************************************
229 Emits a possible store of the high 32-bits of the destination
232 *******************************************************************************/
234 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
238 assert(dst->type == TYPE_LNG);
240 /* get required compiler data */
244 if (IS_INMEMORY(dst->flags)) {
246 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
251 /* emit_copy *******************************************************************
253 Generates a register/memory to register/memory copy.
255 *******************************************************************************/
257 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
262 /* get required compiler data */
266 if ((src->vv.regoff != dst->vv.regoff) ||
267 ((src->flags ^ dst->flags) & INMEMORY)) {
269 /* If one of the variables resides in memory, we can eliminate
270 the register move from/to the temporary register with the
271 order of getting the destination register and the load. */
273 if (IS_INMEMORY(src->flags)) {
274 if (IS_LNG_TYPE(src->type))
275 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
277 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
279 s1 = emit_load(jd, iptr, src, d);
282 if (IS_LNG_TYPE(src->type))
283 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
285 s1 = emit_load(jd, iptr, src, REG_ITMP1);
287 d = codegen_reg_of_var(iptr->opc, dst, s1);
291 if (IS_FLT_DBL_TYPE(src->type)) {
294 if (IS_2_WORD_TYPE(src->type))
301 emit_store(jd, iptr, dst, d);
306 /* emit_arithmetic_check *******************************************************
308 Emit an ArithmeticException check.
310 *******************************************************************************/
312 void emit_arithmetic_check(codegendata *cd, s4 reg)
317 codegen_add_arithmeticexception_ref(cd);
322 /* emit_arrayindexoutofbounds_check ********************************************
324 Emit a ArrayIndexOutOfBoundsException check.
326 *******************************************************************************/
328 void emit_arrayindexoutofbounds_check(codegendata *cd, s4 s1, s4 s2)
331 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
332 M_CMP(REG_ITMP3, s2);
334 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
339 /* emit_classcast_check ********************************************************
341 Emit a ClassCastException check.
343 *******************************************************************************/
345 void emit_classcast_check(codegendata *cd, s4 condition, s4 reg, s4 s1)
347 vm_abort("IMPLEMENT ME!");
351 /* emit_nullpointer_check ******************************************************
353 Emit a NullPointerException check.
355 *******************************************************************************/
357 void emit_nullpointer_check(codegendata *cd, s4 reg)
362 codegen_add_nullpointerexception_ref(cd);
367 /* emit_exception_stubs ********************************************************
369 Generates the code for the exception stubs.
371 *******************************************************************************/
373 void emit_exception_stubs(jitdata *jd)
382 /* get required compiler data */
387 /* generate exception stubs */
391 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
392 /* back-patch the branch to this exception code */
394 branchmpc = er->branchpos;
395 targetmpc = cd->mcodeptr - cd->mcodebase;
397 md_codegen_patch_branch(cd, branchmpc, targetmpc);
401 /* Check if the exception is an
402 ArrayIndexOutOfBoundsException. If so, move index register
406 M_INTMOVE(er->reg, REG_ITMP1);
408 /* calcuate exception address */
410 M_MOV_IMM(0, REG_ITMP2_XPC);
412 M_AADD_IMM32(er->branchpos - 6, REG_ITMP2_XPC);
414 /* move function to call into REG_ITMP3 */
416 M_MOV_IMM(er->function, REG_ITMP3);
418 if (targetdisp == 0) {
419 targetdisp = cd->mcodeptr - cd->mcodebase;
421 M_ASUB_IMM(5 * 4, REG_SP);
423 /* first store REG_ITMP1 so we can use it */
425 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
427 M_AST_IMM(0, REG_SP, 0 * 4);
429 M_MOV(REG_SP, REG_ITMP1);
430 M_AADD_IMM(5 * 4, REG_ITMP1);
431 M_AST(REG_ITMP1, REG_SP, 1 * 4);
432 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
433 M_AST(REG_ITMP1, REG_SP, 2 * 4);
434 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
438 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
439 M_AADD_IMM(5 * 4, REG_SP);
441 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
445 M_JMP_IMM((cd->mcodebase + targetdisp) -
446 (cd->mcodeptr + PATCHER_CALL_SIZE));
452 /* emit_patcher_stubs **********************************************************
454 Generates the code for the patcher stubs.
456 *******************************************************************************/
458 void emit_patcher_stubs(jitdata *jd)
468 /* get required compiler data */
472 /* generate code patching stub call code */
476 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
477 /* check code segment size */
481 /* Get machine code which is patched back in later. A
482 `call rel32' is 5 bytes long. */
484 savedmcodeptr = cd->mcodebase + pref->branchpos;
485 mcode = *((u8 *) savedmcodeptr);
487 /* patch in `call rel32' to call the following code */
489 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
490 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
492 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
494 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
500 /* move pointer to java_objectheader onto stack */
502 #if defined(ENABLE_THREADS)
503 (void) dseg_add_unique_address(cd, NULL); /* flcword */
504 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
505 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
507 M_MOV_IMM(0, REG_ITMP3);
509 M_AADD_IMM(disp, REG_ITMP3);
515 /* move machine code bytes and classinfo pointer into registers */
517 M_PUSH_IMM(mcode >> 32);
519 M_PUSH_IMM(pref->ref);
520 M_PUSH_IMM(pref->patcher);
522 if (targetdisp == 0) {
523 targetdisp = cd->mcodeptr - cd->mcodebase;
525 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
529 M_JMP_IMM((cd->mcodebase + targetdisp) -
530 (cd->mcodeptr + PATCHER_CALL_SIZE));
536 /* emit_replacement_stubs ******************************************************
538 Generates the code for the replacement stubs.
540 *******************************************************************************/
542 void emit_replacement_stubs(jitdata *jd)
550 /* get required compiler data */
555 rplp = code->rplpoints;
557 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
558 /* check code segment size */
562 /* note start of stub code */
564 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
566 /* make machine code for patching */
568 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
570 rplp->mcode = 0xe9 | ((u8) disp << 8);
572 /* push address of `rplpoint` struct */
576 /* jump to replacement function */
578 M_PUSH_IMM(asm_replacement_out);
584 /* emit_verbosecall_enter ******************************************************
586 Generates the code for the call trace.
588 *******************************************************************************/
591 void emit_verbosecall_enter(jitdata *jd)
600 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
603 /* get required compiler data */
611 /* mark trace code */
615 /* methodinfo* + arguments + return address */
617 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
618 cd->stackframesize * 4 + 4;
620 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
622 /* save temporary registers for leaf methods */
624 for (i = 0; i < INT_TMP_CNT; i++)
625 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
627 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
628 t = md->paramtypes[i].type;
630 if (IS_INT_LNG_TYPE(t)) {
631 if (IS_2_WORD_TYPE(t)) {
632 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
633 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
635 else if (IS_ADR_TYPE(t)) {
636 M_ALD(REG_ITMP1, REG_SP, disp);
637 M_AST(REG_ITMP1, REG_SP, i * 8);
638 M_IST_IMM(0, REG_SP, i * 8 + 4);
641 M_ILD(EAX, REG_SP, disp);
643 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
647 if (IS_2_WORD_TYPE(t)) {
648 M_DLD(REG_NULL, REG_SP, disp);
649 M_DST(REG_NULL, REG_SP, i * 8);
652 M_FLD(REG_NULL, REG_SP, disp);
653 M_FST(REG_NULL, REG_SP, i * 8);
654 M_IST_IMM(0, REG_SP, i * 8 + 4);
658 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
661 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
663 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
666 /* restore temporary registers for leaf methods */
668 for (i = 0; i < INT_TMP_CNT; i++)
669 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
671 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
673 /* mark trace code */
677 #endif /* !defined(NDEBUG) */
680 /* emit_verbosecall_exit *******************************************************
682 Generates the code for the call trace.
684 *******************************************************************************/
687 void emit_verbosecall_exit(jitdata *jd)
693 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
696 /* get required compiler data */
702 /* mark trace code */
706 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
708 M_AST_IMM(m, REG_SP, 0 * 4);
710 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
712 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
713 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
715 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
718 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
720 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
722 /* mark trace code */
726 #endif /* !defined(NDEBUG) */
729 /* code generation functions **************************************************/
731 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
733 if (basereg == ESP) {
735 emit_address_byte(0, dreg, ESP);
736 emit_address_byte(0, ESP, ESP);
738 else if (IS_IMM8(disp)) {
739 emit_address_byte(1, dreg, ESP);
740 emit_address_byte(0, ESP, ESP);
744 emit_address_byte(2, dreg, ESP);
745 emit_address_byte(0, ESP, ESP);
749 else if ((disp == 0) && (basereg != EBP)) {
750 emit_address_byte(0, dreg, basereg);
752 else if (IS_IMM8(disp)) {
753 emit_address_byte(1, dreg, basereg);
757 emit_address_byte(2, dreg, basereg);
763 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
765 if (basereg == ESP) {
766 emit_address_byte(2, dreg, ESP);
767 emit_address_byte(0, ESP, ESP);
771 emit_address_byte(2, dreg, basereg);
777 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
780 emit_address_byte(0, reg, 4);
781 emit_address_byte(scale, indexreg, 5);
784 else if ((disp == 0) && (basereg != EBP)) {
785 emit_address_byte(0, reg, 4);
786 emit_address_byte(scale, indexreg, basereg);
788 else if (IS_IMM8(disp)) {
789 emit_address_byte(1, reg, 4);
790 emit_address_byte(scale, indexreg, basereg);
794 emit_address_byte(2, reg, 4);
795 emit_address_byte(scale, indexreg, basereg);
801 /* low-level code emitter functions *******************************************/
803 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
805 COUNT(count_mov_reg_reg);
806 *(cd->mcodeptr++) = 0x89;
807 emit_reg((reg),(dreg));
811 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
813 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
818 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
820 *(cd->mcodeptr++) = 0xc6;
826 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
828 COUNT(count_mov_mem_reg);
829 *(cd->mcodeptr++) = 0x8b;
830 emit_membase(cd, (basereg),(disp),(reg));
835 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
836 * constant membase immediate length of 32bit
838 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
840 COUNT(count_mov_mem_reg);
841 *(cd->mcodeptr++) = 0x8b;
842 emit_membase32(cd, (basereg),(disp),(reg));
846 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
848 COUNT(count_mov_reg_mem);
849 *(cd->mcodeptr++) = 0x89;
850 emit_membase(cd, (basereg),(disp),(reg));
854 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
856 COUNT(count_mov_reg_mem);
857 *(cd->mcodeptr++) = 0x89;
858 emit_membase32(cd, (basereg),(disp),(reg));
862 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
864 COUNT(count_mov_mem_reg);
865 *(cd->mcodeptr++) = 0x8b;
866 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
870 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
872 COUNT(count_mov_reg_mem);
873 *(cd->mcodeptr++) = 0x89;
874 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
878 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
880 COUNT(count_mov_reg_mem);
881 *(cd->mcodeptr++) = 0x66;
882 *(cd->mcodeptr++) = 0x89;
883 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
887 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
889 COUNT(count_mov_reg_mem);
890 *(cd->mcodeptr++) = 0x88;
891 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
895 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
897 COUNT(count_mov_reg_mem);
898 *(cd->mcodeptr++) = 0x89;
899 emit_mem((reg),(mem));
903 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
905 COUNT(count_mov_mem_reg);
906 *(cd->mcodeptr++) = 0x8b;
907 emit_mem((dreg),(mem));
911 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
913 *(cd->mcodeptr++) = 0xc7;
919 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
921 *(cd->mcodeptr++) = 0xc7;
922 emit_membase(cd, (basereg),(disp),0);
927 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
929 *(cd->mcodeptr++) = 0xc7;
930 emit_membase32(cd, (basereg),(disp),0);
935 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
937 *(cd->mcodeptr++) = 0xc6;
938 emit_membase(cd, (basereg),(disp),0);
943 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
945 COUNT(count_mov_mem_reg);
946 *(cd->mcodeptr++) = 0x0f;
947 *(cd->mcodeptr++) = 0xbe;
948 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
952 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
954 *(cd->mcodeptr++) = 0x0f;
955 *(cd->mcodeptr++) = 0xbf;
960 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
962 COUNT(count_mov_mem_reg);
963 *(cd->mcodeptr++) = 0x0f;
964 *(cd->mcodeptr++) = 0xbf;
965 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
969 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
971 *(cd->mcodeptr++) = 0x0f;
972 *(cd->mcodeptr++) = 0xb7;
977 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
979 COUNT(count_mov_mem_reg);
980 *(cd->mcodeptr++) = 0x0f;
981 *(cd->mcodeptr++) = 0xb7;
982 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
986 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
988 *(cd->mcodeptr++) = 0xc7;
989 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
994 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
996 *(cd->mcodeptr++) = 0x66;
997 *(cd->mcodeptr++) = 0xc7;
998 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1003 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1005 *(cd->mcodeptr++) = 0xc6;
1006 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1014 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1016 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1017 emit_reg((reg),(dreg));
1021 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1023 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1024 emit_membase(cd, (basereg),(disp),(reg));
1028 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1030 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1031 emit_membase(cd, (basereg),(disp),(reg));
1035 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1038 *(cd->mcodeptr++) = 0x83;
1039 emit_reg((opc),(dreg));
1042 *(cd->mcodeptr++) = 0x81;
1043 emit_reg((opc),(dreg));
1049 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1051 *(cd->mcodeptr++) = 0x81;
1052 emit_reg((opc),(dreg));
1057 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1060 *(cd->mcodeptr++) = 0x83;
1061 emit_membase(cd, (basereg),(disp),(opc));
1064 *(cd->mcodeptr++) = 0x81;
1065 emit_membase(cd, (basereg),(disp),(opc));
1071 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1074 *(cd->mcodeptr++) = 0x83;
1075 emit_mem(opc, disp);
1078 *(cd->mcodeptr++) = 0x81;
1079 emit_mem(opc, disp);
1085 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1087 *(cd->mcodeptr++) = 0x85;
1088 emit_reg((reg),(dreg));
1092 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1094 *(cd->mcodeptr++) = 0xf7;
1102 * inc, dec operations
1104 void emit_dec_mem(codegendata *cd, s4 mem)
1106 *(cd->mcodeptr++) = 0xff;
1111 void emit_cltd(codegendata *cd)
1113 *(cd->mcodeptr++) = 0x99;
1117 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1119 *(cd->mcodeptr++) = 0x0f;
1120 *(cd->mcodeptr++) = 0xaf;
1121 emit_reg((dreg),(reg));
1125 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1127 *(cd->mcodeptr++) = 0x0f;
1128 *(cd->mcodeptr++) = 0xaf;
1129 emit_membase(cd, (basereg),(disp),(dreg));
1133 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1135 if (IS_IMM8((imm))) {
1136 *(cd->mcodeptr++) = 0x6b;
1140 *(cd->mcodeptr++) = 0x69;
1147 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1149 if (IS_IMM8((imm))) {
1150 *(cd->mcodeptr++) = 0x6b;
1151 emit_reg((dreg),(reg));
1154 *(cd->mcodeptr++) = 0x69;
1155 emit_reg((dreg),(reg));
1161 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1163 if (IS_IMM8((imm))) {
1164 *(cd->mcodeptr++) = 0x6b;
1165 emit_membase(cd, (basereg),(disp),(dreg));
1168 *(cd->mcodeptr++) = 0x69;
1169 emit_membase(cd, (basereg),(disp),(dreg));
1175 void emit_mul_reg(codegendata *cd, s4 reg)
1177 *(cd->mcodeptr++) = 0xf7;
1182 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1184 *(cd->mcodeptr++) = 0xf7;
1185 emit_membase(cd, (basereg),(disp),4);
1189 void emit_idiv_reg(codegendata *cd, s4 reg)
1191 *(cd->mcodeptr++) = 0xf7;
1196 void emit_ret(codegendata *cd)
1198 *(cd->mcodeptr++) = 0xc3;
1206 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1208 *(cd->mcodeptr++) = 0xd3;
1209 emit_reg((opc),(reg));
1213 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1216 *(cd->mcodeptr++) = 0xd1;
1217 emit_reg((opc),(dreg));
1219 *(cd->mcodeptr++) = 0xc1;
1220 emit_reg((opc),(dreg));
1226 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1228 *(cd->mcodeptr++) = 0x0f;
1229 *(cd->mcodeptr++) = 0xa5;
1230 emit_reg((reg),(dreg));
1234 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1236 *(cd->mcodeptr++) = 0x0f;
1237 *(cd->mcodeptr++) = 0xa4;
1238 emit_reg((reg),(dreg));
1243 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1245 *(cd->mcodeptr++) = 0x0f;
1246 *(cd->mcodeptr++) = 0xa5;
1247 emit_membase(cd, (basereg),(disp),(reg));
1251 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1253 *(cd->mcodeptr++) = 0x0f;
1254 *(cd->mcodeptr++) = 0xad;
1255 emit_reg((reg),(dreg));
1259 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1261 *(cd->mcodeptr++) = 0x0f;
1262 *(cd->mcodeptr++) = 0xac;
1263 emit_reg((reg),(dreg));
1268 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1270 *(cd->mcodeptr++) = 0x0f;
1271 *(cd->mcodeptr++) = 0xad;
1272 emit_membase(cd, (basereg),(disp),(reg));
1280 void emit_jmp_imm(codegendata *cd, s4 imm)
1282 *(cd->mcodeptr++) = 0xe9;
1287 void emit_jmp_reg(codegendata *cd, s4 reg)
1289 *(cd->mcodeptr++) = 0xff;
1294 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1296 *(cd->mcodeptr++) = 0x0f;
1297 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1304 * conditional set operations
1306 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1308 *(cd->mcodeptr++) = 0x0f;
1309 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1314 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1316 *(cd->mcodeptr++) = 0x0f;
1317 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1318 emit_membase(cd, (basereg),(disp),0);
1322 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1324 *(cd->mcodeptr++) = 0x0f;
1325 *(cd->mcodeptr++) = 0xc1;
1326 emit_mem((reg),(mem));
1330 void emit_neg_reg(codegendata *cd, s4 reg)
1332 *(cd->mcodeptr++) = 0xf7;
1338 void emit_push_imm(codegendata *cd, s4 imm)
1340 *(cd->mcodeptr++) = 0x68;
1345 void emit_pop_reg(codegendata *cd, s4 reg)
1347 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1351 void emit_push_reg(codegendata *cd, s4 reg)
1353 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1357 void emit_nop(codegendata *cd)
1359 *(cd->mcodeptr++) = 0x90;
1363 void emit_lock(codegendata *cd)
1365 *(cd->mcodeptr++) = 0xf0;
1372 void emit_call_reg(codegendata *cd, s4 reg)
1374 *(cd->mcodeptr++) = 0xff;
1379 void emit_call_imm(codegendata *cd, s4 imm)
1381 *(cd->mcodeptr++) = 0xe8;
1388 * floating point instructions
1390 void emit_fld1(codegendata *cd)
1392 *(cd->mcodeptr++) = 0xd9;
1393 *(cd->mcodeptr++) = 0xe8;
1397 void emit_fldz(codegendata *cd)
1399 *(cd->mcodeptr++) = 0xd9;
1400 *(cd->mcodeptr++) = 0xee;
1404 void emit_fld_reg(codegendata *cd, s4 reg)
1406 *(cd->mcodeptr++) = 0xd9;
1407 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1411 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1413 *(cd->mcodeptr++) = 0xd9;
1414 emit_membase(cd, (basereg),(disp),0);
1418 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1420 *(cd->mcodeptr++) = 0xd9;
1421 emit_membase32(cd, (basereg),(disp),0);
1425 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1427 *(cd->mcodeptr++) = 0xdd;
1428 emit_membase(cd, (basereg),(disp),0);
1432 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1434 *(cd->mcodeptr++) = 0xdd;
1435 emit_membase32(cd, (basereg),(disp),0);
1439 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1441 *(cd->mcodeptr++) = 0xdb;
1442 emit_membase(cd, (basereg),(disp),5);
1446 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1448 *(cd->mcodeptr++) = 0xd9;
1449 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1453 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1455 *(cd->mcodeptr++) = 0xdd;
1456 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1460 void emit_flds_mem(codegendata *cd, s4 mem)
1462 *(cd->mcodeptr++) = 0xd9;
1467 void emit_fldl_mem(codegendata *cd, s4 mem)
1469 *(cd->mcodeptr++) = 0xdd;
1474 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1476 *(cd->mcodeptr++) = 0xdb;
1477 emit_membase(cd, (basereg),(disp),0);
1481 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1483 *(cd->mcodeptr++) = 0xdf;
1484 emit_membase(cd, (basereg),(disp),5);
1488 void emit_fst_reg(codegendata *cd, s4 reg)
1490 *(cd->mcodeptr++) = 0xdd;
1491 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1495 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1497 *(cd->mcodeptr++) = 0xd9;
1498 emit_membase(cd, (basereg),(disp),2);
1502 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1504 *(cd->mcodeptr++) = 0xdd;
1505 emit_membase(cd, (basereg),(disp),2);
1509 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1511 *(cd->mcodeptr++) = 0xd9;
1512 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1516 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1518 *(cd->mcodeptr++) = 0xdd;
1519 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1523 void emit_fstp_reg(codegendata *cd, s4 reg)
1525 *(cd->mcodeptr++) = 0xdd;
1526 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1530 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1532 *(cd->mcodeptr++) = 0xd9;
1533 emit_membase(cd, (basereg),(disp),3);
1537 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1539 *(cd->mcodeptr++) = 0xd9;
1540 emit_membase32(cd, (basereg),(disp),3);
1544 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1546 *(cd->mcodeptr++) = 0xdd;
1547 emit_membase(cd, (basereg),(disp),3);
1551 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1553 *(cd->mcodeptr++) = 0xdd;
1554 emit_membase32(cd, (basereg),(disp),3);
1558 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1560 *(cd->mcodeptr++) = 0xdb;
1561 emit_membase(cd, (basereg),(disp),7);
1565 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1567 *(cd->mcodeptr++) = 0xd9;
1568 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1572 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1574 *(cd->mcodeptr++) = 0xdd;
1575 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1579 void emit_fstps_mem(codegendata *cd, s4 mem)
1581 *(cd->mcodeptr++) = 0xd9;
1586 void emit_fstpl_mem(codegendata *cd, s4 mem)
1588 *(cd->mcodeptr++) = 0xdd;
1593 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1595 *(cd->mcodeptr++) = 0xdb;
1596 emit_membase(cd, (basereg),(disp),2);
1600 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1602 *(cd->mcodeptr++) = 0xdb;
1603 emit_membase(cd, (basereg),(disp),3);
1607 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1609 *(cd->mcodeptr++) = 0xdf;
1610 emit_membase(cd, (basereg),(disp),7);
1614 void emit_fchs(codegendata *cd)
1616 *(cd->mcodeptr++) = 0xd9;
1617 *(cd->mcodeptr++) = 0xe0;
1621 void emit_faddp(codegendata *cd)
1623 *(cd->mcodeptr++) = 0xde;
1624 *(cd->mcodeptr++) = 0xc1;
1628 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1630 *(cd->mcodeptr++) = 0xd8;
1631 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1635 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1637 *(cd->mcodeptr++) = 0xdc;
1638 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1642 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1644 *(cd->mcodeptr++) = 0xde;
1645 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1649 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1651 *(cd->mcodeptr++) = 0xd8;
1652 emit_membase(cd, (basereg),(disp),0);
1656 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1658 *(cd->mcodeptr++) = 0xdc;
1659 emit_membase(cd, (basereg),(disp),0);
1663 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1665 *(cd->mcodeptr++) = 0xd8;
1666 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1670 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1672 *(cd->mcodeptr++) = 0xdc;
1673 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1677 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1679 *(cd->mcodeptr++) = 0xde;
1680 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1684 void emit_fsubp(codegendata *cd)
1686 *(cd->mcodeptr++) = 0xde;
1687 *(cd->mcodeptr++) = 0xe9;
1691 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1693 *(cd->mcodeptr++) = 0xd8;
1694 emit_membase(cd, (basereg),(disp),4);
1698 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1700 *(cd->mcodeptr++) = 0xdc;
1701 emit_membase(cd, (basereg),(disp),4);
1705 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1707 *(cd->mcodeptr++) = 0xd8;
1708 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1712 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1714 *(cd->mcodeptr++) = 0xdc;
1715 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1719 void emit_fmulp(codegendata *cd)
1721 *(cd->mcodeptr++) = 0xde;
1722 *(cd->mcodeptr++) = 0xc9;
1726 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1728 *(cd->mcodeptr++) = 0xde;
1729 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1733 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1735 *(cd->mcodeptr++) = 0xd8;
1736 emit_membase(cd, (basereg),(disp),1);
1740 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1742 *(cd->mcodeptr++) = 0xdc;
1743 emit_membase(cd, (basereg),(disp),1);
1747 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1749 *(cd->mcodeptr++) = 0xd8;
1750 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1754 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1756 *(cd->mcodeptr++) = 0xdc;
1757 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1761 void emit_fdivp(codegendata *cd)
1763 *(cd->mcodeptr++) = 0xde;
1764 *(cd->mcodeptr++) = 0xf9;
1768 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1770 *(cd->mcodeptr++) = 0xde;
1771 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1775 void emit_fxch(codegendata *cd)
1777 *(cd->mcodeptr++) = 0xd9;
1778 *(cd->mcodeptr++) = 0xc9;
1782 void emit_fxch_reg(codegendata *cd, s4 reg)
1784 *(cd->mcodeptr++) = 0xd9;
1785 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1789 void emit_fprem(codegendata *cd)
1791 *(cd->mcodeptr++) = 0xd9;
1792 *(cd->mcodeptr++) = 0xf8;
1796 void emit_fprem1(codegendata *cd)
1798 *(cd->mcodeptr++) = 0xd9;
1799 *(cd->mcodeptr++) = 0xf5;
1803 void emit_fucom(codegendata *cd)
1805 *(cd->mcodeptr++) = 0xdd;
1806 *(cd->mcodeptr++) = 0xe1;
1810 void emit_fucom_reg(codegendata *cd, s4 reg)
1812 *(cd->mcodeptr++) = 0xdd;
1813 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1817 void emit_fucomp_reg(codegendata *cd, s4 reg)
1819 *(cd->mcodeptr++) = 0xdd;
1820 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1824 void emit_fucompp(codegendata *cd)
1826 *(cd->mcodeptr++) = 0xda;
1827 *(cd->mcodeptr++) = 0xe9;
1831 void emit_fnstsw(codegendata *cd)
1833 *(cd->mcodeptr++) = 0xdf;
1834 *(cd->mcodeptr++) = 0xe0;
1838 void emit_sahf(codegendata *cd)
1840 *(cd->mcodeptr++) = 0x9e;
1844 void emit_finit(codegendata *cd)
1846 *(cd->mcodeptr++) = 0x9b;
1847 *(cd->mcodeptr++) = 0xdb;
1848 *(cd->mcodeptr++) = 0xe3;
1852 void emit_fldcw_mem(codegendata *cd, s4 mem)
1854 *(cd->mcodeptr++) = 0xd9;
1859 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1861 *(cd->mcodeptr++) = 0xd9;
1862 emit_membase(cd, (basereg),(disp),5);
1866 void emit_wait(codegendata *cd)
1868 *(cd->mcodeptr++) = 0x9b;
1872 void emit_ffree_reg(codegendata *cd, s4 reg)
1874 *(cd->mcodeptr++) = 0xdd;
1875 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1879 void emit_fdecstp(codegendata *cd)
1881 *(cd->mcodeptr++) = 0xd9;
1882 *(cd->mcodeptr++) = 0xf6;
1886 void emit_fincstp(codegendata *cd)
1888 *(cd->mcodeptr++) = 0xd9;
1889 *(cd->mcodeptr++) = 0xf7;
1894 * These are local overrides for various environment variables in Emacs.
1895 * Please do not remove this and leave it at the end of the file, where
1896 * Emacs will automagically detect them.
1897 * ---------------------------------------------------------------------
1900 * indent-tabs-mode: t