1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 5401 2006-09-07 12:52:31Z twisti $
42 #include "vm/jit/i386/md-abi.h"
43 #include "vm/jit/i386/md-emit.h"
44 #include "vm/jit/i386/codegen.h"
46 #if defined(ENABLE_THREADS)
47 # include "threads/native/lock.h"
50 #include "vm/builtin.h"
51 #include "vm/statistics.h"
52 #include "vm/jit/asmpart.h"
53 #include "vm/jit/dseg.h"
54 #include "vm/jit/emit.h"
55 #include "vm/jit/jit.h"
56 #include "vm/jit/replace.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->regoff * 4;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
102 /* emit_load_low ************************************************************
104 Emits a possible load of the low 32-bits of an operand.
106 *******************************************************************************/
108 inline s4 emit_load_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
121 if (IS_INMEMORY(src->flags)) {
124 disp = src->regoff * 4;
126 M_ILD(tempreg, REG_SP, disp);
131 reg = GET_LOW_REG(src->regoff);
137 /* emit_load_high ***********************************************************
139 Emits a possible load of the high 32-bits of an operand.
141 *******************************************************************************/
143 inline s4 emit_load_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
149 /* get required compiler data */
151 assert(src->type == TYPE_LNG);
155 if (IS_INMEMORY(src->flags)) {
158 disp = src->regoff * 4;
160 M_ILD(tempreg, REG_SP, disp + 4);
165 reg = GET_HIGH_REG(src->regoff);
171 /* emit_load_s1 ****************************************************************
173 Emits a possible load of the first source operand.
175 *******************************************************************************/
177 s4 emit_load_s1(jitdata *jd, instruction *iptr, s4 tempreg)
182 /* get required compiler data */
186 reg = emit_load(jd, iptr, src, tempreg);
192 /* emit_load_s2 ****************************************************************
194 Emits a possible load of the second source operand.
196 *******************************************************************************/
198 s4 emit_load_s2(jitdata *jd, instruction *iptr, s4 tempreg)
203 /* get required compiler data */
205 src = iptr->sx.s23.s2.var;
207 reg = emit_load(jd, iptr, src, tempreg);
213 /* emit_load_s3 ****************************************************************
215 Emits a possible load of the third source operand.
217 *******************************************************************************/
219 s4 emit_load_s3(jitdata *jd, instruction *iptr, s4 tempreg)
224 /* get required compiler data */
226 src = iptr->sx.s23.s3.var;
228 reg = emit_load(jd, iptr, src, tempreg);
234 /* emit_load_s1_low ************************************************************
236 Emits a possible load of the low 32-bits of the first long source
239 *******************************************************************************/
241 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, s4 tempreg)
247 /* get required compiler data */
251 reg = emit_load_low(jd, iptr, src, tempreg);
259 /* emit_load_s2_low ************************************************************
261 Emits a possible load of the low 32-bits of the second long source
264 *******************************************************************************/
266 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, s4 tempreg)
271 /* get required compiler data */
273 src = iptr->sx.s23.s2.var;
275 reg = emit_load_low(jd, iptr, src, tempreg);
281 /* emit_load_s1_high ***********************************************************
283 Emits a possible load of the high 32-bits of the first long source
286 *******************************************************************************/
288 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, s4 tempreg)
293 /* get required compiler data */
297 reg = emit_load_high(jd, iptr, src, tempreg);
303 /* emit_load_s2_high ***********************************************************
305 Emits a possible load of the high 32-bits of the second long source
308 *******************************************************************************/
310 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, s4 tempreg)
315 /* get required compiler data */
317 src = iptr->sx.s23.s2.var;
319 reg = emit_load_high(jd, iptr, src, tempreg);
325 /* emit_store ******************************************************************
327 Emits a possible store of the destination operand.
329 *******************************************************************************/
331 inline void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
335 /* get required compiler data */
339 if (IS_INMEMORY(dst->flags)) {
342 if (IS_FLT_DBL_TYPE(dst->type)) {
343 if (IS_2_WORD_TYPE(dst->type))
344 M_DST(d, REG_SP, dst->regoff * 4);
346 M_FST(d, REG_SP, dst->regoff * 4);
349 if (IS_2_WORD_TYPE(dst->type))
350 M_LST(d, REG_SP, dst->regoff * 4);
352 M_IST(d, REG_SP, dst->regoff * 4);
358 /* emit_store_low **************************************************************
360 Emits a possible store of the low 32-bits of the destination
363 *******************************************************************************/
365 inline void emit_store_low(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
369 assert(dst->type == TYPE_LNG);
371 /* get required compiler data */
375 if (IS_INMEMORY(dst->flags)) {
377 M_IST(GET_LOW_REG(d), REG_SP, dst->regoff * 4);
382 /* emit_store_high *************************************************************
384 Emits a possible store of the high 32-bits of the destination
387 *******************************************************************************/
389 inline void emit_store_high(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
393 assert(dst->type == TYPE_LNG);
395 /* get required compiler data */
399 if (IS_INMEMORY(dst->flags)) {
401 M_IST(GET_HIGH_REG(d), REG_SP, dst->regoff * 4 + 4);
405 /* emit_store_dst **************************************************************
407 This function generates the code to store the result of an
408 operation back into a spilled pseudo-variable. If the
409 pseudo-variable has not been spilled in the first place, this
410 function will generate nothing.
412 *******************************************************************************/
414 void emit_store_dst(jitdata *jd, instruction *iptr, s4 d)
420 emit_store(jd, iptr, dst, d);
424 /* emit_copy *******************************************************************
426 Generates a register/memory to register/memory copy.
428 *******************************************************************************/
430 void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
436 /* get required compiler data */
441 if ((src->regoff != dst->regoff) ||
442 ((src->flags ^ dst->flags) & INMEMORY)) {
444 /* If one of the variables resides in memory, we can eliminate
445 the register move from/to the temporary register with the
446 order of getting the destination register and the load. */
448 if (IS_INMEMORY(src->flags)) {
449 if (IS_LNG_TYPE(src->type))
450 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
452 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP1);
454 s1 = emit_load(jd, iptr, src, d);
457 if (IS_LNG_TYPE(src->type))
458 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
460 s1 = emit_load(jd, iptr, src, REG_ITMP1);
462 d = codegen_reg_of_var(rd, iptr->opc, dst, s1);
466 if (IS_FLT_DBL_TYPE(src->type)) {
469 if (IS_2_WORD_TYPE(src->type))
476 emit_store(jd, iptr, dst, d);
481 /* emit_exception_stubs ********************************************************
483 Generates the code for the exception stubs.
485 *******************************************************************************/
487 void emit_exception_stubs(jitdata *jd)
494 /* get required compiler data */
499 /* generate exception stubs */
503 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
504 gen_resolvebranch(cd->mcodebase + eref->branchpos,
506 cd->mcodeptr - cd->mcodebase);
510 /* Check if the exception is an
511 ArrayIndexOutOfBoundsException. If so, move index register
515 M_INTMOVE(eref->reg, REG_ITMP1);
517 /* calcuate exception address */
519 M_MOV_IMM(0, REG_ITMP2_XPC);
521 M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
523 /* move function to call into REG_ITMP3 */
525 M_MOV_IMM(eref->function, REG_ITMP3);
527 if (targetdisp == 0) {
528 targetdisp = cd->mcodeptr - cd->mcodebase;
530 M_ASUB_IMM(5 * 4, REG_SP);
532 /* first store REG_ITMP1 so we can use it */
534 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
536 M_AST_IMM(0, REG_SP, 0 * 4);
538 M_MOV(REG_SP, REG_ITMP1);
539 M_AADD_IMM(5 * 4, REG_ITMP1);
540 M_AST(REG_ITMP1, REG_SP, 1 * 4);
541 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
542 M_AST(REG_ITMP1, REG_SP, 2 * 4);
543 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
547 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
548 M_AADD_IMM(5 * 4, REG_SP);
550 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
554 M_JMP_IMM((cd->mcodebase + targetdisp) -
555 (cd->mcodeptr + PATCHER_CALL_SIZE));
561 /* emit_patcher_stubs **********************************************************
563 Generates the code for the patcher stubs.
565 *******************************************************************************/
567 void emit_patcher_stubs(jitdata *jd)
577 /* get required compiler data */
581 /* generate code patching stub call code */
585 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
586 /* check code segment size */
590 /* Get machine code which is patched back in later. A
591 `call rel32' is 5 bytes long. */
593 savedmcodeptr = cd->mcodebase + pref->branchpos;
594 mcode = *((u8 *) savedmcodeptr);
596 /* patch in `call rel32' to call the following code */
598 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
599 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
601 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
603 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
609 /* move pointer to java_objectheader onto stack */
611 #if defined(ENABLE_THREADS)
612 (void) dseg_addaddress(cd, NULL); /* flcword */
613 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
614 disp = dseg_addaddress(cd, NULL); /* vftbl */
616 M_MOV_IMM(0, REG_ITMP3);
618 M_AADD_IMM(disp, REG_ITMP3);
624 /* move machine code bytes and classinfo pointer into registers */
626 M_PUSH_IMM(mcode >> 32);
628 M_PUSH_IMM(pref->ref);
629 M_PUSH_IMM(pref->patcher);
631 if (targetdisp == 0) {
632 targetdisp = cd->mcodeptr - cd->mcodebase;
634 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
638 M_JMP_IMM((cd->mcodebase + targetdisp) -
639 (cd->mcodeptr + PATCHER_CALL_SIZE));
645 /* emit_replacement_stubs ******************************************************
647 Generates the code for the replacement stubs.
649 *******************************************************************************/
651 void emit_replacement_stubs(jitdata *jd)
659 /* get required compiler data */
664 rplp = code->rplpoints;
666 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
667 /* check code segment size */
671 /* note start of stub code */
673 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
675 /* make machine code for patching */
677 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
679 rplp->mcode = 0xe9 | ((u8) disp << 8);
681 /* push address of `rplpoint` struct */
685 /* jump to replacement function */
687 M_PUSH_IMM(asm_replacement_out);
693 /* emit_verbosecall_enter ******************************************************
695 Generates the code for the call trace.
697 *******************************************************************************/
700 void emit_verbosecall_enter(jitdata *jd)
709 /* get required compiler data */
717 /* mark trace code */
721 /* methodinfo* + arguments + return address */
723 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
724 cd->stackframesize * 4 + 4;
726 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
728 /* save temporary registers for leaf methods */
730 for (i = 0; i < INT_TMP_CNT; i++)
731 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
733 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
734 t = md->paramtypes[i].type;
736 if (IS_INT_LNG_TYPE(t)) {
737 if (IS_2_WORD_TYPE(t)) {
738 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
739 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
741 else if (IS_ADR_TYPE(t)) {
742 M_ALD(REG_ITMP1, REG_SP, disp);
743 M_AST(REG_ITMP1, REG_SP, i * 8);
744 M_IST_IMM(0, REG_SP, i * 8 + 4);
747 M_ILD(EAX, REG_SP, disp);
749 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
753 if (IS_2_WORD_TYPE(t)) {
754 M_DLD(REG_NULL, REG_SP, disp);
755 M_DST(REG_NULL, REG_SP, i * 8);
758 M_FLD(REG_NULL, REG_SP, disp);
759 M_FST(REG_NULL, REG_SP, i * 8);
760 M_IST_IMM(0, REG_SP, i * 8 + 4);
764 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
767 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
769 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
772 /* restore temporary registers for leaf methods */
774 for (i = 0; i < INT_TMP_CNT; i++)
775 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
777 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
779 /* mark trace code */
783 #endif /* !defined(NDEBUG) */
786 /* emit_verbosecall_exit *******************************************************
788 Generates the code for the call trace.
790 *******************************************************************************/
793 void emit_verbosecall_exit(jitdata *jd)
799 /* get required compiler data */
805 /* mark trace code */
809 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
811 M_AST_IMM(m, REG_SP, 0 * 4);
813 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
815 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
816 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
818 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
821 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
823 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
825 /* mark trace code */
829 #endif /* !defined(NDEBUG) */
832 /* code generation functions **************************************************/
834 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
836 if (basereg == ESP) {
838 emit_address_byte(0, dreg, ESP);
839 emit_address_byte(0, ESP, ESP);
841 else if (IS_IMM8(disp)) {
842 emit_address_byte(1, dreg, ESP);
843 emit_address_byte(0, ESP, ESP);
847 emit_address_byte(2, dreg, ESP);
848 emit_address_byte(0, ESP, ESP);
852 else if ((disp == 0) && (basereg != EBP)) {
853 emit_address_byte(0, dreg, basereg);
855 else if (IS_IMM8(disp)) {
856 emit_address_byte(1, dreg, basereg);
860 emit_address_byte(2, dreg, basereg);
866 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
868 if (basereg == ESP) {
869 emit_address_byte(2, dreg, ESP);
870 emit_address_byte(0, ESP, ESP);
874 emit_address_byte(2, dreg, basereg);
880 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
883 emit_address_byte(0, reg, 4);
884 emit_address_byte(scale, indexreg, 5);
887 else if ((disp == 0) && (basereg != EBP)) {
888 emit_address_byte(0, reg, 4);
889 emit_address_byte(scale, indexreg, basereg);
891 else if (IS_IMM8(disp)) {
892 emit_address_byte(1, reg, 4);
893 emit_address_byte(scale, indexreg, basereg);
897 emit_address_byte(2, reg, 4);
898 emit_address_byte(scale, indexreg, basereg);
904 /* low-level code emitter functions *******************************************/
906 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
908 COUNT(count_mov_reg_reg);
909 *(cd->mcodeptr++) = 0x89;
910 emit_reg((reg),(dreg));
914 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
916 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
921 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
923 *(cd->mcodeptr++) = 0xc6;
929 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
931 COUNT(count_mov_mem_reg);
932 *(cd->mcodeptr++) = 0x8b;
933 emit_membase(cd, (basereg),(disp),(reg));
938 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
939 * constant membase immediate length of 32bit
941 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
943 COUNT(count_mov_mem_reg);
944 *(cd->mcodeptr++) = 0x8b;
945 emit_membase32(cd, (basereg),(disp),(reg));
949 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
951 COUNT(count_mov_reg_mem);
952 *(cd->mcodeptr++) = 0x89;
953 emit_membase(cd, (basereg),(disp),(reg));
957 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
959 COUNT(count_mov_reg_mem);
960 *(cd->mcodeptr++) = 0x89;
961 emit_membase32(cd, (basereg),(disp),(reg));
965 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
967 COUNT(count_mov_mem_reg);
968 *(cd->mcodeptr++) = 0x8b;
969 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
973 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
975 COUNT(count_mov_reg_mem);
976 *(cd->mcodeptr++) = 0x89;
977 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
981 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
983 COUNT(count_mov_reg_mem);
984 *(cd->mcodeptr++) = 0x66;
985 *(cd->mcodeptr++) = 0x89;
986 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
990 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
992 COUNT(count_mov_reg_mem);
993 *(cd->mcodeptr++) = 0x88;
994 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
998 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
1000 COUNT(count_mov_reg_mem);
1001 *(cd->mcodeptr++) = 0x89;
1002 emit_mem((reg),(mem));
1006 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
1008 COUNT(count_mov_mem_reg);
1009 *(cd->mcodeptr++) = 0x8b;
1010 emit_mem((dreg),(mem));
1014 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
1016 *(cd->mcodeptr++) = 0xc7;
1022 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1024 *(cd->mcodeptr++) = 0xc7;
1025 emit_membase(cd, (basereg),(disp),0);
1030 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1032 *(cd->mcodeptr++) = 0xc7;
1033 emit_membase32(cd, (basereg),(disp),0);
1038 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1040 *(cd->mcodeptr++) = 0xc6;
1041 emit_membase(cd, (basereg),(disp),0);
1046 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1048 COUNT(count_mov_mem_reg);
1049 *(cd->mcodeptr++) = 0x0f;
1050 *(cd->mcodeptr++) = 0xbe;
1051 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1055 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1057 *(cd->mcodeptr++) = 0x0f;
1058 *(cd->mcodeptr++) = 0xbf;
1063 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1065 COUNT(count_mov_mem_reg);
1066 *(cd->mcodeptr++) = 0x0f;
1067 *(cd->mcodeptr++) = 0xbf;
1068 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1072 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1074 *(cd->mcodeptr++) = 0x0f;
1075 *(cd->mcodeptr++) = 0xb7;
1080 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1082 COUNT(count_mov_mem_reg);
1083 *(cd->mcodeptr++) = 0x0f;
1084 *(cd->mcodeptr++) = 0xb7;
1085 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1089 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1091 *(cd->mcodeptr++) = 0xc7;
1092 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1097 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1099 *(cd->mcodeptr++) = 0x66;
1100 *(cd->mcodeptr++) = 0xc7;
1101 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1106 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1108 *(cd->mcodeptr++) = 0xc6;
1109 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1117 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1119 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1120 emit_reg((reg),(dreg));
1124 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1126 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1127 emit_membase(cd, (basereg),(disp),(reg));
1131 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1133 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1134 emit_membase(cd, (basereg),(disp),(reg));
1138 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1141 *(cd->mcodeptr++) = 0x83;
1142 emit_reg((opc),(dreg));
1145 *(cd->mcodeptr++) = 0x81;
1146 emit_reg((opc),(dreg));
1152 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1154 *(cd->mcodeptr++) = 0x81;
1155 emit_reg((opc),(dreg));
1160 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1163 *(cd->mcodeptr++) = 0x83;
1164 emit_membase(cd, (basereg),(disp),(opc));
1167 *(cd->mcodeptr++) = 0x81;
1168 emit_membase(cd, (basereg),(disp),(opc));
1174 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1176 *(cd->mcodeptr++) = 0x85;
1177 emit_reg((reg),(dreg));
1181 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1183 *(cd->mcodeptr++) = 0xf7;
1191 * inc, dec operations
1193 void emit_dec_mem(codegendata *cd, s4 mem)
1195 *(cd->mcodeptr++) = 0xff;
1200 void emit_cltd(codegendata *cd)
1202 *(cd->mcodeptr++) = 0x99;
1206 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1208 *(cd->mcodeptr++) = 0x0f;
1209 *(cd->mcodeptr++) = 0xaf;
1210 emit_reg((dreg),(reg));
1214 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1216 *(cd->mcodeptr++) = 0x0f;
1217 *(cd->mcodeptr++) = 0xaf;
1218 emit_membase(cd, (basereg),(disp),(dreg));
1222 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1224 if (IS_IMM8((imm))) {
1225 *(cd->mcodeptr++) = 0x6b;
1229 *(cd->mcodeptr++) = 0x69;
1236 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1238 if (IS_IMM8((imm))) {
1239 *(cd->mcodeptr++) = 0x6b;
1240 emit_reg((dreg),(reg));
1243 *(cd->mcodeptr++) = 0x69;
1244 emit_reg((dreg),(reg));
1250 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1252 if (IS_IMM8((imm))) {
1253 *(cd->mcodeptr++) = 0x6b;
1254 emit_membase(cd, (basereg),(disp),(dreg));
1257 *(cd->mcodeptr++) = 0x69;
1258 emit_membase(cd, (basereg),(disp),(dreg));
1264 void emit_mul_reg(codegendata *cd, s4 reg)
1266 *(cd->mcodeptr++) = 0xf7;
1271 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1273 *(cd->mcodeptr++) = 0xf7;
1274 emit_membase(cd, (basereg),(disp),4);
1278 void emit_idiv_reg(codegendata *cd, s4 reg)
1280 *(cd->mcodeptr++) = 0xf7;
1285 void emit_ret(codegendata *cd)
1287 *(cd->mcodeptr++) = 0xc3;
1295 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1297 *(cd->mcodeptr++) = 0xd3;
1298 emit_reg((opc),(reg));
1302 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1305 *(cd->mcodeptr++) = 0xd1;
1306 emit_reg((opc),(dreg));
1308 *(cd->mcodeptr++) = 0xc1;
1309 emit_reg((opc),(dreg));
1315 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1317 *(cd->mcodeptr++) = 0x0f;
1318 *(cd->mcodeptr++) = 0xa5;
1319 emit_reg((reg),(dreg));
1323 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1325 *(cd->mcodeptr++) = 0x0f;
1326 *(cd->mcodeptr++) = 0xa4;
1327 emit_reg((reg),(dreg));
1332 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1334 *(cd->mcodeptr++) = 0x0f;
1335 *(cd->mcodeptr++) = 0xa5;
1336 emit_membase(cd, (basereg),(disp),(reg));
1340 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1342 *(cd->mcodeptr++) = 0x0f;
1343 *(cd->mcodeptr++) = 0xad;
1344 emit_reg((reg),(dreg));
1348 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1350 *(cd->mcodeptr++) = 0x0f;
1351 *(cd->mcodeptr++) = 0xac;
1352 emit_reg((reg),(dreg));
1357 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1359 *(cd->mcodeptr++) = 0x0f;
1360 *(cd->mcodeptr++) = 0xad;
1361 emit_membase(cd, (basereg),(disp),(reg));
1369 void emit_jmp_imm(codegendata *cd, s4 imm)
1371 *(cd->mcodeptr++) = 0xe9;
1376 void emit_jmp_reg(codegendata *cd, s4 reg)
1378 *(cd->mcodeptr++) = 0xff;
1383 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1385 *(cd->mcodeptr++) = 0x0f;
1386 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1393 * conditional set operations
1395 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1397 *(cd->mcodeptr++) = 0x0f;
1398 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1403 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1405 *(cd->mcodeptr++) = 0x0f;
1406 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1407 emit_membase(cd, (basereg),(disp),0);
1411 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1413 *(cd->mcodeptr++) = 0x0f;
1414 *(cd->mcodeptr++) = 0xc1;
1415 emit_mem((reg),(mem));
1419 void emit_neg_reg(codegendata *cd, s4 reg)
1421 *(cd->mcodeptr++) = 0xf7;
1427 void emit_push_imm(codegendata *cd, s4 imm)
1429 *(cd->mcodeptr++) = 0x68;
1434 void emit_pop_reg(codegendata *cd, s4 reg)
1436 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1440 void emit_push_reg(codegendata *cd, s4 reg)
1442 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1446 void emit_nop(codegendata *cd)
1448 *(cd->mcodeptr++) = 0x90;
1452 void emit_lock(codegendata *cd)
1454 *(cd->mcodeptr++) = 0xf0;
1461 void emit_call_reg(codegendata *cd, s4 reg)
1463 *(cd->mcodeptr++) = 0xff;
1468 void emit_call_imm(codegendata *cd, s4 imm)
1470 *(cd->mcodeptr++) = 0xe8;
1477 * floating point instructions
1479 void emit_fld1(codegendata *cd)
1481 *(cd->mcodeptr++) = 0xd9;
1482 *(cd->mcodeptr++) = 0xe8;
1486 void emit_fldz(codegendata *cd)
1488 *(cd->mcodeptr++) = 0xd9;
1489 *(cd->mcodeptr++) = 0xee;
1493 void emit_fld_reg(codegendata *cd, s4 reg)
1495 *(cd->mcodeptr++) = 0xd9;
1496 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1500 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1502 *(cd->mcodeptr++) = 0xd9;
1503 emit_membase(cd, (basereg),(disp),0);
1507 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1509 *(cd->mcodeptr++) = 0xd9;
1510 emit_membase32(cd, (basereg),(disp),0);
1514 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1516 *(cd->mcodeptr++) = 0xdd;
1517 emit_membase(cd, (basereg),(disp),0);
1521 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1523 *(cd->mcodeptr++) = 0xdd;
1524 emit_membase32(cd, (basereg),(disp),0);
1528 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1530 *(cd->mcodeptr++) = 0xdb;
1531 emit_membase(cd, (basereg),(disp),5);
1535 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1537 *(cd->mcodeptr++) = 0xd9;
1538 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1542 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1544 *(cd->mcodeptr++) = 0xdd;
1545 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1549 void emit_flds_mem(codegendata *cd, s4 mem)
1551 *(cd->mcodeptr++) = 0xd9;
1556 void emit_fldl_mem(codegendata *cd, s4 mem)
1558 *(cd->mcodeptr++) = 0xdd;
1563 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1565 *(cd->mcodeptr++) = 0xdb;
1566 emit_membase(cd, (basereg),(disp),0);
1570 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1572 *(cd->mcodeptr++) = 0xdf;
1573 emit_membase(cd, (basereg),(disp),5);
1577 void emit_fst_reg(codegendata *cd, s4 reg)
1579 *(cd->mcodeptr++) = 0xdd;
1580 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1584 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1586 *(cd->mcodeptr++) = 0xd9;
1587 emit_membase(cd, (basereg),(disp),2);
1591 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1593 *(cd->mcodeptr++) = 0xdd;
1594 emit_membase(cd, (basereg),(disp),2);
1598 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1600 *(cd->mcodeptr++) = 0xd9;
1601 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1605 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1607 *(cd->mcodeptr++) = 0xdd;
1608 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1612 void emit_fstp_reg(codegendata *cd, s4 reg)
1614 *(cd->mcodeptr++) = 0xdd;
1615 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1619 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1621 *(cd->mcodeptr++) = 0xd9;
1622 emit_membase(cd, (basereg),(disp),3);
1626 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1628 *(cd->mcodeptr++) = 0xd9;
1629 emit_membase32(cd, (basereg),(disp),3);
1633 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1635 *(cd->mcodeptr++) = 0xdd;
1636 emit_membase(cd, (basereg),(disp),3);
1640 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1642 *(cd->mcodeptr++) = 0xdd;
1643 emit_membase32(cd, (basereg),(disp),3);
1647 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1649 *(cd->mcodeptr++) = 0xdb;
1650 emit_membase(cd, (basereg),(disp),7);
1654 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1656 *(cd->mcodeptr++) = 0xd9;
1657 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1661 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1663 *(cd->mcodeptr++) = 0xdd;
1664 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1668 void emit_fstps_mem(codegendata *cd, s4 mem)
1670 *(cd->mcodeptr++) = 0xd9;
1675 void emit_fstpl_mem(codegendata *cd, s4 mem)
1677 *(cd->mcodeptr++) = 0xdd;
1682 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1684 *(cd->mcodeptr++) = 0xdb;
1685 emit_membase(cd, (basereg),(disp),2);
1689 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1691 *(cd->mcodeptr++) = 0xdb;
1692 emit_membase(cd, (basereg),(disp),3);
1696 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1698 *(cd->mcodeptr++) = 0xdf;
1699 emit_membase(cd, (basereg),(disp),7);
1703 void emit_fchs(codegendata *cd)
1705 *(cd->mcodeptr++) = 0xd9;
1706 *(cd->mcodeptr++) = 0xe0;
1710 void emit_faddp(codegendata *cd)
1712 *(cd->mcodeptr++) = 0xde;
1713 *(cd->mcodeptr++) = 0xc1;
1717 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1719 *(cd->mcodeptr++) = 0xd8;
1720 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1724 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1726 *(cd->mcodeptr++) = 0xdc;
1727 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1731 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1733 *(cd->mcodeptr++) = 0xde;
1734 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1738 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1740 *(cd->mcodeptr++) = 0xd8;
1741 emit_membase(cd, (basereg),(disp),0);
1745 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1747 *(cd->mcodeptr++) = 0xdc;
1748 emit_membase(cd, (basereg),(disp),0);
1752 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1754 *(cd->mcodeptr++) = 0xd8;
1755 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1759 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1761 *(cd->mcodeptr++) = 0xdc;
1762 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1766 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1768 *(cd->mcodeptr++) = 0xde;
1769 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1773 void emit_fsubp(codegendata *cd)
1775 *(cd->mcodeptr++) = 0xde;
1776 *(cd->mcodeptr++) = 0xe9;
1780 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1782 *(cd->mcodeptr++) = 0xd8;
1783 emit_membase(cd, (basereg),(disp),4);
1787 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1789 *(cd->mcodeptr++) = 0xdc;
1790 emit_membase(cd, (basereg),(disp),4);
1794 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1796 *(cd->mcodeptr++) = 0xd8;
1797 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1801 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1803 *(cd->mcodeptr++) = 0xdc;
1804 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1808 void emit_fmulp(codegendata *cd)
1810 *(cd->mcodeptr++) = 0xde;
1811 *(cd->mcodeptr++) = 0xc9;
1815 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1817 *(cd->mcodeptr++) = 0xde;
1818 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1822 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1824 *(cd->mcodeptr++) = 0xd8;
1825 emit_membase(cd, (basereg),(disp),1);
1829 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1831 *(cd->mcodeptr++) = 0xdc;
1832 emit_membase(cd, (basereg),(disp),1);
1836 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1838 *(cd->mcodeptr++) = 0xd8;
1839 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1843 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1845 *(cd->mcodeptr++) = 0xdc;
1846 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1850 void emit_fdivp(codegendata *cd)
1852 *(cd->mcodeptr++) = 0xde;
1853 *(cd->mcodeptr++) = 0xf9;
1857 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1859 *(cd->mcodeptr++) = 0xde;
1860 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1864 void emit_fxch(codegendata *cd)
1866 *(cd->mcodeptr++) = 0xd9;
1867 *(cd->mcodeptr++) = 0xc9;
1871 void emit_fxch_reg(codegendata *cd, s4 reg)
1873 *(cd->mcodeptr++) = 0xd9;
1874 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1878 void emit_fprem(codegendata *cd)
1880 *(cd->mcodeptr++) = 0xd9;
1881 *(cd->mcodeptr++) = 0xf8;
1885 void emit_fprem1(codegendata *cd)
1887 *(cd->mcodeptr++) = 0xd9;
1888 *(cd->mcodeptr++) = 0xf5;
1892 void emit_fucom(codegendata *cd)
1894 *(cd->mcodeptr++) = 0xdd;
1895 *(cd->mcodeptr++) = 0xe1;
1899 void emit_fucom_reg(codegendata *cd, s4 reg)
1901 *(cd->mcodeptr++) = 0xdd;
1902 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1906 void emit_fucomp_reg(codegendata *cd, s4 reg)
1908 *(cd->mcodeptr++) = 0xdd;
1909 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1913 void emit_fucompp(codegendata *cd)
1915 *(cd->mcodeptr++) = 0xda;
1916 *(cd->mcodeptr++) = 0xe9;
1920 void emit_fnstsw(codegendata *cd)
1922 *(cd->mcodeptr++) = 0xdf;
1923 *(cd->mcodeptr++) = 0xe0;
1927 void emit_sahf(codegendata *cd)
1929 *(cd->mcodeptr++) = 0x9e;
1933 void emit_finit(codegendata *cd)
1935 *(cd->mcodeptr++) = 0x9b;
1936 *(cd->mcodeptr++) = 0xdb;
1937 *(cd->mcodeptr++) = 0xe3;
1941 void emit_fldcw_mem(codegendata *cd, s4 mem)
1943 *(cd->mcodeptr++) = 0xd9;
1948 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1950 *(cd->mcodeptr++) = 0xd9;
1951 emit_membase(cd, (basereg),(disp),5);
1955 void emit_wait(codegendata *cd)
1957 *(cd->mcodeptr++) = 0x9b;
1961 void emit_ffree_reg(codegendata *cd, s4 reg)
1963 *(cd->mcodeptr++) = 0xdd;
1964 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1968 void emit_fdecstp(codegendata *cd)
1970 *(cd->mcodeptr++) = 0xd9;
1971 *(cd->mcodeptr++) = 0xf6;
1975 void emit_fincstp(codegendata *cd)
1977 *(cd->mcodeptr++) = 0xd9;
1978 *(cd->mcodeptr++) = 0xf7;
1983 * These are local overrides for various environment variables in Emacs.
1984 * Please do not remove this and leave it at the end of the file, where
1985 * Emacs will automagically detect them.
1986 * ---------------------------------------------------------------------
1989 * indent-tabs-mode: t