1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 7596 2007-03-28 21:05:53Z twisti $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #if defined(ENABLE_THREADS)
43 # include "threads/native/lock.h"
46 #include "vm/builtin.h"
47 #include "vm/exceptions.h"
49 #include "vm/jit/asmpart.h"
50 #include "vm/jit/dseg.h"
51 #include "vm/jit/emit-common.h"
52 #include "vm/jit/jit.h"
53 #include "vm/jit/replace.h"
55 #include "vmcore/options.h"
56 #include "vmcore/statistics.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->vv.regoff * 4;
83 M_ILD(tempreg, REG_SP, disp);
86 M_LLD(tempreg, REG_SP, disp);
89 M_FLD(tempreg, REG_SP, disp);
92 M_DLD(tempreg, REG_SP, disp);
95 vm_abort("emit_load: unknown type %d", src->type);
101 reg = src->vv.regoff;
107 /* emit_load_low ************************************************************
109 Emits a possible load of the low 32-bits of an operand.
111 *******************************************************************************/
113 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
119 assert(src->type == TYPE_LNG);
121 /* get required compiler data */
126 if (IS_INMEMORY(src->flags)) {
129 disp = src->vv.regoff * 4;
131 M_ILD(tempreg, REG_SP, disp);
136 reg = GET_LOW_REG(src->vv.regoff);
142 /* emit_load_high ***********************************************************
144 Emits a possible load of the high 32-bits of an operand.
146 *******************************************************************************/
148 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
154 /* get required compiler data */
156 assert(src->type == TYPE_LNG);
160 if (IS_INMEMORY(src->flags)) {
163 disp = src->vv.regoff * 4;
165 M_ILD(tempreg, REG_SP, disp + 4);
170 reg = GET_HIGH_REG(src->vv.regoff);
176 /* emit_store ******************************************************************
178 Emits a possible store of the destination operand.
180 *******************************************************************************/
182 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
187 /* get required compiler data */
191 if (IS_INMEMORY(dst->flags)) {
194 disp = dst->vv.regoff * 4;
199 M_IST(d, REG_SP, disp);
202 M_LST(d, REG_SP, disp);
205 M_FST(d, REG_SP, disp);
208 M_DST(d, REG_SP, disp);
211 vm_abort("emit_store: unknown type %d", dst->type);
217 /* emit_store_low **************************************************************
219 Emits a possible store of the low 32-bits of the destination
222 *******************************************************************************/
224 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
228 assert(dst->type == TYPE_LNG);
230 /* get required compiler data */
234 if (IS_INMEMORY(dst->flags)) {
236 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
241 /* emit_store_high *************************************************************
243 Emits a possible store of the high 32-bits of the destination
246 *******************************************************************************/
248 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
252 assert(dst->type == TYPE_LNG);
254 /* get required compiler data */
258 if (IS_INMEMORY(dst->flags)) {
260 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
265 /* emit_copy *******************************************************************
267 Generates a register/memory to register/memory copy.
269 *******************************************************************************/
271 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
276 /* get required compiler data */
280 if ((src->vv.regoff != dst->vv.regoff) ||
281 ((src->flags ^ dst->flags) & INMEMORY)) {
283 /* If one of the variables resides in memory, we can eliminate
284 the register move from/to the temporary register with the
285 order of getting the destination register and the load. */
287 if (IS_INMEMORY(src->flags)) {
288 if (IS_LNG_TYPE(src->type))
289 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
291 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
293 s1 = emit_load(jd, iptr, src, d);
296 if (IS_LNG_TYPE(src->type))
297 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
299 s1 = emit_load(jd, iptr, src, REG_ITMP1);
301 d = codegen_reg_of_var(iptr->opc, dst, s1);
318 vm_abort("emit_copy: unknown type %d", src->type);
322 emit_store(jd, iptr, dst, d);
327 /* emit_branch *****************************************************************
329 Emits the code for conditional and unconditional branchs.
331 *******************************************************************************/
333 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
337 /* ATTENTION: a displacement overflow cannot happen */
339 /* check which branch to generate */
341 if (condition == BRANCH_UNCONDITIONAL) {
343 /* calculate the different displacements */
345 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
347 M_JMP_IMM(branchdisp);
350 /* calculate the different displacements */
352 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
386 vm_abort("emit_branch: unknown condition %d", condition);
392 /* emit_arithmetic_check *******************************************************
394 Emit an ArithmeticException check.
396 *******************************************************************************/
398 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
400 if (INSTRUCTION_MUST_CHECK(iptr)) {
403 M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
408 /* emit_arrayindexoutofbounds_check ********************************************
410 Emit a ArrayIndexOutOfBoundsException check.
412 *******************************************************************************/
414 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
416 if (INSTRUCTION_MUST_CHECK(iptr)) {
417 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
418 M_CMP(REG_ITMP3, s2);
420 M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
425 /* emit_classcast_check ********************************************************
427 Emit a ClassCastException check.
429 *******************************************************************************/
431 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
433 if (INSTRUCTION_MUST_CHECK(iptr)) {
445 vm_abort("emit_classcast_check: unknown condition %d", condition);
447 M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
452 /* emit_nullpointer_check ******************************************************
454 Emit a NullPointerException check.
456 *******************************************************************************/
458 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
460 if (INSTRUCTION_MUST_CHECK(iptr)) {
463 M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
468 /* emit_exception_check ********************************************************
470 Emit an Exception check.
472 *******************************************************************************/
474 void emit_exception_check(codegendata *cd, instruction *iptr)
476 if (INSTRUCTION_MUST_CHECK(iptr)) {
479 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
484 /* emit_patcher_stubs **********************************************************
486 Generates the code for the patcher stubs.
488 *******************************************************************************/
490 void emit_patcher_stubs(jitdata *jd)
500 /* get required compiler data */
504 /* generate code patching stub call code */
508 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
509 /* check code segment size */
513 /* Get machine code which is patched back in later. A
514 `call rel32' is 5 bytes long. */
516 savedmcodeptr = cd->mcodebase + pref->branchpos;
517 mcode = *((u8 *) savedmcodeptr);
519 /* patch in `call rel32' to call the following code */
521 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
522 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
524 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
526 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
532 /* move pointer to java_objectheader onto stack */
534 #if defined(ENABLE_THREADS)
535 (void) dseg_add_unique_address(cd, NULL); /* flcword */
536 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
537 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
539 M_MOV_IMM(0, REG_ITMP3);
541 M_AADD_IMM(disp, REG_ITMP3);
547 /* move machine code bytes and classinfo pointer into registers */
549 M_PUSH_IMM(mcode >> 32);
551 M_PUSH_IMM(pref->ref);
552 M_PUSH_IMM(pref->patcher);
554 if (targetdisp == 0) {
555 targetdisp = cd->mcodeptr - cd->mcodebase;
557 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
561 M_JMP_IMM((cd->mcodebase + targetdisp) -
562 (cd->mcodeptr + PATCHER_CALL_SIZE));
568 /* emit_replacement_stubs ******************************************************
570 Generates the code for the replacement stubs.
572 *******************************************************************************/
574 #if defined(ENABLE_REPLACEMENT)
575 void emit_replacement_stubs(jitdata *jd)
585 /* get required compiler data */
590 rplp = code->rplpoints;
592 /* store beginning of replacement stubs */
594 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
596 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
597 /* do not generate stubs for non-trappable points */
599 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
602 /* check code segment size */
606 /* note start of stub code */
608 outcode = (s4) (cd->mcodeptr - cd->mcodebase);
610 /* push address of `rplpoint` struct */
614 /* jump to replacement function */
616 M_PUSH_IMM(asm_replacement_out);
619 /* add jump reference for COUNTDOWN points */
621 if (rplp->flags & RPLPOINT_FLAG_COUNTDOWN) {
623 branchmpc = (s4)rplp->pc + (7 + 6);
625 md_codegen_patch_branch(cd, branchmpc, (s4) outcode);
628 assert(((cd->mcodeptr - cd->mcodebase) - outcode) == REPLACEMENT_STUB_SIZE);
631 #endif /* defined(ENABLE_REPLACEMENT) */
634 /* emit_verbosecall_enter ******************************************************
636 Generates the code for the call trace.
638 *******************************************************************************/
641 void emit_verbosecall_enter(jitdata *jd)
650 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
653 /* get required compiler data */
661 /* mark trace code */
665 /* methodinfo* + arguments + return address */
667 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
668 cd->stackframesize * 4 + 4;
670 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
672 /* save temporary registers for leaf methods */
674 for (i = 0; i < INT_TMP_CNT; i++)
675 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
677 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
678 t = md->paramtypes[i].type;
680 if (IS_INT_LNG_TYPE(t)) {
681 if (IS_2_WORD_TYPE(t)) {
682 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
683 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
685 else if (IS_ADR_TYPE(t)) {
686 M_ALD(REG_ITMP1, REG_SP, disp);
687 M_AST(REG_ITMP1, REG_SP, i * 8);
688 M_IST_IMM(0, REG_SP, i * 8 + 4);
691 M_ILD(EAX, REG_SP, disp);
693 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
697 if (IS_2_WORD_TYPE(t)) {
698 M_DLD(REG_NULL, REG_SP, disp);
699 M_DST(REG_NULL, REG_SP, i * 8);
702 M_FLD(REG_NULL, REG_SP, disp);
703 M_FST(REG_NULL, REG_SP, i * 8);
704 M_IST_IMM(0, REG_SP, i * 8 + 4);
708 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
711 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
713 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
716 /* restore temporary registers for leaf methods */
718 for (i = 0; i < INT_TMP_CNT; i++)
719 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
721 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
723 /* mark trace code */
727 #endif /* !defined(NDEBUG) */
730 /* emit_verbosecall_exit *******************************************************
732 Generates the code for the call trace.
734 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
736 *******************************************************************************/
739 void emit_verbosecall_exit(jitdata *jd)
745 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
748 /* get required compiler data */
754 /* mark trace code */
758 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
760 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
762 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
763 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
765 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
767 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
770 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
772 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
774 /* mark trace code */
778 #endif /* !defined(NDEBUG) */
781 /* code generation functions **************************************************/
783 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
785 if (basereg == ESP) {
787 emit_address_byte(0, dreg, ESP);
788 emit_address_byte(0, ESP, ESP);
790 else if (IS_IMM8(disp)) {
791 emit_address_byte(1, dreg, ESP);
792 emit_address_byte(0, ESP, ESP);
796 emit_address_byte(2, dreg, ESP);
797 emit_address_byte(0, ESP, ESP);
801 else if ((disp == 0) && (basereg != EBP)) {
802 emit_address_byte(0, dreg, basereg);
804 else if (IS_IMM8(disp)) {
805 emit_address_byte(1, dreg, basereg);
809 emit_address_byte(2, dreg, basereg);
815 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
817 if (basereg == ESP) {
818 emit_address_byte(2, dreg, ESP);
819 emit_address_byte(0, ESP, ESP);
823 emit_address_byte(2, dreg, basereg);
829 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
832 emit_address_byte(0, reg, 4);
833 emit_address_byte(scale, indexreg, 5);
836 else if ((disp == 0) && (basereg != EBP)) {
837 emit_address_byte(0, reg, 4);
838 emit_address_byte(scale, indexreg, basereg);
840 else if (IS_IMM8(disp)) {
841 emit_address_byte(1, reg, 4);
842 emit_address_byte(scale, indexreg, basereg);
846 emit_address_byte(2, reg, 4);
847 emit_address_byte(scale, indexreg, basereg);
853 /* low-level code emitter functions *******************************************/
855 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
857 COUNT(count_mov_reg_reg);
858 *(cd->mcodeptr++) = 0x89;
859 emit_reg((reg),(dreg));
863 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
865 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
870 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
872 *(cd->mcodeptr++) = 0xc6;
878 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
880 COUNT(count_mov_mem_reg);
881 *(cd->mcodeptr++) = 0x8b;
882 emit_membase(cd, (basereg),(disp),(reg));
887 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
888 * constant membase immediate length of 32bit
890 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
892 COUNT(count_mov_mem_reg);
893 *(cd->mcodeptr++) = 0x8b;
894 emit_membase32(cd, (basereg),(disp),(reg));
898 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
900 COUNT(count_mov_reg_mem);
901 *(cd->mcodeptr++) = 0x89;
902 emit_membase(cd, (basereg),(disp),(reg));
906 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
908 COUNT(count_mov_reg_mem);
909 *(cd->mcodeptr++) = 0x89;
910 emit_membase32(cd, (basereg),(disp),(reg));
914 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
916 COUNT(count_mov_mem_reg);
917 *(cd->mcodeptr++) = 0x8b;
918 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
922 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
924 COUNT(count_mov_reg_mem);
925 *(cd->mcodeptr++) = 0x89;
926 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
930 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
932 COUNT(count_mov_reg_mem);
933 *(cd->mcodeptr++) = 0x66;
934 *(cd->mcodeptr++) = 0x89;
935 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
939 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
941 COUNT(count_mov_reg_mem);
942 *(cd->mcodeptr++) = 0x88;
943 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
947 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
949 COUNT(count_mov_reg_mem);
950 *(cd->mcodeptr++) = 0x89;
951 emit_mem((reg),(mem));
955 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
957 COUNT(count_mov_mem_reg);
958 *(cd->mcodeptr++) = 0x8b;
959 emit_mem((dreg),(mem));
963 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
965 *(cd->mcodeptr++) = 0xc7;
971 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
973 *(cd->mcodeptr++) = 0xc7;
974 emit_membase(cd, (basereg),(disp),0);
979 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
981 *(cd->mcodeptr++) = 0xc7;
982 emit_membase32(cd, (basereg),(disp),0);
987 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
989 *(cd->mcodeptr++) = 0xc6;
990 emit_membase(cd, (basereg),(disp),0);
995 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
997 COUNT(count_mov_mem_reg);
998 *(cd->mcodeptr++) = 0x0f;
999 *(cd->mcodeptr++) = 0xbe;
1000 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1004 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1006 *(cd->mcodeptr++) = 0x0f;
1007 *(cd->mcodeptr++) = 0xbf;
1012 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1014 COUNT(count_mov_mem_reg);
1015 *(cd->mcodeptr++) = 0x0f;
1016 *(cd->mcodeptr++) = 0xbf;
1017 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1021 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1023 *(cd->mcodeptr++) = 0x0f;
1024 *(cd->mcodeptr++) = 0xb7;
1029 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1031 COUNT(count_mov_mem_reg);
1032 *(cd->mcodeptr++) = 0x0f;
1033 *(cd->mcodeptr++) = 0xb7;
1034 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1038 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1040 *(cd->mcodeptr++) = 0xc7;
1041 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1046 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1048 *(cd->mcodeptr++) = 0x66;
1049 *(cd->mcodeptr++) = 0xc7;
1050 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1055 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1057 *(cd->mcodeptr++) = 0xc6;
1058 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1066 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1068 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1069 emit_reg((reg),(dreg));
1073 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1075 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1076 emit_membase(cd, (basereg),(disp),(reg));
1080 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1082 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1083 emit_membase(cd, (basereg),(disp),(reg));
1087 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1090 *(cd->mcodeptr++) = 0x83;
1091 emit_reg((opc),(dreg));
1094 *(cd->mcodeptr++) = 0x81;
1095 emit_reg((opc),(dreg));
1101 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1103 *(cd->mcodeptr++) = 0x81;
1104 emit_reg((opc),(dreg));
1109 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1112 *(cd->mcodeptr++) = 0x83;
1113 emit_membase(cd, (basereg),(disp),(opc));
1116 *(cd->mcodeptr++) = 0x81;
1117 emit_membase(cd, (basereg),(disp),(opc));
1123 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1126 *(cd->mcodeptr++) = 0x83;
1127 emit_mem(opc, disp);
1130 *(cd->mcodeptr++) = 0x81;
1131 emit_mem(opc, disp);
1137 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1139 *(cd->mcodeptr++) = 0x85;
1140 emit_reg((reg),(dreg));
1144 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1146 *(cd->mcodeptr++) = 0xf7;
1154 * inc, dec operations
1156 void emit_dec_mem(codegendata *cd, s4 mem)
1158 *(cd->mcodeptr++) = 0xff;
1163 void emit_cltd(codegendata *cd)
1165 *(cd->mcodeptr++) = 0x99;
1169 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1171 *(cd->mcodeptr++) = 0x0f;
1172 *(cd->mcodeptr++) = 0xaf;
1173 emit_reg((dreg),(reg));
1177 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1179 *(cd->mcodeptr++) = 0x0f;
1180 *(cd->mcodeptr++) = 0xaf;
1181 emit_membase(cd, (basereg),(disp),(dreg));
1185 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1187 if (IS_IMM8((imm))) {
1188 *(cd->mcodeptr++) = 0x6b;
1192 *(cd->mcodeptr++) = 0x69;
1199 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1201 if (IS_IMM8((imm))) {
1202 *(cd->mcodeptr++) = 0x6b;
1203 emit_reg((dreg),(reg));
1206 *(cd->mcodeptr++) = 0x69;
1207 emit_reg((dreg),(reg));
1213 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1215 if (IS_IMM8((imm))) {
1216 *(cd->mcodeptr++) = 0x6b;
1217 emit_membase(cd, (basereg),(disp),(dreg));
1220 *(cd->mcodeptr++) = 0x69;
1221 emit_membase(cd, (basereg),(disp),(dreg));
1227 void emit_mul_reg(codegendata *cd, s4 reg)
1229 *(cd->mcodeptr++) = 0xf7;
1234 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1236 *(cd->mcodeptr++) = 0xf7;
1237 emit_membase(cd, (basereg),(disp),4);
1241 void emit_idiv_reg(codegendata *cd, s4 reg)
1243 *(cd->mcodeptr++) = 0xf7;
1248 void emit_ret(codegendata *cd)
1250 *(cd->mcodeptr++) = 0xc3;
1258 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1260 *(cd->mcodeptr++) = 0xd3;
1261 emit_reg((opc),(reg));
1265 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1268 *(cd->mcodeptr++) = 0xd1;
1269 emit_reg((opc),(dreg));
1271 *(cd->mcodeptr++) = 0xc1;
1272 emit_reg((opc),(dreg));
1278 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1280 *(cd->mcodeptr++) = 0x0f;
1281 *(cd->mcodeptr++) = 0xa5;
1282 emit_reg((reg),(dreg));
1286 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1288 *(cd->mcodeptr++) = 0x0f;
1289 *(cd->mcodeptr++) = 0xa4;
1290 emit_reg((reg),(dreg));
1295 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1297 *(cd->mcodeptr++) = 0x0f;
1298 *(cd->mcodeptr++) = 0xa5;
1299 emit_membase(cd, (basereg),(disp),(reg));
1303 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1305 *(cd->mcodeptr++) = 0x0f;
1306 *(cd->mcodeptr++) = 0xad;
1307 emit_reg((reg),(dreg));
1311 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1313 *(cd->mcodeptr++) = 0x0f;
1314 *(cd->mcodeptr++) = 0xac;
1315 emit_reg((reg),(dreg));
1320 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1322 *(cd->mcodeptr++) = 0x0f;
1323 *(cd->mcodeptr++) = 0xad;
1324 emit_membase(cd, (basereg),(disp),(reg));
1332 void emit_jmp_imm(codegendata *cd, s4 imm)
1334 *(cd->mcodeptr++) = 0xe9;
1339 void emit_jmp_reg(codegendata *cd, s4 reg)
1341 *(cd->mcodeptr++) = 0xff;
1346 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1348 *(cd->mcodeptr++) = 0x0f;
1349 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1356 * conditional set operations
1358 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1360 *(cd->mcodeptr++) = 0x0f;
1361 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1366 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1368 *(cd->mcodeptr++) = 0x0f;
1369 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1370 emit_membase(cd, (basereg),(disp),0);
1374 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1376 *(cd->mcodeptr++) = 0x0f;
1377 *(cd->mcodeptr++) = 0xc1;
1378 emit_mem((reg),(mem));
1382 void emit_neg_reg(codegendata *cd, s4 reg)
1384 *(cd->mcodeptr++) = 0xf7;
1390 void emit_push_imm(codegendata *cd, s4 imm)
1392 *(cd->mcodeptr++) = 0x68;
1397 void emit_pop_reg(codegendata *cd, s4 reg)
1399 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1403 void emit_push_reg(codegendata *cd, s4 reg)
1405 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1409 void emit_nop(codegendata *cd)
1411 *(cd->mcodeptr++) = 0x90;
1415 void emit_lock(codegendata *cd)
1417 *(cd->mcodeptr++) = 0xf0;
1424 void emit_call_reg(codegendata *cd, s4 reg)
1426 *(cd->mcodeptr++) = 0xff;
1431 void emit_call_imm(codegendata *cd, s4 imm)
1433 *(cd->mcodeptr++) = 0xe8;
1440 * floating point instructions
1442 void emit_fld1(codegendata *cd)
1444 *(cd->mcodeptr++) = 0xd9;
1445 *(cd->mcodeptr++) = 0xe8;
1449 void emit_fldz(codegendata *cd)
1451 *(cd->mcodeptr++) = 0xd9;
1452 *(cd->mcodeptr++) = 0xee;
1456 void emit_fld_reg(codegendata *cd, s4 reg)
1458 *(cd->mcodeptr++) = 0xd9;
1459 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1463 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1465 *(cd->mcodeptr++) = 0xd9;
1466 emit_membase(cd, (basereg),(disp),0);
1470 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1472 *(cd->mcodeptr++) = 0xd9;
1473 emit_membase32(cd, (basereg),(disp),0);
1477 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1479 *(cd->mcodeptr++) = 0xdd;
1480 emit_membase(cd, (basereg),(disp),0);
1484 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1486 *(cd->mcodeptr++) = 0xdd;
1487 emit_membase32(cd, (basereg),(disp),0);
1491 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1493 *(cd->mcodeptr++) = 0xdb;
1494 emit_membase(cd, (basereg),(disp),5);
1498 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1500 *(cd->mcodeptr++) = 0xd9;
1501 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1505 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1507 *(cd->mcodeptr++) = 0xdd;
1508 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1512 void emit_flds_mem(codegendata *cd, s4 mem)
1514 *(cd->mcodeptr++) = 0xd9;
1519 void emit_fldl_mem(codegendata *cd, s4 mem)
1521 *(cd->mcodeptr++) = 0xdd;
1526 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1528 *(cd->mcodeptr++) = 0xdb;
1529 emit_membase(cd, (basereg),(disp),0);
1533 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1535 *(cd->mcodeptr++) = 0xdf;
1536 emit_membase(cd, (basereg),(disp),5);
1540 void emit_fst_reg(codegendata *cd, s4 reg)
1542 *(cd->mcodeptr++) = 0xdd;
1543 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1547 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1549 *(cd->mcodeptr++) = 0xd9;
1550 emit_membase(cd, (basereg),(disp),2);
1554 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1556 *(cd->mcodeptr++) = 0xdd;
1557 emit_membase(cd, (basereg),(disp),2);
1561 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1563 *(cd->mcodeptr++) = 0xd9;
1564 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1568 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1570 *(cd->mcodeptr++) = 0xdd;
1571 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1575 void emit_fstp_reg(codegendata *cd, s4 reg)
1577 *(cd->mcodeptr++) = 0xdd;
1578 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1582 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1584 *(cd->mcodeptr++) = 0xd9;
1585 emit_membase(cd, (basereg),(disp),3);
1589 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1591 *(cd->mcodeptr++) = 0xd9;
1592 emit_membase32(cd, (basereg),(disp),3);
1596 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1598 *(cd->mcodeptr++) = 0xdd;
1599 emit_membase(cd, (basereg),(disp),3);
1603 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1605 *(cd->mcodeptr++) = 0xdd;
1606 emit_membase32(cd, (basereg),(disp),3);
1610 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1612 *(cd->mcodeptr++) = 0xdb;
1613 emit_membase(cd, (basereg),(disp),7);
1617 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1619 *(cd->mcodeptr++) = 0xd9;
1620 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1624 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1626 *(cd->mcodeptr++) = 0xdd;
1627 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1631 void emit_fstps_mem(codegendata *cd, s4 mem)
1633 *(cd->mcodeptr++) = 0xd9;
1638 void emit_fstpl_mem(codegendata *cd, s4 mem)
1640 *(cd->mcodeptr++) = 0xdd;
1645 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1647 *(cd->mcodeptr++) = 0xdb;
1648 emit_membase(cd, (basereg),(disp),2);
1652 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1654 *(cd->mcodeptr++) = 0xdb;
1655 emit_membase(cd, (basereg),(disp),3);
1659 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1661 *(cd->mcodeptr++) = 0xdf;
1662 emit_membase(cd, (basereg),(disp),7);
1666 void emit_fchs(codegendata *cd)
1668 *(cd->mcodeptr++) = 0xd9;
1669 *(cd->mcodeptr++) = 0xe0;
1673 void emit_faddp(codegendata *cd)
1675 *(cd->mcodeptr++) = 0xde;
1676 *(cd->mcodeptr++) = 0xc1;
1680 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1682 *(cd->mcodeptr++) = 0xd8;
1683 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1687 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1689 *(cd->mcodeptr++) = 0xdc;
1690 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1694 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1696 *(cd->mcodeptr++) = 0xde;
1697 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1701 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1703 *(cd->mcodeptr++) = 0xd8;
1704 emit_membase(cd, (basereg),(disp),0);
1708 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1710 *(cd->mcodeptr++) = 0xdc;
1711 emit_membase(cd, (basereg),(disp),0);
1715 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1717 *(cd->mcodeptr++) = 0xd8;
1718 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1722 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1724 *(cd->mcodeptr++) = 0xdc;
1725 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1729 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1731 *(cd->mcodeptr++) = 0xde;
1732 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1736 void emit_fsubp(codegendata *cd)
1738 *(cd->mcodeptr++) = 0xde;
1739 *(cd->mcodeptr++) = 0xe9;
1743 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1745 *(cd->mcodeptr++) = 0xd8;
1746 emit_membase(cd, (basereg),(disp),4);
1750 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1752 *(cd->mcodeptr++) = 0xdc;
1753 emit_membase(cd, (basereg),(disp),4);
1757 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1759 *(cd->mcodeptr++) = 0xd8;
1760 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1764 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1766 *(cd->mcodeptr++) = 0xdc;
1767 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1771 void emit_fmulp(codegendata *cd)
1773 *(cd->mcodeptr++) = 0xde;
1774 *(cd->mcodeptr++) = 0xc9;
1778 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1780 *(cd->mcodeptr++) = 0xde;
1781 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1785 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1787 *(cd->mcodeptr++) = 0xd8;
1788 emit_membase(cd, (basereg),(disp),1);
1792 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1794 *(cd->mcodeptr++) = 0xdc;
1795 emit_membase(cd, (basereg),(disp),1);
1799 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1801 *(cd->mcodeptr++) = 0xd8;
1802 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1806 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1808 *(cd->mcodeptr++) = 0xdc;
1809 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1813 void emit_fdivp(codegendata *cd)
1815 *(cd->mcodeptr++) = 0xde;
1816 *(cd->mcodeptr++) = 0xf9;
1820 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1822 *(cd->mcodeptr++) = 0xde;
1823 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1827 void emit_fxch(codegendata *cd)
1829 *(cd->mcodeptr++) = 0xd9;
1830 *(cd->mcodeptr++) = 0xc9;
1834 void emit_fxch_reg(codegendata *cd, s4 reg)
1836 *(cd->mcodeptr++) = 0xd9;
1837 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1841 void emit_fprem(codegendata *cd)
1843 *(cd->mcodeptr++) = 0xd9;
1844 *(cd->mcodeptr++) = 0xf8;
1848 void emit_fprem1(codegendata *cd)
1850 *(cd->mcodeptr++) = 0xd9;
1851 *(cd->mcodeptr++) = 0xf5;
1855 void emit_fucom(codegendata *cd)
1857 *(cd->mcodeptr++) = 0xdd;
1858 *(cd->mcodeptr++) = 0xe1;
1862 void emit_fucom_reg(codegendata *cd, s4 reg)
1864 *(cd->mcodeptr++) = 0xdd;
1865 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1869 void emit_fucomp_reg(codegendata *cd, s4 reg)
1871 *(cd->mcodeptr++) = 0xdd;
1872 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1876 void emit_fucompp(codegendata *cd)
1878 *(cd->mcodeptr++) = 0xda;
1879 *(cd->mcodeptr++) = 0xe9;
1883 void emit_fnstsw(codegendata *cd)
1885 *(cd->mcodeptr++) = 0xdf;
1886 *(cd->mcodeptr++) = 0xe0;
1890 void emit_sahf(codegendata *cd)
1892 *(cd->mcodeptr++) = 0x9e;
1896 void emit_finit(codegendata *cd)
1898 *(cd->mcodeptr++) = 0x9b;
1899 *(cd->mcodeptr++) = 0xdb;
1900 *(cd->mcodeptr++) = 0xe3;
1904 void emit_fldcw_mem(codegendata *cd, s4 mem)
1906 *(cd->mcodeptr++) = 0xd9;
1911 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1913 *(cd->mcodeptr++) = 0xd9;
1914 emit_membase(cd, (basereg),(disp),5);
1918 void emit_wait(codegendata *cd)
1920 *(cd->mcodeptr++) = 0x9b;
1924 void emit_ffree_reg(codegendata *cd, s4 reg)
1926 *(cd->mcodeptr++) = 0xdd;
1927 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1931 void emit_fdecstp(codegendata *cd)
1933 *(cd->mcodeptr++) = 0xd9;
1934 *(cd->mcodeptr++) = 0xf6;
1938 void emit_fincstp(codegendata *cd)
1940 *(cd->mcodeptr++) = 0xd9;
1941 *(cd->mcodeptr++) = 0xf7;
1946 * These are local overrides for various environment variables in Emacs.
1947 * Please do not remove this and leave it at the end of the file, where
1948 * Emacs will automagically detect them.
1949 * ---------------------------------------------------------------------
1952 * indent-tabs-mode: t