1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "vm/jit/i386/codegen.h"
33 #include "vm/jit/i386/emit.h"
34 #include "vm/jit/i386/md-abi.h"
36 #include "mm/memory.h"
38 #include "threads/lock-common.h"
40 #include "vm/exceptions.h"
42 #include "vm/jit/abi.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/dseg.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/trace.h"
50 #include "vm/jit/trap.h"
52 #include "vmcore/options.h"
53 #include "vmcore/statistics.h"
56 /* emit_load ******************************************************************
58 Emits a possible load of an operand.
60 *******************************************************************************/
62 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
68 /* get required compiler data */
72 if (IS_INMEMORY(src->flags)) {
75 disp = src->vv.regoff;
80 M_ILD(tempreg, REG_SP, disp);
83 M_LLD(tempreg, REG_SP, disp);
86 M_FLD(tempreg, REG_SP, disp);
89 M_DLD(tempreg, REG_SP, disp);
92 vm_abort("emit_load: unknown type %d", src->type);
104 /* emit_load_low ************************************************************
106 Emits a possible load of the low 32-bits of an operand.
108 *******************************************************************************/
110 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
116 assert(src->type == TYPE_LNG);
118 /* get required compiler data */
123 if (IS_INMEMORY(src->flags)) {
126 disp = src->vv.regoff;
128 M_ILD(tempreg, REG_SP, disp);
133 reg = GET_LOW_REG(src->vv.regoff);
139 /* emit_load_high ***********************************************************
141 Emits a possible load of the high 32-bits of an operand.
143 *******************************************************************************/
145 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
151 /* get required compiler data */
153 assert(src->type == TYPE_LNG);
157 if (IS_INMEMORY(src->flags)) {
160 disp = src->vv.regoff;
162 M_ILD(tempreg, REG_SP, disp + 4);
167 reg = GET_HIGH_REG(src->vv.regoff);
173 /* emit_store ******************************************************************
175 Emits a possible store of the destination operand.
177 *******************************************************************************/
179 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
184 /* get required compiler data */
188 if (IS_INMEMORY(dst->flags)) {
191 disp = dst->vv.regoff;
196 M_IST(d, REG_SP, disp);
199 M_LST(d, REG_SP, disp);
202 M_FST(d, REG_SP, disp);
205 M_DST(d, REG_SP, disp);
208 vm_abort("emit_store: unknown type %d", dst->type);
214 /* emit_store_low **************************************************************
216 Emits a possible store of the low 32-bits of the destination
219 *******************************************************************************/
221 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
225 assert(dst->type == TYPE_LNG);
227 /* get required compiler data */
231 if (IS_INMEMORY(dst->flags)) {
233 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
238 /* emit_store_high *************************************************************
240 Emits a possible store of the high 32-bits of the destination
243 *******************************************************************************/
245 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
249 assert(dst->type == TYPE_LNG);
251 /* get required compiler data */
255 if (IS_INMEMORY(dst->flags)) {
257 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
262 /* emit_copy *******************************************************************
264 Generates a register/memory to register/memory copy.
266 *******************************************************************************/
268 void emit_copy(jitdata *jd, instruction *iptr)
275 /* get required compiler data */
279 /* get source and destination variables */
281 src = VAROP(iptr->s1);
282 dst = VAROP(iptr->dst);
284 if ((src->vv.regoff != dst->vv.regoff) ||
285 ((src->flags ^ dst->flags) & INMEMORY)) {
287 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
288 /* emit nothing, as the value won't be used anyway */
292 /* If one of the variables resides in memory, we can eliminate
293 the register move from/to the temporary register with the
294 order of getting the destination register and the load. */
296 if (IS_INMEMORY(src->flags)) {
297 if (IS_LNG_TYPE(src->type))
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 if (IS_LNG_TYPE(src->type))
306 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
308 s1 = emit_load(jd, iptr, src, REG_ITMP1);
310 d = codegen_reg_of_var(iptr->opc, dst, s1);
327 vm_abort("emit_copy: unknown type %d", src->type);
331 emit_store(jd, iptr, dst, d);
336 /* emit_branch *****************************************************************
338 Emits the code for conditional and unconditional branchs.
340 *******************************************************************************/
342 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
346 /* ATTENTION: a displacement overflow cannot happen */
348 /* check which branch to generate */
350 if (condition == BRANCH_UNCONDITIONAL) {
352 /* calculate the different displacements */
354 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
356 M_JMP_IMM(branchdisp);
359 /* calculate the different displacements */
361 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
395 vm_abort("emit_branch: unknown condition %d", condition);
401 /* emit_arithmetic_check *******************************************************
403 Emit an ArithmeticException check.
405 *******************************************************************************/
407 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
409 if (INSTRUCTION_MUST_CHECK(iptr)) {
412 M_ALD_MEM(reg, TRAP_ArithmeticException);
417 /* emit_arrayindexoutofbounds_check ********************************************
419 Emit a ArrayIndexOutOfBoundsException check.
421 *******************************************************************************/
423 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
425 if (INSTRUCTION_MUST_CHECK(iptr)) {
426 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
427 M_CMP(REG_ITMP3, s2);
429 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
434 /* emit_arraystore_check *******************************************************
436 Emit an ArrayStoreException check.
438 *******************************************************************************/
440 void emit_arraystore_check(codegendata *cd, instruction *iptr)
442 if (INSTRUCTION_MUST_CHECK(iptr)) {
445 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
450 /* emit_classcast_check ********************************************************
452 Emit a ClassCastException check.
454 *******************************************************************************/
456 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
458 if (INSTRUCTION_MUST_CHECK(iptr)) {
476 vm_abort("emit_classcast_check: unknown condition %d", condition);
478 M_ALD_MEM(s1, TRAP_ClassCastException);
483 /* emit_nullpointer_check ******************************************************
485 Emit a NullPointerException check.
487 *******************************************************************************/
489 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
491 if (INSTRUCTION_MUST_CHECK(iptr)) {
494 M_ALD_MEM(reg, TRAP_NullPointerException);
499 /* emit_exception_check ********************************************************
501 Emit an Exception check.
503 *******************************************************************************/
505 void emit_exception_check(codegendata *cd, instruction *iptr)
507 if (INSTRUCTION_MUST_CHECK(iptr)) {
510 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
515 /* emit_trap_compiler **********************************************************
517 Emit a trap instruction which calls the JIT compiler.
519 *******************************************************************************/
521 void emit_trap_compiler(codegendata *cd)
523 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
527 /* emit_trap *******************************************************************
529 Emit a trap instruction and return the original machine code.
531 *******************************************************************************/
533 uint32_t emit_trap(codegendata *cd)
537 /* Get machine code which is patched back in later. The
538 trap is 2 bytes long. */
540 mcode = *((uint16_t *) cd->mcodeptr);
543 /* XXX this breaks GDB, so we disable it for now */
544 *(cd->mcodeptr++) = 0xcc;
550 return (uint32_t) mcode;
554 /* emit_verbosecall_enter ******************************************************
556 Generates the code for the call trace.
558 *******************************************************************************/
561 void emit_verbosecall_enter(jitdata *jd)
568 int32_t stackframesize;
570 int align_off; /* offset for alignment compensation */
572 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
575 /* get required compiler data */
584 /* mark trace code */
588 /* keep stack 16-byte aligned */
590 stackframesize = 2 + TMP_CNT;
591 ALIGN_2(stackframesize);
593 M_ASUB_IMM(stackframesize * 8, REG_SP);
595 /* save temporary registers for leaf methods */
597 if (code_is_leafmethod(code)) {
598 for (i = 0; i < INT_TMP_CNT; i++)
599 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
602 /* no argument registers to save */
604 align_off = cd->stackframesize ? 4 : 0;
605 M_AST_IMM(m, REG_SP, 0 * 4);
606 M_AST_IMM(0, REG_SP, 1 * 4);
607 M_AST(REG_SP, REG_SP, 2 * 4);
608 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
609 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
612 /* no argument registers to restore */
614 /* restore temporary registers for leaf methods */
616 if (code_is_leafmethod(code)) {
617 for (i = 0; i < INT_TMP_CNT; i++)
618 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
621 M_AADD_IMM(stackframesize * 8, REG_SP);
623 /* mark trace code */
627 #endif /* !defined(NDEBUG) */
630 /* emit_verbosecall_exit *******************************************************
632 Generates the code for the call trace.
634 *******************************************************************************/
637 void emit_verbosecall_exit(jitdata *jd)
644 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
647 /* get required compiler data */
655 /* mark trace code */
659 /* keep stack 16-byte aligned */
661 M_ASUB_IMM(4 + 4 + 8, REG_SP);
663 /* save return value */
665 switch (md->returntype.type) {
668 M_IST(REG_RESULT, REG_SP, 2 * 4);
671 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
674 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
677 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
681 M_AST_IMM(m, REG_SP, 0 * 4);
682 M_AST(REG_SP, REG_SP, 1 * 4);
683 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
684 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
687 /* restore return value */
689 switch (md->returntype.type) {
692 M_ILD(REG_RESULT, REG_SP, 2 * 4);
695 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
699 M_AADD_IMM(4 + 4 + 8, REG_SP);
701 /* mark trace code */
705 #endif /* !defined(NDEBUG) */
708 /* code generation functions **************************************************/
710 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
712 if (basereg == ESP) {
714 emit_address_byte(0, dreg, ESP);
715 emit_address_byte(0, ESP, ESP);
717 else if (IS_IMM8(disp)) {
718 emit_address_byte(1, dreg, ESP);
719 emit_address_byte(0, ESP, ESP);
723 emit_address_byte(2, dreg, ESP);
724 emit_address_byte(0, ESP, ESP);
728 else if ((disp == 0) && (basereg != EBP)) {
729 emit_address_byte(0, dreg, basereg);
731 else if (IS_IMM8(disp)) {
732 emit_address_byte(1, dreg, basereg);
736 emit_address_byte(2, dreg, basereg);
742 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
744 if (basereg == ESP) {
745 emit_address_byte(2, dreg, ESP);
746 emit_address_byte(0, ESP, ESP);
750 emit_address_byte(2, dreg, basereg);
756 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
759 emit_address_byte(0, reg, 4);
760 emit_address_byte(scale, indexreg, 5);
763 else if ((disp == 0) && (basereg != EBP)) {
764 emit_address_byte(0, reg, 4);
765 emit_address_byte(scale, indexreg, basereg);
767 else if (IS_IMM8(disp)) {
768 emit_address_byte(1, reg, 4);
769 emit_address_byte(scale, indexreg, basereg);
773 emit_address_byte(2, reg, 4);
774 emit_address_byte(scale, indexreg, basereg);
780 /* low-level code emitter functions *******************************************/
782 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
784 COUNT(count_mov_reg_reg);
785 *(cd->mcodeptr++) = 0x89;
786 emit_reg((reg),(dreg));
790 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
792 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
797 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
799 *(cd->mcodeptr++) = 0xc6;
805 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
807 COUNT(count_mov_mem_reg);
808 *(cd->mcodeptr++) = 0x8b;
809 emit_membase(cd, (basereg),(disp),(reg));
814 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
815 * constant membase immediate length of 32bit
817 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
819 COUNT(count_mov_mem_reg);
820 *(cd->mcodeptr++) = 0x8b;
821 emit_membase32(cd, (basereg),(disp),(reg));
825 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
827 COUNT(count_mov_reg_mem);
828 *(cd->mcodeptr++) = 0x89;
829 emit_membase(cd, (basereg),(disp),(reg));
833 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
835 COUNT(count_mov_reg_mem);
836 *(cd->mcodeptr++) = 0x89;
837 emit_membase32(cd, (basereg),(disp),(reg));
841 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
843 COUNT(count_mov_mem_reg);
844 *(cd->mcodeptr++) = 0x8b;
845 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
849 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
851 COUNT(count_mov_reg_mem);
852 *(cd->mcodeptr++) = 0x89;
853 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
857 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
859 COUNT(count_mov_reg_mem);
860 *(cd->mcodeptr++) = 0x66;
861 *(cd->mcodeptr++) = 0x89;
862 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
866 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
868 COUNT(count_mov_reg_mem);
869 *(cd->mcodeptr++) = 0x88;
870 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
874 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
876 COUNT(count_mov_reg_mem);
877 *(cd->mcodeptr++) = 0x89;
878 emit_mem((reg),(mem));
882 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
884 COUNT(count_mov_mem_reg);
885 *(cd->mcodeptr++) = 0x8b;
886 emit_mem((dreg),(mem));
890 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
892 *(cd->mcodeptr++) = 0xc7;
898 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
900 *(cd->mcodeptr++) = 0xc7;
901 emit_membase(cd, (basereg),(disp),0);
906 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
908 *(cd->mcodeptr++) = 0xc7;
909 emit_membase32(cd, (basereg),(disp),0);
914 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
916 *(cd->mcodeptr++) = 0xc6;
917 emit_membase(cd, (basereg),(disp),0);
922 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
924 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
925 *(cd->mcodeptr++) = 0x0f;
926 *(cd->mcodeptr++) = 0xbe;
931 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
933 COUNT(count_mov_mem_reg);
934 *(cd->mcodeptr++) = 0x0f;
935 *(cd->mcodeptr++) = 0xbe;
936 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
940 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
942 *(cd->mcodeptr++) = 0x0f;
943 *(cd->mcodeptr++) = 0xbf;
948 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
950 COUNT(count_mov_mem_reg);
951 *(cd->mcodeptr++) = 0x0f;
952 *(cd->mcodeptr++) = 0xbf;
953 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
957 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
959 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
960 *(cd->mcodeptr++) = 0x0f;
961 *(cd->mcodeptr++) = 0xb6;
966 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
968 *(cd->mcodeptr++) = 0x0f;
969 *(cd->mcodeptr++) = 0xb7;
974 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
976 COUNT(count_mov_mem_reg);
977 *(cd->mcodeptr++) = 0x0f;
978 *(cd->mcodeptr++) = 0xb7;
979 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
983 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
985 *(cd->mcodeptr++) = 0xc7;
986 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
991 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
993 *(cd->mcodeptr++) = 0x66;
994 *(cd->mcodeptr++) = 0xc7;
995 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1000 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1002 *(cd->mcodeptr++) = 0xc6;
1003 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1011 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1013 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1014 emit_reg((reg),(dreg));
1018 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1020 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1021 emit_membase(cd, (basereg),(disp),(reg));
1025 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1027 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1028 emit_membase(cd, (basereg),(disp),(reg));
1032 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1035 *(cd->mcodeptr++) = 0x83;
1036 emit_reg((opc),(dreg));
1039 *(cd->mcodeptr++) = 0x81;
1040 emit_reg((opc),(dreg));
1046 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1048 *(cd->mcodeptr++) = 0x81;
1049 emit_reg((opc),(dreg));
1054 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1057 *(cd->mcodeptr++) = 0x83;
1058 emit_membase(cd, (basereg),(disp),(opc));
1061 *(cd->mcodeptr++) = 0x81;
1062 emit_membase(cd, (basereg),(disp),(opc));
1068 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1071 *(cd->mcodeptr++) = 0x83;
1072 emit_mem(opc, disp);
1075 *(cd->mcodeptr++) = 0x81;
1076 emit_mem(opc, disp);
1081 void emit_alu_memindex_reg(codegendata *cd, s4 opc, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1083 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1084 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1087 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1089 *(cd->mcodeptr++) = 0x85;
1090 emit_reg((reg),(dreg));
1094 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1096 *(cd->mcodeptr++) = 0xf7;
1104 * inc, dec operations
1106 void emit_inc_reg(codegendata *cd, s4 reg)
1108 *(cd->mcodeptr++) = 0xff;
1112 void emit_dec_mem(codegendata *cd, s4 mem)
1114 *(cd->mcodeptr++) = 0xff;
1119 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1121 *(cd->mcodeptr++) = 0x0f;
1122 *(cd->mcodeptr++) = 0xaf;
1123 emit_reg((dreg),(reg));
1127 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1129 *(cd->mcodeptr++) = 0x0f;
1130 *(cd->mcodeptr++) = 0xaf;
1131 emit_membase(cd, (basereg),(disp),(dreg));
1135 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1137 if (IS_IMM8((imm))) {
1138 *(cd->mcodeptr++) = 0x6b;
1142 *(cd->mcodeptr++) = 0x69;
1149 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1151 if (IS_IMM8((imm))) {
1152 *(cd->mcodeptr++) = 0x6b;
1153 emit_reg((dreg),(reg));
1156 *(cd->mcodeptr++) = 0x69;
1157 emit_reg((dreg),(reg));
1163 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1165 if (IS_IMM8((imm))) {
1166 *(cd->mcodeptr++) = 0x6b;
1167 emit_membase(cd, (basereg),(disp),(dreg));
1170 *(cd->mcodeptr++) = 0x69;
1171 emit_membase(cd, (basereg),(disp),(dreg));
1177 void emit_mul_reg(codegendata *cd, s4 reg)
1179 *(cd->mcodeptr++) = 0xf7;
1184 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1186 *(cd->mcodeptr++) = 0xf7;
1187 emit_membase(cd, (basereg),(disp),4);
1191 void emit_idiv_reg(codegendata *cd, s4 reg)
1193 *(cd->mcodeptr++) = 0xf7;
1202 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1204 *(cd->mcodeptr++) = 0xd3;
1205 emit_reg((opc),(reg));
1209 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1212 *(cd->mcodeptr++) = 0xd1;
1213 emit_reg((opc),(dreg));
1215 *(cd->mcodeptr++) = 0xc1;
1216 emit_reg((opc),(dreg));
1222 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1224 *(cd->mcodeptr++) = 0x0f;
1225 *(cd->mcodeptr++) = 0xa5;
1226 emit_reg((reg),(dreg));
1230 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1232 *(cd->mcodeptr++) = 0x0f;
1233 *(cd->mcodeptr++) = 0xa4;
1234 emit_reg((reg),(dreg));
1239 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1241 *(cd->mcodeptr++) = 0x0f;
1242 *(cd->mcodeptr++) = 0xa5;
1243 emit_membase(cd, (basereg),(disp),(reg));
1247 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1249 *(cd->mcodeptr++) = 0x0f;
1250 *(cd->mcodeptr++) = 0xad;
1251 emit_reg((reg),(dreg));
1255 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1257 *(cd->mcodeptr++) = 0x0f;
1258 *(cd->mcodeptr++) = 0xac;
1259 emit_reg((reg),(dreg));
1264 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1266 *(cd->mcodeptr++) = 0x0f;
1267 *(cd->mcodeptr++) = 0xad;
1268 emit_membase(cd, (basereg),(disp),(reg));
1276 void emit_jmp_imm(codegendata *cd, s4 imm)
1278 *(cd->mcodeptr++) = 0xe9;
1283 void emit_jmp_reg(codegendata *cd, s4 reg)
1285 *(cd->mcodeptr++) = 0xff;
1290 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1292 *(cd->mcodeptr++) = 0x0f;
1293 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1300 * conditional set operations
1302 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1304 *(cd->mcodeptr++) = 0x0f;
1305 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1310 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1312 *(cd->mcodeptr++) = 0x0f;
1313 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1314 emit_membase(cd, (basereg),(disp),0);
1318 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1320 *(cd->mcodeptr++) = 0x0f;
1321 *(cd->mcodeptr++) = 0xc1;
1322 emit_mem((reg),(mem));
1326 void emit_neg_reg(codegendata *cd, s4 reg)
1328 *(cd->mcodeptr++) = 0xf7;
1334 void emit_push_imm(codegendata *cd, s4 imm)
1336 *(cd->mcodeptr++) = 0x68;
1341 void emit_pop_reg(codegendata *cd, s4 reg)
1343 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1347 void emit_push_reg(codegendata *cd, s4 reg)
1349 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1353 void emit_lock(codegendata *cd)
1355 *(cd->mcodeptr++) = 0xf0;
1362 void emit_call_reg(codegendata *cd, s4 reg)
1364 *(cd->mcodeptr++) = 0xff;
1369 void emit_call_imm(codegendata *cd, s4 imm)
1371 *(cd->mcodeptr++) = 0xe8;
1378 * floating point instructions
1380 void emit_fld1(codegendata *cd)
1382 *(cd->mcodeptr++) = 0xd9;
1383 *(cd->mcodeptr++) = 0xe8;
1387 void emit_fldz(codegendata *cd)
1389 *(cd->mcodeptr++) = 0xd9;
1390 *(cd->mcodeptr++) = 0xee;
1394 void emit_fld_reg(codegendata *cd, s4 reg)
1396 *(cd->mcodeptr++) = 0xd9;
1397 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1401 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1403 *(cd->mcodeptr++) = 0xd9;
1404 emit_membase(cd, (basereg),(disp),0);
1408 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1410 *(cd->mcodeptr++) = 0xd9;
1411 emit_membase32(cd, (basereg),(disp),0);
1415 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1417 *(cd->mcodeptr++) = 0xdd;
1418 emit_membase(cd, (basereg),(disp),0);
1422 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1424 *(cd->mcodeptr++) = 0xdd;
1425 emit_membase32(cd, (basereg),(disp),0);
1429 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1431 *(cd->mcodeptr++) = 0xdb;
1432 emit_membase(cd, (basereg),(disp),5);
1436 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1438 *(cd->mcodeptr++) = 0xd9;
1439 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1443 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1445 *(cd->mcodeptr++) = 0xdd;
1446 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1450 void emit_flds_mem(codegendata *cd, s4 mem)
1452 *(cd->mcodeptr++) = 0xd9;
1457 void emit_fldl_mem(codegendata *cd, s4 mem)
1459 *(cd->mcodeptr++) = 0xdd;
1464 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1466 *(cd->mcodeptr++) = 0xdb;
1467 emit_membase(cd, (basereg),(disp),0);
1471 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1473 *(cd->mcodeptr++) = 0xdf;
1474 emit_membase(cd, (basereg),(disp),5);
1478 void emit_fst_reg(codegendata *cd, s4 reg)
1480 *(cd->mcodeptr++) = 0xdd;
1481 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1485 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1487 *(cd->mcodeptr++) = 0xd9;
1488 emit_membase(cd, (basereg),(disp),2);
1492 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1494 *(cd->mcodeptr++) = 0xdd;
1495 emit_membase(cd, (basereg),(disp),2);
1499 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1501 *(cd->mcodeptr++) = 0xd9;
1502 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1506 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1508 *(cd->mcodeptr++) = 0xdd;
1509 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1513 void emit_fstp_reg(codegendata *cd, s4 reg)
1515 *(cd->mcodeptr++) = 0xdd;
1516 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1520 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1522 *(cd->mcodeptr++) = 0xd9;
1523 emit_membase(cd, (basereg),(disp),3);
1527 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1529 *(cd->mcodeptr++) = 0xd9;
1530 emit_membase32(cd, (basereg),(disp),3);
1534 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1536 *(cd->mcodeptr++) = 0xdd;
1537 emit_membase(cd, (basereg),(disp),3);
1541 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1543 *(cd->mcodeptr++) = 0xdd;
1544 emit_membase32(cd, (basereg),(disp),3);
1548 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1550 *(cd->mcodeptr++) = 0xdb;
1551 emit_membase(cd, (basereg),(disp),7);
1555 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1557 *(cd->mcodeptr++) = 0xd9;
1558 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1562 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1564 *(cd->mcodeptr++) = 0xdd;
1565 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1569 void emit_fstps_mem(codegendata *cd, s4 mem)
1571 *(cd->mcodeptr++) = 0xd9;
1576 void emit_fstpl_mem(codegendata *cd, s4 mem)
1578 *(cd->mcodeptr++) = 0xdd;
1583 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1585 *(cd->mcodeptr++) = 0xdb;
1586 emit_membase(cd, (basereg),(disp),2);
1590 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1592 *(cd->mcodeptr++) = 0xdb;
1593 emit_membase(cd, (basereg),(disp),3);
1597 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1599 *(cd->mcodeptr++) = 0xdf;
1600 emit_membase(cd, (basereg),(disp),7);
1604 void emit_fchs(codegendata *cd)
1606 *(cd->mcodeptr++) = 0xd9;
1607 *(cd->mcodeptr++) = 0xe0;
1611 void emit_faddp(codegendata *cd)
1613 *(cd->mcodeptr++) = 0xde;
1614 *(cd->mcodeptr++) = 0xc1;
1618 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1620 *(cd->mcodeptr++) = 0xd8;
1621 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1625 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1627 *(cd->mcodeptr++) = 0xdc;
1628 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1632 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1634 *(cd->mcodeptr++) = 0xde;
1635 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1639 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1641 *(cd->mcodeptr++) = 0xd8;
1642 emit_membase(cd, (basereg),(disp),0);
1646 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1648 *(cd->mcodeptr++) = 0xdc;
1649 emit_membase(cd, (basereg),(disp),0);
1653 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1655 *(cd->mcodeptr++) = 0xd8;
1656 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1660 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1662 *(cd->mcodeptr++) = 0xdc;
1663 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1667 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1669 *(cd->mcodeptr++) = 0xde;
1670 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1674 void emit_fsubp(codegendata *cd)
1676 *(cd->mcodeptr++) = 0xde;
1677 *(cd->mcodeptr++) = 0xe9;
1681 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1683 *(cd->mcodeptr++) = 0xd8;
1684 emit_membase(cd, (basereg),(disp),4);
1688 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1690 *(cd->mcodeptr++) = 0xdc;
1691 emit_membase(cd, (basereg),(disp),4);
1695 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1697 *(cd->mcodeptr++) = 0xd8;
1698 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1702 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1704 *(cd->mcodeptr++) = 0xdc;
1705 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1709 void emit_fmulp(codegendata *cd)
1711 *(cd->mcodeptr++) = 0xde;
1712 *(cd->mcodeptr++) = 0xc9;
1716 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1718 *(cd->mcodeptr++) = 0xde;
1719 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1723 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1725 *(cd->mcodeptr++) = 0xd8;
1726 emit_membase(cd, (basereg),(disp),1);
1730 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1732 *(cd->mcodeptr++) = 0xdc;
1733 emit_membase(cd, (basereg),(disp),1);
1737 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1739 *(cd->mcodeptr++) = 0xd8;
1740 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1744 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1746 *(cd->mcodeptr++) = 0xdc;
1747 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1751 void emit_fdivp(codegendata *cd)
1753 *(cd->mcodeptr++) = 0xde;
1754 *(cd->mcodeptr++) = 0xf9;
1758 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1760 *(cd->mcodeptr++) = 0xde;
1761 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1765 void emit_fxch(codegendata *cd)
1767 *(cd->mcodeptr++) = 0xd9;
1768 *(cd->mcodeptr++) = 0xc9;
1772 void emit_fxch_reg(codegendata *cd, s4 reg)
1774 *(cd->mcodeptr++) = 0xd9;
1775 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1779 void emit_fprem(codegendata *cd)
1781 *(cd->mcodeptr++) = 0xd9;
1782 *(cd->mcodeptr++) = 0xf8;
1786 void emit_fprem1(codegendata *cd)
1788 *(cd->mcodeptr++) = 0xd9;
1789 *(cd->mcodeptr++) = 0xf5;
1793 void emit_fucom(codegendata *cd)
1795 *(cd->mcodeptr++) = 0xdd;
1796 *(cd->mcodeptr++) = 0xe1;
1800 void emit_fucom_reg(codegendata *cd, s4 reg)
1802 *(cd->mcodeptr++) = 0xdd;
1803 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1807 void emit_fucomp_reg(codegendata *cd, s4 reg)
1809 *(cd->mcodeptr++) = 0xdd;
1810 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1814 void emit_fucompp(codegendata *cd)
1816 *(cd->mcodeptr++) = 0xda;
1817 *(cd->mcodeptr++) = 0xe9;
1821 void emit_fnstsw(codegendata *cd)
1823 *(cd->mcodeptr++) = 0xdf;
1824 *(cd->mcodeptr++) = 0xe0;
1828 void emit_sahf(codegendata *cd)
1830 *(cd->mcodeptr++) = 0x9e;
1834 void emit_finit(codegendata *cd)
1836 *(cd->mcodeptr++) = 0x9b;
1837 *(cd->mcodeptr++) = 0xdb;
1838 *(cd->mcodeptr++) = 0xe3;
1842 void emit_fldcw_mem(codegendata *cd, s4 mem)
1844 *(cd->mcodeptr++) = 0xd9;
1849 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1851 *(cd->mcodeptr++) = 0xd9;
1852 emit_membase(cd, (basereg),(disp),5);
1856 void emit_wait(codegendata *cd)
1858 *(cd->mcodeptr++) = 0x9b;
1862 void emit_ffree_reg(codegendata *cd, s4 reg)
1864 *(cd->mcodeptr++) = 0xdd;
1865 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1869 void emit_fdecstp(codegendata *cd)
1871 *(cd->mcodeptr++) = 0xd9;
1872 *(cd->mcodeptr++) = 0xf6;
1876 void emit_fincstp(codegendata *cd)
1878 *(cd->mcodeptr++) = 0xd9;
1879 *(cd->mcodeptr++) = 0xf7;
1882 #if defined(ENABLE_ESCAPE_CHECK)
1883 void emit_escape_check(codegendata *cd, s4 reg) {
1885 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1887 M_IADD_IMM(4, REG_SP);
1892 * These are local overrides for various environment variables in Emacs.
1893 * Please do not remove this and leave it at the end of the file, where
1894 * Emacs will automagically detect them.
1895 * ---------------------------------------------------------------------
1898 * indent-tabs-mode: t