1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 5562 2006-09-28 20:13:20Z edwin $
42 #include "vm/jit/i386/codegen.h"
43 #include "vm/jit/i386/emit.h"
44 #include "vm/jit/i386/md-abi.h"
46 #if defined(ENABLE_THREADS)
47 # include "threads/native/lock.h"
50 #include "vm/builtin.h"
51 #include "vm/statistics.h"
52 #include "vm/jit/asmpart.h"
53 #include "vm/jit/dseg.h"
54 #include "vm/jit/emit-common.h"
55 #include "vm/jit/jit.h"
56 #include "vm/jit/replace.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
71 /* get required compiler data */
75 if (IS_INMEMORY(src->flags)) {
78 disp = src->vv.regoff * 4;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
102 /* emit_load_low ************************************************************
104 Emits a possible load of the low 32-bits of an operand.
106 *******************************************************************************/
108 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
121 if (IS_INMEMORY(src->flags)) {
124 disp = src->vv.regoff * 4;
126 M_ILD(tempreg, REG_SP, disp);
131 reg = GET_LOW_REG(src->vv.regoff);
137 /* emit_load_high ***********************************************************
139 Emits a possible load of the high 32-bits of an operand.
141 *******************************************************************************/
143 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
149 /* get required compiler data */
151 assert(src->type == TYPE_LNG);
155 if (IS_INMEMORY(src->flags)) {
158 disp = src->vv.regoff * 4;
160 M_ILD(tempreg, REG_SP, disp + 4);
165 reg = GET_HIGH_REG(src->vv.regoff);
171 /* emit_store ******************************************************************
173 Emits a possible store of the destination operand.
175 *******************************************************************************/
177 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
181 /* get required compiler data */
185 if (IS_INMEMORY(dst->flags)) {
188 if (IS_FLT_DBL_TYPE(dst->type)) {
189 if (IS_2_WORD_TYPE(dst->type))
190 M_DST(d, REG_SP, dst->vv.regoff * 4);
192 M_FST(d, REG_SP, dst->vv.regoff * 4);
195 if (IS_2_WORD_TYPE(dst->type))
196 M_LST(d, REG_SP, dst->vv.regoff * 4);
198 M_IST(d, REG_SP, dst->vv.regoff * 4);
204 /* emit_store_low **************************************************************
206 Emits a possible store of the low 32-bits of the destination
209 *******************************************************************************/
211 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
215 assert(dst->type == TYPE_LNG);
217 /* get required compiler data */
221 if (IS_INMEMORY(dst->flags)) {
223 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
228 /* emit_store_high *************************************************************
230 Emits a possible store of the high 32-bits of the destination
233 *******************************************************************************/
235 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
239 assert(dst->type == TYPE_LNG);
241 /* get required compiler data */
245 if (IS_INMEMORY(dst->flags)) {
247 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
252 /* emit_copy *******************************************************************
254 Generates a register/memory to register/memory copy.
256 *******************************************************************************/
258 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
263 /* get required compiler data */
267 if ((src->vv.regoff != dst->vv.regoff) ||
268 ((src->flags ^ dst->flags) & INMEMORY)) {
270 /* If one of the variables resides in memory, we can eliminate
271 the register move from/to the temporary register with the
272 order of getting the destination register and the load. */
274 if (IS_INMEMORY(src->flags)) {
275 if (IS_LNG_TYPE(src->type))
276 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
278 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
280 s1 = emit_load(jd, iptr, src, d);
283 if (IS_LNG_TYPE(src->type))
284 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
286 s1 = emit_load(jd, iptr, src, REG_ITMP1);
288 d = codegen_reg_of_var(iptr->opc, dst, s1);
292 if (IS_FLT_DBL_TYPE(src->type)) {
295 if (IS_2_WORD_TYPE(src->type))
302 emit_store(jd, iptr, dst, d);
307 /* emit_exception_stubs ********************************************************
309 Generates the code for the exception stubs.
311 *******************************************************************************/
313 void emit_exception_stubs(jitdata *jd)
320 /* get required compiler data */
325 /* generate exception stubs */
329 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
330 gen_resolvebranch(cd->mcodebase + eref->branchpos,
332 cd->mcodeptr - cd->mcodebase);
336 /* Check if the exception is an
337 ArrayIndexOutOfBoundsException. If so, move index register
341 M_INTMOVE(eref->reg, REG_ITMP1);
343 /* calcuate exception address */
345 M_MOV_IMM(0, REG_ITMP2_XPC);
347 M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
349 /* move function to call into REG_ITMP3 */
351 M_MOV_IMM(eref->function, REG_ITMP3);
353 if (targetdisp == 0) {
354 targetdisp = cd->mcodeptr - cd->mcodebase;
356 M_ASUB_IMM(5 * 4, REG_SP);
358 /* first store REG_ITMP1 so we can use it */
360 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
362 M_AST_IMM(0, REG_SP, 0 * 4);
364 M_MOV(REG_SP, REG_ITMP1);
365 M_AADD_IMM(5 * 4, REG_ITMP1);
366 M_AST(REG_ITMP1, REG_SP, 1 * 4);
367 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
368 M_AST(REG_ITMP1, REG_SP, 2 * 4);
369 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
373 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
374 M_AADD_IMM(5 * 4, REG_SP);
376 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
380 M_JMP_IMM((cd->mcodebase + targetdisp) -
381 (cd->mcodeptr + PATCHER_CALL_SIZE));
387 /* emit_patcher_stubs **********************************************************
389 Generates the code for the patcher stubs.
391 *******************************************************************************/
393 void emit_patcher_stubs(jitdata *jd)
403 /* get required compiler data */
407 /* generate code patching stub call code */
411 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
412 /* check code segment size */
416 /* Get machine code which is patched back in later. A
417 `call rel32' is 5 bytes long. */
419 savedmcodeptr = cd->mcodebase + pref->branchpos;
420 mcode = *((u8 *) savedmcodeptr);
422 /* patch in `call rel32' to call the following code */
424 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
425 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
427 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
429 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
435 /* move pointer to java_objectheader onto stack */
437 #if defined(ENABLE_THREADS)
438 (void) dseg_addaddress(cd, NULL); /* flcword */
439 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
440 disp = dseg_addaddress(cd, NULL); /* vftbl */
442 M_MOV_IMM(0, REG_ITMP3);
444 M_AADD_IMM(disp, REG_ITMP3);
450 /* move machine code bytes and classinfo pointer into registers */
452 M_PUSH_IMM(mcode >> 32);
454 M_PUSH_IMM(pref->ref);
455 M_PUSH_IMM(pref->patcher);
457 if (targetdisp == 0) {
458 targetdisp = cd->mcodeptr - cd->mcodebase;
460 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
464 M_JMP_IMM((cd->mcodebase + targetdisp) -
465 (cd->mcodeptr + PATCHER_CALL_SIZE));
471 /* emit_replacement_stubs ******************************************************
473 Generates the code for the replacement stubs.
475 *******************************************************************************/
477 void emit_replacement_stubs(jitdata *jd)
485 /* get required compiler data */
490 rplp = code->rplpoints;
492 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
493 /* check code segment size */
497 /* note start of stub code */
499 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
501 /* make machine code for patching */
503 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
505 rplp->mcode = 0xe9 | ((u8) disp << 8);
507 /* push address of `rplpoint` struct */
511 /* jump to replacement function */
513 M_PUSH_IMM(asm_replacement_out);
519 /* emit_verbosecall_enter ******************************************************
521 Generates the code for the call trace.
523 *******************************************************************************/
526 void emit_verbosecall_enter(jitdata *jd)
535 /* get required compiler data */
543 /* mark trace code */
547 /* methodinfo* + arguments + return address */
549 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
550 cd->stackframesize * 4 + 4;
552 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
554 /* save temporary registers for leaf methods */
556 for (i = 0; i < INT_TMP_CNT; i++)
557 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
559 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
560 t = md->paramtypes[i].type;
562 if (IS_INT_LNG_TYPE(t)) {
563 if (IS_2_WORD_TYPE(t)) {
564 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
565 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
567 else if (IS_ADR_TYPE(t)) {
568 M_ALD(REG_ITMP1, REG_SP, disp);
569 M_AST(REG_ITMP1, REG_SP, i * 8);
570 M_IST_IMM(0, REG_SP, i * 8 + 4);
573 M_ILD(EAX, REG_SP, disp);
575 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
579 if (IS_2_WORD_TYPE(t)) {
580 M_DLD(REG_NULL, REG_SP, disp);
581 M_DST(REG_NULL, REG_SP, i * 8);
584 M_FLD(REG_NULL, REG_SP, disp);
585 M_FST(REG_NULL, REG_SP, i * 8);
586 M_IST_IMM(0, REG_SP, i * 8 + 4);
590 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
593 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
595 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
598 /* restore temporary registers for leaf methods */
600 for (i = 0; i < INT_TMP_CNT; i++)
601 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
603 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
605 /* mark trace code */
609 #endif /* !defined(NDEBUG) */
612 /* emit_verbosecall_exit *******************************************************
614 Generates the code for the call trace.
616 *******************************************************************************/
619 void emit_verbosecall_exit(jitdata *jd)
625 /* get required compiler data */
631 /* mark trace code */
635 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
637 M_AST_IMM(m, REG_SP, 0 * 4);
639 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
641 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
642 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
644 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
647 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
649 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
651 /* mark trace code */
655 #endif /* !defined(NDEBUG) */
658 /* code generation functions **************************************************/
660 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
662 if (basereg == ESP) {
664 emit_address_byte(0, dreg, ESP);
665 emit_address_byte(0, ESP, ESP);
667 else if (IS_IMM8(disp)) {
668 emit_address_byte(1, dreg, ESP);
669 emit_address_byte(0, ESP, ESP);
673 emit_address_byte(2, dreg, ESP);
674 emit_address_byte(0, ESP, ESP);
678 else if ((disp == 0) && (basereg != EBP)) {
679 emit_address_byte(0, dreg, basereg);
681 else if (IS_IMM8(disp)) {
682 emit_address_byte(1, dreg, basereg);
686 emit_address_byte(2, dreg, basereg);
692 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
694 if (basereg == ESP) {
695 emit_address_byte(2, dreg, ESP);
696 emit_address_byte(0, ESP, ESP);
700 emit_address_byte(2, dreg, basereg);
706 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
709 emit_address_byte(0, reg, 4);
710 emit_address_byte(scale, indexreg, 5);
713 else if ((disp == 0) && (basereg != EBP)) {
714 emit_address_byte(0, reg, 4);
715 emit_address_byte(scale, indexreg, basereg);
717 else if (IS_IMM8(disp)) {
718 emit_address_byte(1, reg, 4);
719 emit_address_byte(scale, indexreg, basereg);
723 emit_address_byte(2, reg, 4);
724 emit_address_byte(scale, indexreg, basereg);
730 /* low-level code emitter functions *******************************************/
732 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
734 COUNT(count_mov_reg_reg);
735 *(cd->mcodeptr++) = 0x89;
736 emit_reg((reg),(dreg));
740 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
742 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
747 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
749 *(cd->mcodeptr++) = 0xc6;
755 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
757 COUNT(count_mov_mem_reg);
758 *(cd->mcodeptr++) = 0x8b;
759 emit_membase(cd, (basereg),(disp),(reg));
764 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
765 * constant membase immediate length of 32bit
767 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
769 COUNT(count_mov_mem_reg);
770 *(cd->mcodeptr++) = 0x8b;
771 emit_membase32(cd, (basereg),(disp),(reg));
775 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
777 COUNT(count_mov_reg_mem);
778 *(cd->mcodeptr++) = 0x89;
779 emit_membase(cd, (basereg),(disp),(reg));
783 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
785 COUNT(count_mov_reg_mem);
786 *(cd->mcodeptr++) = 0x89;
787 emit_membase32(cd, (basereg),(disp),(reg));
791 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
793 COUNT(count_mov_mem_reg);
794 *(cd->mcodeptr++) = 0x8b;
795 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
799 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
801 COUNT(count_mov_reg_mem);
802 *(cd->mcodeptr++) = 0x89;
803 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
807 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
809 COUNT(count_mov_reg_mem);
810 *(cd->mcodeptr++) = 0x66;
811 *(cd->mcodeptr++) = 0x89;
812 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
816 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
818 COUNT(count_mov_reg_mem);
819 *(cd->mcodeptr++) = 0x88;
820 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
824 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
826 COUNT(count_mov_reg_mem);
827 *(cd->mcodeptr++) = 0x89;
828 emit_mem((reg),(mem));
832 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
834 COUNT(count_mov_mem_reg);
835 *(cd->mcodeptr++) = 0x8b;
836 emit_mem((dreg),(mem));
840 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
842 *(cd->mcodeptr++) = 0xc7;
848 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
850 *(cd->mcodeptr++) = 0xc7;
851 emit_membase(cd, (basereg),(disp),0);
856 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
858 *(cd->mcodeptr++) = 0xc7;
859 emit_membase32(cd, (basereg),(disp),0);
864 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
866 *(cd->mcodeptr++) = 0xc6;
867 emit_membase(cd, (basereg),(disp),0);
872 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
874 COUNT(count_mov_mem_reg);
875 *(cd->mcodeptr++) = 0x0f;
876 *(cd->mcodeptr++) = 0xbe;
877 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
881 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
883 *(cd->mcodeptr++) = 0x0f;
884 *(cd->mcodeptr++) = 0xbf;
889 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
891 COUNT(count_mov_mem_reg);
892 *(cd->mcodeptr++) = 0x0f;
893 *(cd->mcodeptr++) = 0xbf;
894 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
898 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
900 *(cd->mcodeptr++) = 0x0f;
901 *(cd->mcodeptr++) = 0xb7;
906 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
908 COUNT(count_mov_mem_reg);
909 *(cd->mcodeptr++) = 0x0f;
910 *(cd->mcodeptr++) = 0xb7;
911 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
915 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
917 *(cd->mcodeptr++) = 0xc7;
918 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
923 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
925 *(cd->mcodeptr++) = 0x66;
926 *(cd->mcodeptr++) = 0xc7;
927 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
932 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
934 *(cd->mcodeptr++) = 0xc6;
935 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
943 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
945 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
946 emit_reg((reg),(dreg));
950 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
952 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
953 emit_membase(cd, (basereg),(disp),(reg));
957 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
959 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
960 emit_membase(cd, (basereg),(disp),(reg));
964 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
967 *(cd->mcodeptr++) = 0x83;
968 emit_reg((opc),(dreg));
971 *(cd->mcodeptr++) = 0x81;
972 emit_reg((opc),(dreg));
978 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
980 *(cd->mcodeptr++) = 0x81;
981 emit_reg((opc),(dreg));
986 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
989 *(cd->mcodeptr++) = 0x83;
990 emit_membase(cd, (basereg),(disp),(opc));
993 *(cd->mcodeptr++) = 0x81;
994 emit_membase(cd, (basereg),(disp),(opc));
1000 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1002 *(cd->mcodeptr++) = 0x85;
1003 emit_reg((reg),(dreg));
1007 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1009 *(cd->mcodeptr++) = 0xf7;
1017 * inc, dec operations
1019 void emit_dec_mem(codegendata *cd, s4 mem)
1021 *(cd->mcodeptr++) = 0xff;
1026 void emit_cltd(codegendata *cd)
1028 *(cd->mcodeptr++) = 0x99;
1032 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1034 *(cd->mcodeptr++) = 0x0f;
1035 *(cd->mcodeptr++) = 0xaf;
1036 emit_reg((dreg),(reg));
1040 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1042 *(cd->mcodeptr++) = 0x0f;
1043 *(cd->mcodeptr++) = 0xaf;
1044 emit_membase(cd, (basereg),(disp),(dreg));
1048 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1050 if (IS_IMM8((imm))) {
1051 *(cd->mcodeptr++) = 0x6b;
1055 *(cd->mcodeptr++) = 0x69;
1062 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1064 if (IS_IMM8((imm))) {
1065 *(cd->mcodeptr++) = 0x6b;
1066 emit_reg((dreg),(reg));
1069 *(cd->mcodeptr++) = 0x69;
1070 emit_reg((dreg),(reg));
1076 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1078 if (IS_IMM8((imm))) {
1079 *(cd->mcodeptr++) = 0x6b;
1080 emit_membase(cd, (basereg),(disp),(dreg));
1083 *(cd->mcodeptr++) = 0x69;
1084 emit_membase(cd, (basereg),(disp),(dreg));
1090 void emit_mul_reg(codegendata *cd, s4 reg)
1092 *(cd->mcodeptr++) = 0xf7;
1097 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1099 *(cd->mcodeptr++) = 0xf7;
1100 emit_membase(cd, (basereg),(disp),4);
1104 void emit_idiv_reg(codegendata *cd, s4 reg)
1106 *(cd->mcodeptr++) = 0xf7;
1111 void emit_ret(codegendata *cd)
1113 *(cd->mcodeptr++) = 0xc3;
1121 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1123 *(cd->mcodeptr++) = 0xd3;
1124 emit_reg((opc),(reg));
1128 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1131 *(cd->mcodeptr++) = 0xd1;
1132 emit_reg((opc),(dreg));
1134 *(cd->mcodeptr++) = 0xc1;
1135 emit_reg((opc),(dreg));
1141 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1143 *(cd->mcodeptr++) = 0x0f;
1144 *(cd->mcodeptr++) = 0xa5;
1145 emit_reg((reg),(dreg));
1149 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1151 *(cd->mcodeptr++) = 0x0f;
1152 *(cd->mcodeptr++) = 0xa4;
1153 emit_reg((reg),(dreg));
1158 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1160 *(cd->mcodeptr++) = 0x0f;
1161 *(cd->mcodeptr++) = 0xa5;
1162 emit_membase(cd, (basereg),(disp),(reg));
1166 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1168 *(cd->mcodeptr++) = 0x0f;
1169 *(cd->mcodeptr++) = 0xad;
1170 emit_reg((reg),(dreg));
1174 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1176 *(cd->mcodeptr++) = 0x0f;
1177 *(cd->mcodeptr++) = 0xac;
1178 emit_reg((reg),(dreg));
1183 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1185 *(cd->mcodeptr++) = 0x0f;
1186 *(cd->mcodeptr++) = 0xad;
1187 emit_membase(cd, (basereg),(disp),(reg));
1195 void emit_jmp_imm(codegendata *cd, s4 imm)
1197 *(cd->mcodeptr++) = 0xe9;
1202 void emit_jmp_reg(codegendata *cd, s4 reg)
1204 *(cd->mcodeptr++) = 0xff;
1209 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1211 *(cd->mcodeptr++) = 0x0f;
1212 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1219 * conditional set operations
1221 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1223 *(cd->mcodeptr++) = 0x0f;
1224 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1229 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1231 *(cd->mcodeptr++) = 0x0f;
1232 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1233 emit_membase(cd, (basereg),(disp),0);
1237 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1239 *(cd->mcodeptr++) = 0x0f;
1240 *(cd->mcodeptr++) = 0xc1;
1241 emit_mem((reg),(mem));
1245 void emit_neg_reg(codegendata *cd, s4 reg)
1247 *(cd->mcodeptr++) = 0xf7;
1253 void emit_push_imm(codegendata *cd, s4 imm)
1255 *(cd->mcodeptr++) = 0x68;
1260 void emit_pop_reg(codegendata *cd, s4 reg)
1262 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1266 void emit_push_reg(codegendata *cd, s4 reg)
1268 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1272 void emit_nop(codegendata *cd)
1274 *(cd->mcodeptr++) = 0x90;
1278 void emit_lock(codegendata *cd)
1280 *(cd->mcodeptr++) = 0xf0;
1287 void emit_call_reg(codegendata *cd, s4 reg)
1289 *(cd->mcodeptr++) = 0xff;
1294 void emit_call_imm(codegendata *cd, s4 imm)
1296 *(cd->mcodeptr++) = 0xe8;
1303 * floating point instructions
1305 void emit_fld1(codegendata *cd)
1307 *(cd->mcodeptr++) = 0xd9;
1308 *(cd->mcodeptr++) = 0xe8;
1312 void emit_fldz(codegendata *cd)
1314 *(cd->mcodeptr++) = 0xd9;
1315 *(cd->mcodeptr++) = 0xee;
1319 void emit_fld_reg(codegendata *cd, s4 reg)
1321 *(cd->mcodeptr++) = 0xd9;
1322 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1326 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1328 *(cd->mcodeptr++) = 0xd9;
1329 emit_membase(cd, (basereg),(disp),0);
1333 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1335 *(cd->mcodeptr++) = 0xd9;
1336 emit_membase32(cd, (basereg),(disp),0);
1340 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1342 *(cd->mcodeptr++) = 0xdd;
1343 emit_membase(cd, (basereg),(disp),0);
1347 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1349 *(cd->mcodeptr++) = 0xdd;
1350 emit_membase32(cd, (basereg),(disp),0);
1354 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1356 *(cd->mcodeptr++) = 0xdb;
1357 emit_membase(cd, (basereg),(disp),5);
1361 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1363 *(cd->mcodeptr++) = 0xd9;
1364 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1368 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1370 *(cd->mcodeptr++) = 0xdd;
1371 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1375 void emit_flds_mem(codegendata *cd, s4 mem)
1377 *(cd->mcodeptr++) = 0xd9;
1382 void emit_fldl_mem(codegendata *cd, s4 mem)
1384 *(cd->mcodeptr++) = 0xdd;
1389 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1391 *(cd->mcodeptr++) = 0xdb;
1392 emit_membase(cd, (basereg),(disp),0);
1396 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1398 *(cd->mcodeptr++) = 0xdf;
1399 emit_membase(cd, (basereg),(disp),5);
1403 void emit_fst_reg(codegendata *cd, s4 reg)
1405 *(cd->mcodeptr++) = 0xdd;
1406 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1410 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1412 *(cd->mcodeptr++) = 0xd9;
1413 emit_membase(cd, (basereg),(disp),2);
1417 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1419 *(cd->mcodeptr++) = 0xdd;
1420 emit_membase(cd, (basereg),(disp),2);
1424 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1426 *(cd->mcodeptr++) = 0xd9;
1427 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1431 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1433 *(cd->mcodeptr++) = 0xdd;
1434 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1438 void emit_fstp_reg(codegendata *cd, s4 reg)
1440 *(cd->mcodeptr++) = 0xdd;
1441 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1445 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1447 *(cd->mcodeptr++) = 0xd9;
1448 emit_membase(cd, (basereg),(disp),3);
1452 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1454 *(cd->mcodeptr++) = 0xd9;
1455 emit_membase32(cd, (basereg),(disp),3);
1459 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1461 *(cd->mcodeptr++) = 0xdd;
1462 emit_membase(cd, (basereg),(disp),3);
1466 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1468 *(cd->mcodeptr++) = 0xdd;
1469 emit_membase32(cd, (basereg),(disp),3);
1473 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1475 *(cd->mcodeptr++) = 0xdb;
1476 emit_membase(cd, (basereg),(disp),7);
1480 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1482 *(cd->mcodeptr++) = 0xd9;
1483 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1487 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1489 *(cd->mcodeptr++) = 0xdd;
1490 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1494 void emit_fstps_mem(codegendata *cd, s4 mem)
1496 *(cd->mcodeptr++) = 0xd9;
1501 void emit_fstpl_mem(codegendata *cd, s4 mem)
1503 *(cd->mcodeptr++) = 0xdd;
1508 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1510 *(cd->mcodeptr++) = 0xdb;
1511 emit_membase(cd, (basereg),(disp),2);
1515 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1517 *(cd->mcodeptr++) = 0xdb;
1518 emit_membase(cd, (basereg),(disp),3);
1522 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1524 *(cd->mcodeptr++) = 0xdf;
1525 emit_membase(cd, (basereg),(disp),7);
1529 void emit_fchs(codegendata *cd)
1531 *(cd->mcodeptr++) = 0xd9;
1532 *(cd->mcodeptr++) = 0xe0;
1536 void emit_faddp(codegendata *cd)
1538 *(cd->mcodeptr++) = 0xde;
1539 *(cd->mcodeptr++) = 0xc1;
1543 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1545 *(cd->mcodeptr++) = 0xd8;
1546 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1550 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1552 *(cd->mcodeptr++) = 0xdc;
1553 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1557 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1559 *(cd->mcodeptr++) = 0xde;
1560 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1564 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1566 *(cd->mcodeptr++) = 0xd8;
1567 emit_membase(cd, (basereg),(disp),0);
1571 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1573 *(cd->mcodeptr++) = 0xdc;
1574 emit_membase(cd, (basereg),(disp),0);
1578 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1580 *(cd->mcodeptr++) = 0xd8;
1581 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1585 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1587 *(cd->mcodeptr++) = 0xdc;
1588 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1592 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1594 *(cd->mcodeptr++) = 0xde;
1595 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1599 void emit_fsubp(codegendata *cd)
1601 *(cd->mcodeptr++) = 0xde;
1602 *(cd->mcodeptr++) = 0xe9;
1606 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1608 *(cd->mcodeptr++) = 0xd8;
1609 emit_membase(cd, (basereg),(disp),4);
1613 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1615 *(cd->mcodeptr++) = 0xdc;
1616 emit_membase(cd, (basereg),(disp),4);
1620 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1622 *(cd->mcodeptr++) = 0xd8;
1623 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1627 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1629 *(cd->mcodeptr++) = 0xdc;
1630 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1634 void emit_fmulp(codegendata *cd)
1636 *(cd->mcodeptr++) = 0xde;
1637 *(cd->mcodeptr++) = 0xc9;
1641 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1643 *(cd->mcodeptr++) = 0xde;
1644 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1648 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1650 *(cd->mcodeptr++) = 0xd8;
1651 emit_membase(cd, (basereg),(disp),1);
1655 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1657 *(cd->mcodeptr++) = 0xdc;
1658 emit_membase(cd, (basereg),(disp),1);
1662 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1664 *(cd->mcodeptr++) = 0xd8;
1665 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1669 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1671 *(cd->mcodeptr++) = 0xdc;
1672 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1676 void emit_fdivp(codegendata *cd)
1678 *(cd->mcodeptr++) = 0xde;
1679 *(cd->mcodeptr++) = 0xf9;
1683 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1685 *(cd->mcodeptr++) = 0xde;
1686 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1690 void emit_fxch(codegendata *cd)
1692 *(cd->mcodeptr++) = 0xd9;
1693 *(cd->mcodeptr++) = 0xc9;
1697 void emit_fxch_reg(codegendata *cd, s4 reg)
1699 *(cd->mcodeptr++) = 0xd9;
1700 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1704 void emit_fprem(codegendata *cd)
1706 *(cd->mcodeptr++) = 0xd9;
1707 *(cd->mcodeptr++) = 0xf8;
1711 void emit_fprem1(codegendata *cd)
1713 *(cd->mcodeptr++) = 0xd9;
1714 *(cd->mcodeptr++) = 0xf5;
1718 void emit_fucom(codegendata *cd)
1720 *(cd->mcodeptr++) = 0xdd;
1721 *(cd->mcodeptr++) = 0xe1;
1725 void emit_fucom_reg(codegendata *cd, s4 reg)
1727 *(cd->mcodeptr++) = 0xdd;
1728 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1732 void emit_fucomp_reg(codegendata *cd, s4 reg)
1734 *(cd->mcodeptr++) = 0xdd;
1735 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1739 void emit_fucompp(codegendata *cd)
1741 *(cd->mcodeptr++) = 0xda;
1742 *(cd->mcodeptr++) = 0xe9;
1746 void emit_fnstsw(codegendata *cd)
1748 *(cd->mcodeptr++) = 0xdf;
1749 *(cd->mcodeptr++) = 0xe0;
1753 void emit_sahf(codegendata *cd)
1755 *(cd->mcodeptr++) = 0x9e;
1759 void emit_finit(codegendata *cd)
1761 *(cd->mcodeptr++) = 0x9b;
1762 *(cd->mcodeptr++) = 0xdb;
1763 *(cd->mcodeptr++) = 0xe3;
1767 void emit_fldcw_mem(codegendata *cd, s4 mem)
1769 *(cd->mcodeptr++) = 0xd9;
1774 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1776 *(cd->mcodeptr++) = 0xd9;
1777 emit_membase(cd, (basereg),(disp),5);
1781 void emit_wait(codegendata *cd)
1783 *(cd->mcodeptr++) = 0x9b;
1787 void emit_ffree_reg(codegendata *cd, s4 reg)
1789 *(cd->mcodeptr++) = 0xdd;
1790 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1794 void emit_fdecstp(codegendata *cd)
1796 *(cd->mcodeptr++) = 0xd9;
1797 *(cd->mcodeptr++) = 0xf6;
1801 void emit_fincstp(codegendata *cd)
1803 *(cd->mcodeptr++) = 0xd9;
1804 *(cd->mcodeptr++) = 0xf7;
1809 * These are local overrides for various environment variables in Emacs.
1810 * Please do not remove this and leave it at the end of the file, where
1811 * Emacs will automagically detect them.
1812 * ---------------------------------------------------------------------
1815 * indent-tabs-mode: t