1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 5275 2006-08-24 18:42:48Z twisti $
42 #include "vm/jit/i386/md-abi.h"
43 #include "vm/jit/i386/md-emit.h"
44 #include "vm/jit/i386/codegen.h"
46 #if defined(ENABLE_THREADS)
47 # include "threads/native/lock.h"
50 #include "vm/statistics.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/dseg.h"
53 #include "vm/jit/emit.h"
54 #include "vm/jit/jit.h"
57 /* emit_load_s1 ****************************************************************
59 Emits a possible load of the first source operand.
61 *******************************************************************************/
63 s4 emit_load_s1(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
69 /* get required compiler data */
73 if (src->flags & INMEMORY) {
76 disp = src->regoff * 4;
78 if (IS_FLT_DBL_TYPE(src->type)) {
79 if (IS_2_WORD_TYPE(src->type))
80 M_DLD(tempreg, REG_SP, disp);
82 M_FLD(tempreg, REG_SP, disp);
85 if (IS_2_WORD_TYPE(src->type))
86 M_LLD(tempreg, REG_SP, disp);
88 M_ILD(tempreg, REG_SP, disp);
100 /* emit_load_s2 ****************************************************************
102 Emits a possible load of the second source operand.
104 *******************************************************************************/
106 s4 emit_load_s2(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
112 /* get required compiler data */
116 if (src->flags & INMEMORY) {
119 disp = src->regoff * 4;
121 if (IS_FLT_DBL_TYPE(src->type)) {
122 if (IS_2_WORD_TYPE(src->type))
123 M_DLD(tempreg, REG_SP, disp);
125 M_FLD(tempreg, REG_SP, disp);
128 if (IS_2_WORD_TYPE(src->type))
129 M_LLD(tempreg, REG_SP, disp);
131 M_ILD(tempreg, REG_SP, disp);
143 /* emit_load_s3 ****************************************************************
145 Emits a possible load of the third source operand.
147 *******************************************************************************/
149 s4 emit_load_s3(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
155 /* get required compiler data */
159 if (src->flags & INMEMORY) {
162 disp = src->regoff * 4;
164 if (IS_FLT_DBL_TYPE(src->type)) {
165 if (IS_2_WORD_TYPE(src->type))
166 M_DLD(tempreg, REG_SP, disp);
168 M_FLD(tempreg, REG_SP, disp);
171 if (IS_2_WORD_TYPE(src->type))
172 M_LLD(tempreg, REG_SP, disp);
174 M_ILD(tempreg, REG_SP, disp);
186 /* emit_load_s1_low ************************************************************
188 Emits a possible load of the low 32-bits of the first long source
191 *******************************************************************************/
193 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
199 assert(src->type == TYPE_LNG);
201 /* get required compiler data */
205 if (src->flags & INMEMORY) {
208 disp = src->regoff * 4;
210 M_ILD(tempreg, REG_SP, disp);
215 reg = GET_LOW_REG(src->regoff);
221 /* emit_load_s2_low ************************************************************
223 Emits a possible load of the low 32-bits of the second long source
226 *******************************************************************************/
228 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
234 assert(src->type == TYPE_LNG);
236 /* get required compiler data */
240 if (src->flags & INMEMORY) {
243 disp = src->regoff * 4;
245 M_ILD(tempreg, REG_SP, disp);
250 reg = GET_LOW_REG(src->regoff);
256 /* emit_load_s1_high ***********************************************************
258 Emits a possible load of the high 32-bits of the first long source
261 *******************************************************************************/
263 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
269 assert(src->type == TYPE_LNG);
271 /* get required compiler data */
275 if (src->flags & INMEMORY) {
278 disp = src->regoff * 4;
280 M_ILD(tempreg, REG_SP, disp + 4);
285 reg = GET_HIGH_REG(src->regoff);
291 /* emit_load_s2_high ***********************************************************
293 Emits a possible load of the high 32-bits of the second long source
296 *******************************************************************************/
298 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
304 assert(src->type == TYPE_LNG);
306 /* get required compiler data */
310 if (src->flags & INMEMORY) {
313 disp = src->regoff * 4;
315 M_ILD(tempreg, REG_SP, disp + 4);
319 reg = GET_HIGH_REG(src->regoff);
325 /* emit_store ******************************************************************
327 Emits a possible store of the destination operand.
329 *******************************************************************************/
331 void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
335 /* get required compiler data */
339 if (dst->flags & INMEMORY) {
342 if (IS_FLT_DBL_TYPE(dst->type)) {
343 if (IS_2_WORD_TYPE(dst->type))
344 M_DST(d, REG_SP, dst->regoff * 4);
346 M_FST(d, REG_SP, dst->regoff * 4);
349 if (IS_2_WORD_TYPE(dst->type))
350 M_LST(d, REG_SP, dst->regoff * 4);
352 M_IST(d, REG_SP, dst->regoff * 4);
358 /* emit_store_low **************************************************************
360 Emits a possible store of the low 32-bits of the destination
363 *******************************************************************************/
365 void emit_store_low(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
369 assert(dst->type == TYPE_LNG);
371 /* get required compiler data */
375 if (dst->flags & INMEMORY) {
377 M_IST(GET_LOW_REG(d), REG_SP, dst->regoff * 4);
382 /* emit_store_high *************************************************************
384 Emits a possible store of the high 32-bits of the destination
387 *******************************************************************************/
389 void emit_store_high(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
393 assert(dst->type == TYPE_LNG);
395 /* get required compiler data */
399 if (dst->flags & INMEMORY) {
401 M_IST(GET_HIGH_REG(d), REG_SP, dst->regoff * 4 + 4);
406 /* emit_copy *******************************************************************
410 *******************************************************************************/
412 void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
418 /* get required compiler data */
423 if ((src->regoff != dst->regoff) ||
424 ((src->flags ^ dst->flags) & INMEMORY)) {
425 if (IS_LNG_TYPE(src->type))
426 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
428 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP1);
430 s1 = emit_load_s1(jd, iptr, src, d);
433 if (IS_FLT_DBL_TYPE(src->type)) {
436 if (IS_2_WORD_TYPE(src->type))
443 emit_store(jd, iptr, dst, d);
448 /* emit_exception_stubs ********************************************************
450 Generates the code for the exception stubs.
452 *******************************************************************************/
454 void emit_exception_stubs(jitdata *jd)
461 /* get required compiler data */
466 savedmcodeptr = NULL;
468 /* generate exception stubs */
470 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
471 gen_resolvebranch(cd->mcodebase + eref->branchpos,
473 cd->mcodeptr - cd->mcodebase);
477 /* Check if the exception is an
478 ArrayIndexOutOfBoundsException. If so, move index register
482 M_INTMOVE(eref->reg, REG_ITMP1);
484 /* calcuate exception address */
486 M_MOV_IMM(0, REG_ITMP2_XPC);
488 M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
490 /* move function to call into REG_ITMP3 */
492 M_MOV_IMM(eref->function, REG_ITMP3);
494 if (savedmcodeptr != NULL) {
495 M_JMP_IMM((savedmcodeptr - cd->mcodeptr) - 5);
498 savedmcodeptr = cd->mcodeptr;
500 M_ASUB_IMM(5 * 4, REG_SP);
502 /* first save REG_ITMP1 so we can use it */
504 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
506 M_AST_IMM(0, REG_SP, 0 * 4);
508 M_MOV(REG_SP, REG_ITMP1);
509 M_AADD_IMM(5 * 4, REG_ITMP1);
510 M_AST(REG_ITMP1, REG_SP, 1 * 4);
511 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
512 M_AST(REG_ITMP1, REG_SP, 2 * 4);
513 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
517 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
518 M_AADD_IMM(5 * 4, REG_SP);
520 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
527 /* emit_patcher_stubs **********************************************************
529 Generates the code for the patcher stubs.
531 *******************************************************************************/
533 void emit_patcher_stubs(jitdata *jd)
542 /* get required compiler data */
546 /* generate code patching stub call code */
548 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
549 /* check code segment size */
553 /* Get machine code which is patched back in later. A
554 `call rel32' is 5 bytes long. */
556 savedmcodeptr = cd->mcodebase + pref->branchpos;
557 mcode = *((u8 *) savedmcodeptr);
559 /* patch in `call rel32' to call the following code */
561 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
562 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
564 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
566 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
572 /* move pointer to java_objectheader onto stack */
574 #if defined(ENABLE_THREADS)
575 (void) dseg_addaddress(cd, NULL); /* flcword */
576 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
577 disp = dseg_addaddress(cd, NULL); /* vftbl */
579 M_MOV_IMM(0, REG_ITMP3);
581 M_AADD_IMM(disp, REG_ITMP3);
587 /* move machine code bytes and classinfo pointer into registers */
589 M_PUSH_IMM(mcode >> 32);
591 M_PUSH_IMM(pref->ref);
592 M_PUSH_IMM(pref->patcher);
594 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
600 /* emit_replacement_stubs ******************************************************
602 Generates the code for the replacement stubs.
604 *******************************************************************************/
606 void emit_replacement_stubs(jitdata *jd)
615 /* get required compiler data */
620 rplp = code->rplpoints;
622 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
623 /* check code segment size */
627 /* note start of stub code */
629 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
631 /* make machine code for patching */
633 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
635 rplp->mcode = 0xe9 | ((u8) disp << 8);
637 /* push address of `rplpoint` struct */
641 /* jump to replacement function */
643 M_PUSH_IMM(asm_replacement_out);
649 /* code generation functions **************************************************/
651 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
653 if (basereg == ESP) {
655 emit_address_byte(0, dreg, ESP);
656 emit_address_byte(0, ESP, ESP);
658 else if (IS_IMM8(disp)) {
659 emit_address_byte(1, dreg, ESP);
660 emit_address_byte(0, ESP, ESP);
664 emit_address_byte(2, dreg, ESP);
665 emit_address_byte(0, ESP, ESP);
669 else if ((disp == 0) && (basereg != EBP)) {
670 emit_address_byte(0, dreg, basereg);
672 else if (IS_IMM8(disp)) {
673 emit_address_byte(1, dreg, basereg);
677 emit_address_byte(2, dreg, basereg);
683 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
685 if (basereg == ESP) {
686 emit_address_byte(2, dreg, ESP);
687 emit_address_byte(0, ESP, ESP);
691 emit_address_byte(2, dreg, basereg);
697 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
700 emit_address_byte(0, reg, 4);
701 emit_address_byte(scale, indexreg, 5);
704 else if ((disp == 0) && (basereg != EBP)) {
705 emit_address_byte(0, reg, 4);
706 emit_address_byte(scale, indexreg, basereg);
708 else if (IS_IMM8(disp)) {
709 emit_address_byte(1, reg, 4);
710 emit_address_byte(scale, indexreg, basereg);
714 emit_address_byte(2, reg, 4);
715 emit_address_byte(scale, indexreg, basereg);
721 /* low-level code emitter functions *******************************************/
723 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
725 COUNT(count_mov_reg_reg);
726 *(cd->mcodeptr++) = 0x89;
727 emit_reg((reg),(dreg));
731 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
733 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
738 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
740 *(cd->mcodeptr++) = 0xc6;
746 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
748 COUNT(count_mov_mem_reg);
749 *(cd->mcodeptr++) = 0x8b;
750 emit_membase(cd, (basereg),(disp),(reg));
755 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
756 * constant membase immediate length of 32bit
758 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
760 COUNT(count_mov_mem_reg);
761 *(cd->mcodeptr++) = 0x8b;
762 emit_membase32(cd, (basereg),(disp),(reg));
766 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
768 COUNT(count_mov_reg_mem);
769 *(cd->mcodeptr++) = 0x89;
770 emit_membase(cd, (basereg),(disp),(reg));
774 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
776 COUNT(count_mov_reg_mem);
777 *(cd->mcodeptr++) = 0x89;
778 emit_membase32(cd, (basereg),(disp),(reg));
782 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
784 COUNT(count_mov_mem_reg);
785 *(cd->mcodeptr++) = 0x8b;
786 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
790 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
792 COUNT(count_mov_reg_mem);
793 *(cd->mcodeptr++) = 0x89;
794 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
798 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
800 COUNT(count_mov_reg_mem);
801 *(cd->mcodeptr++) = 0x66;
802 *(cd->mcodeptr++) = 0x89;
803 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
807 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
809 COUNT(count_mov_reg_mem);
810 *(cd->mcodeptr++) = 0x88;
811 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
815 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
817 COUNT(count_mov_reg_mem);
818 *(cd->mcodeptr++) = 0x89;
819 emit_mem((reg),(mem));
823 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
825 COUNT(count_mov_mem_reg);
826 *(cd->mcodeptr++) = 0x8b;
827 emit_mem((dreg),(mem));
831 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
833 *(cd->mcodeptr++) = 0xc7;
839 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
841 *(cd->mcodeptr++) = 0xc7;
842 emit_membase(cd, (basereg),(disp),0);
847 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
849 *(cd->mcodeptr++) = 0xc7;
850 emit_membase32(cd, (basereg),(disp),0);
855 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
857 *(cd->mcodeptr++) = 0xc6;
858 emit_membase(cd, (basereg),(disp),0);
863 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
865 COUNT(count_mov_mem_reg);
866 *(cd->mcodeptr++) = 0x0f;
867 *(cd->mcodeptr++) = 0xbe;
868 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
872 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
874 *(cd->mcodeptr++) = 0x0f;
875 *(cd->mcodeptr++) = 0xbf;
880 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
882 COUNT(count_mov_mem_reg);
883 *(cd->mcodeptr++) = 0x0f;
884 *(cd->mcodeptr++) = 0xbf;
885 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
889 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
891 *(cd->mcodeptr++) = 0x0f;
892 *(cd->mcodeptr++) = 0xb7;
897 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
899 COUNT(count_mov_mem_reg);
900 *(cd->mcodeptr++) = 0x0f;
901 *(cd->mcodeptr++) = 0xb7;
902 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
906 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
908 *(cd->mcodeptr++) = 0xc7;
909 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
914 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
916 *(cd->mcodeptr++) = 0x66;
917 *(cd->mcodeptr++) = 0xc7;
918 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
923 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
925 *(cd->mcodeptr++) = 0xc6;
926 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
934 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
936 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
937 emit_reg((reg),(dreg));
941 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
943 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
944 emit_membase(cd, (basereg),(disp),(reg));
948 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
950 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
951 emit_membase(cd, (basereg),(disp),(reg));
955 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
958 *(cd->mcodeptr++) = 0x83;
959 emit_reg((opc),(dreg));
962 *(cd->mcodeptr++) = 0x81;
963 emit_reg((opc),(dreg));
969 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
971 *(cd->mcodeptr++) = 0x81;
972 emit_reg((opc),(dreg));
977 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
980 *(cd->mcodeptr++) = 0x83;
981 emit_membase(cd, (basereg),(disp),(opc));
984 *(cd->mcodeptr++) = 0x81;
985 emit_membase(cd, (basereg),(disp),(opc));
991 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
993 *(cd->mcodeptr++) = 0x85;
994 emit_reg((reg),(dreg));
998 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1000 *(cd->mcodeptr++) = 0xf7;
1008 * inc, dec operations
1010 void emit_dec_mem(codegendata *cd, s4 mem)
1012 *(cd->mcodeptr++) = 0xff;
1017 void emit_cltd(codegendata *cd)
1019 *(cd->mcodeptr++) = 0x99;
1023 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1025 *(cd->mcodeptr++) = 0x0f;
1026 *(cd->mcodeptr++) = 0xaf;
1027 emit_reg((dreg),(reg));
1031 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1033 *(cd->mcodeptr++) = 0x0f;
1034 *(cd->mcodeptr++) = 0xaf;
1035 emit_membase(cd, (basereg),(disp),(dreg));
1039 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1041 if (IS_IMM8((imm))) {
1042 *(cd->mcodeptr++) = 0x6b;
1046 *(cd->mcodeptr++) = 0x69;
1053 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1055 if (IS_IMM8((imm))) {
1056 *(cd->mcodeptr++) = 0x6b;
1057 emit_reg((dreg),(reg));
1060 *(cd->mcodeptr++) = 0x69;
1061 emit_reg((dreg),(reg));
1067 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1069 if (IS_IMM8((imm))) {
1070 *(cd->mcodeptr++) = 0x6b;
1071 emit_membase(cd, (basereg),(disp),(dreg));
1074 *(cd->mcodeptr++) = 0x69;
1075 emit_membase(cd, (basereg),(disp),(dreg));
1081 void emit_mul_reg(codegendata *cd, s4 reg)
1083 *(cd->mcodeptr++) = 0xf7;
1088 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1090 *(cd->mcodeptr++) = 0xf7;
1091 emit_membase(cd, (basereg),(disp),4);
1095 void emit_idiv_reg(codegendata *cd, s4 reg)
1097 *(cd->mcodeptr++) = 0xf7;
1102 void emit_ret(codegendata *cd)
1104 *(cd->mcodeptr++) = 0xc3;
1112 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1114 *(cd->mcodeptr++) = 0xd3;
1115 emit_reg((opc),(reg));
1119 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1122 *(cd->mcodeptr++) = 0xd1;
1123 emit_reg((opc),(dreg));
1125 *(cd->mcodeptr++) = 0xc1;
1126 emit_reg((opc),(dreg));
1132 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1134 *(cd->mcodeptr++) = 0x0f;
1135 *(cd->mcodeptr++) = 0xa5;
1136 emit_reg((reg),(dreg));
1140 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1142 *(cd->mcodeptr++) = 0x0f;
1143 *(cd->mcodeptr++) = 0xa4;
1144 emit_reg((reg),(dreg));
1149 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1151 *(cd->mcodeptr++) = 0x0f;
1152 *(cd->mcodeptr++) = 0xa5;
1153 emit_membase(cd, (basereg),(disp),(reg));
1157 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1159 *(cd->mcodeptr++) = 0x0f;
1160 *(cd->mcodeptr++) = 0xad;
1161 emit_reg((reg),(dreg));
1165 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1167 *(cd->mcodeptr++) = 0x0f;
1168 *(cd->mcodeptr++) = 0xac;
1169 emit_reg((reg),(dreg));
1174 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1176 *(cd->mcodeptr++) = 0x0f;
1177 *(cd->mcodeptr++) = 0xad;
1178 emit_membase(cd, (basereg),(disp),(reg));
1186 void emit_jmp_imm(codegendata *cd, s4 imm)
1188 *(cd->mcodeptr++) = 0xe9;
1193 void emit_jmp_reg(codegendata *cd, s4 reg)
1195 *(cd->mcodeptr++) = 0xff;
1200 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1202 *(cd->mcodeptr++) = 0x0f;
1203 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1210 * conditional set operations
1212 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1214 *(cd->mcodeptr++) = 0x0f;
1215 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1220 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1222 *(cd->mcodeptr++) = 0x0f;
1223 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1224 emit_membase(cd, (basereg),(disp),0);
1228 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1230 *(cd->mcodeptr++) = 0x0f;
1231 *(cd->mcodeptr++) = 0xc1;
1232 emit_mem((reg),(mem));
1236 void emit_neg_reg(codegendata *cd, s4 reg)
1238 *(cd->mcodeptr++) = 0xf7;
1244 void emit_push_imm(codegendata *cd, s4 imm)
1246 *(cd->mcodeptr++) = 0x68;
1251 void emit_pop_reg(codegendata *cd, s4 reg)
1253 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1257 void emit_push_reg(codegendata *cd, s4 reg)
1259 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1263 void emit_nop(codegendata *cd)
1265 *(cd->mcodeptr++) = 0x90;
1269 void emit_lock(codegendata *cd)
1271 *(cd->mcodeptr++) = 0xf0;
1278 void emit_call_reg(codegendata *cd, s4 reg)
1280 *(cd->mcodeptr++) = 0xff;
1285 void emit_call_imm(codegendata *cd, s4 imm)
1287 *(cd->mcodeptr++) = 0xe8;
1294 * floating point instructions
1296 void emit_fld1(codegendata *cd)
1298 *(cd->mcodeptr++) = 0xd9;
1299 *(cd->mcodeptr++) = 0xe8;
1303 void emit_fldz(codegendata *cd)
1305 *(cd->mcodeptr++) = 0xd9;
1306 *(cd->mcodeptr++) = 0xee;
1310 void emit_fld_reg(codegendata *cd, s4 reg)
1312 *(cd->mcodeptr++) = 0xd9;
1313 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1317 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1319 *(cd->mcodeptr++) = 0xd9;
1320 emit_membase(cd, (basereg),(disp),0);
1324 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1326 *(cd->mcodeptr++) = 0xd9;
1327 emit_membase32(cd, (basereg),(disp),0);
1331 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1333 *(cd->mcodeptr++) = 0xdd;
1334 emit_membase(cd, (basereg),(disp),0);
1338 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1340 *(cd->mcodeptr++) = 0xdd;
1341 emit_membase32(cd, (basereg),(disp),0);
1345 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1347 *(cd->mcodeptr++) = 0xdb;
1348 emit_membase(cd, (basereg),(disp),5);
1352 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1354 *(cd->mcodeptr++) = 0xd9;
1355 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1359 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1361 *(cd->mcodeptr++) = 0xdd;
1362 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1366 void emit_flds_mem(codegendata *cd, s4 mem)
1368 *(cd->mcodeptr++) = 0xd9;
1373 void emit_fldl_mem(codegendata *cd, s4 mem)
1375 *(cd->mcodeptr++) = 0xdd;
1380 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1382 *(cd->mcodeptr++) = 0xdb;
1383 emit_membase(cd, (basereg),(disp),0);
1387 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1389 *(cd->mcodeptr++) = 0xdf;
1390 emit_membase(cd, (basereg),(disp),5);
1394 void emit_fst_reg(codegendata *cd, s4 reg)
1396 *(cd->mcodeptr++) = 0xdd;
1397 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1401 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1403 *(cd->mcodeptr++) = 0xd9;
1404 emit_membase(cd, (basereg),(disp),2);
1408 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1410 *(cd->mcodeptr++) = 0xdd;
1411 emit_membase(cd, (basereg),(disp),2);
1415 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1417 *(cd->mcodeptr++) = 0xd9;
1418 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1422 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1424 *(cd->mcodeptr++) = 0xdd;
1425 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1429 void emit_fstp_reg(codegendata *cd, s4 reg)
1431 *(cd->mcodeptr++) = 0xdd;
1432 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1436 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1438 *(cd->mcodeptr++) = 0xd9;
1439 emit_membase(cd, (basereg),(disp),3);
1443 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1445 *(cd->mcodeptr++) = 0xd9;
1446 emit_membase32(cd, (basereg),(disp),3);
1450 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1452 *(cd->mcodeptr++) = 0xdd;
1453 emit_membase(cd, (basereg),(disp),3);
1457 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1459 *(cd->mcodeptr++) = 0xdd;
1460 emit_membase32(cd, (basereg),(disp),3);
1464 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1466 *(cd->mcodeptr++) = 0xdb;
1467 emit_membase(cd, (basereg),(disp),7);
1471 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1473 *(cd->mcodeptr++) = 0xd9;
1474 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1478 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1480 *(cd->mcodeptr++) = 0xdd;
1481 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1485 void emit_fstps_mem(codegendata *cd, s4 mem)
1487 *(cd->mcodeptr++) = 0xd9;
1492 void emit_fstpl_mem(codegendata *cd, s4 mem)
1494 *(cd->mcodeptr++) = 0xdd;
1499 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1501 *(cd->mcodeptr++) = 0xdb;
1502 emit_membase(cd, (basereg),(disp),2);
1506 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1508 *(cd->mcodeptr++) = 0xdb;
1509 emit_membase(cd, (basereg),(disp),3);
1513 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1515 *(cd->mcodeptr++) = 0xdf;
1516 emit_membase(cd, (basereg),(disp),7);
1520 void emit_fchs(codegendata *cd)
1522 *(cd->mcodeptr++) = 0xd9;
1523 *(cd->mcodeptr++) = 0xe0;
1527 void emit_faddp(codegendata *cd)
1529 *(cd->mcodeptr++) = 0xde;
1530 *(cd->mcodeptr++) = 0xc1;
1534 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1536 *(cd->mcodeptr++) = 0xd8;
1537 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1541 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1543 *(cd->mcodeptr++) = 0xdc;
1544 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1548 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1550 *(cd->mcodeptr++) = 0xde;
1551 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1555 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1557 *(cd->mcodeptr++) = 0xd8;
1558 emit_membase(cd, (basereg),(disp),0);
1562 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1564 *(cd->mcodeptr++) = 0xdc;
1565 emit_membase(cd, (basereg),(disp),0);
1569 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1571 *(cd->mcodeptr++) = 0xd8;
1572 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1576 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1578 *(cd->mcodeptr++) = 0xdc;
1579 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1583 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1585 *(cd->mcodeptr++) = 0xde;
1586 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1590 void emit_fsubp(codegendata *cd)
1592 *(cd->mcodeptr++) = 0xde;
1593 *(cd->mcodeptr++) = 0xe9;
1597 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1599 *(cd->mcodeptr++) = 0xd8;
1600 emit_membase(cd, (basereg),(disp),4);
1604 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1606 *(cd->mcodeptr++) = 0xdc;
1607 emit_membase(cd, (basereg),(disp),4);
1611 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1613 *(cd->mcodeptr++) = 0xd8;
1614 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1618 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1620 *(cd->mcodeptr++) = 0xdc;
1621 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1625 void emit_fmulp(codegendata *cd)
1627 *(cd->mcodeptr++) = 0xde;
1628 *(cd->mcodeptr++) = 0xc9;
1632 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1634 *(cd->mcodeptr++) = 0xde;
1635 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1639 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1641 *(cd->mcodeptr++) = 0xd8;
1642 emit_membase(cd, (basereg),(disp),1);
1646 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1648 *(cd->mcodeptr++) = 0xdc;
1649 emit_membase(cd, (basereg),(disp),1);
1653 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1655 *(cd->mcodeptr++) = 0xd8;
1656 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1660 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1662 *(cd->mcodeptr++) = 0xdc;
1663 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1667 void emit_fdivp(codegendata *cd)
1669 *(cd->mcodeptr++) = 0xde;
1670 *(cd->mcodeptr++) = 0xf9;
1674 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1676 *(cd->mcodeptr++) = 0xde;
1677 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1681 void emit_fxch(codegendata *cd)
1683 *(cd->mcodeptr++) = 0xd9;
1684 *(cd->mcodeptr++) = 0xc9;
1688 void emit_fxch_reg(codegendata *cd, s4 reg)
1690 *(cd->mcodeptr++) = 0xd9;
1691 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1695 void emit_fprem(codegendata *cd)
1697 *(cd->mcodeptr++) = 0xd9;
1698 *(cd->mcodeptr++) = 0xf8;
1702 void emit_fprem1(codegendata *cd)
1704 *(cd->mcodeptr++) = 0xd9;
1705 *(cd->mcodeptr++) = 0xf5;
1709 void emit_fucom(codegendata *cd)
1711 *(cd->mcodeptr++) = 0xdd;
1712 *(cd->mcodeptr++) = 0xe1;
1716 void emit_fucom_reg(codegendata *cd, s4 reg)
1718 *(cd->mcodeptr++) = 0xdd;
1719 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1723 void emit_fucomp_reg(codegendata *cd, s4 reg)
1725 *(cd->mcodeptr++) = 0xdd;
1726 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1730 void emit_fucompp(codegendata *cd)
1732 *(cd->mcodeptr++) = 0xda;
1733 *(cd->mcodeptr++) = 0xe9;
1737 void emit_fnstsw(codegendata *cd)
1739 *(cd->mcodeptr++) = 0xdf;
1740 *(cd->mcodeptr++) = 0xe0;
1744 void emit_sahf(codegendata *cd)
1746 *(cd->mcodeptr++) = 0x9e;
1750 void emit_finit(codegendata *cd)
1752 *(cd->mcodeptr++) = 0x9b;
1753 *(cd->mcodeptr++) = 0xdb;
1754 *(cd->mcodeptr++) = 0xe3;
1758 void emit_fldcw_mem(codegendata *cd, s4 mem)
1760 *(cd->mcodeptr++) = 0xd9;
1765 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1767 *(cd->mcodeptr++) = 0xd9;
1768 emit_membase(cd, (basereg),(disp),5);
1772 void emit_wait(codegendata *cd)
1774 *(cd->mcodeptr++) = 0x9b;
1778 void emit_ffree_reg(codegendata *cd, s4 reg)
1780 *(cd->mcodeptr++) = 0xdd;
1781 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1785 void emit_fdecstp(codegendata *cd)
1787 *(cd->mcodeptr++) = 0xd9;
1788 *(cd->mcodeptr++) = 0xf6;
1792 void emit_fincstp(codegendata *cd)
1794 *(cd->mcodeptr++) = 0xd9;
1795 *(cd->mcodeptr++) = 0xf7;
1800 * These are local overrides for various environment variables in Emacs.
1801 * Please do not remove this and leave it at the end of the file, where
1802 * Emacs will automagically detect them.
1803 * ---------------------------------------------------------------------
1806 * indent-tabs-mode: t