1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
31 $Id: emit.c 5352 2006-09-05 22:51:48Z christian $
42 #include "vm/jit/i386/md-abi.h"
43 #include "vm/jit/i386/md-emit.h"
44 #include "vm/jit/i386/codegen.h"
46 #if defined(ENABLE_THREADS)
47 # include "threads/native/lock.h"
50 #include "vm/builtin.h"
51 #include "vm/statistics.h"
52 #include "vm/jit/asmpart.h"
53 #include "vm/jit/dseg.h"
54 #include "vm/jit/emit.h"
55 #include "vm/jit/jit.h"
56 #include "vm/jit/replace.h"
59 /* emit_load ******************************************************************
61 Emits a possible load of an operand.
63 *******************************************************************************/
65 inline s4 emit_load(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
71 /* get required compiler data */
75 if (src->flags & INMEMORY) {
78 disp = src->regoff * 4;
80 if (IS_FLT_DBL_TYPE(src->type)) {
81 if (IS_2_WORD_TYPE(src->type))
82 M_DLD(tempreg, REG_SP, disp);
84 M_FLD(tempreg, REG_SP, disp);
87 if (IS_2_WORD_TYPE(src->type))
88 M_LLD(tempreg, REG_SP, disp);
90 M_ILD(tempreg, REG_SP, disp);
102 /* emit_load_low ************************************************************
104 Emits a possible load of the low 32-bits of an operand.
106 *******************************************************************************/
108 inline s4 emit_load_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
114 assert(src->type == TYPE_LNG);
116 /* get required compiler data */
121 if (src->flags & INMEMORY) {
124 disp = src->regoff * 4;
126 M_ILD(tempreg, REG_SP, disp);
131 reg = GET_LOW_REG(src->regoff);
137 /* emit_load_high ***********************************************************
139 Emits a possible load of the high 32-bits of an operand.
141 *******************************************************************************/
143 inline s4 emit_load_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
149 /* get required compiler data */
151 assert(src->type == TYPE_LNG);
155 if (src->flags & INMEMORY) {
158 disp = src->regoff * 4;
160 M_ILD(tempreg, REG_SP, disp + 4);
165 reg = GET_HIGH_REG(src->regoff);
171 /* emit_load_s1 ****************************************************************
173 Emits a possible load of the first source operand.
175 *******************************************************************************/
177 s4 emit_load_s1(jitdata *jd, instruction *iptr, s4 tempreg)
182 /* get required compiler data */
186 reg = emit_load(jd, iptr, src, tempreg);
192 /* emit_load_s2 ****************************************************************
194 Emits a possible load of the second source operand.
196 *******************************************************************************/
198 s4 emit_load_s2(jitdata *jd, instruction *iptr, s4 tempreg)
203 /* get required compiler data */
205 src = iptr->sx.s23.s2.var;
207 reg = emit_load(jd, iptr, src, tempreg);
213 /* emit_load_s3 ****************************************************************
215 Emits a possible load of the third source operand.
217 *******************************************************************************/
219 s4 emit_load_s3(jitdata *jd, instruction *iptr, s4 tempreg)
224 /* get required compiler data */
226 src = iptr->sx.s23.s3.var;
228 reg = emit_load(jd, iptr, src, tempreg);
234 /* emit_load_s1_low ************************************************************
236 Emits a possible load of the low 32-bits of the first long source
239 *******************************************************************************/
241 s4 emit_load_s1_low(jitdata *jd, instruction *iptr, s4 tempreg)
247 /* get required compiler data */
251 reg = emit_load_low(jd, iptr, src, tempreg);
259 /* emit_load_s2_low ************************************************************
261 Emits a possible load of the low 32-bits of the second long source
264 *******************************************************************************/
266 s4 emit_load_s2_low(jitdata *jd, instruction *iptr, s4 tempreg)
271 /* get required compiler data */
273 src = iptr->sx.s23.s2.var;
275 reg = emit_load_low(jd, iptr, src, tempreg);
281 /* emit_load_s1_high ***********************************************************
283 Emits a possible load of the high 32-bits of the first long source
286 *******************************************************************************/
288 s4 emit_load_s1_high(jitdata *jd, instruction *iptr, s4 tempreg)
293 /* get required compiler data */
297 reg = emit_load_high(jd, iptr, src, tempreg);
303 /* emit_load_s2_high ***********************************************************
305 Emits a possible load of the high 32-bits of the second long source
308 *******************************************************************************/
310 s4 emit_load_s2_high(jitdata *jd, instruction *iptr, s4 tempreg)
315 /* get required compiler data */
317 src = iptr->sx.s23.s2.var;
319 reg = emit_load_high(jd, iptr, src, tempreg);
325 /* emit_store ******************************************************************
327 Emits a possible store of the destination operand.
329 *******************************************************************************/
331 inline void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
335 /* get required compiler data */
339 if (dst->flags & INMEMORY) {
342 if (IS_FLT_DBL_TYPE(dst->type)) {
343 if (IS_2_WORD_TYPE(dst->type))
344 M_DST(d, REG_SP, dst->regoff * 4);
346 M_FST(d, REG_SP, dst->regoff * 4);
349 if (IS_2_WORD_TYPE(dst->type))
350 M_LST(d, REG_SP, dst->regoff * 4);
352 M_IST(d, REG_SP, dst->regoff * 4);
358 /* emit_store_low **************************************************************
360 Emits a possible store of the low 32-bits of the destination
363 *******************************************************************************/
365 inline void emit_store_low(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
369 assert(dst->type == TYPE_LNG);
371 /* get required compiler data */
375 if (dst->flags & INMEMORY) {
377 M_IST(GET_LOW_REG(d), REG_SP, dst->regoff * 4);
382 /* emit_store_high *************************************************************
384 Emits a possible store of the high 32-bits of the destination
387 *******************************************************************************/
389 inline void emit_store_high(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
393 assert(dst->type == TYPE_LNG);
395 /* get required compiler data */
399 if (dst->flags & INMEMORY) {
401 M_IST(GET_HIGH_REG(d), REG_SP, dst->regoff * 4 + 4);
405 /* emit_store_dst **************************************************************
407 This function generates the code to store the result of an
408 operation back into a spilled pseudo-variable. If the
409 pseudo-variable has not been spilled in the first place, this
410 function will generate nothing.
412 *******************************************************************************/
414 void emit_store_dst(jitdata *jd, instruction *iptr, s4 d)
420 emit_store(jd, iptr, dst, d);
423 /* emit_copy *******************************************************************
427 *******************************************************************************/
429 void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
435 /* get required compiler data */
440 if ((src->regoff != dst->regoff) ||
441 ((src->flags ^ dst->flags) & INMEMORY)) {
442 if (IS_LNG_TYPE(src->type))
443 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
445 d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP1);
447 s1 = emit_load(jd, iptr, src, d);
450 if (IS_FLT_DBL_TYPE(src->type)) {
453 if (IS_2_WORD_TYPE(src->type))
460 emit_store(jd, iptr, dst, d);
465 /* emit_exception_stubs ********************************************************
467 Generates the code for the exception stubs.
469 *******************************************************************************/
471 void emit_exception_stubs(jitdata *jd)
478 /* get required compiler data */
483 /* generate exception stubs */
487 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
488 gen_resolvebranch(cd->mcodebase + eref->branchpos,
490 cd->mcodeptr - cd->mcodebase);
494 /* Check if the exception is an
495 ArrayIndexOutOfBoundsException. If so, move index register
499 M_INTMOVE(eref->reg, REG_ITMP1);
501 /* calcuate exception address */
503 M_MOV_IMM(0, REG_ITMP2_XPC);
505 M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
507 /* move function to call into REG_ITMP3 */
509 M_MOV_IMM(eref->function, REG_ITMP3);
511 if (targetdisp == 0) {
512 targetdisp = cd->mcodeptr - cd->mcodebase;
514 M_ASUB_IMM(5 * 4, REG_SP);
516 /* first store REG_ITMP1 so we can use it */
518 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
520 M_AST_IMM(0, REG_SP, 0 * 4);
522 M_MOV(REG_SP, REG_ITMP1);
523 M_AADD_IMM(5 * 4, REG_ITMP1);
524 M_AST(REG_ITMP1, REG_SP, 1 * 4);
525 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
526 M_AST(REG_ITMP1, REG_SP, 2 * 4);
527 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
531 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
532 M_AADD_IMM(5 * 4, REG_SP);
534 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
538 M_JMP_IMM((cd->mcodebase + targetdisp) -
539 (cd->mcodeptr + PATCHER_CALL_SIZE));
545 /* emit_patcher_stubs **********************************************************
547 Generates the code for the patcher stubs.
549 *******************************************************************************/
551 void emit_patcher_stubs(jitdata *jd)
561 /* get required compiler data */
565 /* generate code patching stub call code */
569 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
570 /* check code segment size */
574 /* Get machine code which is patched back in later. A
575 `call rel32' is 5 bytes long. */
577 savedmcodeptr = cd->mcodebase + pref->branchpos;
578 mcode = *((u8 *) savedmcodeptr);
580 /* patch in `call rel32' to call the following code */
582 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
583 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
585 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
587 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
593 /* move pointer to java_objectheader onto stack */
595 #if defined(ENABLE_THREADS)
596 (void) dseg_addaddress(cd, NULL); /* flcword */
597 (void) dseg_addaddress(cd, lock_get_initial_lock_word());
598 disp = dseg_addaddress(cd, NULL); /* vftbl */
600 M_MOV_IMM(0, REG_ITMP3);
602 M_AADD_IMM(disp, REG_ITMP3);
608 /* move machine code bytes and classinfo pointer into registers */
610 M_PUSH_IMM(mcode >> 32);
612 M_PUSH_IMM(pref->ref);
613 M_PUSH_IMM(pref->patcher);
615 if (targetdisp == 0) {
616 targetdisp = cd->mcodeptr - cd->mcodebase;
618 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
622 M_JMP_IMM((cd->mcodebase + targetdisp) -
623 (cd->mcodeptr + PATCHER_CALL_SIZE));
629 /* emit_replacement_stubs ******************************************************
631 Generates the code for the replacement stubs.
633 *******************************************************************************/
635 void emit_replacement_stubs(jitdata *jd)
643 /* get required compiler data */
648 rplp = code->rplpoints;
650 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
651 /* check code segment size */
655 /* note start of stub code */
657 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
659 /* make machine code for patching */
661 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
663 rplp->mcode = 0xe9 | ((u8) disp << 8);
665 /* push address of `rplpoint` struct */
669 /* jump to replacement function */
671 M_PUSH_IMM(asm_replacement_out);
677 /* emit_verbosecall_enter ******************************************************
679 Generates the code for the call trace.
681 *******************************************************************************/
684 void emit_verbosecall_enter(jitdata *jd)
693 /* get required compiler data */
701 /* mark trace code */
705 /* methodinfo* + arguments + return address */
707 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
708 cd->stackframesize * 4 + 4;
710 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
712 /* save temporary registers for leaf methods */
714 for (i = 0; i < INT_TMP_CNT; i++)
715 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
717 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
718 t = md->paramtypes[i].type;
720 if (IS_INT_LNG_TYPE(t)) {
721 if (IS_2_WORD_TYPE(t)) {
722 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
723 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
725 else if (IS_ADR_TYPE(t)) {
726 M_ALD(REG_ITMP1, REG_SP, disp);
727 M_AST(REG_ITMP1, REG_SP, i * 8);
728 M_IST_IMM(0, REG_SP, i * 8 + 4);
731 M_ILD(EAX, REG_SP, disp);
733 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
737 if (IS_2_WORD_TYPE(t)) {
738 M_DLD(REG_NULL, REG_SP, disp);
739 M_DST(REG_NULL, REG_SP, i * 8);
742 M_FLD(REG_NULL, REG_SP, disp);
743 M_FST(REG_NULL, REG_SP, i * 8);
744 M_IST_IMM(0, REG_SP, i * 8 + 4);
748 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
751 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
753 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
756 /* restore temporary registers for leaf methods */
758 for (i = 0; i < INT_TMP_CNT; i++)
759 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
761 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
763 /* mark trace code */
767 #endif /* !defined(NDEBUG) */
770 /* emit_verbosecall_exit *******************************************************
772 Generates the code for the call trace.
774 *******************************************************************************/
777 void emit_verbosecall_exit(jitdata *jd)
783 /* get required compiler data */
789 /* mark trace code */
793 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
795 M_AST_IMM(m, REG_SP, 0 * 4);
797 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
799 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
800 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
802 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
805 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
807 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
809 /* mark trace code */
813 #endif /* !defined(NDEBUG) */
816 /* code generation functions **************************************************/
818 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
820 if (basereg == ESP) {
822 emit_address_byte(0, dreg, ESP);
823 emit_address_byte(0, ESP, ESP);
825 else if (IS_IMM8(disp)) {
826 emit_address_byte(1, dreg, ESP);
827 emit_address_byte(0, ESP, ESP);
831 emit_address_byte(2, dreg, ESP);
832 emit_address_byte(0, ESP, ESP);
836 else if ((disp == 0) && (basereg != EBP)) {
837 emit_address_byte(0, dreg, basereg);
839 else if (IS_IMM8(disp)) {
840 emit_address_byte(1, dreg, basereg);
844 emit_address_byte(2, dreg, basereg);
850 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
852 if (basereg == ESP) {
853 emit_address_byte(2, dreg, ESP);
854 emit_address_byte(0, ESP, ESP);
858 emit_address_byte(2, dreg, basereg);
864 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
867 emit_address_byte(0, reg, 4);
868 emit_address_byte(scale, indexreg, 5);
871 else if ((disp == 0) && (basereg != EBP)) {
872 emit_address_byte(0, reg, 4);
873 emit_address_byte(scale, indexreg, basereg);
875 else if (IS_IMM8(disp)) {
876 emit_address_byte(1, reg, 4);
877 emit_address_byte(scale, indexreg, basereg);
881 emit_address_byte(2, reg, 4);
882 emit_address_byte(scale, indexreg, basereg);
888 /* low-level code emitter functions *******************************************/
890 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
892 COUNT(count_mov_reg_reg);
893 *(cd->mcodeptr++) = 0x89;
894 emit_reg((reg),(dreg));
898 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
900 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
905 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
907 *(cd->mcodeptr++) = 0xc6;
913 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
915 COUNT(count_mov_mem_reg);
916 *(cd->mcodeptr++) = 0x8b;
917 emit_membase(cd, (basereg),(disp),(reg));
922 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
923 * constant membase immediate length of 32bit
925 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
927 COUNT(count_mov_mem_reg);
928 *(cd->mcodeptr++) = 0x8b;
929 emit_membase32(cd, (basereg),(disp),(reg));
933 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
935 COUNT(count_mov_reg_mem);
936 *(cd->mcodeptr++) = 0x89;
937 emit_membase(cd, (basereg),(disp),(reg));
941 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
943 COUNT(count_mov_reg_mem);
944 *(cd->mcodeptr++) = 0x89;
945 emit_membase32(cd, (basereg),(disp),(reg));
949 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
951 COUNT(count_mov_mem_reg);
952 *(cd->mcodeptr++) = 0x8b;
953 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
957 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
959 COUNT(count_mov_reg_mem);
960 *(cd->mcodeptr++) = 0x89;
961 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
965 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
967 COUNT(count_mov_reg_mem);
968 *(cd->mcodeptr++) = 0x66;
969 *(cd->mcodeptr++) = 0x89;
970 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
974 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
976 COUNT(count_mov_reg_mem);
977 *(cd->mcodeptr++) = 0x88;
978 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
982 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
984 COUNT(count_mov_reg_mem);
985 *(cd->mcodeptr++) = 0x89;
986 emit_mem((reg),(mem));
990 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
992 COUNT(count_mov_mem_reg);
993 *(cd->mcodeptr++) = 0x8b;
994 emit_mem((dreg),(mem));
998 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
1000 *(cd->mcodeptr++) = 0xc7;
1006 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1008 *(cd->mcodeptr++) = 0xc7;
1009 emit_membase(cd, (basereg),(disp),0);
1014 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1016 *(cd->mcodeptr++) = 0xc7;
1017 emit_membase32(cd, (basereg),(disp),0);
1022 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
1024 *(cd->mcodeptr++) = 0xc6;
1025 emit_membase(cd, (basereg),(disp),0);
1030 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1032 COUNT(count_mov_mem_reg);
1033 *(cd->mcodeptr++) = 0x0f;
1034 *(cd->mcodeptr++) = 0xbe;
1035 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1039 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1041 *(cd->mcodeptr++) = 0x0f;
1042 *(cd->mcodeptr++) = 0xbf;
1047 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1049 COUNT(count_mov_mem_reg);
1050 *(cd->mcodeptr++) = 0x0f;
1051 *(cd->mcodeptr++) = 0xbf;
1052 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1056 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1058 *(cd->mcodeptr++) = 0x0f;
1059 *(cd->mcodeptr++) = 0xb7;
1064 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1066 COUNT(count_mov_mem_reg);
1067 *(cd->mcodeptr++) = 0x0f;
1068 *(cd->mcodeptr++) = 0xb7;
1069 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1073 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1075 *(cd->mcodeptr++) = 0xc7;
1076 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1081 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1083 *(cd->mcodeptr++) = 0x66;
1084 *(cd->mcodeptr++) = 0xc7;
1085 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1090 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1092 *(cd->mcodeptr++) = 0xc6;
1093 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1101 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1103 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1104 emit_reg((reg),(dreg));
1108 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1110 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1111 emit_membase(cd, (basereg),(disp),(reg));
1115 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1117 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1118 emit_membase(cd, (basereg),(disp),(reg));
1122 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1125 *(cd->mcodeptr++) = 0x83;
1126 emit_reg((opc),(dreg));
1129 *(cd->mcodeptr++) = 0x81;
1130 emit_reg((opc),(dreg));
1136 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1138 *(cd->mcodeptr++) = 0x81;
1139 emit_reg((opc),(dreg));
1144 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1147 *(cd->mcodeptr++) = 0x83;
1148 emit_membase(cd, (basereg),(disp),(opc));
1151 *(cd->mcodeptr++) = 0x81;
1152 emit_membase(cd, (basereg),(disp),(opc));
1158 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1160 *(cd->mcodeptr++) = 0x85;
1161 emit_reg((reg),(dreg));
1165 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1167 *(cd->mcodeptr++) = 0xf7;
1175 * inc, dec operations
1177 void emit_dec_mem(codegendata *cd, s4 mem)
1179 *(cd->mcodeptr++) = 0xff;
1184 void emit_cltd(codegendata *cd)
1186 *(cd->mcodeptr++) = 0x99;
1190 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1192 *(cd->mcodeptr++) = 0x0f;
1193 *(cd->mcodeptr++) = 0xaf;
1194 emit_reg((dreg),(reg));
1198 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1200 *(cd->mcodeptr++) = 0x0f;
1201 *(cd->mcodeptr++) = 0xaf;
1202 emit_membase(cd, (basereg),(disp),(dreg));
1206 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1208 if (IS_IMM8((imm))) {
1209 *(cd->mcodeptr++) = 0x6b;
1213 *(cd->mcodeptr++) = 0x69;
1220 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1222 if (IS_IMM8((imm))) {
1223 *(cd->mcodeptr++) = 0x6b;
1224 emit_reg((dreg),(reg));
1227 *(cd->mcodeptr++) = 0x69;
1228 emit_reg((dreg),(reg));
1234 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1236 if (IS_IMM8((imm))) {
1237 *(cd->mcodeptr++) = 0x6b;
1238 emit_membase(cd, (basereg),(disp),(dreg));
1241 *(cd->mcodeptr++) = 0x69;
1242 emit_membase(cd, (basereg),(disp),(dreg));
1248 void emit_mul_reg(codegendata *cd, s4 reg)
1250 *(cd->mcodeptr++) = 0xf7;
1255 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1257 *(cd->mcodeptr++) = 0xf7;
1258 emit_membase(cd, (basereg),(disp),4);
1262 void emit_idiv_reg(codegendata *cd, s4 reg)
1264 *(cd->mcodeptr++) = 0xf7;
1269 void emit_ret(codegendata *cd)
1271 *(cd->mcodeptr++) = 0xc3;
1279 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1281 *(cd->mcodeptr++) = 0xd3;
1282 emit_reg((opc),(reg));
1286 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1289 *(cd->mcodeptr++) = 0xd1;
1290 emit_reg((opc),(dreg));
1292 *(cd->mcodeptr++) = 0xc1;
1293 emit_reg((opc),(dreg));
1299 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1301 *(cd->mcodeptr++) = 0x0f;
1302 *(cd->mcodeptr++) = 0xa5;
1303 emit_reg((reg),(dreg));
1307 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1309 *(cd->mcodeptr++) = 0x0f;
1310 *(cd->mcodeptr++) = 0xa4;
1311 emit_reg((reg),(dreg));
1316 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1318 *(cd->mcodeptr++) = 0x0f;
1319 *(cd->mcodeptr++) = 0xa5;
1320 emit_membase(cd, (basereg),(disp),(reg));
1324 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1326 *(cd->mcodeptr++) = 0x0f;
1327 *(cd->mcodeptr++) = 0xad;
1328 emit_reg((reg),(dreg));
1332 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1334 *(cd->mcodeptr++) = 0x0f;
1335 *(cd->mcodeptr++) = 0xac;
1336 emit_reg((reg),(dreg));
1341 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1343 *(cd->mcodeptr++) = 0x0f;
1344 *(cd->mcodeptr++) = 0xad;
1345 emit_membase(cd, (basereg),(disp),(reg));
1353 void emit_jmp_imm(codegendata *cd, s4 imm)
1355 *(cd->mcodeptr++) = 0xe9;
1360 void emit_jmp_reg(codegendata *cd, s4 reg)
1362 *(cd->mcodeptr++) = 0xff;
1367 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1369 *(cd->mcodeptr++) = 0x0f;
1370 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1377 * conditional set operations
1379 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1381 *(cd->mcodeptr++) = 0x0f;
1382 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1387 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1389 *(cd->mcodeptr++) = 0x0f;
1390 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1391 emit_membase(cd, (basereg),(disp),0);
1395 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1397 *(cd->mcodeptr++) = 0x0f;
1398 *(cd->mcodeptr++) = 0xc1;
1399 emit_mem((reg),(mem));
1403 void emit_neg_reg(codegendata *cd, s4 reg)
1405 *(cd->mcodeptr++) = 0xf7;
1411 void emit_push_imm(codegendata *cd, s4 imm)
1413 *(cd->mcodeptr++) = 0x68;
1418 void emit_pop_reg(codegendata *cd, s4 reg)
1420 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1424 void emit_push_reg(codegendata *cd, s4 reg)
1426 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1430 void emit_nop(codegendata *cd)
1432 *(cd->mcodeptr++) = 0x90;
1436 void emit_lock(codegendata *cd)
1438 *(cd->mcodeptr++) = 0xf0;
1445 void emit_call_reg(codegendata *cd, s4 reg)
1447 *(cd->mcodeptr++) = 0xff;
1452 void emit_call_imm(codegendata *cd, s4 imm)
1454 *(cd->mcodeptr++) = 0xe8;
1461 * floating point instructions
1463 void emit_fld1(codegendata *cd)
1465 *(cd->mcodeptr++) = 0xd9;
1466 *(cd->mcodeptr++) = 0xe8;
1470 void emit_fldz(codegendata *cd)
1472 *(cd->mcodeptr++) = 0xd9;
1473 *(cd->mcodeptr++) = 0xee;
1477 void emit_fld_reg(codegendata *cd, s4 reg)
1479 *(cd->mcodeptr++) = 0xd9;
1480 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1484 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1486 *(cd->mcodeptr++) = 0xd9;
1487 emit_membase(cd, (basereg),(disp),0);
1491 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1493 *(cd->mcodeptr++) = 0xd9;
1494 emit_membase32(cd, (basereg),(disp),0);
1498 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1500 *(cd->mcodeptr++) = 0xdd;
1501 emit_membase(cd, (basereg),(disp),0);
1505 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1507 *(cd->mcodeptr++) = 0xdd;
1508 emit_membase32(cd, (basereg),(disp),0);
1512 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1514 *(cd->mcodeptr++) = 0xdb;
1515 emit_membase(cd, (basereg),(disp),5);
1519 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1521 *(cd->mcodeptr++) = 0xd9;
1522 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1526 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1528 *(cd->mcodeptr++) = 0xdd;
1529 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1533 void emit_flds_mem(codegendata *cd, s4 mem)
1535 *(cd->mcodeptr++) = 0xd9;
1540 void emit_fldl_mem(codegendata *cd, s4 mem)
1542 *(cd->mcodeptr++) = 0xdd;
1547 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1549 *(cd->mcodeptr++) = 0xdb;
1550 emit_membase(cd, (basereg),(disp),0);
1554 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1556 *(cd->mcodeptr++) = 0xdf;
1557 emit_membase(cd, (basereg),(disp),5);
1561 void emit_fst_reg(codegendata *cd, s4 reg)
1563 *(cd->mcodeptr++) = 0xdd;
1564 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1568 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1570 *(cd->mcodeptr++) = 0xd9;
1571 emit_membase(cd, (basereg),(disp),2);
1575 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1577 *(cd->mcodeptr++) = 0xdd;
1578 emit_membase(cd, (basereg),(disp),2);
1582 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1584 *(cd->mcodeptr++) = 0xd9;
1585 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1589 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1591 *(cd->mcodeptr++) = 0xdd;
1592 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1596 void emit_fstp_reg(codegendata *cd, s4 reg)
1598 *(cd->mcodeptr++) = 0xdd;
1599 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1603 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1605 *(cd->mcodeptr++) = 0xd9;
1606 emit_membase(cd, (basereg),(disp),3);
1610 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1612 *(cd->mcodeptr++) = 0xd9;
1613 emit_membase32(cd, (basereg),(disp),3);
1617 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1619 *(cd->mcodeptr++) = 0xdd;
1620 emit_membase(cd, (basereg),(disp),3);
1624 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1626 *(cd->mcodeptr++) = 0xdd;
1627 emit_membase32(cd, (basereg),(disp),3);
1631 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1633 *(cd->mcodeptr++) = 0xdb;
1634 emit_membase(cd, (basereg),(disp),7);
1638 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1640 *(cd->mcodeptr++) = 0xd9;
1641 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1645 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1647 *(cd->mcodeptr++) = 0xdd;
1648 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1652 void emit_fstps_mem(codegendata *cd, s4 mem)
1654 *(cd->mcodeptr++) = 0xd9;
1659 void emit_fstpl_mem(codegendata *cd, s4 mem)
1661 *(cd->mcodeptr++) = 0xdd;
1666 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1668 *(cd->mcodeptr++) = 0xdb;
1669 emit_membase(cd, (basereg),(disp),2);
1673 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1675 *(cd->mcodeptr++) = 0xdb;
1676 emit_membase(cd, (basereg),(disp),3);
1680 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1682 *(cd->mcodeptr++) = 0xdf;
1683 emit_membase(cd, (basereg),(disp),7);
1687 void emit_fchs(codegendata *cd)
1689 *(cd->mcodeptr++) = 0xd9;
1690 *(cd->mcodeptr++) = 0xe0;
1694 void emit_faddp(codegendata *cd)
1696 *(cd->mcodeptr++) = 0xde;
1697 *(cd->mcodeptr++) = 0xc1;
1701 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1703 *(cd->mcodeptr++) = 0xd8;
1704 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1708 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1710 *(cd->mcodeptr++) = 0xdc;
1711 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1715 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1717 *(cd->mcodeptr++) = 0xde;
1718 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1722 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1724 *(cd->mcodeptr++) = 0xd8;
1725 emit_membase(cd, (basereg),(disp),0);
1729 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1731 *(cd->mcodeptr++) = 0xdc;
1732 emit_membase(cd, (basereg),(disp),0);
1736 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1738 *(cd->mcodeptr++) = 0xd8;
1739 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1743 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1745 *(cd->mcodeptr++) = 0xdc;
1746 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1750 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1752 *(cd->mcodeptr++) = 0xde;
1753 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1757 void emit_fsubp(codegendata *cd)
1759 *(cd->mcodeptr++) = 0xde;
1760 *(cd->mcodeptr++) = 0xe9;
1764 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1766 *(cd->mcodeptr++) = 0xd8;
1767 emit_membase(cd, (basereg),(disp),4);
1771 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1773 *(cd->mcodeptr++) = 0xdc;
1774 emit_membase(cd, (basereg),(disp),4);
1778 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1780 *(cd->mcodeptr++) = 0xd8;
1781 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1785 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1787 *(cd->mcodeptr++) = 0xdc;
1788 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1792 void emit_fmulp(codegendata *cd)
1794 *(cd->mcodeptr++) = 0xde;
1795 *(cd->mcodeptr++) = 0xc9;
1799 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1801 *(cd->mcodeptr++) = 0xde;
1802 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1806 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1808 *(cd->mcodeptr++) = 0xd8;
1809 emit_membase(cd, (basereg),(disp),1);
1813 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1815 *(cd->mcodeptr++) = 0xdc;
1816 emit_membase(cd, (basereg),(disp),1);
1820 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1822 *(cd->mcodeptr++) = 0xd8;
1823 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1827 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1829 *(cd->mcodeptr++) = 0xdc;
1830 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1834 void emit_fdivp(codegendata *cd)
1836 *(cd->mcodeptr++) = 0xde;
1837 *(cd->mcodeptr++) = 0xf9;
1841 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1843 *(cd->mcodeptr++) = 0xde;
1844 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1848 void emit_fxch(codegendata *cd)
1850 *(cd->mcodeptr++) = 0xd9;
1851 *(cd->mcodeptr++) = 0xc9;
1855 void emit_fxch_reg(codegendata *cd, s4 reg)
1857 *(cd->mcodeptr++) = 0xd9;
1858 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1862 void emit_fprem(codegendata *cd)
1864 *(cd->mcodeptr++) = 0xd9;
1865 *(cd->mcodeptr++) = 0xf8;
1869 void emit_fprem1(codegendata *cd)
1871 *(cd->mcodeptr++) = 0xd9;
1872 *(cd->mcodeptr++) = 0xf5;
1876 void emit_fucom(codegendata *cd)
1878 *(cd->mcodeptr++) = 0xdd;
1879 *(cd->mcodeptr++) = 0xe1;
1883 void emit_fucom_reg(codegendata *cd, s4 reg)
1885 *(cd->mcodeptr++) = 0xdd;
1886 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1890 void emit_fucomp_reg(codegendata *cd, s4 reg)
1892 *(cd->mcodeptr++) = 0xdd;
1893 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1897 void emit_fucompp(codegendata *cd)
1899 *(cd->mcodeptr++) = 0xda;
1900 *(cd->mcodeptr++) = 0xe9;
1904 void emit_fnstsw(codegendata *cd)
1906 *(cd->mcodeptr++) = 0xdf;
1907 *(cd->mcodeptr++) = 0xe0;
1911 void emit_sahf(codegendata *cd)
1913 *(cd->mcodeptr++) = 0x9e;
1917 void emit_finit(codegendata *cd)
1919 *(cd->mcodeptr++) = 0x9b;
1920 *(cd->mcodeptr++) = 0xdb;
1921 *(cd->mcodeptr++) = 0xe3;
1925 void emit_fldcw_mem(codegendata *cd, s4 mem)
1927 *(cd->mcodeptr++) = 0xd9;
1932 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1934 *(cd->mcodeptr++) = 0xd9;
1935 emit_membase(cd, (basereg),(disp),5);
1939 void emit_wait(codegendata *cd)
1941 *(cd->mcodeptr++) = 0x9b;
1945 void emit_ffree_reg(codegendata *cd, s4 reg)
1947 *(cd->mcodeptr++) = 0xdd;
1948 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1952 void emit_fdecstp(codegendata *cd)
1954 *(cd->mcodeptr++) = 0xd9;
1955 *(cd->mcodeptr++) = 0xf6;
1959 void emit_fincstp(codegendata *cd)
1961 *(cd->mcodeptr++) = 0xd9;
1962 *(cd->mcodeptr++) = 0xf7;
1967 * These are local overrides for various environment variables in Emacs.
1968 * Please do not remove this and leave it at the end of the file, where
1969 * Emacs will automagically detect them.
1970 * ---------------------------------------------------------------------
1973 * indent-tabs-mode: t