1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 6137 2006-12-07 22:25:42Z edwin $
40 #include "vm/jit/i386/codegen.h"
41 #include "vm/jit/i386/emit.h"
42 #include "vm/jit/i386/md-abi.h"
44 #if defined(ENABLE_THREADS)
45 # include "threads/native/lock.h"
48 #include "vm/builtin.h"
49 #include "vm/options.h"
50 #include "vm/statistics.h"
51 #include "vm/jit/asmpart.h"
52 #include "vm/jit/dseg.h"
53 #include "vm/jit/emit-common.h"
54 #include "vm/jit/jit.h"
55 #include "vm/jit/replace.h"
58 /* emit_load ******************************************************************
60 Emits a possible load of an operand.
62 *******************************************************************************/
64 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
70 /* get required compiler data */
74 if (IS_INMEMORY(src->flags)) {
77 disp = src->vv.regoff * 4;
79 if (IS_FLT_DBL_TYPE(src->type)) {
80 if (IS_2_WORD_TYPE(src->type))
81 M_DLD(tempreg, REG_SP, disp);
83 M_FLD(tempreg, REG_SP, disp);
86 if (IS_2_WORD_TYPE(src->type))
87 M_LLD(tempreg, REG_SP, disp);
89 M_ILD(tempreg, REG_SP, disp);
101 /* emit_load_low ************************************************************
103 Emits a possible load of the low 32-bits of an operand.
105 *******************************************************************************/
107 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
113 assert(src->type == TYPE_LNG);
115 /* get required compiler data */
120 if (IS_INMEMORY(src->flags)) {
123 disp = src->vv.regoff * 4;
125 M_ILD(tempreg, REG_SP, disp);
130 reg = GET_LOW_REG(src->vv.regoff);
136 /* emit_load_high ***********************************************************
138 Emits a possible load of the high 32-bits of an operand.
140 *******************************************************************************/
142 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
148 /* get required compiler data */
150 assert(src->type == TYPE_LNG);
154 if (IS_INMEMORY(src->flags)) {
157 disp = src->vv.regoff * 4;
159 M_ILD(tempreg, REG_SP, disp + 4);
164 reg = GET_HIGH_REG(src->vv.regoff);
170 /* emit_store ******************************************************************
172 Emits a possible store of the destination operand.
174 *******************************************************************************/
176 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
180 /* get required compiler data */
184 if (IS_INMEMORY(dst->flags)) {
187 if (IS_FLT_DBL_TYPE(dst->type)) {
188 if (IS_2_WORD_TYPE(dst->type))
189 M_DST(d, REG_SP, dst->vv.regoff * 4);
191 M_FST(d, REG_SP, dst->vv.regoff * 4);
194 if (IS_2_WORD_TYPE(dst->type))
195 M_LST(d, REG_SP, dst->vv.regoff * 4);
197 M_IST(d, REG_SP, dst->vv.regoff * 4);
203 /* emit_store_low **************************************************************
205 Emits a possible store of the low 32-bits of the destination
208 *******************************************************************************/
210 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
214 assert(dst->type == TYPE_LNG);
216 /* get required compiler data */
220 if (IS_INMEMORY(dst->flags)) {
222 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
227 /* emit_store_high *************************************************************
229 Emits a possible store of the high 32-bits of the destination
232 *******************************************************************************/
234 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
238 assert(dst->type == TYPE_LNG);
240 /* get required compiler data */
244 if (IS_INMEMORY(dst->flags)) {
246 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
251 /* emit_copy *******************************************************************
253 Generates a register/memory to register/memory copy.
255 *******************************************************************************/
257 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
262 /* get required compiler data */
266 if ((src->vv.regoff != dst->vv.regoff) ||
267 ((src->flags ^ dst->flags) & INMEMORY)) {
269 /* If one of the variables resides in memory, we can eliminate
270 the register move from/to the temporary register with the
271 order of getting the destination register and the load. */
273 if (IS_INMEMORY(src->flags)) {
274 if (IS_LNG_TYPE(src->type))
275 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
277 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
279 s1 = emit_load(jd, iptr, src, d);
282 if (IS_LNG_TYPE(src->type))
283 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
285 s1 = emit_load(jd, iptr, src, REG_ITMP1);
287 d = codegen_reg_of_var(iptr->opc, dst, s1);
291 if (IS_FLT_DBL_TYPE(src->type)) {
294 if (IS_2_WORD_TYPE(src->type))
301 emit_store(jd, iptr, dst, d);
306 /* emit_arithmetic_check *******************************************************
308 Emit an ArithmeticException check.
310 *******************************************************************************/
312 void emit_arithmetic_check(codegendata *cd, s4 reg)
317 codegen_add_arithmeticexception_ref(cd);
322 /* emit_arrayindexoutofbounds_check ********************************************
324 Emit a ArrayIndexOutOfBoundsException check.
326 *******************************************************************************/
328 void emit_arrayindexoutofbounds_check(codegendata *cd, s4 s1, s4 s2)
331 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
332 M_CMP(REG_ITMP3, s2);
334 codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
339 /* emit_classcast_check ********************************************************
341 Emit a ClassCastException check.
343 *******************************************************************************/
345 void emit_classcast_check(codegendata *cd, s4 condition, s4 reg, s4 s1)
347 vm_abort("IMPLEMENT ME!");
351 /* emit_nullpointer_check ******************************************************
353 Emit a NullPointerException check.
355 *******************************************************************************/
357 void emit_nullpointer_check(codegendata *cd, s4 reg)
362 codegen_add_nullpointerexception_ref(cd);
367 /* emit_exception_stubs ********************************************************
369 Generates the code for the exception stubs.
371 *******************************************************************************/
373 void emit_exception_stubs(jitdata *jd)
382 /* get required compiler data */
387 /* generate exception stubs */
391 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
392 /* back-patch the branch to this exception code */
394 branchmpc = er->branchpos;
395 targetmpc = cd->mcodeptr - cd->mcodebase;
397 md_codegen_patch_branch(cd, branchmpc, targetmpc);
401 /* Check if the exception is an
402 ArrayIndexOutOfBoundsException. If so, move index register
406 M_INTMOVE(er->reg, REG_ITMP1);
408 /* calcuate exception address */
410 M_MOV_IMM(0, REG_ITMP2_XPC);
412 M_AADD_IMM32(er->branchpos - 6, REG_ITMP2_XPC);
414 /* move function to call into REG_ITMP3 */
416 M_MOV_IMM(er->function, REG_ITMP3);
418 if (targetdisp == 0) {
419 targetdisp = cd->mcodeptr - cd->mcodebase;
421 M_ASUB_IMM(5 * 4, REG_SP);
423 /* first store REG_ITMP1 so we can use it */
425 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
427 M_AST_IMM(0, REG_SP, 0 * 4);
429 M_MOV(REG_SP, REG_ITMP1);
430 M_AADD_IMM(5 * 4, REG_ITMP1);
431 M_AST(REG_ITMP1, REG_SP, 1 * 4);
432 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
433 M_AST(REG_ITMP1, REG_SP, 2 * 4);
434 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
438 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
439 M_AADD_IMM(5 * 4, REG_SP);
441 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
445 M_JMP_IMM((cd->mcodebase + targetdisp) -
446 (cd->mcodeptr + PATCHER_CALL_SIZE));
452 /* emit_patcher_stubs **********************************************************
454 Generates the code for the patcher stubs.
456 *******************************************************************************/
458 void emit_patcher_stubs(jitdata *jd)
468 /* get required compiler data */
472 /* generate code patching stub call code */
476 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
477 /* check code segment size */
481 /* Get machine code which is patched back in later. A
482 `call rel32' is 5 bytes long. */
484 savedmcodeptr = cd->mcodebase + pref->branchpos;
485 mcode = *((u8 *) savedmcodeptr);
487 /* patch in `call rel32' to call the following code */
489 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
490 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
492 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
494 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
500 /* move pointer to java_objectheader onto stack */
502 #if defined(ENABLE_THREADS)
503 (void) dseg_add_unique_address(cd, NULL); /* flcword */
504 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
505 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
507 M_MOV_IMM(0, REG_ITMP3);
509 M_AADD_IMM(disp, REG_ITMP3);
515 /* move machine code bytes and classinfo pointer into registers */
517 M_PUSH_IMM(mcode >> 32);
519 M_PUSH_IMM(pref->ref);
520 M_PUSH_IMM(pref->patcher);
522 if (targetdisp == 0) {
523 targetdisp = cd->mcodeptr - cd->mcodebase;
525 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
529 M_JMP_IMM((cd->mcodebase + targetdisp) -
530 (cd->mcodeptr + PATCHER_CALL_SIZE));
536 /* emit_replacement_stubs ******************************************************
538 Generates the code for the replacement stubs.
540 *******************************************************************************/
542 void emit_replacement_stubs(jitdata *jd)
553 /* get required compiler data */
558 rplp = code->rplpoints;
560 /* store beginning of replacement stubs */
562 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
564 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
565 /* do not generate stubs for non-trappable points */
567 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
570 /* check code segment size */
574 /* note start of stub code */
577 savedmcodeptr = cd->mcodeptr;
580 /* push address of `rplpoint` struct */
584 /* jump to replacement function */
586 M_PUSH_IMM(asm_replacement_out);
589 assert((cd->mcodeptr - savedmcodeptr) == REPLACEMENT_STUB_SIZE);
594 /* emit_verbosecall_enter ******************************************************
596 Generates the code for the call trace.
598 *******************************************************************************/
601 void emit_verbosecall_enter(jitdata *jd)
610 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
613 /* get required compiler data */
621 /* mark trace code */
625 /* methodinfo* + arguments + return address */
627 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
628 cd->stackframesize * 4 + 4;
630 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
632 /* save temporary registers for leaf methods */
634 for (i = 0; i < INT_TMP_CNT; i++)
635 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
637 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
638 t = md->paramtypes[i].type;
640 if (IS_INT_LNG_TYPE(t)) {
641 if (IS_2_WORD_TYPE(t)) {
642 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
643 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
645 else if (IS_ADR_TYPE(t)) {
646 M_ALD(REG_ITMP1, REG_SP, disp);
647 M_AST(REG_ITMP1, REG_SP, i * 8);
648 M_IST_IMM(0, REG_SP, i * 8 + 4);
651 M_ILD(EAX, REG_SP, disp);
653 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
657 if (IS_2_WORD_TYPE(t)) {
658 M_DLD(REG_NULL, REG_SP, disp);
659 M_DST(REG_NULL, REG_SP, i * 8);
662 M_FLD(REG_NULL, REG_SP, disp);
663 M_FST(REG_NULL, REG_SP, i * 8);
664 M_IST_IMM(0, REG_SP, i * 8 + 4);
668 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
671 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
673 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
676 /* restore temporary registers for leaf methods */
678 for (i = 0; i < INT_TMP_CNT; i++)
679 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
681 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
683 /* mark trace code */
687 #endif /* !defined(NDEBUG) */
690 /* emit_verbosecall_exit *******************************************************
692 Generates the code for the call trace.
694 *******************************************************************************/
697 void emit_verbosecall_exit(jitdata *jd)
703 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
706 /* get required compiler data */
712 /* mark trace code */
716 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
718 M_AST_IMM(m, REG_SP, 0 * 4);
720 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
722 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
723 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
725 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
728 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
730 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
732 /* mark trace code */
736 #endif /* !defined(NDEBUG) */
739 /* code generation functions **************************************************/
741 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
743 if (basereg == ESP) {
745 emit_address_byte(0, dreg, ESP);
746 emit_address_byte(0, ESP, ESP);
748 else if (IS_IMM8(disp)) {
749 emit_address_byte(1, dreg, ESP);
750 emit_address_byte(0, ESP, ESP);
754 emit_address_byte(2, dreg, ESP);
755 emit_address_byte(0, ESP, ESP);
759 else if ((disp == 0) && (basereg != EBP)) {
760 emit_address_byte(0, dreg, basereg);
762 else if (IS_IMM8(disp)) {
763 emit_address_byte(1, dreg, basereg);
767 emit_address_byte(2, dreg, basereg);
773 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
775 if (basereg == ESP) {
776 emit_address_byte(2, dreg, ESP);
777 emit_address_byte(0, ESP, ESP);
781 emit_address_byte(2, dreg, basereg);
787 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
790 emit_address_byte(0, reg, 4);
791 emit_address_byte(scale, indexreg, 5);
794 else if ((disp == 0) && (basereg != EBP)) {
795 emit_address_byte(0, reg, 4);
796 emit_address_byte(scale, indexreg, basereg);
798 else if (IS_IMM8(disp)) {
799 emit_address_byte(1, reg, 4);
800 emit_address_byte(scale, indexreg, basereg);
804 emit_address_byte(2, reg, 4);
805 emit_address_byte(scale, indexreg, basereg);
811 /* low-level code emitter functions *******************************************/
813 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
815 COUNT(count_mov_reg_reg);
816 *(cd->mcodeptr++) = 0x89;
817 emit_reg((reg),(dreg));
821 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
823 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
828 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
830 *(cd->mcodeptr++) = 0xc6;
836 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
838 COUNT(count_mov_mem_reg);
839 *(cd->mcodeptr++) = 0x8b;
840 emit_membase(cd, (basereg),(disp),(reg));
845 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
846 * constant membase immediate length of 32bit
848 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
850 COUNT(count_mov_mem_reg);
851 *(cd->mcodeptr++) = 0x8b;
852 emit_membase32(cd, (basereg),(disp),(reg));
856 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
858 COUNT(count_mov_reg_mem);
859 *(cd->mcodeptr++) = 0x89;
860 emit_membase(cd, (basereg),(disp),(reg));
864 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
866 COUNT(count_mov_reg_mem);
867 *(cd->mcodeptr++) = 0x89;
868 emit_membase32(cd, (basereg),(disp),(reg));
872 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
874 COUNT(count_mov_mem_reg);
875 *(cd->mcodeptr++) = 0x8b;
876 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
880 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
882 COUNT(count_mov_reg_mem);
883 *(cd->mcodeptr++) = 0x89;
884 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
888 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
890 COUNT(count_mov_reg_mem);
891 *(cd->mcodeptr++) = 0x66;
892 *(cd->mcodeptr++) = 0x89;
893 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
897 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
899 COUNT(count_mov_reg_mem);
900 *(cd->mcodeptr++) = 0x88;
901 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
905 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
907 COUNT(count_mov_reg_mem);
908 *(cd->mcodeptr++) = 0x89;
909 emit_mem((reg),(mem));
913 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
915 COUNT(count_mov_mem_reg);
916 *(cd->mcodeptr++) = 0x8b;
917 emit_mem((dreg),(mem));
921 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
923 *(cd->mcodeptr++) = 0xc7;
929 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
931 *(cd->mcodeptr++) = 0xc7;
932 emit_membase(cd, (basereg),(disp),0);
937 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
939 *(cd->mcodeptr++) = 0xc7;
940 emit_membase32(cd, (basereg),(disp),0);
945 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
947 *(cd->mcodeptr++) = 0xc6;
948 emit_membase(cd, (basereg),(disp),0);
953 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
955 COUNT(count_mov_mem_reg);
956 *(cd->mcodeptr++) = 0x0f;
957 *(cd->mcodeptr++) = 0xbe;
958 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
962 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
964 *(cd->mcodeptr++) = 0x0f;
965 *(cd->mcodeptr++) = 0xbf;
970 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
972 COUNT(count_mov_mem_reg);
973 *(cd->mcodeptr++) = 0x0f;
974 *(cd->mcodeptr++) = 0xbf;
975 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
979 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
981 *(cd->mcodeptr++) = 0x0f;
982 *(cd->mcodeptr++) = 0xb7;
987 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
989 COUNT(count_mov_mem_reg);
990 *(cd->mcodeptr++) = 0x0f;
991 *(cd->mcodeptr++) = 0xb7;
992 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
996 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
998 *(cd->mcodeptr++) = 0xc7;
999 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1004 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1006 *(cd->mcodeptr++) = 0x66;
1007 *(cd->mcodeptr++) = 0xc7;
1008 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1013 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1015 *(cd->mcodeptr++) = 0xc6;
1016 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1024 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1026 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1027 emit_reg((reg),(dreg));
1031 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1033 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1034 emit_membase(cd, (basereg),(disp),(reg));
1038 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1040 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1041 emit_membase(cd, (basereg),(disp),(reg));
1045 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1048 *(cd->mcodeptr++) = 0x83;
1049 emit_reg((opc),(dreg));
1052 *(cd->mcodeptr++) = 0x81;
1053 emit_reg((opc),(dreg));
1059 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1061 *(cd->mcodeptr++) = 0x81;
1062 emit_reg((opc),(dreg));
1067 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1070 *(cd->mcodeptr++) = 0x83;
1071 emit_membase(cd, (basereg),(disp),(opc));
1074 *(cd->mcodeptr++) = 0x81;
1075 emit_membase(cd, (basereg),(disp),(opc));
1081 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1084 *(cd->mcodeptr++) = 0x83;
1085 emit_mem(opc, disp);
1088 *(cd->mcodeptr++) = 0x81;
1089 emit_mem(opc, disp);
1095 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1097 *(cd->mcodeptr++) = 0x85;
1098 emit_reg((reg),(dreg));
1102 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1104 *(cd->mcodeptr++) = 0xf7;
1112 * inc, dec operations
1114 void emit_dec_mem(codegendata *cd, s4 mem)
1116 *(cd->mcodeptr++) = 0xff;
1121 void emit_cltd(codegendata *cd)
1123 *(cd->mcodeptr++) = 0x99;
1127 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1129 *(cd->mcodeptr++) = 0x0f;
1130 *(cd->mcodeptr++) = 0xaf;
1131 emit_reg((dreg),(reg));
1135 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1137 *(cd->mcodeptr++) = 0x0f;
1138 *(cd->mcodeptr++) = 0xaf;
1139 emit_membase(cd, (basereg),(disp),(dreg));
1143 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1145 if (IS_IMM8((imm))) {
1146 *(cd->mcodeptr++) = 0x6b;
1150 *(cd->mcodeptr++) = 0x69;
1157 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1159 if (IS_IMM8((imm))) {
1160 *(cd->mcodeptr++) = 0x6b;
1161 emit_reg((dreg),(reg));
1164 *(cd->mcodeptr++) = 0x69;
1165 emit_reg((dreg),(reg));
1171 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1173 if (IS_IMM8((imm))) {
1174 *(cd->mcodeptr++) = 0x6b;
1175 emit_membase(cd, (basereg),(disp),(dreg));
1178 *(cd->mcodeptr++) = 0x69;
1179 emit_membase(cd, (basereg),(disp),(dreg));
1185 void emit_mul_reg(codegendata *cd, s4 reg)
1187 *(cd->mcodeptr++) = 0xf7;
1192 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1194 *(cd->mcodeptr++) = 0xf7;
1195 emit_membase(cd, (basereg),(disp),4);
1199 void emit_idiv_reg(codegendata *cd, s4 reg)
1201 *(cd->mcodeptr++) = 0xf7;
1206 void emit_ret(codegendata *cd)
1208 *(cd->mcodeptr++) = 0xc3;
1216 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1218 *(cd->mcodeptr++) = 0xd3;
1219 emit_reg((opc),(reg));
1223 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1226 *(cd->mcodeptr++) = 0xd1;
1227 emit_reg((opc),(dreg));
1229 *(cd->mcodeptr++) = 0xc1;
1230 emit_reg((opc),(dreg));
1236 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1238 *(cd->mcodeptr++) = 0x0f;
1239 *(cd->mcodeptr++) = 0xa5;
1240 emit_reg((reg),(dreg));
1244 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1246 *(cd->mcodeptr++) = 0x0f;
1247 *(cd->mcodeptr++) = 0xa4;
1248 emit_reg((reg),(dreg));
1253 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1255 *(cd->mcodeptr++) = 0x0f;
1256 *(cd->mcodeptr++) = 0xa5;
1257 emit_membase(cd, (basereg),(disp),(reg));
1261 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1263 *(cd->mcodeptr++) = 0x0f;
1264 *(cd->mcodeptr++) = 0xad;
1265 emit_reg((reg),(dreg));
1269 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1271 *(cd->mcodeptr++) = 0x0f;
1272 *(cd->mcodeptr++) = 0xac;
1273 emit_reg((reg),(dreg));
1278 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1280 *(cd->mcodeptr++) = 0x0f;
1281 *(cd->mcodeptr++) = 0xad;
1282 emit_membase(cd, (basereg),(disp),(reg));
1290 void emit_jmp_imm(codegendata *cd, s4 imm)
1292 *(cd->mcodeptr++) = 0xe9;
1297 void emit_jmp_reg(codegendata *cd, s4 reg)
1299 *(cd->mcodeptr++) = 0xff;
1304 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1306 *(cd->mcodeptr++) = 0x0f;
1307 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1314 * conditional set operations
1316 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1318 *(cd->mcodeptr++) = 0x0f;
1319 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1324 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1326 *(cd->mcodeptr++) = 0x0f;
1327 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1328 emit_membase(cd, (basereg),(disp),0);
1332 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1334 *(cd->mcodeptr++) = 0x0f;
1335 *(cd->mcodeptr++) = 0xc1;
1336 emit_mem((reg),(mem));
1340 void emit_neg_reg(codegendata *cd, s4 reg)
1342 *(cd->mcodeptr++) = 0xf7;
1348 void emit_push_imm(codegendata *cd, s4 imm)
1350 *(cd->mcodeptr++) = 0x68;
1355 void emit_pop_reg(codegendata *cd, s4 reg)
1357 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1361 void emit_push_reg(codegendata *cd, s4 reg)
1363 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1367 void emit_nop(codegendata *cd)
1369 *(cd->mcodeptr++) = 0x90;
1373 void emit_lock(codegendata *cd)
1375 *(cd->mcodeptr++) = 0xf0;
1382 void emit_call_reg(codegendata *cd, s4 reg)
1384 *(cd->mcodeptr++) = 0xff;
1389 void emit_call_imm(codegendata *cd, s4 imm)
1391 *(cd->mcodeptr++) = 0xe8;
1398 * floating point instructions
1400 void emit_fld1(codegendata *cd)
1402 *(cd->mcodeptr++) = 0xd9;
1403 *(cd->mcodeptr++) = 0xe8;
1407 void emit_fldz(codegendata *cd)
1409 *(cd->mcodeptr++) = 0xd9;
1410 *(cd->mcodeptr++) = 0xee;
1414 void emit_fld_reg(codegendata *cd, s4 reg)
1416 *(cd->mcodeptr++) = 0xd9;
1417 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1421 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1423 *(cd->mcodeptr++) = 0xd9;
1424 emit_membase(cd, (basereg),(disp),0);
1428 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1430 *(cd->mcodeptr++) = 0xd9;
1431 emit_membase32(cd, (basereg),(disp),0);
1435 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1437 *(cd->mcodeptr++) = 0xdd;
1438 emit_membase(cd, (basereg),(disp),0);
1442 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1444 *(cd->mcodeptr++) = 0xdd;
1445 emit_membase32(cd, (basereg),(disp),0);
1449 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1451 *(cd->mcodeptr++) = 0xdb;
1452 emit_membase(cd, (basereg),(disp),5);
1456 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1458 *(cd->mcodeptr++) = 0xd9;
1459 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1463 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1465 *(cd->mcodeptr++) = 0xdd;
1466 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1470 void emit_flds_mem(codegendata *cd, s4 mem)
1472 *(cd->mcodeptr++) = 0xd9;
1477 void emit_fldl_mem(codegendata *cd, s4 mem)
1479 *(cd->mcodeptr++) = 0xdd;
1484 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1486 *(cd->mcodeptr++) = 0xdb;
1487 emit_membase(cd, (basereg),(disp),0);
1491 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1493 *(cd->mcodeptr++) = 0xdf;
1494 emit_membase(cd, (basereg),(disp),5);
1498 void emit_fst_reg(codegendata *cd, s4 reg)
1500 *(cd->mcodeptr++) = 0xdd;
1501 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1505 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1507 *(cd->mcodeptr++) = 0xd9;
1508 emit_membase(cd, (basereg),(disp),2);
1512 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1514 *(cd->mcodeptr++) = 0xdd;
1515 emit_membase(cd, (basereg),(disp),2);
1519 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1521 *(cd->mcodeptr++) = 0xd9;
1522 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1526 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1528 *(cd->mcodeptr++) = 0xdd;
1529 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1533 void emit_fstp_reg(codegendata *cd, s4 reg)
1535 *(cd->mcodeptr++) = 0xdd;
1536 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1540 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1542 *(cd->mcodeptr++) = 0xd9;
1543 emit_membase(cd, (basereg),(disp),3);
1547 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1549 *(cd->mcodeptr++) = 0xd9;
1550 emit_membase32(cd, (basereg),(disp),3);
1554 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1556 *(cd->mcodeptr++) = 0xdd;
1557 emit_membase(cd, (basereg),(disp),3);
1561 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1563 *(cd->mcodeptr++) = 0xdd;
1564 emit_membase32(cd, (basereg),(disp),3);
1568 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1570 *(cd->mcodeptr++) = 0xdb;
1571 emit_membase(cd, (basereg),(disp),7);
1575 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1577 *(cd->mcodeptr++) = 0xd9;
1578 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1582 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1584 *(cd->mcodeptr++) = 0xdd;
1585 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1589 void emit_fstps_mem(codegendata *cd, s4 mem)
1591 *(cd->mcodeptr++) = 0xd9;
1596 void emit_fstpl_mem(codegendata *cd, s4 mem)
1598 *(cd->mcodeptr++) = 0xdd;
1603 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1605 *(cd->mcodeptr++) = 0xdb;
1606 emit_membase(cd, (basereg),(disp),2);
1610 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1612 *(cd->mcodeptr++) = 0xdb;
1613 emit_membase(cd, (basereg),(disp),3);
1617 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1619 *(cd->mcodeptr++) = 0xdf;
1620 emit_membase(cd, (basereg),(disp),7);
1624 void emit_fchs(codegendata *cd)
1626 *(cd->mcodeptr++) = 0xd9;
1627 *(cd->mcodeptr++) = 0xe0;
1631 void emit_faddp(codegendata *cd)
1633 *(cd->mcodeptr++) = 0xde;
1634 *(cd->mcodeptr++) = 0xc1;
1638 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1640 *(cd->mcodeptr++) = 0xd8;
1641 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1645 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1647 *(cd->mcodeptr++) = 0xdc;
1648 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1652 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1654 *(cd->mcodeptr++) = 0xde;
1655 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1659 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1661 *(cd->mcodeptr++) = 0xd8;
1662 emit_membase(cd, (basereg),(disp),0);
1666 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1668 *(cd->mcodeptr++) = 0xdc;
1669 emit_membase(cd, (basereg),(disp),0);
1673 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1675 *(cd->mcodeptr++) = 0xd8;
1676 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1680 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1682 *(cd->mcodeptr++) = 0xdc;
1683 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1687 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1689 *(cd->mcodeptr++) = 0xde;
1690 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1694 void emit_fsubp(codegendata *cd)
1696 *(cd->mcodeptr++) = 0xde;
1697 *(cd->mcodeptr++) = 0xe9;
1701 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1703 *(cd->mcodeptr++) = 0xd8;
1704 emit_membase(cd, (basereg),(disp),4);
1708 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1710 *(cd->mcodeptr++) = 0xdc;
1711 emit_membase(cd, (basereg),(disp),4);
1715 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1717 *(cd->mcodeptr++) = 0xd8;
1718 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1722 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1724 *(cd->mcodeptr++) = 0xdc;
1725 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1729 void emit_fmulp(codegendata *cd)
1731 *(cd->mcodeptr++) = 0xde;
1732 *(cd->mcodeptr++) = 0xc9;
1736 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1738 *(cd->mcodeptr++) = 0xde;
1739 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1743 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1745 *(cd->mcodeptr++) = 0xd8;
1746 emit_membase(cd, (basereg),(disp),1);
1750 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1752 *(cd->mcodeptr++) = 0xdc;
1753 emit_membase(cd, (basereg),(disp),1);
1757 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1759 *(cd->mcodeptr++) = 0xd8;
1760 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1764 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1766 *(cd->mcodeptr++) = 0xdc;
1767 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1771 void emit_fdivp(codegendata *cd)
1773 *(cd->mcodeptr++) = 0xde;
1774 *(cd->mcodeptr++) = 0xf9;
1778 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1780 *(cd->mcodeptr++) = 0xde;
1781 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1785 void emit_fxch(codegendata *cd)
1787 *(cd->mcodeptr++) = 0xd9;
1788 *(cd->mcodeptr++) = 0xc9;
1792 void emit_fxch_reg(codegendata *cd, s4 reg)
1794 *(cd->mcodeptr++) = 0xd9;
1795 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1799 void emit_fprem(codegendata *cd)
1801 *(cd->mcodeptr++) = 0xd9;
1802 *(cd->mcodeptr++) = 0xf8;
1806 void emit_fprem1(codegendata *cd)
1808 *(cd->mcodeptr++) = 0xd9;
1809 *(cd->mcodeptr++) = 0xf5;
1813 void emit_fucom(codegendata *cd)
1815 *(cd->mcodeptr++) = 0xdd;
1816 *(cd->mcodeptr++) = 0xe1;
1820 void emit_fucom_reg(codegendata *cd, s4 reg)
1822 *(cd->mcodeptr++) = 0xdd;
1823 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1827 void emit_fucomp_reg(codegendata *cd, s4 reg)
1829 *(cd->mcodeptr++) = 0xdd;
1830 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1834 void emit_fucompp(codegendata *cd)
1836 *(cd->mcodeptr++) = 0xda;
1837 *(cd->mcodeptr++) = 0xe9;
1841 void emit_fnstsw(codegendata *cd)
1843 *(cd->mcodeptr++) = 0xdf;
1844 *(cd->mcodeptr++) = 0xe0;
1848 void emit_sahf(codegendata *cd)
1850 *(cd->mcodeptr++) = 0x9e;
1854 void emit_finit(codegendata *cd)
1856 *(cd->mcodeptr++) = 0x9b;
1857 *(cd->mcodeptr++) = 0xdb;
1858 *(cd->mcodeptr++) = 0xe3;
1862 void emit_fldcw_mem(codegendata *cd, s4 mem)
1864 *(cd->mcodeptr++) = 0xd9;
1869 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1871 *(cd->mcodeptr++) = 0xd9;
1872 emit_membase(cd, (basereg),(disp),5);
1876 void emit_wait(codegendata *cd)
1878 *(cd->mcodeptr++) = 0x9b;
1882 void emit_ffree_reg(codegendata *cd, s4 reg)
1884 *(cd->mcodeptr++) = 0xdd;
1885 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1889 void emit_fdecstp(codegendata *cd)
1891 *(cd->mcodeptr++) = 0xd9;
1892 *(cd->mcodeptr++) = 0xf6;
1896 void emit_fincstp(codegendata *cd)
1898 *(cd->mcodeptr++) = 0xd9;
1899 *(cd->mcodeptr++) = 0xf7;
1904 * These are local overrides for various environment variables in Emacs.
1905 * Please do not remove this and leave it at the end of the file, where
1906 * Emacs will automagically detect them.
1907 * ---------------------------------------------------------------------
1910 * indent-tabs-mode: t