1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "vm/jit/i386/codegen.h"
33 #include "vm/jit/i386/emit.h"
34 #include "vm/jit/i386/md-abi.h"
36 #include "mm/memory.h"
38 #include "threads/lock-common.h"
40 #include "vm/exceptions.h"
42 #include "vm/jit/abi.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/dseg.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/trace.h"
50 #include "vm/jit/trap.h"
52 #include "vmcore/options.h"
53 #include "vmcore/statistics.h"
56 /* emit_load ******************************************************************
58 Emits a possible load of an operand.
60 *******************************************************************************/
62 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
68 /* get required compiler data */
72 if (IS_INMEMORY(src->flags)) {
75 disp = src->vv.regoff;
80 M_ILD(tempreg, REG_SP, disp);
83 M_LLD(tempreg, REG_SP, disp);
86 M_FLD(tempreg, REG_SP, disp);
89 M_DLD(tempreg, REG_SP, disp);
92 vm_abort("emit_load: unknown type %d", src->type);
104 /* emit_load_low ************************************************************
106 Emits a possible load of the low 32-bits of an operand.
108 *******************************************************************************/
110 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
116 assert(src->type == TYPE_LNG);
118 /* get required compiler data */
123 if (IS_INMEMORY(src->flags)) {
126 disp = src->vv.regoff;
128 M_ILD(tempreg, REG_SP, disp);
133 reg = GET_LOW_REG(src->vv.regoff);
139 /* emit_load_high ***********************************************************
141 Emits a possible load of the high 32-bits of an operand.
143 *******************************************************************************/
145 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
151 /* get required compiler data */
153 assert(src->type == TYPE_LNG);
157 if (IS_INMEMORY(src->flags)) {
160 disp = src->vv.regoff;
162 M_ILD(tempreg, REG_SP, disp + 4);
167 reg = GET_HIGH_REG(src->vv.regoff);
173 /* emit_store ******************************************************************
175 Emits a possible store of the destination operand.
177 *******************************************************************************/
179 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
184 /* get required compiler data */
188 if (IS_INMEMORY(dst->flags)) {
191 disp = dst->vv.regoff;
196 M_IST(d, REG_SP, disp);
199 M_LST(d, REG_SP, disp);
202 M_FST(d, REG_SP, disp);
205 M_DST(d, REG_SP, disp);
208 vm_abort("emit_store: unknown type %d", dst->type);
214 /* emit_store_low **************************************************************
216 Emits a possible store of the low 32-bits of the destination
219 *******************************************************************************/
221 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
225 assert(dst->type == TYPE_LNG);
227 /* get required compiler data */
231 if (IS_INMEMORY(dst->flags)) {
233 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
238 /* emit_store_high *************************************************************
240 Emits a possible store of the high 32-bits of the destination
243 *******************************************************************************/
245 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
249 assert(dst->type == TYPE_LNG);
251 /* get required compiler data */
255 if (IS_INMEMORY(dst->flags)) {
257 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
262 /* emit_copy *******************************************************************
264 Generates a register/memory to register/memory copy.
266 *******************************************************************************/
268 void emit_copy(jitdata *jd, instruction *iptr)
275 /* get required compiler data */
279 /* get source and destination variables */
281 src = VAROP(iptr->s1);
282 dst = VAROP(iptr->dst);
284 if ((src->vv.regoff != dst->vv.regoff) ||
285 ((src->flags ^ dst->flags) & INMEMORY)) {
287 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
288 /* emit nothing, as the value won't be used anyway */
292 /* If one of the variables resides in memory, we can eliminate
293 the register move from/to the temporary register with the
294 order of getting the destination register and the load. */
296 if (IS_INMEMORY(src->flags)) {
297 if (IS_LNG_TYPE(src->type))
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 if (IS_LNG_TYPE(src->type))
306 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
308 s1 = emit_load(jd, iptr, src, REG_ITMP1);
310 d = codegen_reg_of_var(iptr->opc, dst, s1);
327 vm_abort("emit_copy: unknown type %d", src->type);
331 emit_store(jd, iptr, dst, d);
336 /* emit_branch *****************************************************************
338 Emits the code for conditional and unconditional branchs.
340 *******************************************************************************/
342 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
346 /* ATTENTION: a displacement overflow cannot happen */
348 /* check which branch to generate */
350 if (condition == BRANCH_UNCONDITIONAL) {
352 /* calculate the different displacements */
354 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
356 M_JMP_IMM(branchdisp);
359 /* calculate the different displacements */
361 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
395 vm_abort("emit_branch: unknown condition %d", condition);
401 /* emit_arithmetic_check *******************************************************
403 Emit an ArithmeticException check.
405 *******************************************************************************/
407 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
409 if (INSTRUCTION_MUST_CHECK(iptr)) {
412 M_ALD_MEM(reg, TRAP_ArithmeticException);
417 /* emit_arrayindexoutofbounds_check ********************************************
419 Emit a ArrayIndexOutOfBoundsException check.
421 *******************************************************************************/
423 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
425 if (INSTRUCTION_MUST_CHECK(iptr)) {
426 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
427 M_CMP(REG_ITMP3, s2);
429 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
434 /* emit_arraystore_check *******************************************************
436 Emit an ArrayStoreException check.
438 *******************************************************************************/
440 void emit_arraystore_check(codegendata *cd, instruction *iptr)
442 if (INSTRUCTION_MUST_CHECK(iptr)) {
445 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
450 /* emit_classcast_check ********************************************************
452 Emit a ClassCastException check.
454 *******************************************************************************/
456 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
458 if (INSTRUCTION_MUST_CHECK(iptr)) {
470 vm_abort("emit_classcast_check: unknown condition %d", condition);
472 M_ALD_MEM(s1, TRAP_ClassCastException);
477 /* emit_nullpointer_check ******************************************************
479 Emit a NullPointerException check.
481 *******************************************************************************/
483 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
485 if (INSTRUCTION_MUST_CHECK(iptr)) {
488 M_ALD_MEM(reg, TRAP_NullPointerException);
493 /* emit_exception_check ********************************************************
495 Emit an Exception check.
497 *******************************************************************************/
499 void emit_exception_check(codegendata *cd, instruction *iptr)
501 if (INSTRUCTION_MUST_CHECK(iptr)) {
504 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
509 /* emit_trap_compiler **********************************************************
511 Emit a trap instruction which calls the JIT compiler.
513 *******************************************************************************/
515 void emit_trap_compiler(codegendata *cd)
517 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
521 /* emit_trap *******************************************************************
523 Emit a trap instruction and return the original machine code.
525 *******************************************************************************/
527 uint32_t emit_trap(codegendata *cd)
531 /* Get machine code which is patched back in later. The
532 trap is 2 bytes long. */
534 mcode = *((uint16_t *) cd->mcodeptr);
537 /* XXX this breaks GDB, so we disable it for now */
538 *(cd->mcodeptr++) = 0xcc;
544 return (uint32_t) mcode;
548 /* emit_verbosecall_enter ******************************************************
550 Generates the code for the call trace.
552 *******************************************************************************/
555 void emit_verbosecall_enter(jitdata *jd)
562 int32_t stackframesize;
564 int align_off; /* offset for alignment compensation */
566 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
569 /* get required compiler data */
578 /* mark trace code */
582 /* keep stack 16-byte aligned */
584 stackframesize = 2 + TMP_CNT;
585 ALIGN_2(stackframesize);
587 M_ASUB_IMM(stackframesize * 8, REG_SP);
589 /* save temporary registers for leaf methods */
591 if (code_is_leafmethod(code)) {
592 for (i = 0; i < INT_TMP_CNT; i++)
593 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
596 /* no argument registers to save */
598 align_off = cd->stackframesize ? 4 : 0;
599 M_AST_IMM(m, REG_SP, 0 * 4);
600 M_AST_IMM(0, REG_SP, 1 * 4);
601 M_AST(REG_SP, REG_SP, 2 * 4);
602 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
603 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
606 /* no argument registers to restore */
608 /* restore temporary registers for leaf methods */
610 if (code_is_leafmethod(code)) {
611 for (i = 0; i < INT_TMP_CNT; i++)
612 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
615 M_AADD_IMM(stackframesize * 8, REG_SP);
617 /* mark trace code */
621 #endif /* !defined(NDEBUG) */
624 /* emit_verbosecall_exit *******************************************************
626 Generates the code for the call trace.
628 *******************************************************************************/
631 void emit_verbosecall_exit(jitdata *jd)
638 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
641 /* get required compiler data */
649 /* mark trace code */
653 /* keep stack 16-byte aligned */
655 M_ASUB_IMM(4 + 4 + 8, REG_SP);
657 /* save return value */
659 switch (md->returntype.type) {
662 M_IST(REG_RESULT, REG_SP, 2 * 4);
665 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
668 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
671 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
675 M_AST_IMM(m, REG_SP, 0 * 4);
676 M_AST(REG_SP, REG_SP, 1 * 4);
677 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
678 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
681 /* restore return value */
683 switch (md->returntype.type) {
686 M_ILD(REG_RESULT, REG_SP, 2 * 4);
689 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
693 M_AADD_IMM(4 + 4 + 8, REG_SP);
695 /* mark trace code */
699 #endif /* !defined(NDEBUG) */
702 /* code generation functions **************************************************/
704 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
706 if (basereg == ESP) {
708 emit_address_byte(0, dreg, ESP);
709 emit_address_byte(0, ESP, ESP);
711 else if (IS_IMM8(disp)) {
712 emit_address_byte(1, dreg, ESP);
713 emit_address_byte(0, ESP, ESP);
717 emit_address_byte(2, dreg, ESP);
718 emit_address_byte(0, ESP, ESP);
722 else if ((disp == 0) && (basereg != EBP)) {
723 emit_address_byte(0, dreg, basereg);
725 else if (IS_IMM8(disp)) {
726 emit_address_byte(1, dreg, basereg);
730 emit_address_byte(2, dreg, basereg);
736 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
738 if (basereg == ESP) {
739 emit_address_byte(2, dreg, ESP);
740 emit_address_byte(0, ESP, ESP);
744 emit_address_byte(2, dreg, basereg);
750 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
753 emit_address_byte(0, reg, 4);
754 emit_address_byte(scale, indexreg, 5);
757 else if ((disp == 0) && (basereg != EBP)) {
758 emit_address_byte(0, reg, 4);
759 emit_address_byte(scale, indexreg, basereg);
761 else if (IS_IMM8(disp)) {
762 emit_address_byte(1, reg, 4);
763 emit_address_byte(scale, indexreg, basereg);
767 emit_address_byte(2, reg, 4);
768 emit_address_byte(scale, indexreg, basereg);
774 /* low-level code emitter functions *******************************************/
776 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
778 COUNT(count_mov_reg_reg);
779 *(cd->mcodeptr++) = 0x89;
780 emit_reg((reg),(dreg));
784 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
786 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
791 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
793 *(cd->mcodeptr++) = 0xc6;
799 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
801 COUNT(count_mov_mem_reg);
802 *(cd->mcodeptr++) = 0x8b;
803 emit_membase(cd, (basereg),(disp),(reg));
808 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
809 * constant membase immediate length of 32bit
811 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
813 COUNT(count_mov_mem_reg);
814 *(cd->mcodeptr++) = 0x8b;
815 emit_membase32(cd, (basereg),(disp),(reg));
819 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
821 COUNT(count_mov_reg_mem);
822 *(cd->mcodeptr++) = 0x89;
823 emit_membase(cd, (basereg),(disp),(reg));
827 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
829 COUNT(count_mov_reg_mem);
830 *(cd->mcodeptr++) = 0x89;
831 emit_membase32(cd, (basereg),(disp),(reg));
835 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
837 COUNT(count_mov_mem_reg);
838 *(cd->mcodeptr++) = 0x8b;
839 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
843 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
845 COUNT(count_mov_reg_mem);
846 *(cd->mcodeptr++) = 0x89;
847 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
851 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
853 COUNT(count_mov_reg_mem);
854 *(cd->mcodeptr++) = 0x66;
855 *(cd->mcodeptr++) = 0x89;
856 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
860 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
862 COUNT(count_mov_reg_mem);
863 *(cd->mcodeptr++) = 0x88;
864 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
868 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
870 COUNT(count_mov_reg_mem);
871 *(cd->mcodeptr++) = 0x89;
872 emit_mem((reg),(mem));
876 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
878 COUNT(count_mov_mem_reg);
879 *(cd->mcodeptr++) = 0x8b;
880 emit_mem((dreg),(mem));
884 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
886 *(cd->mcodeptr++) = 0xc7;
892 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
894 *(cd->mcodeptr++) = 0xc7;
895 emit_membase(cd, (basereg),(disp),0);
900 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
902 *(cd->mcodeptr++) = 0xc7;
903 emit_membase32(cd, (basereg),(disp),0);
908 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
910 *(cd->mcodeptr++) = 0xc6;
911 emit_membase(cd, (basereg),(disp),0);
916 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
918 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
919 *(cd->mcodeptr++) = 0x0f;
920 *(cd->mcodeptr++) = 0xbe;
925 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
927 COUNT(count_mov_mem_reg);
928 *(cd->mcodeptr++) = 0x0f;
929 *(cd->mcodeptr++) = 0xbe;
930 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
934 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
936 *(cd->mcodeptr++) = 0x0f;
937 *(cd->mcodeptr++) = 0xbf;
942 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
944 COUNT(count_mov_mem_reg);
945 *(cd->mcodeptr++) = 0x0f;
946 *(cd->mcodeptr++) = 0xbf;
947 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
951 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
953 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
954 *(cd->mcodeptr++) = 0x0f;
955 *(cd->mcodeptr++) = 0xb6;
960 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
962 *(cd->mcodeptr++) = 0x0f;
963 *(cd->mcodeptr++) = 0xb7;
968 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
970 COUNT(count_mov_mem_reg);
971 *(cd->mcodeptr++) = 0x0f;
972 *(cd->mcodeptr++) = 0xb7;
973 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
977 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
979 *(cd->mcodeptr++) = 0xc7;
980 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
985 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
987 *(cd->mcodeptr++) = 0x66;
988 *(cd->mcodeptr++) = 0xc7;
989 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
994 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
996 *(cd->mcodeptr++) = 0xc6;
997 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1005 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1007 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1008 emit_reg((reg),(dreg));
1012 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1014 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1015 emit_membase(cd, (basereg),(disp),(reg));
1019 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1021 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1022 emit_membase(cd, (basereg),(disp),(reg));
1026 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1029 *(cd->mcodeptr++) = 0x83;
1030 emit_reg((opc),(dreg));
1033 *(cd->mcodeptr++) = 0x81;
1034 emit_reg((opc),(dreg));
1040 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1042 *(cd->mcodeptr++) = 0x81;
1043 emit_reg((opc),(dreg));
1048 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1051 *(cd->mcodeptr++) = 0x83;
1052 emit_membase(cd, (basereg),(disp),(opc));
1055 *(cd->mcodeptr++) = 0x81;
1056 emit_membase(cd, (basereg),(disp),(opc));
1062 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1065 *(cd->mcodeptr++) = 0x83;
1066 emit_mem(opc, disp);
1069 *(cd->mcodeptr++) = 0x81;
1070 emit_mem(opc, disp);
1076 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1078 *(cd->mcodeptr++) = 0x85;
1079 emit_reg((reg),(dreg));
1083 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1085 *(cd->mcodeptr++) = 0xf7;
1093 * inc, dec operations
1095 void emit_dec_mem(codegendata *cd, s4 mem)
1097 *(cd->mcodeptr++) = 0xff;
1102 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1104 *(cd->mcodeptr++) = 0x0f;
1105 *(cd->mcodeptr++) = 0xaf;
1106 emit_reg((dreg),(reg));
1110 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1112 *(cd->mcodeptr++) = 0x0f;
1113 *(cd->mcodeptr++) = 0xaf;
1114 emit_membase(cd, (basereg),(disp),(dreg));
1118 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1120 if (IS_IMM8((imm))) {
1121 *(cd->mcodeptr++) = 0x6b;
1125 *(cd->mcodeptr++) = 0x69;
1132 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1134 if (IS_IMM8((imm))) {
1135 *(cd->mcodeptr++) = 0x6b;
1136 emit_reg((dreg),(reg));
1139 *(cd->mcodeptr++) = 0x69;
1140 emit_reg((dreg),(reg));
1146 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1148 if (IS_IMM8((imm))) {
1149 *(cd->mcodeptr++) = 0x6b;
1150 emit_membase(cd, (basereg),(disp),(dreg));
1153 *(cd->mcodeptr++) = 0x69;
1154 emit_membase(cd, (basereg),(disp),(dreg));
1160 void emit_mul_reg(codegendata *cd, s4 reg)
1162 *(cd->mcodeptr++) = 0xf7;
1167 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1169 *(cd->mcodeptr++) = 0xf7;
1170 emit_membase(cd, (basereg),(disp),4);
1174 void emit_idiv_reg(codegendata *cd, s4 reg)
1176 *(cd->mcodeptr++) = 0xf7;
1185 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1187 *(cd->mcodeptr++) = 0xd3;
1188 emit_reg((opc),(reg));
1192 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1195 *(cd->mcodeptr++) = 0xd1;
1196 emit_reg((opc),(dreg));
1198 *(cd->mcodeptr++) = 0xc1;
1199 emit_reg((opc),(dreg));
1205 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1207 *(cd->mcodeptr++) = 0x0f;
1208 *(cd->mcodeptr++) = 0xa5;
1209 emit_reg((reg),(dreg));
1213 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1215 *(cd->mcodeptr++) = 0x0f;
1216 *(cd->mcodeptr++) = 0xa4;
1217 emit_reg((reg),(dreg));
1222 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1224 *(cd->mcodeptr++) = 0x0f;
1225 *(cd->mcodeptr++) = 0xa5;
1226 emit_membase(cd, (basereg),(disp),(reg));
1230 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1232 *(cd->mcodeptr++) = 0x0f;
1233 *(cd->mcodeptr++) = 0xad;
1234 emit_reg((reg),(dreg));
1238 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1240 *(cd->mcodeptr++) = 0x0f;
1241 *(cd->mcodeptr++) = 0xac;
1242 emit_reg((reg),(dreg));
1247 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1249 *(cd->mcodeptr++) = 0x0f;
1250 *(cd->mcodeptr++) = 0xad;
1251 emit_membase(cd, (basereg),(disp),(reg));
1259 void emit_jmp_imm(codegendata *cd, s4 imm)
1261 *(cd->mcodeptr++) = 0xe9;
1266 void emit_jmp_reg(codegendata *cd, s4 reg)
1268 *(cd->mcodeptr++) = 0xff;
1273 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1275 *(cd->mcodeptr++) = 0x0f;
1276 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1283 * conditional set operations
1285 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1287 *(cd->mcodeptr++) = 0x0f;
1288 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1293 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1295 *(cd->mcodeptr++) = 0x0f;
1296 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1297 emit_membase(cd, (basereg),(disp),0);
1301 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1303 *(cd->mcodeptr++) = 0x0f;
1304 *(cd->mcodeptr++) = 0xc1;
1305 emit_mem((reg),(mem));
1309 void emit_neg_reg(codegendata *cd, s4 reg)
1311 *(cd->mcodeptr++) = 0xf7;
1317 void emit_push_imm(codegendata *cd, s4 imm)
1319 *(cd->mcodeptr++) = 0x68;
1324 void emit_pop_reg(codegendata *cd, s4 reg)
1326 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1330 void emit_push_reg(codegendata *cd, s4 reg)
1332 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1336 void emit_lock(codegendata *cd)
1338 *(cd->mcodeptr++) = 0xf0;
1345 void emit_call_reg(codegendata *cd, s4 reg)
1347 *(cd->mcodeptr++) = 0xff;
1352 void emit_call_imm(codegendata *cd, s4 imm)
1354 *(cd->mcodeptr++) = 0xe8;
1361 * floating point instructions
1363 void emit_fld1(codegendata *cd)
1365 *(cd->mcodeptr++) = 0xd9;
1366 *(cd->mcodeptr++) = 0xe8;
1370 void emit_fldz(codegendata *cd)
1372 *(cd->mcodeptr++) = 0xd9;
1373 *(cd->mcodeptr++) = 0xee;
1377 void emit_fld_reg(codegendata *cd, s4 reg)
1379 *(cd->mcodeptr++) = 0xd9;
1380 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1384 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1386 *(cd->mcodeptr++) = 0xd9;
1387 emit_membase(cd, (basereg),(disp),0);
1391 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1393 *(cd->mcodeptr++) = 0xd9;
1394 emit_membase32(cd, (basereg),(disp),0);
1398 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1400 *(cd->mcodeptr++) = 0xdd;
1401 emit_membase(cd, (basereg),(disp),0);
1405 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1407 *(cd->mcodeptr++) = 0xdd;
1408 emit_membase32(cd, (basereg),(disp),0);
1412 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1414 *(cd->mcodeptr++) = 0xdb;
1415 emit_membase(cd, (basereg),(disp),5);
1419 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1421 *(cd->mcodeptr++) = 0xd9;
1422 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1426 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1428 *(cd->mcodeptr++) = 0xdd;
1429 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1433 void emit_flds_mem(codegendata *cd, s4 mem)
1435 *(cd->mcodeptr++) = 0xd9;
1440 void emit_fldl_mem(codegendata *cd, s4 mem)
1442 *(cd->mcodeptr++) = 0xdd;
1447 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1449 *(cd->mcodeptr++) = 0xdb;
1450 emit_membase(cd, (basereg),(disp),0);
1454 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1456 *(cd->mcodeptr++) = 0xdf;
1457 emit_membase(cd, (basereg),(disp),5);
1461 void emit_fst_reg(codegendata *cd, s4 reg)
1463 *(cd->mcodeptr++) = 0xdd;
1464 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1468 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1470 *(cd->mcodeptr++) = 0xd9;
1471 emit_membase(cd, (basereg),(disp),2);
1475 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1477 *(cd->mcodeptr++) = 0xdd;
1478 emit_membase(cd, (basereg),(disp),2);
1482 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1484 *(cd->mcodeptr++) = 0xd9;
1485 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1489 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1491 *(cd->mcodeptr++) = 0xdd;
1492 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1496 void emit_fstp_reg(codegendata *cd, s4 reg)
1498 *(cd->mcodeptr++) = 0xdd;
1499 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1503 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1505 *(cd->mcodeptr++) = 0xd9;
1506 emit_membase(cd, (basereg),(disp),3);
1510 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1512 *(cd->mcodeptr++) = 0xd9;
1513 emit_membase32(cd, (basereg),(disp),3);
1517 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1519 *(cd->mcodeptr++) = 0xdd;
1520 emit_membase(cd, (basereg),(disp),3);
1524 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1526 *(cd->mcodeptr++) = 0xdd;
1527 emit_membase32(cd, (basereg),(disp),3);
1531 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1533 *(cd->mcodeptr++) = 0xdb;
1534 emit_membase(cd, (basereg),(disp),7);
1538 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1540 *(cd->mcodeptr++) = 0xd9;
1541 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1545 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1547 *(cd->mcodeptr++) = 0xdd;
1548 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1552 void emit_fstps_mem(codegendata *cd, s4 mem)
1554 *(cd->mcodeptr++) = 0xd9;
1559 void emit_fstpl_mem(codegendata *cd, s4 mem)
1561 *(cd->mcodeptr++) = 0xdd;
1566 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1568 *(cd->mcodeptr++) = 0xdb;
1569 emit_membase(cd, (basereg),(disp),2);
1573 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1575 *(cd->mcodeptr++) = 0xdb;
1576 emit_membase(cd, (basereg),(disp),3);
1580 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1582 *(cd->mcodeptr++) = 0xdf;
1583 emit_membase(cd, (basereg),(disp),7);
1587 void emit_fchs(codegendata *cd)
1589 *(cd->mcodeptr++) = 0xd9;
1590 *(cd->mcodeptr++) = 0xe0;
1594 void emit_faddp(codegendata *cd)
1596 *(cd->mcodeptr++) = 0xde;
1597 *(cd->mcodeptr++) = 0xc1;
1601 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1603 *(cd->mcodeptr++) = 0xd8;
1604 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1608 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1610 *(cd->mcodeptr++) = 0xdc;
1611 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1615 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1617 *(cd->mcodeptr++) = 0xde;
1618 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1622 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1624 *(cd->mcodeptr++) = 0xd8;
1625 emit_membase(cd, (basereg),(disp),0);
1629 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1631 *(cd->mcodeptr++) = 0xdc;
1632 emit_membase(cd, (basereg),(disp),0);
1636 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1638 *(cd->mcodeptr++) = 0xd8;
1639 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1643 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1645 *(cd->mcodeptr++) = 0xdc;
1646 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1650 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1652 *(cd->mcodeptr++) = 0xde;
1653 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1657 void emit_fsubp(codegendata *cd)
1659 *(cd->mcodeptr++) = 0xde;
1660 *(cd->mcodeptr++) = 0xe9;
1664 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1666 *(cd->mcodeptr++) = 0xd8;
1667 emit_membase(cd, (basereg),(disp),4);
1671 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1673 *(cd->mcodeptr++) = 0xdc;
1674 emit_membase(cd, (basereg),(disp),4);
1678 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1680 *(cd->mcodeptr++) = 0xd8;
1681 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1685 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1687 *(cd->mcodeptr++) = 0xdc;
1688 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1692 void emit_fmulp(codegendata *cd)
1694 *(cd->mcodeptr++) = 0xde;
1695 *(cd->mcodeptr++) = 0xc9;
1699 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1701 *(cd->mcodeptr++) = 0xde;
1702 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1706 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1708 *(cd->mcodeptr++) = 0xd8;
1709 emit_membase(cd, (basereg),(disp),1);
1713 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1715 *(cd->mcodeptr++) = 0xdc;
1716 emit_membase(cd, (basereg),(disp),1);
1720 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1722 *(cd->mcodeptr++) = 0xd8;
1723 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1727 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1729 *(cd->mcodeptr++) = 0xdc;
1730 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1734 void emit_fdivp(codegendata *cd)
1736 *(cd->mcodeptr++) = 0xde;
1737 *(cd->mcodeptr++) = 0xf9;
1741 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1743 *(cd->mcodeptr++) = 0xde;
1744 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1748 void emit_fxch(codegendata *cd)
1750 *(cd->mcodeptr++) = 0xd9;
1751 *(cd->mcodeptr++) = 0xc9;
1755 void emit_fxch_reg(codegendata *cd, s4 reg)
1757 *(cd->mcodeptr++) = 0xd9;
1758 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1762 void emit_fprem(codegendata *cd)
1764 *(cd->mcodeptr++) = 0xd9;
1765 *(cd->mcodeptr++) = 0xf8;
1769 void emit_fprem1(codegendata *cd)
1771 *(cd->mcodeptr++) = 0xd9;
1772 *(cd->mcodeptr++) = 0xf5;
1776 void emit_fucom(codegendata *cd)
1778 *(cd->mcodeptr++) = 0xdd;
1779 *(cd->mcodeptr++) = 0xe1;
1783 void emit_fucom_reg(codegendata *cd, s4 reg)
1785 *(cd->mcodeptr++) = 0xdd;
1786 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1790 void emit_fucomp_reg(codegendata *cd, s4 reg)
1792 *(cd->mcodeptr++) = 0xdd;
1793 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1797 void emit_fucompp(codegendata *cd)
1799 *(cd->mcodeptr++) = 0xda;
1800 *(cd->mcodeptr++) = 0xe9;
1804 void emit_fnstsw(codegendata *cd)
1806 *(cd->mcodeptr++) = 0xdf;
1807 *(cd->mcodeptr++) = 0xe0;
1811 void emit_sahf(codegendata *cd)
1813 *(cd->mcodeptr++) = 0x9e;
1817 void emit_finit(codegendata *cd)
1819 *(cd->mcodeptr++) = 0x9b;
1820 *(cd->mcodeptr++) = 0xdb;
1821 *(cd->mcodeptr++) = 0xe3;
1825 void emit_fldcw_mem(codegendata *cd, s4 mem)
1827 *(cd->mcodeptr++) = 0xd9;
1832 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1834 *(cd->mcodeptr++) = 0xd9;
1835 emit_membase(cd, (basereg),(disp),5);
1839 void emit_wait(codegendata *cd)
1841 *(cd->mcodeptr++) = 0x9b;
1845 void emit_ffree_reg(codegendata *cd, s4 reg)
1847 *(cd->mcodeptr++) = 0xdd;
1848 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1852 void emit_fdecstp(codegendata *cd)
1854 *(cd->mcodeptr++) = 0xd9;
1855 *(cd->mcodeptr++) = 0xf6;
1859 void emit_fincstp(codegendata *cd)
1861 *(cd->mcodeptr++) = 0xd9;
1862 *(cd->mcodeptr++) = 0xf7;
1865 #if defined(ENABLE_ESCAPE_CHECK)
1866 void emit_escape_check(codegendata *cd, s4 reg) {
1868 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1870 M_IADD_IMM(4, REG_SP);
1875 * These are local overrides for various environment variables in Emacs.
1876 * Please do not remove this and leave it at the end of the file, where
1877 * Emacs will automagically detect them.
1878 * ---------------------------------------------------------------------
1881 * indent-tabs-mode: t