1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
32 #include "vm/jit/i386/codegen.h"
33 #include "vm/jit/i386/emit.h"
34 #include "vm/jit/i386/md-abi.h"
36 #include "mm/memory.h"
38 #include "threads/lock-common.h"
40 #include "vm/exceptions.h"
42 #include "vm/jit/abi.h"
43 #include "vm/jit/asmpart.h"
44 #include "vm/jit/dseg.h"
45 #include "vm/jit/emit-common.h"
46 #include "vm/jit/jit.h"
47 #include "vm/jit/patcher-common.h"
48 #include "vm/jit/replace.h"
49 #include "vm/jit/trace.h"
50 #include "vm/jit/trap.h"
52 #include "vmcore/options.h"
53 #include "vmcore/statistics.h"
56 /* emit_load ******************************************************************
58 Emits a possible load of an operand.
60 *******************************************************************************/
62 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
68 /* get required compiler data */
72 if (IS_INMEMORY(src->flags)) {
75 disp = src->vv.regoff;
80 M_ILD(tempreg, REG_SP, disp);
83 M_LLD(tempreg, REG_SP, disp);
86 M_FLD(tempreg, REG_SP, disp);
89 M_DLD(tempreg, REG_SP, disp);
92 vm_abort("emit_load: unknown type %d", src->type);
104 /* emit_load_low ************************************************************
106 Emits a possible load of the low 32-bits of an operand.
108 *******************************************************************************/
110 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
116 assert(src->type == TYPE_LNG);
118 /* get required compiler data */
123 if (IS_INMEMORY(src->flags)) {
126 disp = src->vv.regoff;
128 M_ILD(tempreg, REG_SP, disp);
133 reg = GET_LOW_REG(src->vv.regoff);
139 /* emit_load_high ***********************************************************
141 Emits a possible load of the high 32-bits of an operand.
143 *******************************************************************************/
145 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
151 /* get required compiler data */
153 assert(src->type == TYPE_LNG);
157 if (IS_INMEMORY(src->flags)) {
160 disp = src->vv.regoff;
162 M_ILD(tempreg, REG_SP, disp + 4);
167 reg = GET_HIGH_REG(src->vv.regoff);
173 /* emit_store ******************************************************************
175 Emits a possible store of the destination operand.
177 *******************************************************************************/
179 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
184 /* get required compiler data */
188 if (IS_INMEMORY(dst->flags)) {
191 disp = dst->vv.regoff;
196 M_IST(d, REG_SP, disp);
199 M_LST(d, REG_SP, disp);
202 M_FST(d, REG_SP, disp);
205 M_DST(d, REG_SP, disp);
208 vm_abort("emit_store: unknown type %d", dst->type);
214 /* emit_store_low **************************************************************
216 Emits a possible store of the low 32-bits of the destination
219 *******************************************************************************/
221 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
225 assert(dst->type == TYPE_LNG);
227 /* get required compiler data */
231 if (IS_INMEMORY(dst->flags)) {
233 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
238 /* emit_store_high *************************************************************
240 Emits a possible store of the high 32-bits of the destination
243 *******************************************************************************/
245 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
249 assert(dst->type == TYPE_LNG);
251 /* get required compiler data */
255 if (IS_INMEMORY(dst->flags)) {
257 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
262 /* emit_copy *******************************************************************
264 Generates a register/memory to register/memory copy.
266 *******************************************************************************/
268 void emit_copy(jitdata *jd, instruction *iptr)
275 /* get required compiler data */
279 /* get source and destination variables */
281 src = VAROP(iptr->s1);
282 dst = VAROP(iptr->dst);
284 if ((src->vv.regoff != dst->vv.regoff) ||
285 ((src->flags ^ dst->flags) & INMEMORY)) {
287 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
288 /* emit nothing, as the value won't be used anyway */
292 /* If one of the variables resides in memory, we can eliminate
293 the register move from/to the temporary register with the
294 order of getting the destination register and the load. */
296 if (IS_INMEMORY(src->flags)) {
297 if (IS_LNG_TYPE(src->type))
298 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
300 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 if (IS_LNG_TYPE(src->type))
306 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
308 s1 = emit_load(jd, iptr, src, REG_ITMP1);
310 d = codegen_reg_of_var(iptr->opc, dst, s1);
327 vm_abort("emit_copy: unknown type %d", src->type);
331 emit_store(jd, iptr, dst, d);
336 /* emit_branch *****************************************************************
338 Emits the code for conditional and unconditional branchs.
340 *******************************************************************************/
342 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
346 /* ATTENTION: a displacement overflow cannot happen */
348 /* check which branch to generate */
350 if (condition == BRANCH_UNCONDITIONAL) {
352 /* calculate the different displacements */
354 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
356 M_JMP_IMM(branchdisp);
359 /* calculate the different displacements */
361 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
395 vm_abort("emit_branch: unknown condition %d", condition);
401 /* emit_arithmetic_check *******************************************************
403 Emit an ArithmeticException check.
405 *******************************************************************************/
407 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
409 if (INSTRUCTION_MUST_CHECK(iptr)) {
412 M_ALD_MEM(reg, TRAP_ArithmeticException);
417 /* emit_arrayindexoutofbounds_check ********************************************
419 Emit a ArrayIndexOutOfBoundsException check.
421 *******************************************************************************/
423 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
425 if (INSTRUCTION_MUST_CHECK(iptr)) {
426 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
427 M_CMP(REG_ITMP3, s2);
429 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
434 /* emit_arraystore_check *******************************************************
436 Emit an ArrayStoreException check.
438 *******************************************************************************/
440 void emit_arraystore_check(codegendata *cd, instruction *iptr)
442 if (INSTRUCTION_MUST_CHECK(iptr)) {
445 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
450 /* emit_classcast_check ********************************************************
452 Emit a ClassCastException check.
454 *******************************************************************************/
456 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
458 if (INSTRUCTION_MUST_CHECK(iptr)) {
470 vm_abort("emit_classcast_check: unknown condition %d", condition);
472 M_ALD_MEM(s1, TRAP_ClassCastException);
477 /* emit_nullpointer_check ******************************************************
479 Emit a NullPointerException check.
481 *******************************************************************************/
483 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
485 if (INSTRUCTION_MUST_CHECK(iptr)) {
488 M_ALD_MEM(reg, TRAP_NullPointerException);
493 /* emit_exception_check ********************************************************
495 Emit an Exception check.
497 *******************************************************************************/
499 void emit_exception_check(codegendata *cd, instruction *iptr)
501 if (INSTRUCTION_MUST_CHECK(iptr)) {
504 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
509 /* emit_trap_compiler **********************************************************
511 Emit a trap instruction which calls the JIT compiler.
513 *******************************************************************************/
515 void emit_trap_compiler(codegendata *cd)
517 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
521 /* emit_trap *******************************************************************
523 Emit a trap instruction and return the original machine code.
525 *******************************************************************************/
527 uint32_t emit_trap(codegendata *cd)
531 /* Get machine code which is patched back in later. The
532 trap is 2 bytes long. */
534 mcode = *((uint16_t *) cd->mcodeptr);
537 /* XXX this breaks GDB, so we disable it for now */
538 *(cd->mcodeptr++) = 0xcc;
544 return (uint32_t) mcode;
548 /* emit_verbosecall_enter ******************************************************
550 Generates the code for the call trace.
552 *******************************************************************************/
555 void emit_verbosecall_enter(jitdata *jd)
562 int32_t stackframesize;
564 int align_off; /* offset for alignment compensation */
566 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
569 /* get required compiler data */
578 /* mark trace code */
582 /* keep stack 16-byte aligned */
584 stackframesize = 2 + TMP_CNT;
585 ALIGN_2(stackframesize);
587 M_ASUB_IMM(stackframesize * 8, REG_SP);
589 /* save temporary registers for leaf methods */
591 if (code_is_leafmethod(code)) {
592 for (i = 0; i < INT_TMP_CNT; i++)
593 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
596 /* no argument registers to save */
598 align_off = cd->stackframesize ? 4 : 0;
599 M_AST_IMM(m, REG_SP, 0 * 4);
600 M_AST_IMM(0, REG_SP, 1 * 4);
601 M_AST(REG_SP, REG_SP, 2 * 4);
602 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
603 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
606 /* no argument registers to restore */
608 /* restore temporary registers for leaf methods */
610 if (code_is_leafmethod(code)) {
611 for (i = 0; i < INT_TMP_CNT; i++)
612 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
615 M_AADD_IMM(stackframesize * 8, REG_SP);
617 /* mark trace code */
621 #endif /* !defined(NDEBUG) */
624 /* emit_verbosecall_exit *******************************************************
626 Generates the code for the call trace.
628 *******************************************************************************/
631 void emit_verbosecall_exit(jitdata *jd)
638 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
641 /* get required compiler data */
649 /* mark trace code */
653 /* keep stack 16-byte aligned */
655 M_ASUB_IMM(4 + 4 + 8, REG_SP);
657 /* save return value */
659 switch (md->returntype.type) {
662 M_IST(REG_RESULT, REG_SP, 2 * 4);
665 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
668 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
671 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
675 M_AST_IMM(m, REG_SP, 0 * 4);
676 M_AST(REG_SP, REG_SP, 1 * 4);
677 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
678 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
681 /* restore return value */
683 switch (md->returntype.type) {
686 M_ILD(REG_RESULT, REG_SP, 2 * 4);
689 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
693 M_AADD_IMM(4 + 4 + 8, REG_SP);
695 /* mark trace code */
699 #endif /* !defined(NDEBUG) */
702 /* code generation functions **************************************************/
704 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
706 if (basereg == ESP) {
708 emit_address_byte(0, dreg, ESP);
709 emit_address_byte(0, ESP, ESP);
711 else if (IS_IMM8(disp)) {
712 emit_address_byte(1, dreg, ESP);
713 emit_address_byte(0, ESP, ESP);
717 emit_address_byte(2, dreg, ESP);
718 emit_address_byte(0, ESP, ESP);
722 else if ((disp == 0) && (basereg != EBP)) {
723 emit_address_byte(0, dreg, basereg);
725 else if (IS_IMM8(disp)) {
726 emit_address_byte(1, dreg, basereg);
730 emit_address_byte(2, dreg, basereg);
736 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
738 if (basereg == ESP) {
739 emit_address_byte(2, dreg, ESP);
740 emit_address_byte(0, ESP, ESP);
744 emit_address_byte(2, dreg, basereg);
750 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
753 emit_address_byte(0, reg, 4);
754 emit_address_byte(scale, indexreg, 5);
757 else if ((disp == 0) && (basereg != EBP)) {
758 emit_address_byte(0, reg, 4);
759 emit_address_byte(scale, indexreg, basereg);
761 else if (IS_IMM8(disp)) {
762 emit_address_byte(1, reg, 4);
763 emit_address_byte(scale, indexreg, basereg);
767 emit_address_byte(2, reg, 4);
768 emit_address_byte(scale, indexreg, basereg);
774 /* low-level code emitter functions *******************************************/
776 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
778 COUNT(count_mov_reg_reg);
779 *(cd->mcodeptr++) = 0x89;
780 emit_reg((reg),(dreg));
784 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
786 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
791 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
793 *(cd->mcodeptr++) = 0xc6;
799 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
801 COUNT(count_mov_mem_reg);
802 *(cd->mcodeptr++) = 0x8b;
803 emit_membase(cd, (basereg),(disp),(reg));
808 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
809 * constant membase immediate length of 32bit
811 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
813 COUNT(count_mov_mem_reg);
814 *(cd->mcodeptr++) = 0x8b;
815 emit_membase32(cd, (basereg),(disp),(reg));
819 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
821 COUNT(count_mov_reg_mem);
822 *(cd->mcodeptr++) = 0x89;
823 emit_membase(cd, (basereg),(disp),(reg));
827 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
829 COUNT(count_mov_reg_mem);
830 *(cd->mcodeptr++) = 0x89;
831 emit_membase32(cd, (basereg),(disp),(reg));
835 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
837 COUNT(count_mov_mem_reg);
838 *(cd->mcodeptr++) = 0x8b;
839 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
843 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
845 COUNT(count_mov_reg_mem);
846 *(cd->mcodeptr++) = 0x89;
847 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
851 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
853 COUNT(count_mov_reg_mem);
854 *(cd->mcodeptr++) = 0x66;
855 *(cd->mcodeptr++) = 0x89;
856 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
860 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
862 COUNT(count_mov_reg_mem);
863 *(cd->mcodeptr++) = 0x88;
864 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
868 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
870 COUNT(count_mov_reg_mem);
871 *(cd->mcodeptr++) = 0x89;
872 emit_mem((reg),(mem));
876 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
878 COUNT(count_mov_mem_reg);
879 *(cd->mcodeptr++) = 0x8b;
880 emit_mem((dreg),(mem));
884 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
886 *(cd->mcodeptr++) = 0xc7;
892 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
894 *(cd->mcodeptr++) = 0xc7;
895 emit_membase(cd, (basereg),(disp),0);
900 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
902 *(cd->mcodeptr++) = 0xc7;
903 emit_membase32(cd, (basereg),(disp),0);
908 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
910 *(cd->mcodeptr++) = 0xc6;
911 emit_membase(cd, (basereg),(disp),0);
916 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
918 COUNT(count_mov_mem_reg);
919 *(cd->mcodeptr++) = 0x0f;
920 *(cd->mcodeptr++) = 0xbe;
921 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
925 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
927 *(cd->mcodeptr++) = 0x0f;
928 *(cd->mcodeptr++) = 0xbf;
933 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
935 COUNT(count_mov_mem_reg);
936 *(cd->mcodeptr++) = 0x0f;
937 *(cd->mcodeptr++) = 0xbf;
938 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
942 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
944 *(cd->mcodeptr++) = 0x0f;
945 *(cd->mcodeptr++) = 0xb7;
950 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
952 COUNT(count_mov_mem_reg);
953 *(cd->mcodeptr++) = 0x0f;
954 *(cd->mcodeptr++) = 0xb7;
955 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
959 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
961 *(cd->mcodeptr++) = 0xc7;
962 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
967 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
969 *(cd->mcodeptr++) = 0x66;
970 *(cd->mcodeptr++) = 0xc7;
971 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
976 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
978 *(cd->mcodeptr++) = 0xc6;
979 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
987 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
989 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
990 emit_reg((reg),(dreg));
994 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
996 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
997 emit_membase(cd, (basereg),(disp),(reg));
1001 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1003 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1004 emit_membase(cd, (basereg),(disp),(reg));
1008 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1011 *(cd->mcodeptr++) = 0x83;
1012 emit_reg((opc),(dreg));
1015 *(cd->mcodeptr++) = 0x81;
1016 emit_reg((opc),(dreg));
1022 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1024 *(cd->mcodeptr++) = 0x81;
1025 emit_reg((opc),(dreg));
1030 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1033 *(cd->mcodeptr++) = 0x83;
1034 emit_membase(cd, (basereg),(disp),(opc));
1037 *(cd->mcodeptr++) = 0x81;
1038 emit_membase(cd, (basereg),(disp),(opc));
1044 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1047 *(cd->mcodeptr++) = 0x83;
1048 emit_mem(opc, disp);
1051 *(cd->mcodeptr++) = 0x81;
1052 emit_mem(opc, disp);
1058 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1060 *(cd->mcodeptr++) = 0x85;
1061 emit_reg((reg),(dreg));
1065 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1067 *(cd->mcodeptr++) = 0xf7;
1075 * inc, dec operations
1077 void emit_dec_mem(codegendata *cd, s4 mem)
1079 *(cd->mcodeptr++) = 0xff;
1084 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1086 *(cd->mcodeptr++) = 0x0f;
1087 *(cd->mcodeptr++) = 0xaf;
1088 emit_reg((dreg),(reg));
1092 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1094 *(cd->mcodeptr++) = 0x0f;
1095 *(cd->mcodeptr++) = 0xaf;
1096 emit_membase(cd, (basereg),(disp),(dreg));
1100 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1102 if (IS_IMM8((imm))) {
1103 *(cd->mcodeptr++) = 0x6b;
1107 *(cd->mcodeptr++) = 0x69;
1114 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1116 if (IS_IMM8((imm))) {
1117 *(cd->mcodeptr++) = 0x6b;
1118 emit_reg((dreg),(reg));
1121 *(cd->mcodeptr++) = 0x69;
1122 emit_reg((dreg),(reg));
1128 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1130 if (IS_IMM8((imm))) {
1131 *(cd->mcodeptr++) = 0x6b;
1132 emit_membase(cd, (basereg),(disp),(dreg));
1135 *(cd->mcodeptr++) = 0x69;
1136 emit_membase(cd, (basereg),(disp),(dreg));
1142 void emit_mul_reg(codegendata *cd, s4 reg)
1144 *(cd->mcodeptr++) = 0xf7;
1149 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1151 *(cd->mcodeptr++) = 0xf7;
1152 emit_membase(cd, (basereg),(disp),4);
1156 void emit_idiv_reg(codegendata *cd, s4 reg)
1158 *(cd->mcodeptr++) = 0xf7;
1167 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1169 *(cd->mcodeptr++) = 0xd3;
1170 emit_reg((opc),(reg));
1174 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1177 *(cd->mcodeptr++) = 0xd1;
1178 emit_reg((opc),(dreg));
1180 *(cd->mcodeptr++) = 0xc1;
1181 emit_reg((opc),(dreg));
1187 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1189 *(cd->mcodeptr++) = 0x0f;
1190 *(cd->mcodeptr++) = 0xa5;
1191 emit_reg((reg),(dreg));
1195 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1197 *(cd->mcodeptr++) = 0x0f;
1198 *(cd->mcodeptr++) = 0xa4;
1199 emit_reg((reg),(dreg));
1204 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1206 *(cd->mcodeptr++) = 0x0f;
1207 *(cd->mcodeptr++) = 0xa5;
1208 emit_membase(cd, (basereg),(disp),(reg));
1212 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1214 *(cd->mcodeptr++) = 0x0f;
1215 *(cd->mcodeptr++) = 0xad;
1216 emit_reg((reg),(dreg));
1220 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1222 *(cd->mcodeptr++) = 0x0f;
1223 *(cd->mcodeptr++) = 0xac;
1224 emit_reg((reg),(dreg));
1229 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1231 *(cd->mcodeptr++) = 0x0f;
1232 *(cd->mcodeptr++) = 0xad;
1233 emit_membase(cd, (basereg),(disp),(reg));
1241 void emit_jmp_imm(codegendata *cd, s4 imm)
1243 *(cd->mcodeptr++) = 0xe9;
1248 void emit_jmp_reg(codegendata *cd, s4 reg)
1250 *(cd->mcodeptr++) = 0xff;
1255 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1257 *(cd->mcodeptr++) = 0x0f;
1258 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1265 * conditional set operations
1267 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1269 *(cd->mcodeptr++) = 0x0f;
1270 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1275 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1277 *(cd->mcodeptr++) = 0x0f;
1278 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1279 emit_membase(cd, (basereg),(disp),0);
1283 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1285 *(cd->mcodeptr++) = 0x0f;
1286 *(cd->mcodeptr++) = 0xc1;
1287 emit_mem((reg),(mem));
1291 void emit_neg_reg(codegendata *cd, s4 reg)
1293 *(cd->mcodeptr++) = 0xf7;
1299 void emit_push_imm(codegendata *cd, s4 imm)
1301 *(cd->mcodeptr++) = 0x68;
1306 void emit_pop_reg(codegendata *cd, s4 reg)
1308 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1312 void emit_push_reg(codegendata *cd, s4 reg)
1314 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1318 void emit_lock(codegendata *cd)
1320 *(cd->mcodeptr++) = 0xf0;
1327 void emit_call_reg(codegendata *cd, s4 reg)
1329 *(cd->mcodeptr++) = 0xff;
1334 void emit_call_imm(codegendata *cd, s4 imm)
1336 *(cd->mcodeptr++) = 0xe8;
1343 * floating point instructions
1345 void emit_fld1(codegendata *cd)
1347 *(cd->mcodeptr++) = 0xd9;
1348 *(cd->mcodeptr++) = 0xe8;
1352 void emit_fldz(codegendata *cd)
1354 *(cd->mcodeptr++) = 0xd9;
1355 *(cd->mcodeptr++) = 0xee;
1359 void emit_fld_reg(codegendata *cd, s4 reg)
1361 *(cd->mcodeptr++) = 0xd9;
1362 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1366 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1368 *(cd->mcodeptr++) = 0xd9;
1369 emit_membase(cd, (basereg),(disp),0);
1373 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1375 *(cd->mcodeptr++) = 0xd9;
1376 emit_membase32(cd, (basereg),(disp),0);
1380 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1382 *(cd->mcodeptr++) = 0xdd;
1383 emit_membase(cd, (basereg),(disp),0);
1387 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1389 *(cd->mcodeptr++) = 0xdd;
1390 emit_membase32(cd, (basereg),(disp),0);
1394 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1396 *(cd->mcodeptr++) = 0xdb;
1397 emit_membase(cd, (basereg),(disp),5);
1401 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1403 *(cd->mcodeptr++) = 0xd9;
1404 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1408 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1410 *(cd->mcodeptr++) = 0xdd;
1411 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1415 void emit_flds_mem(codegendata *cd, s4 mem)
1417 *(cd->mcodeptr++) = 0xd9;
1422 void emit_fldl_mem(codegendata *cd, s4 mem)
1424 *(cd->mcodeptr++) = 0xdd;
1429 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1431 *(cd->mcodeptr++) = 0xdb;
1432 emit_membase(cd, (basereg),(disp),0);
1436 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1438 *(cd->mcodeptr++) = 0xdf;
1439 emit_membase(cd, (basereg),(disp),5);
1443 void emit_fst_reg(codegendata *cd, s4 reg)
1445 *(cd->mcodeptr++) = 0xdd;
1446 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1450 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1452 *(cd->mcodeptr++) = 0xd9;
1453 emit_membase(cd, (basereg),(disp),2);
1457 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1459 *(cd->mcodeptr++) = 0xdd;
1460 emit_membase(cd, (basereg),(disp),2);
1464 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1466 *(cd->mcodeptr++) = 0xd9;
1467 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1471 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1473 *(cd->mcodeptr++) = 0xdd;
1474 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1478 void emit_fstp_reg(codegendata *cd, s4 reg)
1480 *(cd->mcodeptr++) = 0xdd;
1481 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1485 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1487 *(cd->mcodeptr++) = 0xd9;
1488 emit_membase(cd, (basereg),(disp),3);
1492 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1494 *(cd->mcodeptr++) = 0xd9;
1495 emit_membase32(cd, (basereg),(disp),3);
1499 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1501 *(cd->mcodeptr++) = 0xdd;
1502 emit_membase(cd, (basereg),(disp),3);
1506 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1508 *(cd->mcodeptr++) = 0xdd;
1509 emit_membase32(cd, (basereg),(disp),3);
1513 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1515 *(cd->mcodeptr++) = 0xdb;
1516 emit_membase(cd, (basereg),(disp),7);
1520 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1522 *(cd->mcodeptr++) = 0xd9;
1523 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1527 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1529 *(cd->mcodeptr++) = 0xdd;
1530 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1534 void emit_fstps_mem(codegendata *cd, s4 mem)
1536 *(cd->mcodeptr++) = 0xd9;
1541 void emit_fstpl_mem(codegendata *cd, s4 mem)
1543 *(cd->mcodeptr++) = 0xdd;
1548 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1550 *(cd->mcodeptr++) = 0xdb;
1551 emit_membase(cd, (basereg),(disp),2);
1555 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1557 *(cd->mcodeptr++) = 0xdb;
1558 emit_membase(cd, (basereg),(disp),3);
1562 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1564 *(cd->mcodeptr++) = 0xdf;
1565 emit_membase(cd, (basereg),(disp),7);
1569 void emit_fchs(codegendata *cd)
1571 *(cd->mcodeptr++) = 0xd9;
1572 *(cd->mcodeptr++) = 0xe0;
1576 void emit_faddp(codegendata *cd)
1578 *(cd->mcodeptr++) = 0xde;
1579 *(cd->mcodeptr++) = 0xc1;
1583 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1585 *(cd->mcodeptr++) = 0xd8;
1586 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1590 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1592 *(cd->mcodeptr++) = 0xdc;
1593 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1597 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1599 *(cd->mcodeptr++) = 0xde;
1600 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1604 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1606 *(cd->mcodeptr++) = 0xd8;
1607 emit_membase(cd, (basereg),(disp),0);
1611 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1613 *(cd->mcodeptr++) = 0xdc;
1614 emit_membase(cd, (basereg),(disp),0);
1618 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1620 *(cd->mcodeptr++) = 0xd8;
1621 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1625 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1627 *(cd->mcodeptr++) = 0xdc;
1628 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1632 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1634 *(cd->mcodeptr++) = 0xde;
1635 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1639 void emit_fsubp(codegendata *cd)
1641 *(cd->mcodeptr++) = 0xde;
1642 *(cd->mcodeptr++) = 0xe9;
1646 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1648 *(cd->mcodeptr++) = 0xd8;
1649 emit_membase(cd, (basereg),(disp),4);
1653 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1655 *(cd->mcodeptr++) = 0xdc;
1656 emit_membase(cd, (basereg),(disp),4);
1660 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1662 *(cd->mcodeptr++) = 0xd8;
1663 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1667 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1669 *(cd->mcodeptr++) = 0xdc;
1670 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1674 void emit_fmulp(codegendata *cd)
1676 *(cd->mcodeptr++) = 0xde;
1677 *(cd->mcodeptr++) = 0xc9;
1681 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1683 *(cd->mcodeptr++) = 0xde;
1684 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1688 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1690 *(cd->mcodeptr++) = 0xd8;
1691 emit_membase(cd, (basereg),(disp),1);
1695 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1697 *(cd->mcodeptr++) = 0xdc;
1698 emit_membase(cd, (basereg),(disp),1);
1702 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1704 *(cd->mcodeptr++) = 0xd8;
1705 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1709 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1711 *(cd->mcodeptr++) = 0xdc;
1712 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1716 void emit_fdivp(codegendata *cd)
1718 *(cd->mcodeptr++) = 0xde;
1719 *(cd->mcodeptr++) = 0xf9;
1723 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1725 *(cd->mcodeptr++) = 0xde;
1726 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1730 void emit_fxch(codegendata *cd)
1732 *(cd->mcodeptr++) = 0xd9;
1733 *(cd->mcodeptr++) = 0xc9;
1737 void emit_fxch_reg(codegendata *cd, s4 reg)
1739 *(cd->mcodeptr++) = 0xd9;
1740 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1744 void emit_fprem(codegendata *cd)
1746 *(cd->mcodeptr++) = 0xd9;
1747 *(cd->mcodeptr++) = 0xf8;
1751 void emit_fprem1(codegendata *cd)
1753 *(cd->mcodeptr++) = 0xd9;
1754 *(cd->mcodeptr++) = 0xf5;
1758 void emit_fucom(codegendata *cd)
1760 *(cd->mcodeptr++) = 0xdd;
1761 *(cd->mcodeptr++) = 0xe1;
1765 void emit_fucom_reg(codegendata *cd, s4 reg)
1767 *(cd->mcodeptr++) = 0xdd;
1768 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1772 void emit_fucomp_reg(codegendata *cd, s4 reg)
1774 *(cd->mcodeptr++) = 0xdd;
1775 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1779 void emit_fucompp(codegendata *cd)
1781 *(cd->mcodeptr++) = 0xda;
1782 *(cd->mcodeptr++) = 0xe9;
1786 void emit_fnstsw(codegendata *cd)
1788 *(cd->mcodeptr++) = 0xdf;
1789 *(cd->mcodeptr++) = 0xe0;
1793 void emit_sahf(codegendata *cd)
1795 *(cd->mcodeptr++) = 0x9e;
1799 void emit_finit(codegendata *cd)
1801 *(cd->mcodeptr++) = 0x9b;
1802 *(cd->mcodeptr++) = 0xdb;
1803 *(cd->mcodeptr++) = 0xe3;
1807 void emit_fldcw_mem(codegendata *cd, s4 mem)
1809 *(cd->mcodeptr++) = 0xd9;
1814 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1816 *(cd->mcodeptr++) = 0xd9;
1817 emit_membase(cd, (basereg),(disp),5);
1821 void emit_wait(codegendata *cd)
1823 *(cd->mcodeptr++) = 0x9b;
1827 void emit_ffree_reg(codegendata *cd, s4 reg)
1829 *(cd->mcodeptr++) = 0xdd;
1830 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1834 void emit_fdecstp(codegendata *cd)
1836 *(cd->mcodeptr++) = 0xd9;
1837 *(cd->mcodeptr++) = 0xf6;
1841 void emit_fincstp(codegendata *cd)
1843 *(cd->mcodeptr++) = 0xd9;
1844 *(cd->mcodeptr++) = 0xf7;
1849 * These are local overrides for various environment variables in Emacs.
1850 * Please do not remove this and leave it at the end of the file, where
1851 * Emacs will automagically detect them.
1852 * ---------------------------------------------------------------------
1855 * indent-tabs-mode: t