1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008, 2009
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
33 #include "vm/jit/i386/codegen.h"
34 #include "vm/jit/i386/emit.h"
35 #include "vm/jit/i386/md-abi.h"
37 #include "mm/memory.hpp"
39 #include "threads/lock.hpp"
41 #include "vm/options.h"
42 #include "vm/statistics.h"
44 #include "vm/jit/abi.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/dseg.h"
47 #include "vm/jit/emit-common.hpp"
48 #include "vm/jit/jit.hpp"
49 #include "vm/jit/patcher-common.hpp"
50 #include "vm/jit/replace.hpp"
51 #include "vm/jit/trace.hpp"
52 #include "vm/jit/trap.hpp"
55 /* emit_load ******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (IS_INMEMORY(src->flags)) {
74 disp = src->vv.regoff;
79 M_ILD(tempreg, REG_SP, disp);
82 M_LLD(tempreg, REG_SP, disp);
85 M_FLD(tempreg, REG_SP, disp);
88 M_DLD(tempreg, REG_SP, disp);
91 vm_abort("emit_load: unknown type %d", src->type);
103 /* emit_load_low ************************************************************
105 Emits a possible load of the low 32-bits of an operand.
107 *******************************************************************************/
109 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
115 assert(src->type == TYPE_LNG);
117 /* get required compiler data */
122 if (IS_INMEMORY(src->flags)) {
125 disp = src->vv.regoff;
127 M_ILD(tempreg, REG_SP, disp);
132 reg = GET_LOW_REG(src->vv.regoff);
138 /* emit_load_high ***********************************************************
140 Emits a possible load of the high 32-bits of an operand.
142 *******************************************************************************/
144 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
150 /* get required compiler data */
152 assert(src->type == TYPE_LNG);
156 if (IS_INMEMORY(src->flags)) {
159 disp = src->vv.regoff;
161 M_ILD(tempreg, REG_SP, disp + 4);
166 reg = GET_HIGH_REG(src->vv.regoff);
172 /* emit_store ******************************************************************
174 Emits a possible store of the destination operand.
176 *******************************************************************************/
178 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
183 /* get required compiler data */
187 if (IS_INMEMORY(dst->flags)) {
190 disp = dst->vv.regoff;
195 M_IST(d, REG_SP, disp);
198 M_LST(d, REG_SP, disp);
201 M_FST(d, REG_SP, disp);
204 M_DST(d, REG_SP, disp);
207 vm_abort("emit_store: unknown type %d", dst->type);
213 /* emit_store_low **************************************************************
215 Emits a possible store of the low 32-bits of the destination
218 *******************************************************************************/
220 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
224 assert(dst->type == TYPE_LNG);
226 /* get required compiler data */
230 if (IS_INMEMORY(dst->flags)) {
232 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
237 /* emit_store_high *************************************************************
239 Emits a possible store of the high 32-bits of the destination
242 *******************************************************************************/
244 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
248 assert(dst->type == TYPE_LNG);
250 /* get required compiler data */
254 if (IS_INMEMORY(dst->flags)) {
256 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
261 /* emit_copy *******************************************************************
263 Generates a register/memory to register/memory copy.
265 *******************************************************************************/
267 void emit_copy(jitdata *jd, instruction *iptr)
274 /* get required compiler data */
278 /* get source and destination variables */
280 src = VAROP(iptr->s1);
281 dst = VAROP(iptr->dst);
283 if ((src->vv.regoff != dst->vv.regoff) ||
284 ((src->flags ^ dst->flags) & INMEMORY)) {
286 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
287 /* emit nothing, as the value won't be used anyway */
291 /* If one of the variables resides in memory, we can eliminate
292 the register move from/to the temporary register with the
293 order of getting the destination register and the load. */
295 if (IS_INMEMORY(src->flags)) {
296 if (IS_LNG_TYPE(src->type))
297 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
301 s1 = emit_load(jd, iptr, src, d);
304 if (IS_LNG_TYPE(src->type))
305 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
307 s1 = emit_load(jd, iptr, src, REG_ITMP1);
309 d = codegen_reg_of_var(iptr->opc, dst, s1);
326 vm_abort("emit_copy: unknown type %d", src->type);
330 emit_store(jd, iptr, dst, d);
335 /* emit_branch *****************************************************************
337 Emits the code for conditional and unconditional branchs.
339 *******************************************************************************/
341 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
345 /* ATTENTION: a displacement overflow cannot happen */
347 /* check which branch to generate */
349 if (condition == BRANCH_UNCONDITIONAL) {
351 /* calculate the different displacements */
353 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
355 M_JMP_IMM(branchdisp);
358 /* calculate the different displacements */
360 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
394 vm_abort("emit_branch: unknown condition %d", condition);
400 /* emit_arithmetic_check *******************************************************
402 Emit an ArithmeticException check.
404 *******************************************************************************/
406 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
408 if (INSTRUCTION_MUST_CHECK(iptr)) {
411 M_ALD_MEM(reg, TRAP_ArithmeticException);
416 /* emit_arrayindexoutofbounds_check ********************************************
418 Emit a ArrayIndexOutOfBoundsException check.
420 *******************************************************************************/
422 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
424 if (INSTRUCTION_MUST_CHECK(iptr)) {
425 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
426 M_CMP(REG_ITMP3, s2);
428 M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
433 /* emit_arraystore_check *******************************************************
435 Emit an ArrayStoreException check.
437 *******************************************************************************/
439 void emit_arraystore_check(codegendata *cd, instruction *iptr)
441 if (INSTRUCTION_MUST_CHECK(iptr)) {
444 M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
449 /* emit_classcast_check ********************************************************
451 Emit a ClassCastException check.
453 *******************************************************************************/
455 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
457 if (INSTRUCTION_MUST_CHECK(iptr)) {
475 vm_abort("emit_classcast_check: unknown condition %d", condition);
477 M_ALD_MEM(s1, TRAP_ClassCastException);
482 /* emit_nullpointer_check ******************************************************
484 Emit a NullPointerException check.
486 *******************************************************************************/
488 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
490 if (INSTRUCTION_MUST_CHECK(iptr)) {
493 M_ALD_MEM(reg, TRAP_NullPointerException);
498 /* emit_exception_check ********************************************************
500 Emit an Exception check.
502 *******************************************************************************/
504 void emit_exception_check(codegendata *cd, instruction *iptr)
506 if (INSTRUCTION_MUST_CHECK(iptr)) {
509 M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
514 /* emit_trap_compiler **********************************************************
516 Emit a trap instruction which calls the JIT compiler.
518 *******************************************************************************/
520 void emit_trap_compiler(codegendata *cd)
522 M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
525 /* emit_trap_countdown *********************************************************
527 Emit a countdown trap.
529 counter....absolute address of the counter variable
531 *******************************************************************************/
533 void emit_trap_countdown(codegendata *cd, s4 *counter)
535 M_ISUB_IMM_MEMABS(1, (s4) counter);
537 M_ALD_MEM(REG_METHODPTR, TRAP_COUNTDOWN);
540 /* emit_patcher_alignment ******************************************************
542 Emit NOP to ensure placement at an even address.
544 *******************************************************************************/
546 void emit_patcher_alignment(codegendata *cd)
548 if ((uintptr_t) cd->mcodeptr & 1)
553 /* emit_trap *******************************************************************
555 Emit a trap instruction and return the original machine code.
557 *******************************************************************************/
559 uint32_t emit_trap(codegendata *cd)
563 /* Get machine code which is patched back in later. The
564 trap is 2 bytes long. */
566 mcode = *((uint16_t *) cd->mcodeptr);
569 /* XXX this breaks GDB, so we disable it for now */
570 *(cd->mcodeptr++) = 0xcc;
576 return (uint32_t) mcode;
580 /* emit_verbosecall_enter ******************************************************
582 Generates the code for the call trace.
584 *******************************************************************************/
587 void emit_verbosecall_enter(jitdata *jd)
594 int32_t stackframesize;
596 int align_off; /* offset for alignment compensation */
598 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
601 /* get required compiler data */
610 /* mark trace code */
614 /* keep stack 16-byte aligned */
616 stackframesize = 2 + TMP_CNT;
617 ALIGN_2(stackframesize);
619 M_ASUB_IMM(stackframesize * 8, REG_SP);
621 /* save temporary registers for leaf methods */
623 if (code_is_leafmethod(code)) {
624 for (i = 0; i < INT_TMP_CNT; i++)
625 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
628 /* no argument registers to save */
630 align_off = cd->stackframesize ? 4 : 0;
631 M_AST_IMM(m, REG_SP, 0 * 4);
632 M_AST_IMM(0, REG_SP, 1 * 4);
633 M_AST(REG_SP, REG_SP, 2 * 4);
634 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
635 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
638 /* no argument registers to restore */
640 /* restore temporary registers for leaf methods */
642 if (code_is_leafmethod(code)) {
643 for (i = 0; i < INT_TMP_CNT; i++)
644 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
647 M_AADD_IMM(stackframesize * 8, REG_SP);
649 /* mark trace code */
653 #endif /* !defined(NDEBUG) */
656 /* emit_verbosecall_exit *******************************************************
658 Generates the code for the call trace.
660 *******************************************************************************/
663 void emit_verbosecall_exit(jitdata *jd)
670 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
673 /* get required compiler data */
681 /* mark trace code */
685 /* keep stack 16-byte aligned */
687 M_ASUB_IMM(4 + 4 + 8, REG_SP);
689 /* save return value */
691 switch (md->returntype.type) {
694 M_IST(REG_RESULT, REG_SP, 2 * 4);
697 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
700 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
703 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
707 M_AST_IMM(m, REG_SP, 0 * 4);
708 M_AST(REG_SP, REG_SP, 1 * 4);
709 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
710 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
713 /* restore return value */
715 switch (md->returntype.type) {
718 M_ILD(REG_RESULT, REG_SP, 2 * 4);
721 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
725 M_AADD_IMM(4 + 4 + 8, REG_SP);
727 /* mark trace code */
731 #endif /* !defined(NDEBUG) */
734 /* code generation functions **************************************************/
736 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
738 if (basereg == ESP) {
740 emit_address_byte(0, dreg, ESP);
741 emit_address_byte(0, ESP, ESP);
743 else if (IS_IMM8(disp)) {
744 emit_address_byte(1, dreg, ESP);
745 emit_address_byte(0, ESP, ESP);
749 emit_address_byte(2, dreg, ESP);
750 emit_address_byte(0, ESP, ESP);
754 else if ((disp == 0) && (basereg != EBP)) {
755 emit_address_byte(0, dreg, basereg);
757 else if (IS_IMM8(disp)) {
758 emit_address_byte(1, dreg, basereg);
762 emit_address_byte(2, dreg, basereg);
768 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
770 if (basereg == ESP) {
771 emit_address_byte(2, dreg, ESP);
772 emit_address_byte(0, ESP, ESP);
776 emit_address_byte(2, dreg, basereg);
782 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
785 emit_address_byte(0, reg, 4);
786 emit_address_byte(scale, indexreg, 5);
789 else if ((disp == 0) && (basereg != EBP)) {
790 emit_address_byte(0, reg, 4);
791 emit_address_byte(scale, indexreg, basereg);
793 else if (IS_IMM8(disp)) {
794 emit_address_byte(1, reg, 4);
795 emit_address_byte(scale, indexreg, basereg);
799 emit_address_byte(2, reg, 4);
800 emit_address_byte(scale, indexreg, basereg);
806 /* low-level code emitter functions *******************************************/
808 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
810 COUNT(count_mov_reg_reg);
811 *(cd->mcodeptr++) = 0x89;
812 emit_reg((reg),(dreg));
816 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
818 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
822 /* 2-byte opcode for use with patchers */
823 void emit_mov_imm2_reg(codegendata *cd, s4 imm, s4 reg)
825 *(cd->mcodeptr++) = 0xc7;
826 emit_address_byte(3, 0, reg);
832 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
834 *(cd->mcodeptr++) = 0xc6;
840 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
842 COUNT(count_mov_mem_reg);
843 *(cd->mcodeptr++) = 0x8b;
844 emit_membase(cd, (basereg),(disp),(reg));
849 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
850 * constant membase immediate length of 32bit
852 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
854 COUNT(count_mov_mem_reg);
855 *(cd->mcodeptr++) = 0x8b;
856 emit_membase32(cd, (basereg),(disp),(reg));
860 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
862 COUNT(count_mov_reg_mem);
863 *(cd->mcodeptr++) = 0x89;
864 emit_membase(cd, (basereg),(disp),(reg));
868 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
870 COUNT(count_mov_reg_mem);
871 *(cd->mcodeptr++) = 0x89;
872 emit_membase32(cd, (basereg),(disp),(reg));
876 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
878 COUNT(count_mov_mem_reg);
879 *(cd->mcodeptr++) = 0x8b;
880 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
884 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
886 COUNT(count_mov_reg_mem);
887 *(cd->mcodeptr++) = 0x89;
888 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
892 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
894 COUNT(count_mov_reg_mem);
895 *(cd->mcodeptr++) = 0x66;
896 *(cd->mcodeptr++) = 0x89;
897 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
901 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
903 COUNT(count_mov_reg_mem);
904 *(cd->mcodeptr++) = 0x88;
905 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
909 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
911 COUNT(count_mov_reg_mem);
912 *(cd->mcodeptr++) = 0x89;
913 emit_mem((reg),(mem));
917 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
919 COUNT(count_mov_mem_reg);
920 *(cd->mcodeptr++) = 0x8b;
921 emit_mem((dreg),(mem));
925 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
927 *(cd->mcodeptr++) = 0xc7;
933 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
935 *(cd->mcodeptr++) = 0xc7;
936 emit_membase(cd, (basereg),(disp),0);
941 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
943 *(cd->mcodeptr++) = 0xc7;
944 emit_membase32(cd, (basereg),(disp),0);
949 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
951 *(cd->mcodeptr++) = 0xc6;
952 emit_membase(cd, (basereg),(disp),0);
957 void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
959 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
960 *(cd->mcodeptr++) = 0x0f;
961 *(cd->mcodeptr++) = 0xbe;
966 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
968 COUNT(count_mov_mem_reg);
969 *(cd->mcodeptr++) = 0x0f;
970 *(cd->mcodeptr++) = 0xbe;
971 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
975 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
977 *(cd->mcodeptr++) = 0x0f;
978 *(cd->mcodeptr++) = 0xbf;
983 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
985 COUNT(count_mov_mem_reg);
986 *(cd->mcodeptr++) = 0x0f;
987 *(cd->mcodeptr++) = 0xbf;
988 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
992 void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
994 assert(a < 4); /* Can only operate on al, bl, cl, dl. */
995 *(cd->mcodeptr++) = 0x0f;
996 *(cd->mcodeptr++) = 0xb6;
1001 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1003 *(cd->mcodeptr++) = 0x0f;
1004 *(cd->mcodeptr++) = 0xb7;
1009 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1011 COUNT(count_mov_mem_reg);
1012 *(cd->mcodeptr++) = 0x0f;
1013 *(cd->mcodeptr++) = 0xb7;
1014 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1018 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1020 *(cd->mcodeptr++) = 0xc7;
1021 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1026 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1028 *(cd->mcodeptr++) = 0x66;
1029 *(cd->mcodeptr++) = 0xc7;
1030 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1035 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1037 *(cd->mcodeptr++) = 0xc6;
1038 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1046 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1048 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1049 emit_reg((reg),(dreg));
1053 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1055 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1056 emit_membase(cd, (basereg),(disp),(reg));
1060 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1062 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1063 emit_membase(cd, (basereg),(disp),(reg));
1067 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1070 *(cd->mcodeptr++) = 0x83;
1071 emit_reg((opc),(dreg));
1074 *(cd->mcodeptr++) = 0x81;
1075 emit_reg((opc),(dreg));
1081 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1083 *(cd->mcodeptr++) = 0x81;
1084 emit_reg((opc),(dreg));
1089 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1092 *(cd->mcodeptr++) = 0x83;
1093 emit_membase(cd, (basereg),(disp),(opc));
1096 *(cd->mcodeptr++) = 0x81;
1097 emit_membase(cd, (basereg),(disp),(opc));
1103 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1106 *(cd->mcodeptr++) = 0x83;
1107 emit_mem(opc, disp);
1110 *(cd->mcodeptr++) = 0x81;
1111 emit_mem(opc, disp);
1116 void emit_alu_memindex_reg(codegendata *cd, s4 opc, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1118 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1119 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1122 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1124 *(cd->mcodeptr++) = 0x85;
1125 emit_reg((reg),(dreg));
1129 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1131 *(cd->mcodeptr++) = 0xf7;
1139 * inc, dec operations
1141 void emit_inc_reg(codegendata *cd, s4 reg)
1143 *(cd->mcodeptr++) = 0xff;
1147 void emit_dec_mem(codegendata *cd, s4 mem)
1149 *(cd->mcodeptr++) = 0xff;
1154 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1156 *(cd->mcodeptr++) = 0x0f;
1157 *(cd->mcodeptr++) = 0xaf;
1158 emit_reg((dreg),(reg));
1162 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1164 *(cd->mcodeptr++) = 0x0f;
1165 *(cd->mcodeptr++) = 0xaf;
1166 emit_membase(cd, (basereg),(disp),(dreg));
1170 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1172 if (IS_IMM8((imm))) {
1173 *(cd->mcodeptr++) = 0x6b;
1177 *(cd->mcodeptr++) = 0x69;
1184 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1186 if (IS_IMM8((imm))) {
1187 *(cd->mcodeptr++) = 0x6b;
1188 emit_reg((dreg),(reg));
1191 *(cd->mcodeptr++) = 0x69;
1192 emit_reg((dreg),(reg));
1198 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1200 if (IS_IMM8((imm))) {
1201 *(cd->mcodeptr++) = 0x6b;
1202 emit_membase(cd, (basereg),(disp),(dreg));
1205 *(cd->mcodeptr++) = 0x69;
1206 emit_membase(cd, (basereg),(disp),(dreg));
1212 void emit_mul_reg(codegendata *cd, s4 reg)
1214 *(cd->mcodeptr++) = 0xf7;
1219 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1221 *(cd->mcodeptr++) = 0xf7;
1222 emit_membase(cd, (basereg),(disp),4);
1226 void emit_idiv_reg(codegendata *cd, s4 reg)
1228 *(cd->mcodeptr++) = 0xf7;
1237 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1239 *(cd->mcodeptr++) = 0xd3;
1240 emit_reg((opc),(reg));
1244 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1247 *(cd->mcodeptr++) = 0xd1;
1248 emit_reg((opc),(dreg));
1250 *(cd->mcodeptr++) = 0xc1;
1251 emit_reg((opc),(dreg));
1257 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1259 *(cd->mcodeptr++) = 0x0f;
1260 *(cd->mcodeptr++) = 0xa5;
1261 emit_reg((reg),(dreg));
1265 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1267 *(cd->mcodeptr++) = 0x0f;
1268 *(cd->mcodeptr++) = 0xa4;
1269 emit_reg((reg),(dreg));
1274 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1276 *(cd->mcodeptr++) = 0x0f;
1277 *(cd->mcodeptr++) = 0xa5;
1278 emit_membase(cd, (basereg),(disp),(reg));
1282 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1284 *(cd->mcodeptr++) = 0x0f;
1285 *(cd->mcodeptr++) = 0xad;
1286 emit_reg((reg),(dreg));
1290 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1292 *(cd->mcodeptr++) = 0x0f;
1293 *(cd->mcodeptr++) = 0xac;
1294 emit_reg((reg),(dreg));
1299 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1301 *(cd->mcodeptr++) = 0x0f;
1302 *(cd->mcodeptr++) = 0xad;
1303 emit_membase(cd, (basereg),(disp),(reg));
1311 void emit_jmp_imm(codegendata *cd, s4 imm)
1313 *(cd->mcodeptr++) = 0xe9;
1318 void emit_jmp_reg(codegendata *cd, s4 reg)
1320 *(cd->mcodeptr++) = 0xff;
1325 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1327 *(cd->mcodeptr++) = 0x0f;
1328 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1335 * conditional set operations
1337 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1339 assert(reg < 4); /* Can only operate on al, bl, cl, dl. */
1340 *(cd->mcodeptr++) = 0x0f;
1341 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1346 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1348 *(cd->mcodeptr++) = 0x0f;
1349 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1350 emit_membase(cd, (basereg),(disp),0);
1354 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1356 *(cd->mcodeptr++) = 0x0f;
1357 *(cd->mcodeptr++) = 0xc1;
1358 emit_mem((reg),(mem));
1362 void emit_neg_reg(codegendata *cd, s4 reg)
1364 *(cd->mcodeptr++) = 0xf7;
1370 void emit_push_imm(codegendata *cd, s4 imm)
1372 *(cd->mcodeptr++) = 0x68;
1377 void emit_pop_reg(codegendata *cd, s4 reg)
1379 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1383 void emit_push_reg(codegendata *cd, s4 reg)
1385 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1389 void emit_lock(codegendata *cd)
1391 *(cd->mcodeptr++) = 0xf0;
1398 void emit_call_reg(codegendata *cd, s4 reg)
1400 *(cd->mcodeptr++) = 0xff;
1405 void emit_call_imm(codegendata *cd, s4 imm)
1407 *(cd->mcodeptr++) = 0xe8;
1414 * floating point instructions
1416 void emit_fld1(codegendata *cd)
1418 *(cd->mcodeptr++) = 0xd9;
1419 *(cd->mcodeptr++) = 0xe8;
1423 void emit_fldz(codegendata *cd)
1425 *(cd->mcodeptr++) = 0xd9;
1426 *(cd->mcodeptr++) = 0xee;
1430 void emit_fld_reg(codegendata *cd, s4 reg)
1432 *(cd->mcodeptr++) = 0xd9;
1433 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1437 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1439 *(cd->mcodeptr++) = 0xd9;
1440 emit_membase(cd, (basereg),(disp),0);
1444 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1446 *(cd->mcodeptr++) = 0xd9;
1447 emit_membase32(cd, (basereg),(disp),0);
1451 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1453 *(cd->mcodeptr++) = 0xdd;
1454 emit_membase(cd, (basereg),(disp),0);
1458 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1460 *(cd->mcodeptr++) = 0xdd;
1461 emit_membase32(cd, (basereg),(disp),0);
1465 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1467 *(cd->mcodeptr++) = 0xdb;
1468 emit_membase(cd, (basereg),(disp),5);
1472 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1474 *(cd->mcodeptr++) = 0xd9;
1475 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1479 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1481 *(cd->mcodeptr++) = 0xdd;
1482 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1486 void emit_flds_mem(codegendata *cd, s4 mem)
1488 *(cd->mcodeptr++) = 0xd9;
1493 void emit_fldl_mem(codegendata *cd, s4 mem)
1495 *(cd->mcodeptr++) = 0xdd;
1500 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1502 *(cd->mcodeptr++) = 0xdb;
1503 emit_membase(cd, (basereg),(disp),0);
1507 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1509 *(cd->mcodeptr++) = 0xdf;
1510 emit_membase(cd, (basereg),(disp),5);
1514 void emit_fst_reg(codegendata *cd, s4 reg)
1516 *(cd->mcodeptr++) = 0xdd;
1517 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1521 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1523 *(cd->mcodeptr++) = 0xd9;
1524 emit_membase(cd, (basereg),(disp),2);
1528 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1530 *(cd->mcodeptr++) = 0xdd;
1531 emit_membase(cd, (basereg),(disp),2);
1535 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1537 *(cd->mcodeptr++) = 0xd9;
1538 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1542 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1544 *(cd->mcodeptr++) = 0xdd;
1545 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1549 void emit_fstp_reg(codegendata *cd, s4 reg)
1551 *(cd->mcodeptr++) = 0xdd;
1552 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1556 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1558 *(cd->mcodeptr++) = 0xd9;
1559 emit_membase(cd, (basereg),(disp),3);
1563 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1565 *(cd->mcodeptr++) = 0xd9;
1566 emit_membase32(cd, (basereg),(disp),3);
1570 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1572 *(cd->mcodeptr++) = 0xdd;
1573 emit_membase(cd, (basereg),(disp),3);
1577 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1579 *(cd->mcodeptr++) = 0xdd;
1580 emit_membase32(cd, (basereg),(disp),3);
1584 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1586 *(cd->mcodeptr++) = 0xdb;
1587 emit_membase(cd, (basereg),(disp),7);
1591 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1593 *(cd->mcodeptr++) = 0xd9;
1594 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1598 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1600 *(cd->mcodeptr++) = 0xdd;
1601 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1605 void emit_fstps_mem(codegendata *cd, s4 mem)
1607 *(cd->mcodeptr++) = 0xd9;
1612 void emit_fstpl_mem(codegendata *cd, s4 mem)
1614 *(cd->mcodeptr++) = 0xdd;
1619 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1621 *(cd->mcodeptr++) = 0xdb;
1622 emit_membase(cd, (basereg),(disp),2);
1626 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1628 *(cd->mcodeptr++) = 0xdb;
1629 emit_membase(cd, (basereg),(disp),3);
1633 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1635 *(cd->mcodeptr++) = 0xdf;
1636 emit_membase(cd, (basereg),(disp),7);
1640 void emit_fchs(codegendata *cd)
1642 *(cd->mcodeptr++) = 0xd9;
1643 *(cd->mcodeptr++) = 0xe0;
1647 void emit_faddp(codegendata *cd)
1649 *(cd->mcodeptr++) = 0xde;
1650 *(cd->mcodeptr++) = 0xc1;
1654 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1656 *(cd->mcodeptr++) = 0xd8;
1657 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1661 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1663 *(cd->mcodeptr++) = 0xdc;
1664 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1668 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1670 *(cd->mcodeptr++) = 0xde;
1671 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1675 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1677 *(cd->mcodeptr++) = 0xd8;
1678 emit_membase(cd, (basereg),(disp),0);
1682 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1684 *(cd->mcodeptr++) = 0xdc;
1685 emit_membase(cd, (basereg),(disp),0);
1689 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1691 *(cd->mcodeptr++) = 0xd8;
1692 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1696 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1698 *(cd->mcodeptr++) = 0xdc;
1699 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1703 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1705 *(cd->mcodeptr++) = 0xde;
1706 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1710 void emit_fsubp(codegendata *cd)
1712 *(cd->mcodeptr++) = 0xde;
1713 *(cd->mcodeptr++) = 0xe9;
1717 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1719 *(cd->mcodeptr++) = 0xd8;
1720 emit_membase(cd, (basereg),(disp),4);
1724 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1726 *(cd->mcodeptr++) = 0xdc;
1727 emit_membase(cd, (basereg),(disp),4);
1731 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1733 *(cd->mcodeptr++) = 0xd8;
1734 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1738 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1740 *(cd->mcodeptr++) = 0xdc;
1741 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1745 void emit_fmulp(codegendata *cd)
1747 *(cd->mcodeptr++) = 0xde;
1748 *(cd->mcodeptr++) = 0xc9;
1752 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1754 *(cd->mcodeptr++) = 0xde;
1755 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1759 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1761 *(cd->mcodeptr++) = 0xd8;
1762 emit_membase(cd, (basereg),(disp),1);
1766 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1768 *(cd->mcodeptr++) = 0xdc;
1769 emit_membase(cd, (basereg),(disp),1);
1773 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1775 *(cd->mcodeptr++) = 0xd8;
1776 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1780 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1782 *(cd->mcodeptr++) = 0xdc;
1783 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1787 void emit_fdivp(codegendata *cd)
1789 *(cd->mcodeptr++) = 0xde;
1790 *(cd->mcodeptr++) = 0xf9;
1794 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1796 *(cd->mcodeptr++) = 0xde;
1797 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1801 void emit_fxch(codegendata *cd)
1803 *(cd->mcodeptr++) = 0xd9;
1804 *(cd->mcodeptr++) = 0xc9;
1808 void emit_fxch_reg(codegendata *cd, s4 reg)
1810 *(cd->mcodeptr++) = 0xd9;
1811 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1815 void emit_fprem(codegendata *cd)
1817 *(cd->mcodeptr++) = 0xd9;
1818 *(cd->mcodeptr++) = 0xf8;
1822 void emit_fprem1(codegendata *cd)
1824 *(cd->mcodeptr++) = 0xd9;
1825 *(cd->mcodeptr++) = 0xf5;
1829 void emit_fucom(codegendata *cd)
1831 *(cd->mcodeptr++) = 0xdd;
1832 *(cd->mcodeptr++) = 0xe1;
1836 void emit_fucom_reg(codegendata *cd, s4 reg)
1838 *(cd->mcodeptr++) = 0xdd;
1839 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1843 void emit_fucomp_reg(codegendata *cd, s4 reg)
1845 *(cd->mcodeptr++) = 0xdd;
1846 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1850 void emit_fucompp(codegendata *cd)
1852 *(cd->mcodeptr++) = 0xda;
1853 *(cd->mcodeptr++) = 0xe9;
1857 void emit_fnstsw(codegendata *cd)
1859 *(cd->mcodeptr++) = 0xdf;
1860 *(cd->mcodeptr++) = 0xe0;
1864 void emit_sahf(codegendata *cd)
1866 *(cd->mcodeptr++) = 0x9e;
1870 void emit_finit(codegendata *cd)
1872 *(cd->mcodeptr++) = 0x9b;
1873 *(cd->mcodeptr++) = 0xdb;
1874 *(cd->mcodeptr++) = 0xe3;
1878 void emit_fldcw_mem(codegendata *cd, s4 mem)
1880 *(cd->mcodeptr++) = 0xd9;
1885 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1887 *(cd->mcodeptr++) = 0xd9;
1888 emit_membase(cd, (basereg),(disp),5);
1892 void emit_wait(codegendata *cd)
1894 *(cd->mcodeptr++) = 0x9b;
1898 void emit_ffree_reg(codegendata *cd, s4 reg)
1900 *(cd->mcodeptr++) = 0xdd;
1901 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1905 void emit_fdecstp(codegendata *cd)
1907 *(cd->mcodeptr++) = 0xd9;
1908 *(cd->mcodeptr++) = 0xf6;
1912 void emit_fincstp(codegendata *cd)
1914 *(cd->mcodeptr++) = 0xd9;
1915 *(cd->mcodeptr++) = 0xf7;
1918 #if defined(ENABLE_ESCAPE_CHECK)
1919 void emit_escape_check(codegendata *cd, s4 reg) {
1921 M_MOV_IMM(asm_escape_check, REG_ITMP3);
1923 M_IADD_IMM(4, REG_SP);
1928 * These are local overrides for various environment variables in Emacs.
1929 * Please do not remove this and leave it at the end of the file, where
1930 * Emacs will automagically detect them.
1931 * ---------------------------------------------------------------------
1934 * indent-tabs-mode: t