1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
34 #include "vm/jit/i386/codegen.h"
35 #include "vm/jit/i386/emit.h"
36 #include "vm/jit/i386/md-abi.h"
38 #include "mm/memory.h"
40 #include "threads/lock-common.h"
42 #include "vm/exceptions.h"
44 #include "vm/jit/abi.h"
45 #include "vm/jit/asmpart.h"
46 #include "vm/jit/dseg.h"
47 #include "vm/jit/emit-common.h"
48 #include "vm/jit/jit.h"
49 #include "vm/jit/patcher-common.h"
50 #include "vm/jit/replace.h"
51 #include "vm/jit/trace.h"
53 #include "vmcore/options.h"
54 #include "vmcore/statistics.h"
57 /* emit_load ******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (IS_INMEMORY(src->flags)) {
76 disp = src->vv.regoff;
81 M_ILD(tempreg, REG_SP, disp);
84 M_LLD(tempreg, REG_SP, disp);
87 M_FLD(tempreg, REG_SP, disp);
90 M_DLD(tempreg, REG_SP, disp);
93 vm_abort("emit_load: unknown type %d", src->type);
105 /* emit_load_low ************************************************************
107 Emits a possible load of the low 32-bits of an operand.
109 *******************************************************************************/
111 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
117 assert(src->type == TYPE_LNG);
119 /* get required compiler data */
124 if (IS_INMEMORY(src->flags)) {
127 disp = src->vv.regoff;
129 M_ILD(tempreg, REG_SP, disp);
134 reg = GET_LOW_REG(src->vv.regoff);
140 /* emit_load_high ***********************************************************
142 Emits a possible load of the high 32-bits of an operand.
144 *******************************************************************************/
146 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
152 /* get required compiler data */
154 assert(src->type == TYPE_LNG);
158 if (IS_INMEMORY(src->flags)) {
161 disp = src->vv.regoff;
163 M_ILD(tempreg, REG_SP, disp + 4);
168 reg = GET_HIGH_REG(src->vv.regoff);
174 /* emit_store ******************************************************************
176 Emits a possible store of the destination operand.
178 *******************************************************************************/
180 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
185 /* get required compiler data */
189 if (IS_INMEMORY(dst->flags)) {
192 disp = dst->vv.regoff;
197 M_IST(d, REG_SP, disp);
200 M_LST(d, REG_SP, disp);
203 M_FST(d, REG_SP, disp);
206 M_DST(d, REG_SP, disp);
209 vm_abort("emit_store: unknown type %d", dst->type);
215 /* emit_store_low **************************************************************
217 Emits a possible store of the low 32-bits of the destination
220 *******************************************************************************/
222 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
226 assert(dst->type == TYPE_LNG);
228 /* get required compiler data */
232 if (IS_INMEMORY(dst->flags)) {
234 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
239 /* emit_store_high *************************************************************
241 Emits a possible store of the high 32-bits of the destination
244 *******************************************************************************/
246 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
250 assert(dst->type == TYPE_LNG);
252 /* get required compiler data */
256 if (IS_INMEMORY(dst->flags)) {
258 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
263 /* emit_copy *******************************************************************
265 Generates a register/memory to register/memory copy.
267 *******************************************************************************/
269 void emit_copy(jitdata *jd, instruction *iptr)
276 /* get required compiler data */
280 /* get source and destination variables */
282 src = VAROP(iptr->s1);
283 dst = VAROP(iptr->dst);
285 if ((src->vv.regoff != dst->vv.regoff) ||
286 ((src->flags ^ dst->flags) & INMEMORY)) {
288 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
289 /* emit nothing, as the value won't be used anyway */
293 /* If one of the variables resides in memory, we can eliminate
294 the register move from/to the temporary register with the
295 order of getting the destination register and the load. */
297 if (IS_INMEMORY(src->flags)) {
298 if (IS_LNG_TYPE(src->type))
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
301 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
303 s1 = emit_load(jd, iptr, src, d);
306 if (IS_LNG_TYPE(src->type))
307 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
309 s1 = emit_load(jd, iptr, src, REG_ITMP1);
311 d = codegen_reg_of_var(iptr->opc, dst, s1);
328 vm_abort("emit_copy: unknown type %d", src->type);
332 emit_store(jd, iptr, dst, d);
337 /* emit_branch *****************************************************************
339 Emits the code for conditional and unconditional branchs.
341 *******************************************************************************/
343 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
347 /* ATTENTION: a displacement overflow cannot happen */
349 /* check which branch to generate */
351 if (condition == BRANCH_UNCONDITIONAL) {
353 /* calculate the different displacements */
355 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
357 M_JMP_IMM(branchdisp);
360 /* calculate the different displacements */
362 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
396 vm_abort("emit_branch: unknown condition %d", condition);
402 /* emit_arithmetic_check *******************************************************
404 Emit an ArithmeticException check.
406 *******************************************************************************/
408 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
410 if (INSTRUCTION_MUST_CHECK(iptr)) {
413 M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
418 /* emit_arrayindexoutofbounds_check ********************************************
420 Emit a ArrayIndexOutOfBoundsException check.
422 *******************************************************************************/
424 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
426 if (INSTRUCTION_MUST_CHECK(iptr)) {
427 M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
428 M_CMP(REG_ITMP3, s2);
430 M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
435 /* emit_arraystore_check *******************************************************
437 Emit an ArrayStoreException check.
439 *******************************************************************************/
441 void emit_arraystore_check(codegendata *cd, instruction *iptr)
443 if (INSTRUCTION_MUST_CHECK(iptr)) {
446 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_ARRAYSTORE);
451 /* emit_classcast_check ********************************************************
453 Emit a ClassCastException check.
455 *******************************************************************************/
457 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
459 if (INSTRUCTION_MUST_CHECK(iptr)) {
471 vm_abort("emit_classcast_check: unknown condition %d", condition);
473 M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
478 /* emit_nullpointer_check ******************************************************
480 Emit a NullPointerException check.
482 *******************************************************************************/
484 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
486 if (INSTRUCTION_MUST_CHECK(iptr)) {
489 M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
494 /* emit_exception_check ********************************************************
496 Emit an Exception check.
498 *******************************************************************************/
500 void emit_exception_check(codegendata *cd, instruction *iptr)
502 if (INSTRUCTION_MUST_CHECK(iptr)) {
505 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
510 /* emit_trap_compiler **********************************************************
512 Emit a trap instruction which calls the JIT compiler.
514 *******************************************************************************/
516 void emit_trap_compiler(codegendata *cd)
518 M_ALD_MEM(REG_METHODPTR, EXCEPTION_HARDWARE_COMPILER);
522 /* emit_trap *******************************************************************
524 Emit a trap instruction and return the original machine code.
526 *******************************************************************************/
528 uint32_t emit_trap(codegendata *cd)
532 /* Get machine code which is patched back in later. The
533 trap is 2 bytes long. */
535 mcode = *((uint16_t *) cd->mcodeptr);
538 /* XXX this breaks GDB, so we disable it for now */
539 *(cd->mcodeptr++) = 0xcc;
545 return (uint32_t) mcode;
549 /* emit_verbosecall_enter ******************************************************
551 Generates the code for the call trace.
553 *******************************************************************************/
556 void emit_verbosecall_enter(jitdata *jd)
562 int32_t stackframesize;
565 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
568 /* get required compiler data */
576 /* mark trace code */
580 /* keep stack 16-byte aligned */
582 stackframesize = 2 + TMP_CNT;
583 ALIGN_2(stackframesize);
585 M_ASUB_IMM(stackframesize * 8, REG_SP);
587 /* save temporary registers for leaf methods */
589 if (jd->isleafmethod) {
590 for (i = 0; i < INT_TMP_CNT; i++)
591 M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
594 /* no argument registers to save */
596 M_AST_IMM(m, REG_SP, 0 * 4);
597 M_AST_IMM(0, REG_SP, 1 * 4);
598 M_AST(REG_SP, REG_SP, 2 * 4);
599 M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4, REG_SP, 2 * 4);
600 M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
603 /* no argument registers to restore */
605 /* restore temporary registers for leaf methods */
607 if (jd->isleafmethod) {
608 for (i = 0; i < INT_TMP_CNT; i++)
609 M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
612 M_AADD_IMM(stackframesize * 8, REG_SP);
614 /* mark trace code */
618 #endif /* !defined(NDEBUG) */
621 /* emit_verbosecall_exit *******************************************************
623 Generates the code for the call trace.
625 *******************************************************************************/
628 void emit_verbosecall_exit(jitdata *jd)
635 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
638 /* get required compiler data */
646 /* mark trace code */
650 /* keep stack 16-byte aligned */
652 M_ASUB_IMM(4 + 4 + 8, REG_SP);
654 /* save return value */
656 switch (md->returntype.type) {
659 M_IST(REG_RESULT, REG_SP, 2 * 4);
662 M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
665 M_FSTNP(REG_NULL, REG_SP, 2 * 4);
668 M_DSTNP(REG_NULL, REG_SP, 2 * 4);
672 M_AST_IMM(m, REG_SP, 0 * 4);
673 M_AST(REG_SP, REG_SP, 1 * 4);
674 M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
675 M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
678 /* restore return value */
680 switch (md->returntype.type) {
683 M_ILD(REG_RESULT, REG_SP, 2 * 4);
686 M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
690 M_AADD_IMM(4 + 4 + 8, REG_SP);
692 /* mark trace code */
696 #endif /* !defined(NDEBUG) */
699 /* code generation functions **************************************************/
701 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
703 if (basereg == ESP) {
705 emit_address_byte(0, dreg, ESP);
706 emit_address_byte(0, ESP, ESP);
708 else if (IS_IMM8(disp)) {
709 emit_address_byte(1, dreg, ESP);
710 emit_address_byte(0, ESP, ESP);
714 emit_address_byte(2, dreg, ESP);
715 emit_address_byte(0, ESP, ESP);
719 else if ((disp == 0) && (basereg != EBP)) {
720 emit_address_byte(0, dreg, basereg);
722 else if (IS_IMM8(disp)) {
723 emit_address_byte(1, dreg, basereg);
727 emit_address_byte(2, dreg, basereg);
733 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
735 if (basereg == ESP) {
736 emit_address_byte(2, dreg, ESP);
737 emit_address_byte(0, ESP, ESP);
741 emit_address_byte(2, dreg, basereg);
747 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
750 emit_address_byte(0, reg, 4);
751 emit_address_byte(scale, indexreg, 5);
754 else if ((disp == 0) && (basereg != EBP)) {
755 emit_address_byte(0, reg, 4);
756 emit_address_byte(scale, indexreg, basereg);
758 else if (IS_IMM8(disp)) {
759 emit_address_byte(1, reg, 4);
760 emit_address_byte(scale, indexreg, basereg);
764 emit_address_byte(2, reg, 4);
765 emit_address_byte(scale, indexreg, basereg);
771 /* low-level code emitter functions *******************************************/
773 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
775 COUNT(count_mov_reg_reg);
776 *(cd->mcodeptr++) = 0x89;
777 emit_reg((reg),(dreg));
781 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
783 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
788 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
790 *(cd->mcodeptr++) = 0xc6;
796 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
798 COUNT(count_mov_mem_reg);
799 *(cd->mcodeptr++) = 0x8b;
800 emit_membase(cd, (basereg),(disp),(reg));
805 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
806 * constant membase immediate length of 32bit
808 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
810 COUNT(count_mov_mem_reg);
811 *(cd->mcodeptr++) = 0x8b;
812 emit_membase32(cd, (basereg),(disp),(reg));
816 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
818 COUNT(count_mov_reg_mem);
819 *(cd->mcodeptr++) = 0x89;
820 emit_membase(cd, (basereg),(disp),(reg));
824 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
826 COUNT(count_mov_reg_mem);
827 *(cd->mcodeptr++) = 0x89;
828 emit_membase32(cd, (basereg),(disp),(reg));
832 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
834 COUNT(count_mov_mem_reg);
835 *(cd->mcodeptr++) = 0x8b;
836 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
840 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
842 COUNT(count_mov_reg_mem);
843 *(cd->mcodeptr++) = 0x89;
844 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
848 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
850 COUNT(count_mov_reg_mem);
851 *(cd->mcodeptr++) = 0x66;
852 *(cd->mcodeptr++) = 0x89;
853 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
857 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
859 COUNT(count_mov_reg_mem);
860 *(cd->mcodeptr++) = 0x88;
861 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
865 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
867 COUNT(count_mov_reg_mem);
868 *(cd->mcodeptr++) = 0x89;
869 emit_mem((reg),(mem));
873 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
875 COUNT(count_mov_mem_reg);
876 *(cd->mcodeptr++) = 0x8b;
877 emit_mem((dreg),(mem));
881 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
883 *(cd->mcodeptr++) = 0xc7;
889 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
891 *(cd->mcodeptr++) = 0xc7;
892 emit_membase(cd, (basereg),(disp),0);
897 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
899 *(cd->mcodeptr++) = 0xc7;
900 emit_membase32(cd, (basereg),(disp),0);
905 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
907 *(cd->mcodeptr++) = 0xc6;
908 emit_membase(cd, (basereg),(disp),0);
913 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
915 COUNT(count_mov_mem_reg);
916 *(cd->mcodeptr++) = 0x0f;
917 *(cd->mcodeptr++) = 0xbe;
918 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
922 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
924 *(cd->mcodeptr++) = 0x0f;
925 *(cd->mcodeptr++) = 0xbf;
930 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
932 COUNT(count_mov_mem_reg);
933 *(cd->mcodeptr++) = 0x0f;
934 *(cd->mcodeptr++) = 0xbf;
935 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
939 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
941 *(cd->mcodeptr++) = 0x0f;
942 *(cd->mcodeptr++) = 0xb7;
947 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
949 COUNT(count_mov_mem_reg);
950 *(cd->mcodeptr++) = 0x0f;
951 *(cd->mcodeptr++) = 0xb7;
952 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
956 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
958 *(cd->mcodeptr++) = 0xc7;
959 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
964 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
966 *(cd->mcodeptr++) = 0x66;
967 *(cd->mcodeptr++) = 0xc7;
968 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
973 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
975 *(cd->mcodeptr++) = 0xc6;
976 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
984 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
986 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
987 emit_reg((reg),(dreg));
991 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
993 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
994 emit_membase(cd, (basereg),(disp),(reg));
998 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1000 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1001 emit_membase(cd, (basereg),(disp),(reg));
1005 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1008 *(cd->mcodeptr++) = 0x83;
1009 emit_reg((opc),(dreg));
1012 *(cd->mcodeptr++) = 0x81;
1013 emit_reg((opc),(dreg));
1019 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1021 *(cd->mcodeptr++) = 0x81;
1022 emit_reg((opc),(dreg));
1027 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1030 *(cd->mcodeptr++) = 0x83;
1031 emit_membase(cd, (basereg),(disp),(opc));
1034 *(cd->mcodeptr++) = 0x81;
1035 emit_membase(cd, (basereg),(disp),(opc));
1041 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1044 *(cd->mcodeptr++) = 0x83;
1045 emit_mem(opc, disp);
1048 *(cd->mcodeptr++) = 0x81;
1049 emit_mem(opc, disp);
1055 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1057 *(cd->mcodeptr++) = 0x85;
1058 emit_reg((reg),(dreg));
1062 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1064 *(cd->mcodeptr++) = 0xf7;
1072 * inc, dec operations
1074 void emit_dec_mem(codegendata *cd, s4 mem)
1076 *(cd->mcodeptr++) = 0xff;
1081 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1083 *(cd->mcodeptr++) = 0x0f;
1084 *(cd->mcodeptr++) = 0xaf;
1085 emit_reg((dreg),(reg));
1089 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1091 *(cd->mcodeptr++) = 0x0f;
1092 *(cd->mcodeptr++) = 0xaf;
1093 emit_membase(cd, (basereg),(disp),(dreg));
1097 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1099 if (IS_IMM8((imm))) {
1100 *(cd->mcodeptr++) = 0x6b;
1104 *(cd->mcodeptr++) = 0x69;
1111 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1113 if (IS_IMM8((imm))) {
1114 *(cd->mcodeptr++) = 0x6b;
1115 emit_reg((dreg),(reg));
1118 *(cd->mcodeptr++) = 0x69;
1119 emit_reg((dreg),(reg));
1125 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1127 if (IS_IMM8((imm))) {
1128 *(cd->mcodeptr++) = 0x6b;
1129 emit_membase(cd, (basereg),(disp),(dreg));
1132 *(cd->mcodeptr++) = 0x69;
1133 emit_membase(cd, (basereg),(disp),(dreg));
1139 void emit_mul_reg(codegendata *cd, s4 reg)
1141 *(cd->mcodeptr++) = 0xf7;
1146 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1148 *(cd->mcodeptr++) = 0xf7;
1149 emit_membase(cd, (basereg),(disp),4);
1153 void emit_idiv_reg(codegendata *cd, s4 reg)
1155 *(cd->mcodeptr++) = 0xf7;
1164 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1166 *(cd->mcodeptr++) = 0xd3;
1167 emit_reg((opc),(reg));
1171 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1174 *(cd->mcodeptr++) = 0xd1;
1175 emit_reg((opc),(dreg));
1177 *(cd->mcodeptr++) = 0xc1;
1178 emit_reg((opc),(dreg));
1184 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1186 *(cd->mcodeptr++) = 0x0f;
1187 *(cd->mcodeptr++) = 0xa5;
1188 emit_reg((reg),(dreg));
1192 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1194 *(cd->mcodeptr++) = 0x0f;
1195 *(cd->mcodeptr++) = 0xa4;
1196 emit_reg((reg),(dreg));
1201 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1203 *(cd->mcodeptr++) = 0x0f;
1204 *(cd->mcodeptr++) = 0xa5;
1205 emit_membase(cd, (basereg),(disp),(reg));
1209 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1211 *(cd->mcodeptr++) = 0x0f;
1212 *(cd->mcodeptr++) = 0xad;
1213 emit_reg((reg),(dreg));
1217 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1219 *(cd->mcodeptr++) = 0x0f;
1220 *(cd->mcodeptr++) = 0xac;
1221 emit_reg((reg),(dreg));
1226 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1228 *(cd->mcodeptr++) = 0x0f;
1229 *(cd->mcodeptr++) = 0xad;
1230 emit_membase(cd, (basereg),(disp),(reg));
1238 void emit_jmp_imm(codegendata *cd, s4 imm)
1240 *(cd->mcodeptr++) = 0xe9;
1245 void emit_jmp_reg(codegendata *cd, s4 reg)
1247 *(cd->mcodeptr++) = 0xff;
1252 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1254 *(cd->mcodeptr++) = 0x0f;
1255 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1262 * conditional set operations
1264 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1266 *(cd->mcodeptr++) = 0x0f;
1267 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1272 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1274 *(cd->mcodeptr++) = 0x0f;
1275 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1276 emit_membase(cd, (basereg),(disp),0);
1280 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1282 *(cd->mcodeptr++) = 0x0f;
1283 *(cd->mcodeptr++) = 0xc1;
1284 emit_mem((reg),(mem));
1288 void emit_neg_reg(codegendata *cd, s4 reg)
1290 *(cd->mcodeptr++) = 0xf7;
1296 void emit_push_imm(codegendata *cd, s4 imm)
1298 *(cd->mcodeptr++) = 0x68;
1303 void emit_pop_reg(codegendata *cd, s4 reg)
1305 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1309 void emit_push_reg(codegendata *cd, s4 reg)
1311 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1315 void emit_lock(codegendata *cd)
1317 *(cd->mcodeptr++) = 0xf0;
1324 void emit_call_reg(codegendata *cd, s4 reg)
1326 *(cd->mcodeptr++) = 0xff;
1331 void emit_call_imm(codegendata *cd, s4 imm)
1333 *(cd->mcodeptr++) = 0xe8;
1340 * floating point instructions
1342 void emit_fld1(codegendata *cd)
1344 *(cd->mcodeptr++) = 0xd9;
1345 *(cd->mcodeptr++) = 0xe8;
1349 void emit_fldz(codegendata *cd)
1351 *(cd->mcodeptr++) = 0xd9;
1352 *(cd->mcodeptr++) = 0xee;
1356 void emit_fld_reg(codegendata *cd, s4 reg)
1358 *(cd->mcodeptr++) = 0xd9;
1359 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1363 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1365 *(cd->mcodeptr++) = 0xd9;
1366 emit_membase(cd, (basereg),(disp),0);
1370 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1372 *(cd->mcodeptr++) = 0xd9;
1373 emit_membase32(cd, (basereg),(disp),0);
1377 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1379 *(cd->mcodeptr++) = 0xdd;
1380 emit_membase(cd, (basereg),(disp),0);
1384 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1386 *(cd->mcodeptr++) = 0xdd;
1387 emit_membase32(cd, (basereg),(disp),0);
1391 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1393 *(cd->mcodeptr++) = 0xdb;
1394 emit_membase(cd, (basereg),(disp),5);
1398 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1400 *(cd->mcodeptr++) = 0xd9;
1401 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1405 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1407 *(cd->mcodeptr++) = 0xdd;
1408 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1412 void emit_flds_mem(codegendata *cd, s4 mem)
1414 *(cd->mcodeptr++) = 0xd9;
1419 void emit_fldl_mem(codegendata *cd, s4 mem)
1421 *(cd->mcodeptr++) = 0xdd;
1426 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1428 *(cd->mcodeptr++) = 0xdb;
1429 emit_membase(cd, (basereg),(disp),0);
1433 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1435 *(cd->mcodeptr++) = 0xdf;
1436 emit_membase(cd, (basereg),(disp),5);
1440 void emit_fst_reg(codegendata *cd, s4 reg)
1442 *(cd->mcodeptr++) = 0xdd;
1443 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1447 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1449 *(cd->mcodeptr++) = 0xd9;
1450 emit_membase(cd, (basereg),(disp),2);
1454 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1456 *(cd->mcodeptr++) = 0xdd;
1457 emit_membase(cd, (basereg),(disp),2);
1461 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1463 *(cd->mcodeptr++) = 0xd9;
1464 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1468 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1470 *(cd->mcodeptr++) = 0xdd;
1471 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1475 void emit_fstp_reg(codegendata *cd, s4 reg)
1477 *(cd->mcodeptr++) = 0xdd;
1478 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1482 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1484 *(cd->mcodeptr++) = 0xd9;
1485 emit_membase(cd, (basereg),(disp),3);
1489 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1491 *(cd->mcodeptr++) = 0xd9;
1492 emit_membase32(cd, (basereg),(disp),3);
1496 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1498 *(cd->mcodeptr++) = 0xdd;
1499 emit_membase(cd, (basereg),(disp),3);
1503 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1505 *(cd->mcodeptr++) = 0xdd;
1506 emit_membase32(cd, (basereg),(disp),3);
1510 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1512 *(cd->mcodeptr++) = 0xdb;
1513 emit_membase(cd, (basereg),(disp),7);
1517 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1519 *(cd->mcodeptr++) = 0xd9;
1520 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1524 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1526 *(cd->mcodeptr++) = 0xdd;
1527 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1531 void emit_fstps_mem(codegendata *cd, s4 mem)
1533 *(cd->mcodeptr++) = 0xd9;
1538 void emit_fstpl_mem(codegendata *cd, s4 mem)
1540 *(cd->mcodeptr++) = 0xdd;
1545 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1547 *(cd->mcodeptr++) = 0xdb;
1548 emit_membase(cd, (basereg),(disp),2);
1552 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1554 *(cd->mcodeptr++) = 0xdb;
1555 emit_membase(cd, (basereg),(disp),3);
1559 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1561 *(cd->mcodeptr++) = 0xdf;
1562 emit_membase(cd, (basereg),(disp),7);
1566 void emit_fchs(codegendata *cd)
1568 *(cd->mcodeptr++) = 0xd9;
1569 *(cd->mcodeptr++) = 0xe0;
1573 void emit_faddp(codegendata *cd)
1575 *(cd->mcodeptr++) = 0xde;
1576 *(cd->mcodeptr++) = 0xc1;
1580 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1582 *(cd->mcodeptr++) = 0xd8;
1583 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1587 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1589 *(cd->mcodeptr++) = 0xdc;
1590 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1594 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1596 *(cd->mcodeptr++) = 0xde;
1597 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1601 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1603 *(cd->mcodeptr++) = 0xd8;
1604 emit_membase(cd, (basereg),(disp),0);
1608 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1610 *(cd->mcodeptr++) = 0xdc;
1611 emit_membase(cd, (basereg),(disp),0);
1615 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1617 *(cd->mcodeptr++) = 0xd8;
1618 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1622 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1624 *(cd->mcodeptr++) = 0xdc;
1625 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1629 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1631 *(cd->mcodeptr++) = 0xde;
1632 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1636 void emit_fsubp(codegendata *cd)
1638 *(cd->mcodeptr++) = 0xde;
1639 *(cd->mcodeptr++) = 0xe9;
1643 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1645 *(cd->mcodeptr++) = 0xd8;
1646 emit_membase(cd, (basereg),(disp),4);
1650 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1652 *(cd->mcodeptr++) = 0xdc;
1653 emit_membase(cd, (basereg),(disp),4);
1657 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1659 *(cd->mcodeptr++) = 0xd8;
1660 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1664 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1666 *(cd->mcodeptr++) = 0xdc;
1667 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1671 void emit_fmulp(codegendata *cd)
1673 *(cd->mcodeptr++) = 0xde;
1674 *(cd->mcodeptr++) = 0xc9;
1678 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1680 *(cd->mcodeptr++) = 0xde;
1681 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1685 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1687 *(cd->mcodeptr++) = 0xd8;
1688 emit_membase(cd, (basereg),(disp),1);
1692 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1694 *(cd->mcodeptr++) = 0xdc;
1695 emit_membase(cd, (basereg),(disp),1);
1699 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1701 *(cd->mcodeptr++) = 0xd8;
1702 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1706 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1708 *(cd->mcodeptr++) = 0xdc;
1709 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1713 void emit_fdivp(codegendata *cd)
1715 *(cd->mcodeptr++) = 0xde;
1716 *(cd->mcodeptr++) = 0xf9;
1720 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1722 *(cd->mcodeptr++) = 0xde;
1723 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1727 void emit_fxch(codegendata *cd)
1729 *(cd->mcodeptr++) = 0xd9;
1730 *(cd->mcodeptr++) = 0xc9;
1734 void emit_fxch_reg(codegendata *cd, s4 reg)
1736 *(cd->mcodeptr++) = 0xd9;
1737 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1741 void emit_fprem(codegendata *cd)
1743 *(cd->mcodeptr++) = 0xd9;
1744 *(cd->mcodeptr++) = 0xf8;
1748 void emit_fprem1(codegendata *cd)
1750 *(cd->mcodeptr++) = 0xd9;
1751 *(cd->mcodeptr++) = 0xf5;
1755 void emit_fucom(codegendata *cd)
1757 *(cd->mcodeptr++) = 0xdd;
1758 *(cd->mcodeptr++) = 0xe1;
1762 void emit_fucom_reg(codegendata *cd, s4 reg)
1764 *(cd->mcodeptr++) = 0xdd;
1765 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1769 void emit_fucomp_reg(codegendata *cd, s4 reg)
1771 *(cd->mcodeptr++) = 0xdd;
1772 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1776 void emit_fucompp(codegendata *cd)
1778 *(cd->mcodeptr++) = 0xda;
1779 *(cd->mcodeptr++) = 0xe9;
1783 void emit_fnstsw(codegendata *cd)
1785 *(cd->mcodeptr++) = 0xdf;
1786 *(cd->mcodeptr++) = 0xe0;
1790 void emit_sahf(codegendata *cd)
1792 *(cd->mcodeptr++) = 0x9e;
1796 void emit_finit(codegendata *cd)
1798 *(cd->mcodeptr++) = 0x9b;
1799 *(cd->mcodeptr++) = 0xdb;
1800 *(cd->mcodeptr++) = 0xe3;
1804 void emit_fldcw_mem(codegendata *cd, s4 mem)
1806 *(cd->mcodeptr++) = 0xd9;
1811 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1813 *(cd->mcodeptr++) = 0xd9;
1814 emit_membase(cd, (basereg),(disp),5);
1818 void emit_wait(codegendata *cd)
1820 *(cd->mcodeptr++) = 0x9b;
1824 void emit_ffree_reg(codegendata *cd, s4 reg)
1826 *(cd->mcodeptr++) = 0xdd;
1827 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1831 void emit_fdecstp(codegendata *cd)
1833 *(cd->mcodeptr++) = 0xd9;
1834 *(cd->mcodeptr++) = 0xf6;
1838 void emit_fincstp(codegendata *cd)
1840 *(cd->mcodeptr++) = 0xd9;
1841 *(cd->mcodeptr++) = 0xf7;
1846 * These are local overrides for various environment variables in Emacs.
1847 * Please do not remove this and leave it at the end of the file, where
1848 * Emacs will automagically detect them.
1849 * ---------------------------------------------------------------------
1852 * indent-tabs-mode: t