1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 $Id: emit.c 8115 2007-06-20 19:14:05Z michi $
36 #include "vm/jit/i386/codegen.h"
37 #include "vm/jit/i386/emit.h"
38 #include "vm/jit/i386/md-abi.h"
40 #include "mm/memory.h"
42 #include "threads/lock-common.h"
44 #include "vm/builtin.h"
45 #include "vm/exceptions.h"
47 #include "vm/jit/asmpart.h"
48 #include "vm/jit/dseg.h"
49 #include "vm/jit/emit-common.h"
50 #include "vm/jit/jit.h"
51 #include "vm/jit/replace.h"
53 #include "vmcore/options.h"
54 #include "vmcore/statistics.h"
57 /* emit_load ******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (IS_INMEMORY(src->flags)) {
76 disp = src->vv.regoff;
81 M_ILD(tempreg, REG_SP, disp);
84 M_LLD(tempreg, REG_SP, disp);
87 M_FLD(tempreg, REG_SP, disp);
90 M_DLD(tempreg, REG_SP, disp);
93 vm_abort("emit_load: unknown type %d", src->type);
105 /* emit_load_low ************************************************************
107 Emits a possible load of the low 32-bits of an operand.
109 *******************************************************************************/
111 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
117 assert(src->type == TYPE_LNG);
119 /* get required compiler data */
124 if (IS_INMEMORY(src->flags)) {
127 disp = src->vv.regoff;
129 M_ILD(tempreg, REG_SP, disp);
134 reg = GET_LOW_REG(src->vv.regoff);
140 /* emit_load_high ***********************************************************
142 Emits a possible load of the high 32-bits of an operand.
144 *******************************************************************************/
146 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
152 /* get required compiler data */
154 assert(src->type == TYPE_LNG);
158 if (IS_INMEMORY(src->flags)) {
161 disp = src->vv.regoff;
163 M_ILD(tempreg, REG_SP, disp + 4);
168 reg = GET_HIGH_REG(src->vv.regoff);
174 /* emit_store ******************************************************************
176 Emits a possible store of the destination operand.
178 *******************************************************************************/
180 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
185 /* get required compiler data */
189 if (IS_INMEMORY(dst->flags)) {
192 disp = dst->vv.regoff;
197 M_IST(d, REG_SP, disp);
200 M_LST(d, REG_SP, disp);
203 M_FST(d, REG_SP, disp);
206 M_DST(d, REG_SP, disp);
209 vm_abort("emit_store: unknown type %d", dst->type);
215 /* emit_store_low **************************************************************
217 Emits a possible store of the low 32-bits of the destination
220 *******************************************************************************/
222 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
226 assert(dst->type == TYPE_LNG);
228 /* get required compiler data */
232 if (IS_INMEMORY(dst->flags)) {
234 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
239 /* emit_store_high *************************************************************
241 Emits a possible store of the high 32-bits of the destination
244 *******************************************************************************/
246 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
250 assert(dst->type == TYPE_LNG);
252 /* get required compiler data */
256 if (IS_INMEMORY(dst->flags)) {
258 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
263 /* emit_copy *******************************************************************
265 Generates a register/memory to register/memory copy.
267 *******************************************************************************/
269 void emit_copy(jitdata *jd, instruction *iptr)
276 /* get required compiler data */
280 /* get source and destination variables */
282 src = VAROP(iptr->s1);
283 dst = VAROP(iptr->dst);
285 if ((src->vv.regoff != dst->vv.regoff) ||
286 ((src->flags ^ dst->flags) & INMEMORY)) {
288 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
289 /* emit nothing, as the value won't be used anyway */
293 /* If one of the variables resides in memory, we can eliminate
294 the register move from/to the temporary register with the
295 order of getting the destination register and the load. */
297 if (IS_INMEMORY(src->flags)) {
298 if (IS_LNG_TYPE(src->type))
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
301 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
303 s1 = emit_load(jd, iptr, src, d);
306 if (IS_LNG_TYPE(src->type))
307 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
309 s1 = emit_load(jd, iptr, src, REG_ITMP1);
311 d = codegen_reg_of_var(iptr->opc, dst, s1);
328 vm_abort("emit_copy: unknown type %d", src->type);
332 emit_store(jd, iptr, dst, d);
337 /* emit_branch *****************************************************************
339 Emits the code for conditional and unconditional branchs.
341 *******************************************************************************/
343 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
347 /* ATTENTION: a displacement overflow cannot happen */
349 /* check which branch to generate */
351 if (condition == BRANCH_UNCONDITIONAL) {
353 /* calculate the different displacements */
355 branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
357 M_JMP_IMM(branchdisp);
360 /* calculate the different displacements */
362 branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
396 vm_abort("emit_branch: unknown condition %d", condition);
402 /* emit_arithmetic_check *******************************************************
404 Emit an ArithmeticException check.
406 *******************************************************************************/
408 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
410 if (INSTRUCTION_MUST_CHECK(iptr)) {
413 M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
418 /* emit_arrayindexoutofbounds_check ********************************************
420 Emit a ArrayIndexOutOfBoundsException check.
422 *******************************************************************************/
424 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
426 if (INSTRUCTION_MUST_CHECK(iptr)) {
427 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
428 M_CMP(REG_ITMP3, s2);
430 M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
435 /* emit_classcast_check ********************************************************
437 Emit a ClassCastException check.
439 *******************************************************************************/
441 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
443 if (INSTRUCTION_MUST_CHECK(iptr)) {
455 vm_abort("emit_classcast_check: unknown condition %d", condition);
457 M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
462 /* emit_nullpointer_check ******************************************************
464 Emit a NullPointerException check.
466 *******************************************************************************/
468 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
470 if (INSTRUCTION_MUST_CHECK(iptr)) {
473 M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
478 /* emit_exception_check ********************************************************
480 Emit an Exception check.
482 *******************************************************************************/
484 void emit_exception_check(codegendata *cd, instruction *iptr)
486 if (INSTRUCTION_MUST_CHECK(iptr)) {
489 M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
494 /* emit_patcher_stubs **********************************************************
496 Generates the code for the patcher stubs.
498 *******************************************************************************/
500 void emit_patcher_stubs(jitdata *jd)
510 /* get required compiler data */
514 /* generate code patching stub call code */
518 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
519 /* check code segment size */
523 /* Get machine code which is patched back in later. A
524 `call rel32' is 5 bytes long. */
526 savedmcodeptr = cd->mcodebase + pref->branchpos;
527 mcode = *((u8 *) savedmcodeptr);
529 /* patch in `call rel32' to call the following code */
531 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
532 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
534 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
536 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
542 /* move pointer to java_objectheader onto stack */
544 #if defined(ENABLE_THREADS)
545 (void) dseg_add_unique_address(cd, NULL); /* flcword */
546 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
547 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
549 M_MOV_IMM(0, REG_ITMP3);
551 M_AADD_IMM(disp, REG_ITMP3);
557 /* move machine code bytes and classinfo pointer into registers */
559 M_PUSH_IMM(mcode >> 32);
561 M_PUSH_IMM(pref->ref);
562 M_PUSH_IMM(pref->patcher);
564 if (targetdisp == 0) {
565 targetdisp = cd->mcodeptr - cd->mcodebase;
567 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
571 M_JMP_IMM((cd->mcodebase + targetdisp) -
572 (cd->mcodeptr + PATCHER_CALL_SIZE));
578 /* emit_replacement_stubs ******************************************************
580 Generates the code for the replacement stubs.
582 *******************************************************************************/
584 #if defined(ENABLE_REPLACEMENT)
585 void emit_replacement_stubs(jitdata *jd)
594 /* get required compiler data */
599 rplp = code->rplpoints;
601 /* store beginning of replacement stubs */
603 code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
605 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
606 /* do not generate stubs for non-trappable points */
608 if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
611 /* check code segment size */
615 /* note start of stub code */
617 outcode = (s4) (cd->mcodeptr - cd->mcodebase);
619 /* push address of `rplpoint` struct */
623 /* jump to replacement function */
625 M_PUSH_IMM(asm_replacement_out);
628 /* add jump reference for COUNTDOWN points */
630 if (rplp->flags & RPLPOINT_FLAG_COUNTDOWN) {
632 branchmpc = (s4)rplp->pc + (7 + 6);
634 md_codegen_patch_branch(cd, branchmpc, (s4) outcode);
637 assert(((cd->mcodeptr - cd->mcodebase) - outcode) == REPLACEMENT_STUB_SIZE);
640 #endif /* defined(ENABLE_REPLACEMENT) */
643 /* emit_verbosecall_enter ******************************************************
645 Generates the code for the call trace.
647 *******************************************************************************/
650 void emit_verbosecall_enter(jitdata *jd)
659 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
662 /* get required compiler data */
670 /* mark trace code */
674 /* methodinfo* + arguments + return address */
676 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
677 cd->stackframesize * 4 + 4;
679 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
681 /* save temporary registers for leaf methods */
683 for (i = 0; i < INT_TMP_CNT; i++)
684 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
686 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
687 t = md->paramtypes[i].type;
689 if (IS_INT_LNG_TYPE(t)) {
690 if (IS_2_WORD_TYPE(t)) {
691 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
692 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
694 else if (IS_ADR_TYPE(t)) {
695 M_ALD(REG_ITMP1, REG_SP, disp);
696 M_AST(REG_ITMP1, REG_SP, i * 8);
697 M_IST_IMM(0, REG_SP, i * 8 + 4);
700 M_ILD(EAX, REG_SP, disp);
702 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
706 if (IS_2_WORD_TYPE(t)) {
707 M_DLD(REG_NULL, REG_SP, disp);
708 M_DST(REG_NULL, REG_SP, i * 8);
711 M_FLD(REG_NULL, REG_SP, disp);
712 M_FST(REG_NULL, REG_SP, i * 8);
713 M_IST_IMM(0, REG_SP, i * 8 + 4);
717 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
720 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
722 M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
725 /* restore temporary registers for leaf methods */
727 for (i = 0; i < INT_TMP_CNT; i++)
728 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
730 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
732 /* mark trace code */
736 #endif /* !defined(NDEBUG) */
739 /* emit_verbosecall_exit *******************************************************
741 Generates the code for the call trace.
743 void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
745 *******************************************************************************/
748 void emit_verbosecall_exit(jitdata *jd)
754 if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
757 /* get required compiler data */
763 /* mark trace code */
767 M_ASUB_IMM(8 + 8 + 4 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
769 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
771 M_DSTNP(REG_NULL, REG_SP, 1 * 8);
772 M_FSTNP(REG_NULL, REG_SP, 2 * 8);
774 M_AST_IMM(m, REG_SP, 2 * 8 + 1 * 4);
776 M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
779 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 4);
781 M_AADD_IMM(8 + 8 + 4 + 4 + 8, REG_SP);
783 /* mark trace code */
787 #endif /* !defined(NDEBUG) */
790 /* code generation functions **************************************************/
792 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
794 if (basereg == ESP) {
796 emit_address_byte(0, dreg, ESP);
797 emit_address_byte(0, ESP, ESP);
799 else if (IS_IMM8(disp)) {
800 emit_address_byte(1, dreg, ESP);
801 emit_address_byte(0, ESP, ESP);
805 emit_address_byte(2, dreg, ESP);
806 emit_address_byte(0, ESP, ESP);
810 else if ((disp == 0) && (basereg != EBP)) {
811 emit_address_byte(0, dreg, basereg);
813 else if (IS_IMM8(disp)) {
814 emit_address_byte(1, dreg, basereg);
818 emit_address_byte(2, dreg, basereg);
824 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
826 if (basereg == ESP) {
827 emit_address_byte(2, dreg, ESP);
828 emit_address_byte(0, ESP, ESP);
832 emit_address_byte(2, dreg, basereg);
838 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
841 emit_address_byte(0, reg, 4);
842 emit_address_byte(scale, indexreg, 5);
845 else if ((disp == 0) && (basereg != EBP)) {
846 emit_address_byte(0, reg, 4);
847 emit_address_byte(scale, indexreg, basereg);
849 else if (IS_IMM8(disp)) {
850 emit_address_byte(1, reg, 4);
851 emit_address_byte(scale, indexreg, basereg);
855 emit_address_byte(2, reg, 4);
856 emit_address_byte(scale, indexreg, basereg);
862 /* low-level code emitter functions *******************************************/
864 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
866 COUNT(count_mov_reg_reg);
867 *(cd->mcodeptr++) = 0x89;
868 emit_reg((reg),(dreg));
872 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
874 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
879 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
881 *(cd->mcodeptr++) = 0xc6;
887 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
889 COUNT(count_mov_mem_reg);
890 *(cd->mcodeptr++) = 0x8b;
891 emit_membase(cd, (basereg),(disp),(reg));
896 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
897 * constant membase immediate length of 32bit
899 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
901 COUNT(count_mov_mem_reg);
902 *(cd->mcodeptr++) = 0x8b;
903 emit_membase32(cd, (basereg),(disp),(reg));
907 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
909 COUNT(count_mov_reg_mem);
910 *(cd->mcodeptr++) = 0x89;
911 emit_membase(cd, (basereg),(disp),(reg));
915 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
917 COUNT(count_mov_reg_mem);
918 *(cd->mcodeptr++) = 0x89;
919 emit_membase32(cd, (basereg),(disp),(reg));
923 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
925 COUNT(count_mov_mem_reg);
926 *(cd->mcodeptr++) = 0x8b;
927 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
931 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
933 COUNT(count_mov_reg_mem);
934 *(cd->mcodeptr++) = 0x89;
935 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
939 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
941 COUNT(count_mov_reg_mem);
942 *(cd->mcodeptr++) = 0x66;
943 *(cd->mcodeptr++) = 0x89;
944 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
948 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
950 COUNT(count_mov_reg_mem);
951 *(cd->mcodeptr++) = 0x88;
952 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
956 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
958 COUNT(count_mov_reg_mem);
959 *(cd->mcodeptr++) = 0x89;
960 emit_mem((reg),(mem));
964 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
966 COUNT(count_mov_mem_reg);
967 *(cd->mcodeptr++) = 0x8b;
968 emit_mem((dreg),(mem));
972 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
974 *(cd->mcodeptr++) = 0xc7;
980 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
982 *(cd->mcodeptr++) = 0xc7;
983 emit_membase(cd, (basereg),(disp),0);
988 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
990 *(cd->mcodeptr++) = 0xc7;
991 emit_membase32(cd, (basereg),(disp),0);
996 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
998 *(cd->mcodeptr++) = 0xc6;
999 emit_membase(cd, (basereg),(disp),0);
1004 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1006 COUNT(count_mov_mem_reg);
1007 *(cd->mcodeptr++) = 0x0f;
1008 *(cd->mcodeptr++) = 0xbe;
1009 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1013 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
1015 *(cd->mcodeptr++) = 0x0f;
1016 *(cd->mcodeptr++) = 0xbf;
1021 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1023 COUNT(count_mov_mem_reg);
1024 *(cd->mcodeptr++) = 0x0f;
1025 *(cd->mcodeptr++) = 0xbf;
1026 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1030 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
1032 *(cd->mcodeptr++) = 0x0f;
1033 *(cd->mcodeptr++) = 0xb7;
1038 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
1040 COUNT(count_mov_mem_reg);
1041 *(cd->mcodeptr++) = 0x0f;
1042 *(cd->mcodeptr++) = 0xb7;
1043 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
1047 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1049 *(cd->mcodeptr++) = 0xc7;
1050 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1055 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1057 *(cd->mcodeptr++) = 0x66;
1058 *(cd->mcodeptr++) = 0xc7;
1059 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1064 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1066 *(cd->mcodeptr++) = 0xc6;
1067 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1075 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
1077 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1078 emit_reg((reg),(dreg));
1082 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
1084 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
1085 emit_membase(cd, (basereg),(disp),(reg));
1089 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
1091 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
1092 emit_membase(cd, (basereg),(disp),(reg));
1096 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1099 *(cd->mcodeptr++) = 0x83;
1100 emit_reg((opc),(dreg));
1103 *(cd->mcodeptr++) = 0x81;
1104 emit_reg((opc),(dreg));
1110 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1112 *(cd->mcodeptr++) = 0x81;
1113 emit_reg((opc),(dreg));
1118 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
1121 *(cd->mcodeptr++) = 0x83;
1122 emit_membase(cd, (basereg),(disp),(opc));
1125 *(cd->mcodeptr++) = 0x81;
1126 emit_membase(cd, (basereg),(disp),(opc));
1132 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1135 *(cd->mcodeptr++) = 0x83;
1136 emit_mem(opc, disp);
1139 *(cd->mcodeptr++) = 0x81;
1140 emit_mem(opc, disp);
1146 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1148 *(cd->mcodeptr++) = 0x85;
1149 emit_reg((reg),(dreg));
1153 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1155 *(cd->mcodeptr++) = 0xf7;
1163 * inc, dec operations
1165 void emit_dec_mem(codegendata *cd, s4 mem)
1167 *(cd->mcodeptr++) = 0xff;
1172 void emit_cltd(codegendata *cd)
1174 *(cd->mcodeptr++) = 0x99;
1178 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1180 *(cd->mcodeptr++) = 0x0f;
1181 *(cd->mcodeptr++) = 0xaf;
1182 emit_reg((dreg),(reg));
1186 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1188 *(cd->mcodeptr++) = 0x0f;
1189 *(cd->mcodeptr++) = 0xaf;
1190 emit_membase(cd, (basereg),(disp),(dreg));
1194 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1196 if (IS_IMM8((imm))) {
1197 *(cd->mcodeptr++) = 0x6b;
1201 *(cd->mcodeptr++) = 0x69;
1208 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1210 if (IS_IMM8((imm))) {
1211 *(cd->mcodeptr++) = 0x6b;
1212 emit_reg((dreg),(reg));
1215 *(cd->mcodeptr++) = 0x69;
1216 emit_reg((dreg),(reg));
1222 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1224 if (IS_IMM8((imm))) {
1225 *(cd->mcodeptr++) = 0x6b;
1226 emit_membase(cd, (basereg),(disp),(dreg));
1229 *(cd->mcodeptr++) = 0x69;
1230 emit_membase(cd, (basereg),(disp),(dreg));
1236 void emit_mul_reg(codegendata *cd, s4 reg)
1238 *(cd->mcodeptr++) = 0xf7;
1243 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1245 *(cd->mcodeptr++) = 0xf7;
1246 emit_membase(cd, (basereg),(disp),4);
1250 void emit_idiv_reg(codegendata *cd, s4 reg)
1252 *(cd->mcodeptr++) = 0xf7;
1257 void emit_ret(codegendata *cd)
1259 *(cd->mcodeptr++) = 0xc3;
1267 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1269 *(cd->mcodeptr++) = 0xd3;
1270 emit_reg((opc),(reg));
1274 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1277 *(cd->mcodeptr++) = 0xd1;
1278 emit_reg((opc),(dreg));
1280 *(cd->mcodeptr++) = 0xc1;
1281 emit_reg((opc),(dreg));
1287 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1289 *(cd->mcodeptr++) = 0x0f;
1290 *(cd->mcodeptr++) = 0xa5;
1291 emit_reg((reg),(dreg));
1295 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1297 *(cd->mcodeptr++) = 0x0f;
1298 *(cd->mcodeptr++) = 0xa4;
1299 emit_reg((reg),(dreg));
1304 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1306 *(cd->mcodeptr++) = 0x0f;
1307 *(cd->mcodeptr++) = 0xa5;
1308 emit_membase(cd, (basereg),(disp),(reg));
1312 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1314 *(cd->mcodeptr++) = 0x0f;
1315 *(cd->mcodeptr++) = 0xad;
1316 emit_reg((reg),(dreg));
1320 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1322 *(cd->mcodeptr++) = 0x0f;
1323 *(cd->mcodeptr++) = 0xac;
1324 emit_reg((reg),(dreg));
1329 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1331 *(cd->mcodeptr++) = 0x0f;
1332 *(cd->mcodeptr++) = 0xad;
1333 emit_membase(cd, (basereg),(disp),(reg));
1341 void emit_jmp_imm(codegendata *cd, s4 imm)
1343 *(cd->mcodeptr++) = 0xe9;
1348 void emit_jmp_reg(codegendata *cd, s4 reg)
1350 *(cd->mcodeptr++) = 0xff;
1355 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1357 *(cd->mcodeptr++) = 0x0f;
1358 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1365 * conditional set operations
1367 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1369 *(cd->mcodeptr++) = 0x0f;
1370 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1375 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1377 *(cd->mcodeptr++) = 0x0f;
1378 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1379 emit_membase(cd, (basereg),(disp),0);
1383 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1385 *(cd->mcodeptr++) = 0x0f;
1386 *(cd->mcodeptr++) = 0xc1;
1387 emit_mem((reg),(mem));
1391 void emit_neg_reg(codegendata *cd, s4 reg)
1393 *(cd->mcodeptr++) = 0xf7;
1399 void emit_push_imm(codegendata *cd, s4 imm)
1401 *(cd->mcodeptr++) = 0x68;
1406 void emit_pop_reg(codegendata *cd, s4 reg)
1408 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1412 void emit_push_reg(codegendata *cd, s4 reg)
1414 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1418 void emit_nop(codegendata *cd)
1420 *(cd->mcodeptr++) = 0x90;
1424 void emit_lock(codegendata *cd)
1426 *(cd->mcodeptr++) = 0xf0;
1433 void emit_call_reg(codegendata *cd, s4 reg)
1435 *(cd->mcodeptr++) = 0xff;
1440 void emit_call_imm(codegendata *cd, s4 imm)
1442 *(cd->mcodeptr++) = 0xe8;
1449 * floating point instructions
1451 void emit_fld1(codegendata *cd)
1453 *(cd->mcodeptr++) = 0xd9;
1454 *(cd->mcodeptr++) = 0xe8;
1458 void emit_fldz(codegendata *cd)
1460 *(cd->mcodeptr++) = 0xd9;
1461 *(cd->mcodeptr++) = 0xee;
1465 void emit_fld_reg(codegendata *cd, s4 reg)
1467 *(cd->mcodeptr++) = 0xd9;
1468 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1472 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1474 *(cd->mcodeptr++) = 0xd9;
1475 emit_membase(cd, (basereg),(disp),0);
1479 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1481 *(cd->mcodeptr++) = 0xd9;
1482 emit_membase32(cd, (basereg),(disp),0);
1486 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1488 *(cd->mcodeptr++) = 0xdd;
1489 emit_membase(cd, (basereg),(disp),0);
1493 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1495 *(cd->mcodeptr++) = 0xdd;
1496 emit_membase32(cd, (basereg),(disp),0);
1500 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1502 *(cd->mcodeptr++) = 0xdb;
1503 emit_membase(cd, (basereg),(disp),5);
1507 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1509 *(cd->mcodeptr++) = 0xd9;
1510 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1514 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1516 *(cd->mcodeptr++) = 0xdd;
1517 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1521 void emit_flds_mem(codegendata *cd, s4 mem)
1523 *(cd->mcodeptr++) = 0xd9;
1528 void emit_fldl_mem(codegendata *cd, s4 mem)
1530 *(cd->mcodeptr++) = 0xdd;
1535 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1537 *(cd->mcodeptr++) = 0xdb;
1538 emit_membase(cd, (basereg),(disp),0);
1542 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1544 *(cd->mcodeptr++) = 0xdf;
1545 emit_membase(cd, (basereg),(disp),5);
1549 void emit_fst_reg(codegendata *cd, s4 reg)
1551 *(cd->mcodeptr++) = 0xdd;
1552 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1556 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1558 *(cd->mcodeptr++) = 0xd9;
1559 emit_membase(cd, (basereg),(disp),2);
1563 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1565 *(cd->mcodeptr++) = 0xdd;
1566 emit_membase(cd, (basereg),(disp),2);
1570 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1572 *(cd->mcodeptr++) = 0xd9;
1573 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1577 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1579 *(cd->mcodeptr++) = 0xdd;
1580 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1584 void emit_fstp_reg(codegendata *cd, s4 reg)
1586 *(cd->mcodeptr++) = 0xdd;
1587 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1591 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1593 *(cd->mcodeptr++) = 0xd9;
1594 emit_membase(cd, (basereg),(disp),3);
1598 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1600 *(cd->mcodeptr++) = 0xd9;
1601 emit_membase32(cd, (basereg),(disp),3);
1605 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1607 *(cd->mcodeptr++) = 0xdd;
1608 emit_membase(cd, (basereg),(disp),3);
1612 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1614 *(cd->mcodeptr++) = 0xdd;
1615 emit_membase32(cd, (basereg),(disp),3);
1619 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1621 *(cd->mcodeptr++) = 0xdb;
1622 emit_membase(cd, (basereg),(disp),7);
1626 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1628 *(cd->mcodeptr++) = 0xd9;
1629 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1633 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1635 *(cd->mcodeptr++) = 0xdd;
1636 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1640 void emit_fstps_mem(codegendata *cd, s4 mem)
1642 *(cd->mcodeptr++) = 0xd9;
1647 void emit_fstpl_mem(codegendata *cd, s4 mem)
1649 *(cd->mcodeptr++) = 0xdd;
1654 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1656 *(cd->mcodeptr++) = 0xdb;
1657 emit_membase(cd, (basereg),(disp),2);
1661 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1663 *(cd->mcodeptr++) = 0xdb;
1664 emit_membase(cd, (basereg),(disp),3);
1668 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1670 *(cd->mcodeptr++) = 0xdf;
1671 emit_membase(cd, (basereg),(disp),7);
1675 void emit_fchs(codegendata *cd)
1677 *(cd->mcodeptr++) = 0xd9;
1678 *(cd->mcodeptr++) = 0xe0;
1682 void emit_faddp(codegendata *cd)
1684 *(cd->mcodeptr++) = 0xde;
1685 *(cd->mcodeptr++) = 0xc1;
1689 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1691 *(cd->mcodeptr++) = 0xd8;
1692 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1696 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1698 *(cd->mcodeptr++) = 0xdc;
1699 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1703 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1705 *(cd->mcodeptr++) = 0xde;
1706 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1710 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1712 *(cd->mcodeptr++) = 0xd8;
1713 emit_membase(cd, (basereg),(disp),0);
1717 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1719 *(cd->mcodeptr++) = 0xdc;
1720 emit_membase(cd, (basereg),(disp),0);
1724 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1726 *(cd->mcodeptr++) = 0xd8;
1727 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1731 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1733 *(cd->mcodeptr++) = 0xdc;
1734 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1738 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1740 *(cd->mcodeptr++) = 0xde;
1741 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1745 void emit_fsubp(codegendata *cd)
1747 *(cd->mcodeptr++) = 0xde;
1748 *(cd->mcodeptr++) = 0xe9;
1752 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1754 *(cd->mcodeptr++) = 0xd8;
1755 emit_membase(cd, (basereg),(disp),4);
1759 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1761 *(cd->mcodeptr++) = 0xdc;
1762 emit_membase(cd, (basereg),(disp),4);
1766 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1768 *(cd->mcodeptr++) = 0xd8;
1769 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1773 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1775 *(cd->mcodeptr++) = 0xdc;
1776 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1780 void emit_fmulp(codegendata *cd)
1782 *(cd->mcodeptr++) = 0xde;
1783 *(cd->mcodeptr++) = 0xc9;
1787 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1789 *(cd->mcodeptr++) = 0xde;
1790 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1794 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1796 *(cd->mcodeptr++) = 0xd8;
1797 emit_membase(cd, (basereg),(disp),1);
1801 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1803 *(cd->mcodeptr++) = 0xdc;
1804 emit_membase(cd, (basereg),(disp),1);
1808 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1810 *(cd->mcodeptr++) = 0xd8;
1811 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1815 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1817 *(cd->mcodeptr++) = 0xdc;
1818 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1822 void emit_fdivp(codegendata *cd)
1824 *(cd->mcodeptr++) = 0xde;
1825 *(cd->mcodeptr++) = 0xf9;
1829 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1831 *(cd->mcodeptr++) = 0xde;
1832 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1836 void emit_fxch(codegendata *cd)
1838 *(cd->mcodeptr++) = 0xd9;
1839 *(cd->mcodeptr++) = 0xc9;
1843 void emit_fxch_reg(codegendata *cd, s4 reg)
1845 *(cd->mcodeptr++) = 0xd9;
1846 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1850 void emit_fprem(codegendata *cd)
1852 *(cd->mcodeptr++) = 0xd9;
1853 *(cd->mcodeptr++) = 0xf8;
1857 void emit_fprem1(codegendata *cd)
1859 *(cd->mcodeptr++) = 0xd9;
1860 *(cd->mcodeptr++) = 0xf5;
1864 void emit_fucom(codegendata *cd)
1866 *(cd->mcodeptr++) = 0xdd;
1867 *(cd->mcodeptr++) = 0xe1;
1871 void emit_fucom_reg(codegendata *cd, s4 reg)
1873 *(cd->mcodeptr++) = 0xdd;
1874 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1878 void emit_fucomp_reg(codegendata *cd, s4 reg)
1880 *(cd->mcodeptr++) = 0xdd;
1881 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1885 void emit_fucompp(codegendata *cd)
1887 *(cd->mcodeptr++) = 0xda;
1888 *(cd->mcodeptr++) = 0xe9;
1892 void emit_fnstsw(codegendata *cd)
1894 *(cd->mcodeptr++) = 0xdf;
1895 *(cd->mcodeptr++) = 0xe0;
1899 void emit_sahf(codegendata *cd)
1901 *(cd->mcodeptr++) = 0x9e;
1905 void emit_finit(codegendata *cd)
1907 *(cd->mcodeptr++) = 0x9b;
1908 *(cd->mcodeptr++) = 0xdb;
1909 *(cd->mcodeptr++) = 0xe3;
1913 void emit_fldcw_mem(codegendata *cd, s4 mem)
1915 *(cd->mcodeptr++) = 0xd9;
1920 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1922 *(cd->mcodeptr++) = 0xd9;
1923 emit_membase(cd, (basereg),(disp),5);
1927 void emit_wait(codegendata *cd)
1929 *(cd->mcodeptr++) = 0x9b;
1933 void emit_ffree_reg(codegendata *cd, s4 reg)
1935 *(cd->mcodeptr++) = 0xdd;
1936 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1940 void emit_fdecstp(codegendata *cd)
1942 *(cd->mcodeptr++) = 0xd9;
1943 *(cd->mcodeptr++) = 0xf6;
1947 void emit_fincstp(codegendata *cd)
1949 *(cd->mcodeptr++) = 0xd9;
1950 *(cd->mcodeptr++) = 0xf7;
1955 * These are local overrides for various environment variables in Emacs.
1956 * Please do not remove this and leave it at the end of the file, where
1957 * Emacs will automagically detect them.
1958 * ---------------------------------------------------------------------
1961 * indent-tabs-mode: t