1 /* src/vm/jit/i386/emit.c - i386 code emitter functions
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Christian Thalinger
29 $Id: emit.c 6056 2006-11-27 14:48:33Z edwin $
40 #include "vm/jit/i386/codegen.h"
41 #include "vm/jit/i386/emit.h"
42 #include "vm/jit/i386/md-abi.h"
44 #if defined(ENABLE_THREADS)
45 # include "threads/native/lock.h"
48 #include "vm/builtin.h"
49 #include "vm/statistics.h"
50 #include "vm/jit/asmpart.h"
51 #include "vm/jit/dseg.h"
52 #include "vm/jit/emit-common.h"
53 #include "vm/jit/jit.h"
54 #include "vm/jit/replace.h"
57 /* emit_load ******************************************************************
59 Emits a possible load of an operand.
61 *******************************************************************************/
63 inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
69 /* get required compiler data */
73 if (IS_INMEMORY(src->flags)) {
76 disp = src->vv.regoff * 4;
78 if (IS_FLT_DBL_TYPE(src->type)) {
79 if (IS_2_WORD_TYPE(src->type))
80 M_DLD(tempreg, REG_SP, disp);
82 M_FLD(tempreg, REG_SP, disp);
85 if (IS_2_WORD_TYPE(src->type))
86 M_LLD(tempreg, REG_SP, disp);
88 M_ILD(tempreg, REG_SP, disp);
100 /* emit_load_low ************************************************************
102 Emits a possible load of the low 32-bits of an operand.
104 *******************************************************************************/
106 inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
112 assert(src->type == TYPE_LNG);
114 /* get required compiler data */
119 if (IS_INMEMORY(src->flags)) {
122 disp = src->vv.regoff * 4;
124 M_ILD(tempreg, REG_SP, disp);
129 reg = GET_LOW_REG(src->vv.regoff);
135 /* emit_load_high ***********************************************************
137 Emits a possible load of the high 32-bits of an operand.
139 *******************************************************************************/
141 inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
147 /* get required compiler data */
149 assert(src->type == TYPE_LNG);
153 if (IS_INMEMORY(src->flags)) {
156 disp = src->vv.regoff * 4;
158 M_ILD(tempreg, REG_SP, disp + 4);
163 reg = GET_HIGH_REG(src->vv.regoff);
169 /* emit_store ******************************************************************
171 Emits a possible store of the destination operand.
173 *******************************************************************************/
175 inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
179 /* get required compiler data */
183 if (IS_INMEMORY(dst->flags)) {
186 if (IS_FLT_DBL_TYPE(dst->type)) {
187 if (IS_2_WORD_TYPE(dst->type))
188 M_DST(d, REG_SP, dst->vv.regoff * 4);
190 M_FST(d, REG_SP, dst->vv.regoff * 4);
193 if (IS_2_WORD_TYPE(dst->type))
194 M_LST(d, REG_SP, dst->vv.regoff * 4);
196 M_IST(d, REG_SP, dst->vv.regoff * 4);
202 /* emit_store_low **************************************************************
204 Emits a possible store of the low 32-bits of the destination
207 *******************************************************************************/
209 inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
213 assert(dst->type == TYPE_LNG);
215 /* get required compiler data */
219 if (IS_INMEMORY(dst->flags)) {
221 M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff * 4);
226 /* emit_store_high *************************************************************
228 Emits a possible store of the high 32-bits of the destination
231 *******************************************************************************/
233 inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
237 assert(dst->type == TYPE_LNG);
239 /* get required compiler data */
243 if (IS_INMEMORY(dst->flags)) {
245 M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff * 4 + 4);
250 /* emit_copy *******************************************************************
252 Generates a register/memory to register/memory copy.
254 *******************************************************************************/
256 void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
261 /* get required compiler data */
265 if ((src->vv.regoff != dst->vv.regoff) ||
266 ((src->flags ^ dst->flags) & INMEMORY)) {
268 /* If one of the variables resides in memory, we can eliminate
269 the register move from/to the temporary register with the
270 order of getting the destination register and the load. */
272 if (IS_INMEMORY(src->flags)) {
273 if (IS_LNG_TYPE(src->type))
274 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
276 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
278 s1 = emit_load(jd, iptr, src, d);
281 if (IS_LNG_TYPE(src->type))
282 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
284 s1 = emit_load(jd, iptr, src, REG_ITMP1);
286 d = codegen_reg_of_var(iptr->opc, dst, s1);
290 if (IS_FLT_DBL_TYPE(src->type)) {
293 if (IS_2_WORD_TYPE(src->type))
300 emit_store(jd, iptr, dst, d);
305 /* emit_exception_stubs ********************************************************
307 Generates the code for the exception stubs.
309 *******************************************************************************/
311 void emit_exception_stubs(jitdata *jd)
320 /* get required compiler data */
325 /* generate exception stubs */
329 for (er = cd->exceptionrefs; er != NULL; er = er->next) {
330 /* back-patch the branch to this exception code */
332 branchmpc = er->branchpos;
333 targetmpc = cd->mcodeptr - cd->mcodebase;
335 md_codegen_patch_branch(cd, branchmpc, targetmpc);
339 /* Check if the exception is an
340 ArrayIndexOutOfBoundsException. If so, move index register
344 M_INTMOVE(er->reg, REG_ITMP1);
346 /* calcuate exception address */
348 M_MOV_IMM(0, REG_ITMP2_XPC);
350 M_AADD_IMM32(er->branchpos - 6, REG_ITMP2_XPC);
352 /* move function to call into REG_ITMP3 */
354 M_MOV_IMM(er->function, REG_ITMP3);
356 if (targetdisp == 0) {
357 targetdisp = cd->mcodeptr - cd->mcodebase;
359 M_ASUB_IMM(5 * 4, REG_SP);
361 /* first store REG_ITMP1 so we can use it */
363 M_AST(REG_ITMP1, REG_SP, 4 * 4); /* for AIOOBE */
365 M_AST_IMM(0, REG_SP, 0 * 4);
367 M_MOV(REG_SP, REG_ITMP1);
368 M_AADD_IMM(5 * 4, REG_ITMP1);
369 M_AST(REG_ITMP1, REG_SP, 1 * 4);
370 M_ALD(REG_ITMP1, REG_SP, (5 + cd->stackframesize) * 4);
371 M_AST(REG_ITMP1, REG_SP, 2 * 4);
372 M_AST(REG_ITMP2_XPC, REG_SP, 3 * 4);
376 M_ALD(REG_ITMP2_XPC, REG_SP, 3 * 4);
377 M_AADD_IMM(5 * 4, REG_SP);
379 M_MOV_IMM(asm_handle_exception, REG_ITMP3);
383 M_JMP_IMM((cd->mcodebase + targetdisp) -
384 (cd->mcodeptr + PATCHER_CALL_SIZE));
390 /* emit_patcher_stubs **********************************************************
392 Generates the code for the patcher stubs.
394 *******************************************************************************/
396 void emit_patcher_stubs(jitdata *jd)
406 /* get required compiler data */
410 /* generate code patching stub call code */
414 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
415 /* check code segment size */
419 /* Get machine code which is patched back in later. A
420 `call rel32' is 5 bytes long. */
422 savedmcodeptr = cd->mcodebase + pref->branchpos;
423 mcode = *((u8 *) savedmcodeptr);
425 /* patch in `call rel32' to call the following code */
427 tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
428 cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
430 M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
432 cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
438 /* move pointer to java_objectheader onto stack */
440 #if defined(ENABLE_THREADS)
441 (void) dseg_add_unique_address(cd, NULL); /* flcword */
442 (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
443 disp = dseg_add_unique_address(cd, NULL); /* vftbl */
445 M_MOV_IMM(0, REG_ITMP3);
447 M_AADD_IMM(disp, REG_ITMP3);
453 /* move machine code bytes and classinfo pointer into registers */
455 M_PUSH_IMM(mcode >> 32);
457 M_PUSH_IMM(pref->ref);
458 M_PUSH_IMM(pref->patcher);
460 if (targetdisp == 0) {
461 targetdisp = cd->mcodeptr - cd->mcodebase;
463 M_MOV_IMM(asm_patcher_wrapper, REG_ITMP3);
467 M_JMP_IMM((cd->mcodebase + targetdisp) -
468 (cd->mcodeptr + PATCHER_CALL_SIZE));
474 /* emit_replacement_stubs ******************************************************
476 Generates the code for the replacement stubs.
478 *******************************************************************************/
480 void emit_replacement_stubs(jitdata *jd)
488 /* get required compiler data */
493 rplp = code->rplpoints;
495 for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
496 /* check code segment size */
500 /* note start of stub code */
502 rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
504 /* make machine code for patching */
506 disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
508 rplp->mcode = 0xe9 | ((u8) disp << 8);
510 /* push address of `rplpoint` struct */
514 /* jump to replacement function */
516 M_PUSH_IMM(asm_replacement_out);
522 /* emit_verbosecall_enter ******************************************************
524 Generates the code for the call trace.
526 *******************************************************************************/
529 void emit_verbosecall_enter(jitdata *jd)
538 /* get required compiler data */
546 /* mark trace code */
550 /* methodinfo* + arguments + return address */
552 disp = TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4 +
553 cd->stackframesize * 4 + 4;
555 M_ASUB_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
557 /* save temporary registers for leaf methods */
559 for (i = 0; i < INT_TMP_CNT; i++)
560 M_IST(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
562 for (i = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
563 t = md->paramtypes[i].type;
565 if (IS_INT_LNG_TYPE(t)) {
566 if (IS_2_WORD_TYPE(t)) {
567 M_LLD(REG_ITMP12_PACKED, REG_SP, disp);
568 M_LST(REG_ITMP12_PACKED, REG_SP, i * 8);
570 else if (IS_ADR_TYPE(t)) {
571 M_ALD(REG_ITMP1, REG_SP, disp);
572 M_AST(REG_ITMP1, REG_SP, i * 8);
573 M_IST_IMM(0, REG_SP, i * 8 + 4);
576 M_ILD(EAX, REG_SP, disp);
578 M_LST(EAX_EDX_PACKED, REG_SP, i * 8);
582 if (IS_2_WORD_TYPE(t)) {
583 M_DLD(REG_NULL, REG_SP, disp);
584 M_DST(REG_NULL, REG_SP, i * 8);
587 M_FLD(REG_NULL, REG_SP, disp);
588 M_FST(REG_NULL, REG_SP, i * 8);
589 M_IST_IMM(0, REG_SP, i * 8 + 4);
593 disp += (IS_2_WORD_TYPE(t)) ? 8 : 4;
596 M_AST_IMM(m, REG_SP, TRACE_ARGS_NUM * 8);
598 M_MOV_IMM(builtin_trace_args, REG_ITMP1);
601 /* restore temporary registers for leaf methods */
603 for (i = 0; i < INT_TMP_CNT; i++)
604 M_ILD(rd->tmpintregs[i], REG_SP, TRACE_ARGS_NUM * 8 + 4 + i * 4);
606 M_AADD_IMM(TRACE_ARGS_NUM * 8 + 4 + INT_TMP_CNT * 4, REG_SP);
608 /* mark trace code */
612 #endif /* !defined(NDEBUG) */
615 /* emit_verbosecall_exit *******************************************************
617 Generates the code for the call trace.
619 *******************************************************************************/
622 void emit_verbosecall_exit(jitdata *jd)
628 /* get required compiler data */
634 /* mark trace code */
638 M_ASUB_IMM(4 + 8 + 8 + 4 + 8, REG_SP); /* +8: keep stack 16-byte aligned */
640 M_AST_IMM(m, REG_SP, 0 * 4);
642 M_LST(REG_RESULT_PACKED, REG_SP, 1 * 4);
644 M_DSTNP(REG_NULL, REG_SP, 1 * 4 + 1 * 8);
645 M_FSTNP(REG_NULL, REG_SP, 1 * 4 + 2 * 8);
647 M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
650 M_LLD(REG_RESULT_PACKED, REG_SP, 1 * 4);
652 M_AADD_IMM(4 + 8 + 8 + 4 + 8, REG_SP);
654 /* mark trace code */
658 #endif /* !defined(NDEBUG) */
661 /* code generation functions **************************************************/
663 static void emit_membase(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
665 if (basereg == ESP) {
667 emit_address_byte(0, dreg, ESP);
668 emit_address_byte(0, ESP, ESP);
670 else if (IS_IMM8(disp)) {
671 emit_address_byte(1, dreg, ESP);
672 emit_address_byte(0, ESP, ESP);
676 emit_address_byte(2, dreg, ESP);
677 emit_address_byte(0, ESP, ESP);
681 else if ((disp == 0) && (basereg != EBP)) {
682 emit_address_byte(0, dreg, basereg);
684 else if (IS_IMM8(disp)) {
685 emit_address_byte(1, dreg, basereg);
689 emit_address_byte(2, dreg, basereg);
695 static void emit_membase32(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
697 if (basereg == ESP) {
698 emit_address_byte(2, dreg, ESP);
699 emit_address_byte(0, ESP, ESP);
703 emit_address_byte(2, dreg, basereg);
709 static void emit_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
712 emit_address_byte(0, reg, 4);
713 emit_address_byte(scale, indexreg, 5);
716 else if ((disp == 0) && (basereg != EBP)) {
717 emit_address_byte(0, reg, 4);
718 emit_address_byte(scale, indexreg, basereg);
720 else if (IS_IMM8(disp)) {
721 emit_address_byte(1, reg, 4);
722 emit_address_byte(scale, indexreg, basereg);
726 emit_address_byte(2, reg, 4);
727 emit_address_byte(scale, indexreg, basereg);
733 /* low-level code emitter functions *******************************************/
735 void emit_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
737 COUNT(count_mov_reg_reg);
738 *(cd->mcodeptr++) = 0x89;
739 emit_reg((reg),(dreg));
743 void emit_mov_imm_reg(codegendata *cd, s4 imm, s4 reg)
745 *(cd->mcodeptr++) = 0xb8 + ((reg) & 0x07);
750 void emit_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
752 *(cd->mcodeptr++) = 0xc6;
758 void emit_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
760 COUNT(count_mov_mem_reg);
761 *(cd->mcodeptr++) = 0x8b;
762 emit_membase(cd, (basereg),(disp),(reg));
767 * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
768 * constant membase immediate length of 32bit
770 void emit_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
772 COUNT(count_mov_mem_reg);
773 *(cd->mcodeptr++) = 0x8b;
774 emit_membase32(cd, (basereg),(disp),(reg));
778 void emit_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
780 COUNT(count_mov_reg_mem);
781 *(cd->mcodeptr++) = 0x89;
782 emit_membase(cd, (basereg),(disp),(reg));
786 void emit_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
788 COUNT(count_mov_reg_mem);
789 *(cd->mcodeptr++) = 0x89;
790 emit_membase32(cd, (basereg),(disp),(reg));
794 void emit_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
796 COUNT(count_mov_mem_reg);
797 *(cd->mcodeptr++) = 0x8b;
798 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
802 void emit_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
804 COUNT(count_mov_reg_mem);
805 *(cd->mcodeptr++) = 0x89;
806 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
810 void emit_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
812 COUNT(count_mov_reg_mem);
813 *(cd->mcodeptr++) = 0x66;
814 *(cd->mcodeptr++) = 0x89;
815 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
819 void emit_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
821 COUNT(count_mov_reg_mem);
822 *(cd->mcodeptr++) = 0x88;
823 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
827 void emit_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
829 COUNT(count_mov_reg_mem);
830 *(cd->mcodeptr++) = 0x89;
831 emit_mem((reg),(mem));
835 void emit_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
837 COUNT(count_mov_mem_reg);
838 *(cd->mcodeptr++) = 0x8b;
839 emit_mem((dreg),(mem));
843 void emit_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
845 *(cd->mcodeptr++) = 0xc7;
851 void emit_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
853 *(cd->mcodeptr++) = 0xc7;
854 emit_membase(cd, (basereg),(disp),0);
859 void emit_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
861 *(cd->mcodeptr++) = 0xc7;
862 emit_membase32(cd, (basereg),(disp),0);
867 void emit_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
869 *(cd->mcodeptr++) = 0xc6;
870 emit_membase(cd, (basereg),(disp),0);
875 void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
877 COUNT(count_mov_mem_reg);
878 *(cd->mcodeptr++) = 0x0f;
879 *(cd->mcodeptr++) = 0xbe;
880 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
884 void emit_movswl_reg_reg(codegendata *cd, s4 a, s4 b)
886 *(cd->mcodeptr++) = 0x0f;
887 *(cd->mcodeptr++) = 0xbf;
892 void emit_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
894 COUNT(count_mov_mem_reg);
895 *(cd->mcodeptr++) = 0x0f;
896 *(cd->mcodeptr++) = 0xbf;
897 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
901 void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
903 *(cd->mcodeptr++) = 0x0f;
904 *(cd->mcodeptr++) = 0xb7;
909 void emit_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
911 COUNT(count_mov_mem_reg);
912 *(cd->mcodeptr++) = 0x0f;
913 *(cd->mcodeptr++) = 0xb7;
914 emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
918 void emit_mov_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
920 *(cd->mcodeptr++) = 0xc7;
921 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
926 void emit_movw_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
928 *(cd->mcodeptr++) = 0x66;
929 *(cd->mcodeptr++) = 0xc7;
930 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
935 void emit_movb_imm_memindex(codegendata *cd, s4 imm, s4 disp, s4 basereg, s4 indexreg, s4 scale)
937 *(cd->mcodeptr++) = 0xc6;
938 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
946 void emit_alu_reg_reg(codegendata *cd, s4 opc, s4 reg, s4 dreg)
948 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
949 emit_reg((reg),(dreg));
953 void emit_alu_reg_membase(codegendata *cd, s4 opc, s4 reg, s4 basereg, s4 disp)
955 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 1;
956 emit_membase(cd, (basereg),(disp),(reg));
960 void emit_alu_membase_reg(codegendata *cd, s4 opc, s4 basereg, s4 disp, s4 reg)
962 *(cd->mcodeptr++) = (((u1) (opc)) << 3) + 3;
963 emit_membase(cd, (basereg),(disp),(reg));
967 void emit_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
970 *(cd->mcodeptr++) = 0x83;
971 emit_reg((opc),(dreg));
974 *(cd->mcodeptr++) = 0x81;
975 emit_reg((opc),(dreg));
981 void emit_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
983 *(cd->mcodeptr++) = 0x81;
984 emit_reg((opc),(dreg));
989 void emit_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
992 *(cd->mcodeptr++) = 0x83;
993 emit_membase(cd, (basereg),(disp),(opc));
996 *(cd->mcodeptr++) = 0x81;
997 emit_membase(cd, (basereg),(disp),(opc));
1003 void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
1006 *(cd->mcodeptr++) = 0x83;
1007 emit_mem(opc, disp);
1010 *(cd->mcodeptr++) = 0x81;
1011 emit_mem(opc, disp);
1017 void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1019 *(cd->mcodeptr++) = 0x85;
1020 emit_reg((reg),(dreg));
1024 void emit_test_imm_reg(codegendata *cd, s4 imm, s4 reg)
1026 *(cd->mcodeptr++) = 0xf7;
1034 * inc, dec operations
1036 void emit_dec_mem(codegendata *cd, s4 mem)
1038 *(cd->mcodeptr++) = 0xff;
1043 void emit_cltd(codegendata *cd)
1045 *(cd->mcodeptr++) = 0x99;
1049 void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1051 *(cd->mcodeptr++) = 0x0f;
1052 *(cd->mcodeptr++) = 0xaf;
1053 emit_reg((dreg),(reg));
1057 void emit_imul_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 dreg)
1059 *(cd->mcodeptr++) = 0x0f;
1060 *(cd->mcodeptr++) = 0xaf;
1061 emit_membase(cd, (basereg),(disp),(dreg));
1065 void emit_imul_imm_reg(codegendata *cd, s4 imm, s4 dreg)
1067 if (IS_IMM8((imm))) {
1068 *(cd->mcodeptr++) = 0x6b;
1072 *(cd->mcodeptr++) = 0x69;
1079 void emit_imul_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1081 if (IS_IMM8((imm))) {
1082 *(cd->mcodeptr++) = 0x6b;
1083 emit_reg((dreg),(reg));
1086 *(cd->mcodeptr++) = 0x69;
1087 emit_reg((dreg),(reg));
1093 void emit_imul_imm_membase_reg(codegendata *cd, s4 imm, s4 basereg, s4 disp, s4 dreg)
1095 if (IS_IMM8((imm))) {
1096 *(cd->mcodeptr++) = 0x6b;
1097 emit_membase(cd, (basereg),(disp),(dreg));
1100 *(cd->mcodeptr++) = 0x69;
1101 emit_membase(cd, (basereg),(disp),(dreg));
1107 void emit_mul_reg(codegendata *cd, s4 reg)
1109 *(cd->mcodeptr++) = 0xf7;
1114 void emit_mul_membase(codegendata *cd, s4 basereg, s4 disp)
1116 *(cd->mcodeptr++) = 0xf7;
1117 emit_membase(cd, (basereg),(disp),4);
1121 void emit_idiv_reg(codegendata *cd, s4 reg)
1123 *(cd->mcodeptr++) = 0xf7;
1128 void emit_ret(codegendata *cd)
1130 *(cd->mcodeptr++) = 0xc3;
1138 void emit_shift_reg(codegendata *cd, s4 opc, s4 reg)
1140 *(cd->mcodeptr++) = 0xd3;
1141 emit_reg((opc),(reg));
1145 void emit_shift_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
1148 *(cd->mcodeptr++) = 0xd1;
1149 emit_reg((opc),(dreg));
1151 *(cd->mcodeptr++) = 0xc1;
1152 emit_reg((opc),(dreg));
1158 void emit_shld_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1160 *(cd->mcodeptr++) = 0x0f;
1161 *(cd->mcodeptr++) = 0xa5;
1162 emit_reg((reg),(dreg));
1166 void emit_shld_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1168 *(cd->mcodeptr++) = 0x0f;
1169 *(cd->mcodeptr++) = 0xa4;
1170 emit_reg((reg),(dreg));
1175 void emit_shld_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1177 *(cd->mcodeptr++) = 0x0f;
1178 *(cd->mcodeptr++) = 0xa5;
1179 emit_membase(cd, (basereg),(disp),(reg));
1183 void emit_shrd_reg_reg(codegendata *cd, s4 reg, s4 dreg)
1185 *(cd->mcodeptr++) = 0x0f;
1186 *(cd->mcodeptr++) = 0xad;
1187 emit_reg((reg),(dreg));
1191 void emit_shrd_imm_reg_reg(codegendata *cd, s4 imm, s4 reg, s4 dreg)
1193 *(cd->mcodeptr++) = 0x0f;
1194 *(cd->mcodeptr++) = 0xac;
1195 emit_reg((reg),(dreg));
1200 void emit_shrd_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
1202 *(cd->mcodeptr++) = 0x0f;
1203 *(cd->mcodeptr++) = 0xad;
1204 emit_membase(cd, (basereg),(disp),(reg));
1212 void emit_jmp_imm(codegendata *cd, s4 imm)
1214 *(cd->mcodeptr++) = 0xe9;
1219 void emit_jmp_reg(codegendata *cd, s4 reg)
1221 *(cd->mcodeptr++) = 0xff;
1226 void emit_jcc(codegendata *cd, s4 opc, s4 imm)
1228 *(cd->mcodeptr++) = 0x0f;
1229 *(cd->mcodeptr++) = 0x80 + (u1) (opc);
1236 * conditional set operations
1238 void emit_setcc_reg(codegendata *cd, s4 opc, s4 reg)
1240 *(cd->mcodeptr++) = 0x0f;
1241 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1246 void emit_setcc_membase(codegendata *cd, s4 opc, s4 basereg, s4 disp)
1248 *(cd->mcodeptr++) = 0x0f;
1249 *(cd->mcodeptr++) = 0x90 + (u1) (opc);
1250 emit_membase(cd, (basereg),(disp),0);
1254 void emit_xadd_reg_mem(codegendata *cd, s4 reg, s4 mem)
1256 *(cd->mcodeptr++) = 0x0f;
1257 *(cd->mcodeptr++) = 0xc1;
1258 emit_mem((reg),(mem));
1262 void emit_neg_reg(codegendata *cd, s4 reg)
1264 *(cd->mcodeptr++) = 0xf7;
1270 void emit_push_imm(codegendata *cd, s4 imm)
1272 *(cd->mcodeptr++) = 0x68;
1277 void emit_pop_reg(codegendata *cd, s4 reg)
1279 *(cd->mcodeptr++) = 0x58 + (0x07 & (u1) (reg));
1283 void emit_push_reg(codegendata *cd, s4 reg)
1285 *(cd->mcodeptr++) = 0x50 + (0x07 & (u1) (reg));
1289 void emit_nop(codegendata *cd)
1291 *(cd->mcodeptr++) = 0x90;
1295 void emit_lock(codegendata *cd)
1297 *(cd->mcodeptr++) = 0xf0;
1304 void emit_call_reg(codegendata *cd, s4 reg)
1306 *(cd->mcodeptr++) = 0xff;
1311 void emit_call_imm(codegendata *cd, s4 imm)
1313 *(cd->mcodeptr++) = 0xe8;
1320 * floating point instructions
1322 void emit_fld1(codegendata *cd)
1324 *(cd->mcodeptr++) = 0xd9;
1325 *(cd->mcodeptr++) = 0xe8;
1329 void emit_fldz(codegendata *cd)
1331 *(cd->mcodeptr++) = 0xd9;
1332 *(cd->mcodeptr++) = 0xee;
1336 void emit_fld_reg(codegendata *cd, s4 reg)
1338 *(cd->mcodeptr++) = 0xd9;
1339 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1343 void emit_flds_membase(codegendata *cd, s4 basereg, s4 disp)
1345 *(cd->mcodeptr++) = 0xd9;
1346 emit_membase(cd, (basereg),(disp),0);
1350 void emit_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
1352 *(cd->mcodeptr++) = 0xd9;
1353 emit_membase32(cd, (basereg),(disp),0);
1357 void emit_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
1359 *(cd->mcodeptr++) = 0xdd;
1360 emit_membase(cd, (basereg),(disp),0);
1364 void emit_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
1366 *(cd->mcodeptr++) = 0xdd;
1367 emit_membase32(cd, (basereg),(disp),0);
1371 void emit_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
1373 *(cd->mcodeptr++) = 0xdb;
1374 emit_membase(cd, (basereg),(disp),5);
1378 void emit_flds_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1380 *(cd->mcodeptr++) = 0xd9;
1381 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1385 void emit_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1387 *(cd->mcodeptr++) = 0xdd;
1388 emit_memindex(cd, 0,(disp),(basereg),(indexreg),(scale));
1392 void emit_flds_mem(codegendata *cd, s4 mem)
1394 *(cd->mcodeptr++) = 0xd9;
1399 void emit_fldl_mem(codegendata *cd, s4 mem)
1401 *(cd->mcodeptr++) = 0xdd;
1406 void emit_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
1408 *(cd->mcodeptr++) = 0xdb;
1409 emit_membase(cd, (basereg),(disp),0);
1413 void emit_fildll_membase(codegendata *cd, s4 basereg, s4 disp)
1415 *(cd->mcodeptr++) = 0xdf;
1416 emit_membase(cd, (basereg),(disp),5);
1420 void emit_fst_reg(codegendata *cd, s4 reg)
1422 *(cd->mcodeptr++) = 0xdd;
1423 *(cd->mcodeptr++) = 0xd0 + (0x07 & (u1) (reg));
1427 void emit_fsts_membase(codegendata *cd, s4 basereg, s4 disp)
1429 *(cd->mcodeptr++) = 0xd9;
1430 emit_membase(cd, (basereg),(disp),2);
1434 void emit_fstl_membase(codegendata *cd, s4 basereg, s4 disp)
1436 *(cd->mcodeptr++) = 0xdd;
1437 emit_membase(cd, (basereg),(disp),2);
1441 void emit_fsts_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1443 *(cd->mcodeptr++) = 0xd9;
1444 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1448 void emit_fstl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1450 *(cd->mcodeptr++) = 0xdd;
1451 emit_memindex(cd, 2,(disp),(basereg),(indexreg),(scale));
1455 void emit_fstp_reg(codegendata *cd, s4 reg)
1457 *(cd->mcodeptr++) = 0xdd;
1458 *(cd->mcodeptr++) = 0xd8 + (0x07 & (u1) (reg));
1462 void emit_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
1464 *(cd->mcodeptr++) = 0xd9;
1465 emit_membase(cd, (basereg),(disp),3);
1469 void emit_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
1471 *(cd->mcodeptr++) = 0xd9;
1472 emit_membase32(cd, (basereg),(disp),3);
1476 void emit_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
1478 *(cd->mcodeptr++) = 0xdd;
1479 emit_membase(cd, (basereg),(disp),3);
1483 void emit_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
1485 *(cd->mcodeptr++) = 0xdd;
1486 emit_membase32(cd, (basereg),(disp),3);
1490 void emit_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
1492 *(cd->mcodeptr++) = 0xdb;
1493 emit_membase(cd, (basereg),(disp),7);
1497 void emit_fstps_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1499 *(cd->mcodeptr++) = 0xd9;
1500 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1504 void emit_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale)
1506 *(cd->mcodeptr++) = 0xdd;
1507 emit_memindex(cd, 3,(disp),(basereg),(indexreg),(scale));
1511 void emit_fstps_mem(codegendata *cd, s4 mem)
1513 *(cd->mcodeptr++) = 0xd9;
1518 void emit_fstpl_mem(codegendata *cd, s4 mem)
1520 *(cd->mcodeptr++) = 0xdd;
1525 void emit_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
1527 *(cd->mcodeptr++) = 0xdb;
1528 emit_membase(cd, (basereg),(disp),2);
1532 void emit_fistpl_membase(codegendata *cd, s4 basereg, s4 disp)
1534 *(cd->mcodeptr++) = 0xdb;
1535 emit_membase(cd, (basereg),(disp),3);
1539 void emit_fistpll_membase(codegendata *cd, s4 basereg, s4 disp)
1541 *(cd->mcodeptr++) = 0xdf;
1542 emit_membase(cd, (basereg),(disp),7);
1546 void emit_fchs(codegendata *cd)
1548 *(cd->mcodeptr++) = 0xd9;
1549 *(cd->mcodeptr++) = 0xe0;
1553 void emit_faddp(codegendata *cd)
1555 *(cd->mcodeptr++) = 0xde;
1556 *(cd->mcodeptr++) = 0xc1;
1560 void emit_fadd_reg_st(codegendata *cd, s4 reg)
1562 *(cd->mcodeptr++) = 0xd8;
1563 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1567 void emit_fadd_st_reg(codegendata *cd, s4 reg)
1569 *(cd->mcodeptr++) = 0xdc;
1570 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1574 void emit_faddp_st_reg(codegendata *cd, s4 reg)
1576 *(cd->mcodeptr++) = 0xde;
1577 *(cd->mcodeptr++) = 0xc0 + (0x0f & (u1) (reg));
1581 void emit_fadds_membase(codegendata *cd, s4 basereg, s4 disp)
1583 *(cd->mcodeptr++) = 0xd8;
1584 emit_membase(cd, (basereg),(disp),0);
1588 void emit_faddl_membase(codegendata *cd, s4 basereg, s4 disp)
1590 *(cd->mcodeptr++) = 0xdc;
1591 emit_membase(cd, (basereg),(disp),0);
1595 void emit_fsub_reg_st(codegendata *cd, s4 reg)
1597 *(cd->mcodeptr++) = 0xd8;
1598 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1602 void emit_fsub_st_reg(codegendata *cd, s4 reg)
1604 *(cd->mcodeptr++) = 0xdc;
1605 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1609 void emit_fsubp_st_reg(codegendata *cd, s4 reg)
1611 *(cd->mcodeptr++) = 0xde;
1612 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1616 void emit_fsubp(codegendata *cd)
1618 *(cd->mcodeptr++) = 0xde;
1619 *(cd->mcodeptr++) = 0xe9;
1623 void emit_fsubs_membase(codegendata *cd, s4 basereg, s4 disp)
1625 *(cd->mcodeptr++) = 0xd8;
1626 emit_membase(cd, (basereg),(disp),4);
1630 void emit_fsubl_membase(codegendata *cd, s4 basereg, s4 disp)
1632 *(cd->mcodeptr++) = 0xdc;
1633 emit_membase(cd, (basereg),(disp),4);
1637 void emit_fmul_reg_st(codegendata *cd, s4 reg)
1639 *(cd->mcodeptr++) = 0xd8;
1640 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1644 void emit_fmul_st_reg(codegendata *cd, s4 reg)
1646 *(cd->mcodeptr++) = 0xdc;
1647 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1651 void emit_fmulp(codegendata *cd)
1653 *(cd->mcodeptr++) = 0xde;
1654 *(cd->mcodeptr++) = 0xc9;
1658 void emit_fmulp_st_reg(codegendata *cd, s4 reg)
1660 *(cd->mcodeptr++) = 0xde;
1661 *(cd->mcodeptr++) = 0xc8 + (0x07 & (u1) (reg));
1665 void emit_fmuls_membase(codegendata *cd, s4 basereg, s4 disp)
1667 *(cd->mcodeptr++) = 0xd8;
1668 emit_membase(cd, (basereg),(disp),1);
1672 void emit_fmull_membase(codegendata *cd, s4 basereg, s4 disp)
1674 *(cd->mcodeptr++) = 0xdc;
1675 emit_membase(cd, (basereg),(disp),1);
1679 void emit_fdiv_reg_st(codegendata *cd, s4 reg)
1681 *(cd->mcodeptr++) = 0xd8;
1682 *(cd->mcodeptr++) = 0xf0 + (0x07 & (u1) (reg));
1686 void emit_fdiv_st_reg(codegendata *cd, s4 reg)
1688 *(cd->mcodeptr++) = 0xdc;
1689 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1693 void emit_fdivp(codegendata *cd)
1695 *(cd->mcodeptr++) = 0xde;
1696 *(cd->mcodeptr++) = 0xf9;
1700 void emit_fdivp_st_reg(codegendata *cd, s4 reg)
1702 *(cd->mcodeptr++) = 0xde;
1703 *(cd->mcodeptr++) = 0xf8 + (0x07 & (u1) (reg));
1707 void emit_fxch(codegendata *cd)
1709 *(cd->mcodeptr++) = 0xd9;
1710 *(cd->mcodeptr++) = 0xc9;
1714 void emit_fxch_reg(codegendata *cd, s4 reg)
1716 *(cd->mcodeptr++) = 0xd9;
1717 *(cd->mcodeptr++) = 0xc8 + (0x07 & (reg));
1721 void emit_fprem(codegendata *cd)
1723 *(cd->mcodeptr++) = 0xd9;
1724 *(cd->mcodeptr++) = 0xf8;
1728 void emit_fprem1(codegendata *cd)
1730 *(cd->mcodeptr++) = 0xd9;
1731 *(cd->mcodeptr++) = 0xf5;
1735 void emit_fucom(codegendata *cd)
1737 *(cd->mcodeptr++) = 0xdd;
1738 *(cd->mcodeptr++) = 0xe1;
1742 void emit_fucom_reg(codegendata *cd, s4 reg)
1744 *(cd->mcodeptr++) = 0xdd;
1745 *(cd->mcodeptr++) = 0xe0 + (0x07 & (u1) (reg));
1749 void emit_fucomp_reg(codegendata *cd, s4 reg)
1751 *(cd->mcodeptr++) = 0xdd;
1752 *(cd->mcodeptr++) = 0xe8 + (0x07 & (u1) (reg));
1756 void emit_fucompp(codegendata *cd)
1758 *(cd->mcodeptr++) = 0xda;
1759 *(cd->mcodeptr++) = 0xe9;
1763 void emit_fnstsw(codegendata *cd)
1765 *(cd->mcodeptr++) = 0xdf;
1766 *(cd->mcodeptr++) = 0xe0;
1770 void emit_sahf(codegendata *cd)
1772 *(cd->mcodeptr++) = 0x9e;
1776 void emit_finit(codegendata *cd)
1778 *(cd->mcodeptr++) = 0x9b;
1779 *(cd->mcodeptr++) = 0xdb;
1780 *(cd->mcodeptr++) = 0xe3;
1784 void emit_fldcw_mem(codegendata *cd, s4 mem)
1786 *(cd->mcodeptr++) = 0xd9;
1791 void emit_fldcw_membase(codegendata *cd, s4 basereg, s4 disp)
1793 *(cd->mcodeptr++) = 0xd9;
1794 emit_membase(cd, (basereg),(disp),5);
1798 void emit_wait(codegendata *cd)
1800 *(cd->mcodeptr++) = 0x9b;
1804 void emit_ffree_reg(codegendata *cd, s4 reg)
1806 *(cd->mcodeptr++) = 0xdd;
1807 *(cd->mcodeptr++) = 0xc0 + (0x07 & (u1) (reg));
1811 void emit_fdecstp(codegendata *cd)
1813 *(cd->mcodeptr++) = 0xd9;
1814 *(cd->mcodeptr++) = 0xf6;
1818 void emit_fincstp(codegendata *cd)
1820 *(cd->mcodeptr++) = 0xd9;
1821 *(cd->mcodeptr++) = 0xf7;
1826 * These are local overrides for various environment variables in Emacs.
1827 * Please do not remove this and leave it at the end of the file, where
1828 * Emacs will automagically detect them.
1829 * ---------------------------------------------------------------------
1832 * indent-tabs-mode: t