1 /* src/vm/jit/i386/codegen.h - code generation macros and definitions for i386
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Andreas Krall
32 $Id: codegen.h 4389 2006-01-30 16:25:20Z twisti $
43 #include "vm/jit/jit.h"
46 #if defined(ENABLE_LSRA)
47 /* let LSRA allocate reserved registers (REG_ITMP[1|2|3]) */
48 # define LSRA_USES_REG_RES
51 /* some defines ***************************************************************/
53 #define PATCHER_CALL_SIZE 5 /* size in bytes of a patcher call */
56 /* additional functions and macros to generate code ***************************/
58 #define CALCOFFSETBYTES(var, reg, val) \
59 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
60 else if ((s4) (val) != 0) (var) += 1; \
61 else if ((reg) == EBP) (var) += 1;
64 #define CALCIMMEDIATEBYTES(var, val) \
65 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
69 /* gen_nullptr_check(objreg) */
71 #define gen_nullptr_check(objreg) \
73 i386_test_reg_reg(cd, (objreg), (objreg)); \
74 i386_jcc(cd, I386_CC_E, 0); \
75 codegen_addxnullrefs(cd, cd->mcodeptr); \
78 #define gen_bound_check \
80 i386_alu_membase_reg(cd, ALU_CMP, s1, OFFSET(java_arrayheader, size), s2); \
81 i386_jcc(cd, I386_CC_AE, 0); \
82 codegen_addxboundrefs(cd, cd->mcodeptr, s2); \
85 #define gen_div_check(v) \
87 if ((v)->flags & INMEMORY) { \
88 i386_alu_imm_membase(cd, ALU_CMP, 0, REG_SP, src->regoff * 4); \
90 i386_test_reg_reg(cd, src->regoff, src->regoff); \
92 i386_jcc(cd, I386_CC_E, 0); \
93 codegen_addxdivrefs(cd, cd->mcodeptr); \
97 /* MCODECHECK(icnt) */
99 #define MCODECHECK(icnt) \
100 if ((cd->mcodeptr + (icnt)) > (u1 *) cd->mcodeend) \
101 cd->mcodeptr = (u1 *) codegen_increase(cd, cd->mcodeptr)
105 generates an integer-move from register a to b.
106 if a and b are the same int-register, no code will be generated.
109 #define M_INTMOVE(reg,dreg) \
110 if ((reg) != (dreg)) { \
111 i386_mov_reg_reg(cd, (reg),(dreg)); \
116 generates a floating-point-move from register a to b.
117 if a and b are the same float-register, no code will be generated
120 #define M_FLTMOVE(reg,dreg) \
122 log_text("M_FLTMOVE"); \
127 #define M_LNGMEMMOVE(reg,dreg) \
129 i386_mov_membase_reg(cd, REG_SP, (reg) * 4, REG_ITMP1); \
130 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, (dreg) * 4); \
131 i386_mov_membase_reg(cd, REG_SP, (reg) * 4 + 4, REG_ITMP1); \
132 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, (dreg) * 4 + 4); \
137 this function generates code to fetch data from a pseudo-register
138 into a real register.
139 If the pseudo-register has actually been assigned to a real
140 register, no code will be emitted, since following operations
141 can use this register directly.
143 v: pseudoregister to be fetched from
144 tempregnum: temporary register to be used if v is actually spilled to ram
146 return: the register number, where the operand can be found after
147 fetching (this wil be either tempregnum or the register
148 number allready given to v)
151 #define var_to_reg_int(regnr,v,tempnr) \
152 if ((v)->flags & INMEMORY) { \
154 i386_mov_membase_reg(cd, REG_SP, (v)->regoff * 4, tempnr); \
157 regnr = (v)->regoff; \
162 #define var_to_reg_flt(regnr,v,tempnr) \
163 if ((v)->type == TYPE_FLT) { \
164 if ((v)->flags & INMEMORY) { \
166 i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
170 i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
172 regnr = (v)->regoff; \
175 if ((v)->flags & INMEMORY) { \
177 i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
181 i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
183 regnr = (v)->regoff; \
187 #define NEW_var_to_reg_flt(regnr,v,tempnr) \
188 if ((v)->type == TYPE_FLT) { \
189 if ((v)->flags & INMEMORY) { \
191 i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
195 regnr = (v)->regoff; \
198 if ((v)->flags & INMEMORY) { \
200 i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
204 regnr = (v)->regoff; \
209 /* store_reg_to_var_xxx:
210 This function generates the code to store the result of an operation
211 back into a spilled pseudo-variable.
212 If the pseudo-variable has not been spilled in the first place, this
213 function will generate nothing.
215 v ............ Pseudovariable
216 tempregnum ... Number of the temporary registers as returned by
220 #define store_reg_to_var_int(sptr, tempregnum) \
221 if ((sptr)->flags & INMEMORY) { \
223 i386_mov_reg_membase(cd, tempregnum, REG_SP, (sptr)->regoff * 4); \
227 #define store_reg_to_var_flt(sptr, tempregnum) \
228 if ((sptr)->type == TYPE_FLT) { \
229 if ((sptr)->flags & INMEMORY) { \
231 i386_fstps_membase(cd, REG_SP, (sptr)->regoff * 4); \
234 /* i386_fxch_reg((sptr)->regoff);*/ \
235 i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
239 if ((sptr)->flags & INMEMORY) { \
241 i386_fstpl_membase(cd, REG_SP, (sptr)->regoff * 4); \
244 /* i386_fxch_reg((sptr)->regoff);*/ \
245 i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
251 #define M_COPY(from,to) \
252 d = reg_of_var(rd, to, REG_ITMP1); \
253 if ((from->regoff != to->regoff) || \
254 ((from->flags ^ to->flags) & INMEMORY)) { \
255 if (IS_FLT_DBL_TYPE(from->type)) { \
256 var_to_reg_flt(s1, from, d); \
257 /*M_FLTMOVE(s1, d);*/ \
258 store_reg_to_var_flt(to, d); \
260 if (!IS_2_WORD_TYPE(from->type)) { \
261 if (to->flags & INMEMORY) { \
262 if (from->flags & INMEMORY) { \
263 i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, REG_ITMP1); \
264 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, to->regoff * 4); \
266 i386_mov_reg_membase(cd, from->regoff, REG_SP, to->regoff * 4); \
269 if (from->flags & INMEMORY) { \
270 i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, to->regoff); \
272 i386_mov_reg_reg(cd, from->regoff, to->regoff); \
276 M_LNGMEMMOVE(from->regoff, to->regoff); \
281 /* macros to create code ******************************************************/
296 /* opcodes for alu instructions */
324 I386_CC_B = 2, I386_CC_C = 2, I386_CC_NAE = 2,
325 I386_CC_BE = 6, I386_CC_NA = 6,
326 I386_CC_AE = 3, I386_CC_NB = 3, I386_CC_NC = 3,
327 I386_CC_E = 4, I386_CC_Z = 4,
328 I386_CC_NE = 5, I386_CC_NZ = 5,
329 I386_CC_A = 7, I386_CC_NBE = 7,
330 I386_CC_S = 8, I386_CC_LZ = 8,
331 I386_CC_NS = 9, I386_CC_GEZ = 9,
332 I386_CC_P = 0x0a, I386_CC_PE = 0x0a,
333 I386_CC_NP = 0x0b, I386_CC_PO = 0x0b,
334 I386_CC_L = 0x0c, I386_CC_NGE = 0x0c,
335 I386_CC_GE = 0x0d, I386_CC_NL = 0x0d,
336 I386_CC_LE = 0x0e, I386_CC_NG = 0x0e,
337 I386_CC_G = 0x0f, I386_CC_NLE = 0x0f,
342 /* modrm and stuff */
344 #define i386_address_byte(mod,reg,rm) \
345 *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | (((rm) & 0x07)));
348 #define i386_emit_reg(reg,rm) \
349 i386_address_byte(3,(reg),(rm));
352 #define i386_is_imm8(imm) \
353 (((int)(imm) >= -128 && (int)(imm) <= 127))
356 #define i386_emit_imm8(imm) \
357 *(cd->mcodeptr++) = (u1) ((imm) & 0xff);
360 #define i386_emit_imm16(imm) \
363 imb.i = (int) (imm); \
364 *(cd->mcodeptr++) = imb.b[0]; \
365 *(cd->mcodeptr++) = imb.b[1]; \
369 #define i386_emit_imm32(imm) \
372 imb.i = (int) (imm); \
373 *(cd->mcodeptr++) = imb.b[0]; \
374 *(cd->mcodeptr++) = imb.b[1]; \
375 *(cd->mcodeptr++) = imb.b[2]; \
376 *(cd->mcodeptr++) = imb.b[3]; \
380 #define i386_emit_mem(r,mem) \
382 i386_address_byte(0,(r),5); \
383 i386_emit_imm32((mem)); \
387 #define i386_emit_membase(basereg,disp,dreg) \
389 if ((basereg) == ESP) { \
391 i386_address_byte(0, (dreg), ESP); \
392 i386_address_byte(0, ESP, ESP); \
393 } else if (i386_is_imm8((disp))) { \
394 i386_address_byte(1, (dreg), ESP); \
395 i386_address_byte(0, ESP, ESP); \
396 i386_emit_imm8((disp)); \
398 i386_address_byte(2, (dreg), ESP); \
399 i386_address_byte(0, ESP, ESP); \
400 i386_emit_imm32((disp)); \
405 if ((disp) == 0 && (basereg) != EBP) { \
406 i386_address_byte(0, (dreg), (basereg)); \
410 if (i386_is_imm8((disp))) { \
411 i386_address_byte(1, (dreg), (basereg)); \
412 i386_emit_imm8((disp)); \
414 i386_address_byte(2, (dreg), (basereg)); \
415 i386_emit_imm32((disp)); \
420 #define i386_emit_membase32(basereg,disp,dreg) \
422 if ((basereg) == ESP) { \
423 i386_address_byte(2, (dreg), ESP); \
424 i386_address_byte(0, ESP, ESP); \
425 i386_emit_imm32((disp)); \
427 i386_address_byte(2, (dreg), (basereg)); \
428 i386_emit_imm32((disp)); \
433 #define i386_emit_memindex(reg,disp,basereg,indexreg,scale) \
435 if ((basereg) == -1) { \
436 i386_address_byte(0, (reg), 4); \
437 i386_address_byte((scale), (indexreg), 5); \
438 i386_emit_imm32((disp)); \
440 } else if ((disp) == 0 && (basereg) != EBP) { \
441 i386_address_byte(0, (reg), 4); \
442 i386_address_byte((scale), (indexreg), (basereg)); \
444 } else if (i386_is_imm8((disp))) { \
445 i386_address_byte(1, (reg), 4); \
446 i386_address_byte((scale), (indexreg), (basereg)); \
447 i386_emit_imm8 ((disp)); \
450 i386_address_byte(2, (reg), 4); \
451 i386_address_byte((scale), (indexreg), (basereg)); \
452 i386_emit_imm32((disp)); \
457 /* macros to create code ******************************************************/
459 #define M_ILD(a,b,disp) i386_mov_membase_reg(cd, (b), (disp), (a))
460 #define M_ALD(a,b,disp) M_ILD(a,b,disp)
462 #define M_IST(a,b,disp) i386_mov_reg_membase(cd, (a), (b), (disp))
463 #define M_IST_IMM(a,b,disp) i386_mov_imm_membase(cd, (a), (b), (disp))
464 #define M_AST(a,b,disp) M_IST(a,b,disp)
465 #define M_AST_IMM(a,b,disp) M_IST_IMM(a,b,disp)
467 #define M_IADD_IMM(a,b) i386_alu_imm_reg(cd, ALU_ADD, (a), (b))
468 #define M_IADD_IMM32(a,b) i386_alu_imm32_reg(cd, ALU_ADD, (a), (b))
469 #define M_ISUB_IMM(a,b) i386_alu_imm_reg(cd, ALU_SUB, (a), (b))
471 #define M_IADD_IMM_MEMBASE(a,b,c) i386_alu_imm_membase(cd, ALU_ADD, (a), (b), (c))
473 #define M_AADD_IMM(a,b) M_IADD_IMM(a,b)
474 #define M_AADD_IMM32(a,b) M_IADD_IMM32(a,b)
475 #define M_ASUB_IMM(a,b) M_ISUB_IMM(a,b)
477 #define M_OR_MEMBASE(a,b,c) i386_alu_membase_reg(cd, ALU_OR, (a), (b), (c))
478 #define M_XOR(a,b) i386_alu_reg_reg(cd, ALU_XOR, (a), (b))
479 #define M_CLR(a) M_XOR(a,a)
481 #define M_PUSH(a) i386_push_reg(cd, (a))
482 #define M_PUSH_IMM(a) i386_push_imm(cd, (a))
483 #define M_POP(a) i386_pop_reg(cd, (a))
485 #define M_MOV(a,b) i386_mov_reg_reg(cd, (a), (b))
486 #define M_MOV_IMM(a,b) i386_mov_imm_reg(cd, (a), (b))
488 #define M_TEST(a) i386_test_reg_reg(cd, (a), (a))
490 #define M_CALL(a) i386_call_reg(cd, (a))
491 #define M_CALL_IMM(a) i386_call_imm(cd, (a))
492 #define M_RET i386_ret(cd)
494 #define M_BEQ(a) i386_jcc(cd, I386_CC_E, (a))
495 #define M_BNE(a) i386_jcc(cd, I386_CC_NE, (a))
496 #define M_BLT(a) i386_jcc(cd, I386_CC_L, (a))
497 #define M_BLE(a) i386_jcc(cd, I386_CC_LE, (a))
498 #define M_BGE(a) i386_jcc(cd, I386_CC_GE, (a))
499 #define M_BGT(a) i386_jcc(cd, I386_CC_G, (a))
501 #define M_BBE(a) i386_jcc(cd, I386_CC_BE, (a))
502 #define M_BAE(a) i386_jcc(cd, I386_CC_AE, (a))
504 #define M_JMP(a) i386_jmp_reg(cd, (a))
505 #define M_JMP_IMM(a) i386_jmp_imm(cd, (a))
507 #define M_NOP i386_nop(cd)
510 /* function gen_resolvebranch **************************************************
512 backpatches a branch instruction
514 parameters: ip ... pointer to instruction after branch (void*)
515 so ... offset of instruction after branch (s4)
516 to ... offset of branch target (s4)
518 *******************************************************************************/
520 #define gen_resolvebranch(ip,so,to) \
521 *((void **) ((ip) - 4)) = (void **) ((to) - (so));
524 #endif /* _CODEGEN_H */
528 * These are local overrides for various environment variables in Emacs.
529 * Please do not remove this and leave it at the end of the file, where
530 * Emacs will automagically detect them.
531 * ---------------------------------------------------------------------
534 * indent-tabs-mode: t