1 /* jit/i386/codegen.h - code generation macros and definitions for i386
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
4 R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser,
5 M. Probst, S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck,
6 P. Tomsich, J. Wenninger
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
25 Contact: cacao@complang.tuwien.ac.at
27 Authors: Andreas Krall
30 $Id: codegen.h 1461 2004-11-05 16:23:47Z twisti $
43 /* define x86 register numbers */
54 /* preallocated registers *****************************************************/
56 /* integer registers */
58 #define REG_RESULT EAX /* to deliver method results */
59 #define REG_RESULT2 EDX /* to deliver long method results */
61 #define REG_ITMP1 EAX /* temporary register */
62 #define REG_ITMP2 ECX /* temporary register */
63 #define REG_ITMP3 EDX /* temporary register */
65 #define REG_NULL -1 /* used for reg_of_var where d is not needed */
67 #define REG_ITMP1_XPTR EAX /* exception pointer = temporary register 1 */
68 #define REG_ITMP2_XPC ECX /* exception pc = temporary register 2 */
70 #define REG_SP ESP /* stack pointer */
72 /* floating point registers */
74 #define REG_FRESULT 0 /* to deliver floating point method results */
75 #define REG_FTMP1 6 /* temporary floating point register */
76 #define REG_FTMP2 7 /* temporary floating point register */
77 #define REG_FTMP3 7 /* temporary floating point register */
80 #define INT_SAV_CNT 3 /* number of int callee saved registers */
81 #define INT_ARG_CNT 0 /* number of int argument registers */
83 #define FLT_SAV_CNT 0 /* number of flt callee saved registers */
84 #define FLT_ARG_CNT 0 /* number of flt argument registers */
87 /* additional functions and macros to generate code ***************************/
89 #define BlockPtrOfPC(pc) ((basicblock *) iptr->target)
93 #define COUNT_SPILLS count_spills++
99 #define CALCOFFSETBYTES(var, reg, val) \
100 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
101 else if ((s4) (val) != 0) (var) += 1; \
102 else if ((reg) == EBP) (var) += 1;
105 #define CALCIMMEDIATEBYTES(var, val) \
106 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
110 /* gen_nullptr_check(objreg) */
112 #define gen_nullptr_check(objreg) \
114 i386_test_reg_reg(cd, (objreg), (objreg)); \
115 i386_jcc(cd, I386_CC_E, 0); \
116 codegen_addxnullrefs(cd, cd->mcodeptr); \
119 #define gen_bound_check \
121 i386_alu_membase_reg(cd, I386_CMP, s1, OFFSET(java_arrayheader, size), s2); \
122 i386_jcc(cd, I386_CC_AE, 0); \
123 codegen_addxboundrefs(cd, cd->mcodeptr, s2); \
126 #define gen_div_check(v) \
128 if ((v)->flags & INMEMORY) { \
129 i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8); \
131 i386_test_reg_reg(cd, src->regoff, src->regoff); \
133 i386_jcc(cd, I386_CC_E, 0); \
134 codegen_addxdivrefs(cd, cd->mcodeptr); \
138 /* MCODECHECK(icnt) */
140 #define MCODECHECK(icnt) \
141 if ((cd->mcodeptr + (icnt)) > (u1 *) cd->mcodeend) \
142 cd->mcodeptr = (u1 *) codegen_increase(cd, cd->mcodeptr)
146 generates an integer-move from register a to b.
147 if a and b are the same int-register, no code will be generated.
150 #define M_INTMOVE(reg,dreg) \
151 if ((reg) != (dreg)) { \
152 i386_mov_reg_reg(cd, (reg),(dreg)); \
157 generates a floating-point-move from register a to b.
158 if a and b are the same float-register, no code will be generated
161 #define M_FLTMOVE(reg,dreg) panic("M_FLTMOVE");
163 #define M_LNGMEMMOVE(reg,dreg) \
165 i386_mov_membase_reg(cd, REG_SP, (reg) * 8, REG_ITMP1); \
166 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, (dreg) * 8); \
167 i386_mov_membase_reg(cd, REG_SP, (reg) * 8 + 4, REG_ITMP1); \
168 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, (dreg) * 8 + 4); \
173 this function generates code to fetch data from a pseudo-register
174 into a real register.
175 If the pseudo-register has actually been assigned to a real
176 register, no code will be emitted, since following operations
177 can use this register directly.
179 v: pseudoregister to be fetched from
180 tempregnum: temporary register to be used if v is actually spilled to ram
182 return: the register number, where the operand can be found after
183 fetching (this wil be either tempregnum or the register
184 number allready given to v)
187 #define var_to_reg_int(regnr,v,tempnr) \
188 if ((v)->flags & INMEMORY) { \
190 i386_mov_membase_reg(cd, REG_SP, (v)->regoff * 8, tempnr); \
193 regnr = (v)->regoff; \
198 #define var_to_reg_flt(regnr,v,tempnr) \
199 if ((v)->type == TYPE_FLT) { \
200 if ((v)->flags & INMEMORY) { \
202 i386_flds_membase(cd, REG_SP, (v)->regoff * 8); \
206 i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
208 regnr = (v)->regoff; \
211 if ((v)->flags & INMEMORY) { \
213 i386_fldl_membase(cd, REG_SP, (v)->regoff * 8); \
217 i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
219 regnr = (v)->regoff; \
223 #define NEW_var_to_reg_flt(regnr,v,tempnr) \
224 if ((v)->type == TYPE_FLT) { \
225 if ((v)->flags & INMEMORY) { \
227 i386_flds_membase(cd, REG_SP, (v)->regoff * 8); \
231 regnr = (v)->regoff; \
234 if ((v)->flags & INMEMORY) { \
236 i386_fldl_membase(cd, REG_SP, (v)->regoff * 8); \
240 regnr = (v)->regoff; \
245 /* store_reg_to_var_xxx:
246 This function generates the code to store the result of an operation
247 back into a spilled pseudo-variable.
248 If the pseudo-variable has not been spilled in the first place, this
249 function will generate nothing.
251 v ............ Pseudovariable
252 tempregnum ... Number of the temporary registers as returned by
256 #define store_reg_to_var_int(sptr, tempregnum) \
257 if ((sptr)->flags & INMEMORY) { \
259 i386_mov_reg_membase(cd, tempregnum, REG_SP, (sptr)->regoff * 8); \
263 #define store_reg_to_var_flt(sptr, tempregnum) \
264 if ((sptr)->type == TYPE_FLT) { \
265 if ((sptr)->flags & INMEMORY) { \
267 i386_fstps_membase(cd, REG_SP, (sptr)->regoff * 8); \
270 /* i386_fxch_reg((sptr)->regoff);*/ \
271 i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
275 if ((sptr)->flags & INMEMORY) { \
277 i386_fstpl_membase(cd, REG_SP, (sptr)->regoff * 8); \
280 /* i386_fxch_reg((sptr)->regoff);*/ \
281 i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
287 #define M_COPY(from,to) \
288 d = reg_of_var(rd, to, REG_ITMP1); \
289 if ((from->regoff != to->regoff) || \
290 ((from->flags ^ to->flags) & INMEMORY)) { \
291 if (IS_FLT_DBL_TYPE(from->type)) { \
292 var_to_reg_flt(s1, from, d); \
293 /*M_FLTMOVE(s1, d);*/ \
294 store_reg_to_var_flt(to, d); \
296 if (!IS_2_WORD_TYPE(from->type)) { \
297 if (to->flags & INMEMORY) { \
298 if (from->flags & INMEMORY) { \
299 i386_mov_membase_reg(cd, REG_SP, from->regoff * 8, REG_ITMP1); \
300 i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, to->regoff * 8); \
302 i386_mov_reg_membase(cd, from->regoff, REG_SP, to->regoff * 8); \
305 if (from->flags & INMEMORY) { \
306 i386_mov_membase_reg(cd, REG_SP, from->regoff * 8, to->regoff); \
308 i386_mov_reg_reg(cd, from->regoff, to->regoff); \
312 M_LNGMEMMOVE(from->regoff, to->regoff); \
317 /* macros to create code ******************************************************/
332 /* opcodes for alu instructions */
360 I386_CC_B = 2, I386_CC_C = 2, I386_CC_NAE = 2,
361 I386_CC_BE = 6, I386_CC_NA = 6,
362 I386_CC_AE = 3, I386_CC_NB = 3, I386_CC_NC = 3,
363 I386_CC_E = 4, I386_CC_Z = 4,
364 I386_CC_NE = 5, I386_CC_NZ = 5,
365 I386_CC_A = 7, I386_CC_NBE = 7,
366 I386_CC_S = 8, I386_CC_LZ = 8,
367 I386_CC_NS = 9, I386_CC_GEZ = 9,
368 I386_CC_P = 0x0a, I386_CC_PE = 0x0a,
369 I386_CC_NP = 0x0b, I386_CC_PO = 0x0b,
370 I386_CC_L = 0x0c, I386_CC_NGE = 0x0c,
371 I386_CC_GE = 0x0d, I386_CC_NL = 0x0d,
372 I386_CC_LE = 0x0e, I386_CC_NG = 0x0e,
373 I386_CC_G = 0x0f, I386_CC_NLE = 0x0f,
378 /* modrm and stuff */
380 #define i386_address_byte(mod,reg,rm) \
381 *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | (((rm) & 0x07)));
384 #define i386_emit_reg(reg,rm) \
385 i386_address_byte(3,(reg),(rm));
388 #define i386_is_imm8(imm) \
389 (((int)(imm) >= -128 && (int)(imm) <= 127))
392 #define i386_emit_imm8(imm) \
393 *(cd->mcodeptr++) = (u1) ((imm) & 0xff);
396 #define i386_emit_imm16(imm) \
399 imb.i = (int) (imm); \
400 *(cd->mcodeptr++) = imb.b[0]; \
401 *(cd->mcodeptr++) = imb.b[1]; \
405 #define i386_emit_imm32(imm) \
408 imb.i = (int) (imm); \
409 *(cd->mcodeptr++) = imb.b[0]; \
410 *(cd->mcodeptr++) = imb.b[1]; \
411 *(cd->mcodeptr++) = imb.b[2]; \
412 *(cd->mcodeptr++) = imb.b[3]; \
416 #define i386_emit_mem(r,mem) \
418 i386_address_byte(0,(r),5); \
419 i386_emit_imm32((mem)); \
423 #define i386_emit_membase(basereg,disp,dreg) \
425 if ((basereg) == ESP) { \
427 i386_address_byte(0, (dreg), ESP); \
428 i386_address_byte(0, ESP, ESP); \
429 } else if (i386_is_imm8((disp))) { \
430 i386_address_byte(1, (dreg), ESP); \
431 i386_address_byte(0, ESP, ESP); \
432 i386_emit_imm8((disp)); \
434 i386_address_byte(2, (dreg), ESP); \
435 i386_address_byte(0, ESP, ESP); \
436 i386_emit_imm32((disp)); \
441 if ((disp) == 0 && (basereg) != EBP) { \
442 i386_address_byte(0, (dreg), (basereg)); \
446 if (i386_is_imm8((disp))) { \
447 i386_address_byte(1, (dreg), (basereg)); \
448 i386_emit_imm8((disp)); \
450 i386_address_byte(2, (dreg), (basereg)); \
451 i386_emit_imm32((disp)); \
456 #define i386_emit_memindex(reg,disp,basereg,indexreg,scale) \
458 if ((basereg) == -1) { \
459 i386_address_byte(0, (reg), 4); \
460 i386_address_byte((scale), (indexreg), 5); \
461 i386_emit_imm32((disp)); \
463 } else if ((disp) == 0 && (basereg) != EBP) { \
464 i386_address_byte(0, (reg), 4); \
465 i386_address_byte((scale), (indexreg), (basereg)); \
467 } else if (i386_is_imm8((disp))) { \
468 i386_address_byte(1, (reg), 4); \
469 i386_address_byte((scale), (indexreg), (basereg)); \
470 i386_emit_imm8 ((disp)); \
473 i386_address_byte(2, (reg), 4); \
474 i386_address_byte((scale), (indexreg), (basereg)); \
475 i386_emit_imm32((disp)); \
480 /* function gen_resolvebranch **************************************************
482 backpatches a branch instruction
484 parameters: ip ... pointer to instruction after branch (void*)
485 so ... offset of instruction after branch (s4)
486 to ... offset of branch target (s4)
488 *******************************************************************************/
490 #define gen_resolvebranch(ip,so,to) \
491 *((void **) ((ip) - 4)) = (void **) ((to) - (so));
494 /* function prototypes */
496 void thread_restartcriticalsection(ucontext_t*);
498 #endif /* _CODEGEN_H */
502 * These are local overrides for various environment variables in Emacs.
503 * Please do not remove this and leave it at the end of the file, where
504 * Emacs will automagically detect them.
505 * ---------------------------------------------------------------------
508 * indent-tabs-mode: t